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Linux/arch/x86/include/asm/io_apic.h

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  1 #ifndef _ASM_X86_IO_APIC_H
  2 #define _ASM_X86_IO_APIC_H
  3 
  4 #include <linux/types.h>
  5 #include <asm/mpspec.h>
  6 #include <asm/apicdef.h>
  7 #include <asm/irq_vectors.h>
  8 #include <asm/x86_init.h>
  9 /*
 10  * Intel IO-APIC support for SMP and UP systems.
 11  *
 12  * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
 13  */
 14 
 15 /* I/O Unit Redirection Table */
 16 #define IO_APIC_REDIR_VECTOR_MASK       0x000FF
 17 #define IO_APIC_REDIR_DEST_LOGICAL      0x00800
 18 #define IO_APIC_REDIR_DEST_PHYSICAL     0x00000
 19 #define IO_APIC_REDIR_SEND_PENDING      (1 << 12)
 20 #define IO_APIC_REDIR_REMOTE_IRR        (1 << 14)
 21 #define IO_APIC_REDIR_LEVEL_TRIGGER     (1 << 15)
 22 #define IO_APIC_REDIR_MASKED            (1 << 16)
 23 
 24 /*
 25  * The structure of the IO-APIC:
 26  */
 27 union IO_APIC_reg_00 {
 28         u32     raw;
 29         struct {
 30                 u32     __reserved_2    : 14,
 31                         LTS             :  1,
 32                         delivery_type   :  1,
 33                         __reserved_1    :  8,
 34                         ID              :  8;
 35         } __attribute__ ((packed)) bits;
 36 };
 37 
 38 union IO_APIC_reg_01 {
 39         u32     raw;
 40         struct {
 41                 u32     version         :  8,
 42                         __reserved_2    :  7,
 43                         PRQ             :  1,
 44                         entries         :  8,
 45                         __reserved_1    :  8;
 46         } __attribute__ ((packed)) bits;
 47 };
 48 
 49 union IO_APIC_reg_02 {
 50         u32     raw;
 51         struct {
 52                 u32     __reserved_2    : 24,
 53                         arbitration     :  4,
 54                         __reserved_1    :  4;
 55         } __attribute__ ((packed)) bits;
 56 };
 57 
 58 union IO_APIC_reg_03 {
 59         u32     raw;
 60         struct {
 61                 u32     boot_DT         :  1,
 62                         __reserved_1    : 31;
 63         } __attribute__ ((packed)) bits;
 64 };
 65 
 66 struct IO_APIC_route_entry {
 67         __u32   vector          :  8,
 68                 delivery_mode   :  3,   /* 000: FIXED
 69                                          * 001: lowest prio
 70                                          * 111: ExtINT
 71                                          */
 72                 dest_mode       :  1,   /* 0: physical, 1: logical */
 73                 delivery_status :  1,
 74                 polarity        :  1,
 75                 irr             :  1,
 76                 trigger         :  1,   /* 0: edge, 1: level */
 77                 mask            :  1,   /* 0: enabled, 1: disabled */
 78                 __reserved_2    : 15;
 79 
 80         __u32   __reserved_3    : 24,
 81                 dest            :  8;
 82 } __attribute__ ((packed));
 83 
 84 struct IR_IO_APIC_route_entry {
 85         __u64   vector          : 8,
 86                 zero            : 3,
 87                 index2          : 1,
 88                 delivery_status : 1,
 89                 polarity        : 1,
 90                 irr             : 1,
 91                 trigger         : 1,
 92                 mask            : 1,
 93                 reserved        : 31,
 94                 format          : 1,
 95                 index           : 15;
 96 } __attribute__ ((packed));
 97 
 98 #define IOAPIC_AUTO     -1
 99 #define IOAPIC_EDGE     0
100 #define IOAPIC_LEVEL    1
101 #define IOAPIC_MAP_ALLOC                0x1
102 #define IOAPIC_MAP_CHECK                0x2
103 
104 #ifdef CONFIG_X86_IO_APIC
105 
106 /*
107  * # of IO-APICs and # of IRQ routing registers
108  */
109 extern int nr_ioapics;
110 
111 extern int mpc_ioapic_id(int ioapic);
112 extern unsigned int mpc_ioapic_addr(int ioapic);
113 extern struct mp_ioapic_gsi *mp_ioapic_gsi_routing(int ioapic);
114 
115 #define MP_MAX_IOAPIC_PIN 127
116 
117 /* # of MP IRQ source entries */
118 extern int mp_irq_entries;
119 
120 /* MP IRQ source entries */
121 extern struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
122 
123 /* Older SiS APIC requires we rewrite the index register */
124 extern int sis_apic_bug;
125 
126 /* 1 if "noapic" boot option passed */
127 extern int skip_ioapic_setup;
128 
129 /* 1 if "noapic" boot option passed */
130 extern int noioapicquirk;
131 
132 /* -1 if "noapic" boot option passed */
133 extern int noioapicreroute;
134 
135 extern unsigned long io_apic_irqs;
136 
137 #define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1 << (x)) & io_apic_irqs))
138 
139 /*
140  * If we use the IO-APIC for IRQ routing, disable automatic
141  * assignment of PCI IRQ's.
142  */
143 #define io_apic_assign_pci_irqs \
144         (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
145 
146 struct irq_cfg;
147 extern void ioapic_insert_resources(void);
148 extern int arch_early_ioapic_init(void);
149 
150 extern int native_setup_ioapic_entry(int, struct IO_APIC_route_entry *,
151                                      unsigned int, int,
152                                      struct io_apic_irq_attr *);
153 extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
154 
155 extern void native_eoi_ioapic_pin(int apic, int pin, int vector);
156 
157 extern int save_ioapic_entries(void);
158 extern void mask_ioapic_entries(void);
159 extern int restore_ioapic_entries(void);
160 
161 extern void setup_ioapic_ids_from_mpc(void);
162 extern void setup_ioapic_ids_from_mpc_nocheck(void);
163 
164 struct io_apic_irq_attr {
165         int ioapic;
166         int ioapic_pin;
167         int trigger;
168         int polarity;
169 };
170 
171 enum ioapic_domain_type {
172         IOAPIC_DOMAIN_INVALID,
173         IOAPIC_DOMAIN_LEGACY,
174         IOAPIC_DOMAIN_STRICT,
175         IOAPIC_DOMAIN_DYNAMIC,
176 };
177 
178 struct device_node;
179 struct irq_domain;
180 struct irq_domain_ops;
181 
182 struct ioapic_domain_cfg {
183         enum ioapic_domain_type         type;
184         const struct irq_domain_ops     *ops;
185         struct device_node              *dev;
186 };
187 
188 struct mp_ioapic_gsi{
189         u32 gsi_base;
190         u32 gsi_end;
191 };
192 extern u32 gsi_top;
193 
194 extern int mp_find_ioapic(u32 gsi);
195 extern int mp_find_ioapic_pin(int ioapic, u32 gsi);
196 extern u32 mp_pin_to_gsi(int ioapic, int pin);
197 extern int mp_map_gsi_to_irq(u32 gsi, unsigned int flags);
198 extern void mp_unmap_irq(int irq);
199 extern int mp_register_ioapic(int id, u32 address, u32 gsi_base,
200                               struct ioapic_domain_cfg *cfg);
201 extern int mp_unregister_ioapic(u32 gsi_base);
202 extern int mp_ioapic_registered(u32 gsi_base);
203 extern int mp_irqdomain_map(struct irq_domain *domain, unsigned int virq,
204                             irq_hw_number_t hwirq);
205 extern void mp_irqdomain_unmap(struct irq_domain *domain, unsigned int virq);
206 extern int mp_set_gsi_attr(u32 gsi, int trigger, int polarity, int node);
207 extern void __init pre_init_apic_IRQ0(void);
208 
209 extern void mp_save_irq(struct mpc_intsrc *m);
210 
211 extern void disable_ioapic_support(void);
212 
213 extern void __init native_io_apic_init_mappings(void);
214 extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);
215 extern void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int val);
216 extern void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int val);
217 extern void native_disable_io_apic(void);
218 extern void native_io_apic_print_entries(unsigned int apic, unsigned int nr_entries);
219 extern void intel_ir_io_apic_print_entries(unsigned int apic, unsigned int nr_entries);
220 extern int native_ioapic_set_affinity(struct irq_data *,
221                                       const struct cpumask *,
222                                       bool);
223 
224 static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
225 {
226         return x86_io_apic_ops.read(apic, reg);
227 }
228 
229 static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value)
230 {
231         x86_io_apic_ops.write(apic, reg, value);
232 }
233 static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)
234 {
235         x86_io_apic_ops.modify(apic, reg, value);
236 }
237 
238 extern void io_apic_eoi(unsigned int apic, unsigned int vector);
239 
240 extern void setup_IO_APIC(void);
241 extern void enable_IO_APIC(void);
242 extern void disable_IO_APIC(void);
243 extern void setup_ioapic_dest(void);
244 extern int IO_APIC_get_PCI_irq_vector(int bus, int devfn, int pin);
245 extern void print_IO_APICs(void);
246 #else  /* !CONFIG_X86_IO_APIC */
247 
248 #define IO_APIC_IRQ(x)          0
249 #define io_apic_assign_pci_irqs 0
250 #define setup_ioapic_ids_from_mpc x86_init_noop
251 static inline void ioapic_insert_resources(void) { }
252 static inline int arch_early_ioapic_init(void) { return 0; }
253 static inline void print_IO_APICs(void) {}
254 #define gsi_top (NR_IRQS_LEGACY)
255 static inline int mp_find_ioapic(u32 gsi) { return 0; }
256 static inline u32 mp_pin_to_gsi(int ioapic, int pin) { return UINT_MAX; }
257 static inline int mp_map_gsi_to_irq(u32 gsi, unsigned int flags) { return gsi; }
258 static inline void mp_unmap_irq(int irq) { }
259 
260 static inline int save_ioapic_entries(void)
261 {
262         return -ENOMEM;
263 }
264 
265 static inline void mask_ioapic_entries(void) { }
266 static inline int restore_ioapic_entries(void)
267 {
268         return -ENOMEM;
269 }
270 
271 static inline void mp_save_irq(struct mpc_intsrc *m) { };
272 static inline void disable_ioapic_support(void) { }
273 #define native_io_apic_init_mappings    NULL
274 #define native_io_apic_read             NULL
275 #define native_io_apic_write            NULL
276 #define native_io_apic_modify           NULL
277 #define native_disable_io_apic          NULL
278 #define native_io_apic_print_entries    NULL
279 #define native_ioapic_set_affinity      NULL
280 #define native_setup_ioapic_entry       NULL
281 #define native_eoi_ioapic_pin           NULL
282 
283 static inline void setup_IO_APIC(void) { }
284 static inline void enable_IO_APIC(void) { }
285 static inline void setup_ioapic_dest(void) { }
286 
287 #endif
288 
289 #endif /* _ASM_X86_IO_APIC_H */
290 

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