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TOMOYO Linux Cross Reference
Linux/arch/x86/include/asm/kvm_host.h

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  1 /*
  2  * Kernel-based Virtual Machine driver for Linux
  3  *
  4  * This header defines architecture specific interfaces, x86 version
  5  *
  6  * This work is licensed under the terms of the GNU GPL, version 2.  See
  7  * the COPYING file in the top-level directory.
  8  *
  9  */
 10 
 11 #ifndef _ASM_X86_KVM_HOST_H
 12 #define _ASM_X86_KVM_HOST_H
 13 
 14 #include <linux/types.h>
 15 #include <linux/mm.h>
 16 #include <linux/mmu_notifier.h>
 17 #include <linux/tracepoint.h>
 18 #include <linux/cpumask.h>
 19 #include <linux/irq_work.h>
 20 
 21 #include <linux/kvm.h>
 22 #include <linux/kvm_para.h>
 23 #include <linux/kvm_types.h>
 24 #include <linux/perf_event.h>
 25 #include <linux/pvclock_gtod.h>
 26 #include <linux/clocksource.h>
 27 
 28 #include <asm/pvclock-abi.h>
 29 #include <asm/desc.h>
 30 #include <asm/mtrr.h>
 31 #include <asm/msr-index.h>
 32 #include <asm/asm.h>
 33 
 34 #define KVM_MAX_VCPUS 255
 35 #define KVM_SOFT_MAX_VCPUS 160
 36 #define KVM_USER_MEM_SLOTS 509
 37 /* memory slots that are not exposed to userspace */
 38 #define KVM_PRIVATE_MEM_SLOTS 3
 39 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
 40 
 41 #define KVM_PIO_PAGE_OFFSET 1
 42 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
 43 
 44 #define KVM_IRQCHIP_NUM_PINS  KVM_IOAPIC_NUM_PINS
 45 
 46 #define CR0_RESERVED_BITS                                               \
 47         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
 48                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
 49                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
 50 
 51 #define CR3_L_MODE_RESERVED_BITS 0xFFFFFF0000000000ULL
 52 #define CR3_PCID_INVD            BIT_64(63)
 53 #define CR4_RESERVED_BITS                                               \
 54         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
 55                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
 56                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
 57                           | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
 58                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP))
 59 
 60 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
 61 
 62 
 63 
 64 #define INVALID_PAGE (~(hpa_t)0)
 65 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
 66 
 67 #define UNMAPPED_GVA (~(gpa_t)0)
 68 
 69 /* KVM Hugepage definitions for x86 */
 70 #define KVM_NR_PAGE_SIZES       3
 71 #define KVM_HPAGE_GFN_SHIFT(x)  (((x) - 1) * 9)
 72 #define KVM_HPAGE_SHIFT(x)      (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
 73 #define KVM_HPAGE_SIZE(x)       (1UL << KVM_HPAGE_SHIFT(x))
 74 #define KVM_HPAGE_MASK(x)       (~(KVM_HPAGE_SIZE(x) - 1))
 75 #define KVM_PAGES_PER_HPAGE(x)  (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
 76 
 77 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
 78 {
 79         /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
 80         return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
 81                 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
 82 }
 83 
 84 #define KVM_PERMILLE_MMU_PAGES 20
 85 #define KVM_MIN_ALLOC_MMU_PAGES 64
 86 #define KVM_MMU_HASH_SHIFT 10
 87 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
 88 #define KVM_MIN_FREE_MMU_PAGES 5
 89 #define KVM_REFILL_PAGES 25
 90 #define KVM_MAX_CPUID_ENTRIES 80
 91 #define KVM_NR_FIXED_MTRR_REGION 88
 92 #define KVM_NR_VAR_MTRR 8
 93 
 94 #define ASYNC_PF_PER_VCPU 64
 95 
 96 enum kvm_reg {
 97         VCPU_REGS_RAX = 0,
 98         VCPU_REGS_RCX = 1,
 99         VCPU_REGS_RDX = 2,
100         VCPU_REGS_RBX = 3,
101         VCPU_REGS_RSP = 4,
102         VCPU_REGS_RBP = 5,
103         VCPU_REGS_RSI = 6,
104         VCPU_REGS_RDI = 7,
105 #ifdef CONFIG_X86_64
106         VCPU_REGS_R8 = 8,
107         VCPU_REGS_R9 = 9,
108         VCPU_REGS_R10 = 10,
109         VCPU_REGS_R11 = 11,
110         VCPU_REGS_R12 = 12,
111         VCPU_REGS_R13 = 13,
112         VCPU_REGS_R14 = 14,
113         VCPU_REGS_R15 = 15,
114 #endif
115         VCPU_REGS_RIP,
116         NR_VCPU_REGS
117 };
118 
119 enum kvm_reg_ex {
120         VCPU_EXREG_PDPTR = NR_VCPU_REGS,
121         VCPU_EXREG_CR3,
122         VCPU_EXREG_RFLAGS,
123         VCPU_EXREG_SEGMENTS,
124 };
125 
126 enum {
127         VCPU_SREG_ES,
128         VCPU_SREG_CS,
129         VCPU_SREG_SS,
130         VCPU_SREG_DS,
131         VCPU_SREG_FS,
132         VCPU_SREG_GS,
133         VCPU_SREG_TR,
134         VCPU_SREG_LDTR,
135 };
136 
137 #include <asm/kvm_emulate.h>
138 
139 #define KVM_NR_MEM_OBJS 40
140 
141 #define KVM_NR_DB_REGS  4
142 
143 #define DR6_BD          (1 << 13)
144 #define DR6_BS          (1 << 14)
145 #define DR6_RTM         (1 << 16)
146 #define DR6_FIXED_1     0xfffe0ff0
147 #define DR6_INIT        0xffff0ff0
148 #define DR6_VOLATILE    0x0001e00f
149 
150 #define DR7_BP_EN_MASK  0x000000ff
151 #define DR7_GE          (1 << 9)
152 #define DR7_GD          (1 << 13)
153 #define DR7_FIXED_1     0x00000400
154 #define DR7_VOLATILE    0xffff2bff
155 
156 #define PFERR_PRESENT_BIT 0
157 #define PFERR_WRITE_BIT 1
158 #define PFERR_USER_BIT 2
159 #define PFERR_RSVD_BIT 3
160 #define PFERR_FETCH_BIT 4
161 
162 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
163 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
164 #define PFERR_USER_MASK (1U << PFERR_USER_BIT)
165 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
166 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
167 
168 /* apic attention bits */
169 #define KVM_APIC_CHECK_VAPIC    0
170 /*
171  * The following bit is set with PV-EOI, unset on EOI.
172  * We detect PV-EOI changes by guest by comparing
173  * this bit with PV-EOI in guest memory.
174  * See the implementation in apic_update_pv_eoi.
175  */
176 #define KVM_APIC_PV_EOI_PENDING 1
177 
178 /*
179  * We don't want allocation failures within the mmu code, so we preallocate
180  * enough memory for a single page fault in a cache.
181  */
182 struct kvm_mmu_memory_cache {
183         int nobjs;
184         void *objects[KVM_NR_MEM_OBJS];
185 };
186 
187 union kvm_mmu_page_role {
188         unsigned word;
189         struct {
190                 unsigned level:4;
191                 unsigned cr4_pae:1;
192                 unsigned quadrant:2;
193                 unsigned direct:1;
194                 unsigned access:3;
195                 unsigned invalid:1;
196                 unsigned nxe:1;
197                 unsigned cr0_wp:1;
198                 unsigned smep_andnot_wp:1;
199                 unsigned smap_andnot_wp:1;
200                 unsigned :8;
201 
202                 /*
203                  * This is left at the top of the word so that
204                  * kvm_memslots_for_spte_role can extract it with a
205                  * simple shift.  While there is room, give it a whole
206                  * byte so it is also faster to load it from memory.
207                  */
208                 unsigned smm:8;
209         };
210 };
211 
212 struct kvm_mmu_page {
213         struct list_head link;
214         struct hlist_node hash_link;
215 
216         /*
217          * The following two entries are used to key the shadow page in the
218          * hash table.
219          */
220         gfn_t gfn;
221         union kvm_mmu_page_role role;
222 
223         u64 *spt;
224         /* hold the gfn of each spte inside spt */
225         gfn_t *gfns;
226         bool unsync;
227         int root_count;          /* Currently serving as active root */
228         unsigned int unsync_children;
229         unsigned long parent_ptes;      /* Reverse mapping for parent_pte */
230 
231         /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen.  */
232         unsigned long mmu_valid_gen;
233 
234         DECLARE_BITMAP(unsync_child_bitmap, 512);
235 
236 #ifdef CONFIG_X86_32
237         /*
238          * Used out of the mmu-lock to avoid reading spte values while an
239          * update is in progress; see the comments in __get_spte_lockless().
240          */
241         int clear_spte_count;
242 #endif
243 
244         /* Number of writes since the last time traversal visited this page.  */
245         int write_flooding_count;
246 };
247 
248 struct kvm_pio_request {
249         unsigned long count;
250         int in;
251         int port;
252         int size;
253 };
254 
255 /*
256  * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
257  * 32-bit).  The kvm_mmu structure abstracts the details of the current mmu
258  * mode.
259  */
260 struct kvm_mmu {
261         void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
262         unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
263         u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
264         int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
265                           bool prefault);
266         void (*inject_page_fault)(struct kvm_vcpu *vcpu,
267                                   struct x86_exception *fault);
268         gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
269                             struct x86_exception *exception);
270         gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
271                                struct x86_exception *exception);
272         int (*sync_page)(struct kvm_vcpu *vcpu,
273                          struct kvm_mmu_page *sp);
274         void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
275         void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
276                            u64 *spte, const void *pte);
277         hpa_t root_hpa;
278         int root_level;
279         int shadow_root_level;
280         union kvm_mmu_page_role base_role;
281         bool direct_map;
282 
283         /*
284          * Bitmap; bit set = permission fault
285          * Byte index: page fault error code [4:1]
286          * Bit index: pte permissions in ACC_* format
287          */
288         u8 permissions[16];
289 
290         u64 *pae_root;
291         u64 *lm_root;
292         u64 rsvd_bits_mask[2][4];
293         u64 bad_mt_xwr;
294 
295         /*
296          * Bitmap: bit set = last pte in walk
297          * index[0:1]: level (zero-based)
298          * index[2]: pte.ps
299          */
300         u8 last_pte_bitmap;
301 
302         bool nx;
303 
304         u64 pdptrs[4]; /* pae */
305 };
306 
307 enum pmc_type {
308         KVM_PMC_GP = 0,
309         KVM_PMC_FIXED,
310 };
311 
312 struct kvm_pmc {
313         enum pmc_type type;
314         u8 idx;
315         u64 counter;
316         u64 eventsel;
317         struct perf_event *perf_event;
318         struct kvm_vcpu *vcpu;
319 };
320 
321 struct kvm_pmu {
322         unsigned nr_arch_gp_counters;
323         unsigned nr_arch_fixed_counters;
324         unsigned available_event_types;
325         u64 fixed_ctr_ctrl;
326         u64 global_ctrl;
327         u64 global_status;
328         u64 global_ovf_ctrl;
329         u64 counter_bitmask[2];
330         u64 global_ctrl_mask;
331         u64 reserved_bits;
332         u8 version;
333         struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
334         struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
335         struct irq_work irq_work;
336         u64 reprogram_pmi;
337 };
338 
339 struct kvm_pmu_ops;
340 
341 enum {
342         KVM_DEBUGREG_BP_ENABLED = 1,
343         KVM_DEBUGREG_WONT_EXIT = 2,
344         KVM_DEBUGREG_RELOAD = 4,
345 };
346 
347 struct kvm_mtrr_range {
348         u64 base;
349         u64 mask;
350         struct list_head node;
351 };
352 
353 struct kvm_mtrr {
354         struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
355         mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
356         u64 deftype;
357 
358         struct list_head head;
359 };
360 
361 struct kvm_vcpu_arch {
362         /*
363          * rip and regs accesses must go through
364          * kvm_{register,rip}_{read,write} functions.
365          */
366         unsigned long regs[NR_VCPU_REGS];
367         u32 regs_avail;
368         u32 regs_dirty;
369 
370         unsigned long cr0;
371         unsigned long cr0_guest_owned_bits;
372         unsigned long cr2;
373         unsigned long cr3;
374         unsigned long cr4;
375         unsigned long cr4_guest_owned_bits;
376         unsigned long cr8;
377         u32 hflags;
378         u64 efer;
379         u64 apic_base;
380         struct kvm_lapic *apic;    /* kernel irqchip context */
381         unsigned long apic_attention;
382         int32_t apic_arb_prio;
383         int mp_state;
384         u64 ia32_misc_enable_msr;
385         u64 smbase;
386         bool tpr_access_reporting;
387         u64 ia32_xss;
388 
389         /*
390          * Paging state of the vcpu
391          *
392          * If the vcpu runs in guest mode with two level paging this still saves
393          * the paging mode of the l1 guest. This context is always used to
394          * handle faults.
395          */
396         struct kvm_mmu mmu;
397 
398         /*
399          * Paging state of an L2 guest (used for nested npt)
400          *
401          * This context will save all necessary information to walk page tables
402          * of the an L2 guest. This context is only initialized for page table
403          * walking and not for faulting since we never handle l2 page faults on
404          * the host.
405          */
406         struct kvm_mmu nested_mmu;
407 
408         /*
409          * Pointer to the mmu context currently used for
410          * gva_to_gpa translations.
411          */
412         struct kvm_mmu *walk_mmu;
413 
414         struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
415         struct kvm_mmu_memory_cache mmu_page_cache;
416         struct kvm_mmu_memory_cache mmu_page_header_cache;
417 
418         struct fpu guest_fpu;
419         bool eager_fpu;
420         u64 xcr0;
421         u64 guest_supported_xcr0;
422         u32 guest_xstate_size;
423 
424         struct kvm_pio_request pio;
425         void *pio_data;
426 
427         u8 event_exit_inst_len;
428 
429         struct kvm_queued_exception {
430                 bool pending;
431                 bool has_error_code;
432                 bool reinject;
433                 u8 nr;
434                 u32 error_code;
435         } exception;
436 
437         struct kvm_queued_interrupt {
438                 bool pending;
439                 bool soft;
440                 u8 nr;
441         } interrupt;
442 
443         int halt_request; /* real mode on Intel only */
444 
445         int cpuid_nent;
446         struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
447 
448         int maxphyaddr;
449 
450         /* emulate context */
451 
452         struct x86_emulate_ctxt emulate_ctxt;
453         bool emulate_regs_need_sync_to_vcpu;
454         bool emulate_regs_need_sync_from_vcpu;
455         int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
456 
457         gpa_t time;
458         struct pvclock_vcpu_time_info hv_clock;
459         unsigned int hw_tsc_khz;
460         struct gfn_to_hva_cache pv_time;
461         bool pv_time_enabled;
462         /* set guest stopped flag in pvclock flags field */
463         bool pvclock_set_guest_stopped_request;
464 
465         struct {
466                 u64 msr_val;
467                 u64 last_steal;
468                 u64 accum_steal;
469                 struct gfn_to_hva_cache stime;
470                 struct kvm_steal_time steal;
471         } st;
472 
473         u64 last_guest_tsc;
474         u64 last_host_tsc;
475         u64 tsc_offset_adjustment;
476         u64 this_tsc_nsec;
477         u64 this_tsc_write;
478         u64 this_tsc_generation;
479         bool tsc_catchup;
480         bool tsc_always_catchup;
481         s8 virtual_tsc_shift;
482         u32 virtual_tsc_mult;
483         u32 virtual_tsc_khz;
484         s64 ia32_tsc_adjust_msr;
485 
486         atomic_t nmi_queued;  /* unprocessed asynchronous NMIs */
487         unsigned nmi_pending; /* NMI queued after currently running handler */
488         bool nmi_injected;    /* Trying to inject an NMI this entry */
489         bool smi_pending;    /* SMI queued after currently running handler */
490 
491         struct kvm_mtrr mtrr_state;
492         u64 pat;
493 
494         unsigned switch_db_regs;
495         unsigned long db[KVM_NR_DB_REGS];
496         unsigned long dr6;
497         unsigned long dr7;
498         unsigned long eff_db[KVM_NR_DB_REGS];
499         unsigned long guest_debug_dr7;
500 
501         u64 mcg_cap;
502         u64 mcg_status;
503         u64 mcg_ctl;
504         u64 *mce_banks;
505 
506         /* Cache MMIO info */
507         u64 mmio_gva;
508         unsigned access;
509         gfn_t mmio_gfn;
510         u64 mmio_gen;
511 
512         struct kvm_pmu pmu;
513 
514         /* used for guest single stepping over the given code position */
515         unsigned long singlestep_rip;
516 
517         /* fields used by HYPER-V emulation */
518         u64 hv_vapic;
519 
520         cpumask_var_t wbinvd_dirty_mask;
521 
522         unsigned long last_retry_eip;
523         unsigned long last_retry_addr;
524 
525         struct {
526                 bool halted;
527                 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
528                 struct gfn_to_hva_cache data;
529                 u64 msr_val;
530                 u32 id;
531                 bool send_user_only;
532         } apf;
533 
534         /* OSVW MSRs (AMD only) */
535         struct {
536                 u64 length;
537                 u64 status;
538         } osvw;
539 
540         struct {
541                 u64 msr_val;
542                 struct gfn_to_hva_cache data;
543         } pv_eoi;
544 
545         /*
546          * Indicate whether the access faults on its page table in guest
547          * which is set when fix page fault and used to detect unhandeable
548          * instruction.
549          */
550         bool write_fault_to_shadow_pgtable;
551 
552         /* set at EPT violation at this point */
553         unsigned long exit_qualification;
554 
555         /* pv related host specific info */
556         struct {
557                 bool pv_unhalted;
558         } pv;
559 };
560 
561 struct kvm_lpage_info {
562         int write_count;
563 };
564 
565 struct kvm_arch_memory_slot {
566         unsigned long *rmap[KVM_NR_PAGE_SIZES];
567         struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
568 };
569 
570 /*
571  * We use as the mode the number of bits allocated in the LDR for the
572  * logical processor ID.  It happens that these are all powers of two.
573  * This makes it is very easy to detect cases where the APICs are
574  * configured for multiple modes; in that case, we cannot use the map and
575  * hence cannot use kvm_irq_delivery_to_apic_fast either.
576  */
577 #define KVM_APIC_MODE_XAPIC_CLUSTER          4
578 #define KVM_APIC_MODE_XAPIC_FLAT             8
579 #define KVM_APIC_MODE_X2APIC                16
580 
581 struct kvm_apic_map {
582         struct rcu_head rcu;
583         u8 mode;
584         struct kvm_lapic *phys_map[256];
585         /* first index is cluster id second is cpu id in a cluster */
586         struct kvm_lapic *logical_map[16][16];
587 };
588 
589 struct kvm_arch {
590         unsigned int n_used_mmu_pages;
591         unsigned int n_requested_mmu_pages;
592         unsigned int n_max_mmu_pages;
593         unsigned int indirect_shadow_pages;
594         unsigned long mmu_valid_gen;
595         struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
596         /*
597          * Hash table of struct kvm_mmu_page.
598          */
599         struct list_head active_mmu_pages;
600         struct list_head zapped_obsolete_pages;
601 
602         struct list_head assigned_dev_head;
603         struct iommu_domain *iommu_domain;
604         bool iommu_noncoherent;
605 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
606         atomic_t noncoherent_dma_count;
607 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
608         atomic_t assigned_device_count;
609         struct kvm_pic *vpic;
610         struct kvm_ioapic *vioapic;
611         struct kvm_pit *vpit;
612         atomic_t vapics_in_nmi_mode;
613         struct mutex apic_map_lock;
614         struct kvm_apic_map *apic_map;
615 
616         unsigned int tss_addr;
617         bool apic_access_page_done;
618 
619         gpa_t wall_clock;
620 
621         bool ept_identity_pagetable_done;
622         gpa_t ept_identity_map_addr;
623 
624         unsigned long irq_sources_bitmap;
625         s64 kvmclock_offset;
626         raw_spinlock_t tsc_write_lock;
627         u64 last_tsc_nsec;
628         u64 last_tsc_write;
629         u32 last_tsc_khz;
630         u64 cur_tsc_nsec;
631         u64 cur_tsc_write;
632         u64 cur_tsc_offset;
633         u64 cur_tsc_generation;
634         int nr_vcpus_matched_tsc;
635 
636         spinlock_t pvclock_gtod_sync_lock;
637         bool use_master_clock;
638         u64 master_kernel_ns;
639         cycle_t master_cycle_now;
640         struct delayed_work kvmclock_update_work;
641         struct delayed_work kvmclock_sync_work;
642 
643         struct kvm_xen_hvm_config xen_hvm_config;
644 
645         /* reads protected by irq_srcu, writes by irq_lock */
646         struct hlist_head mask_notifier_list;
647 
648         /* fields used by HYPER-V emulation */
649         u64 hv_guest_os_id;
650         u64 hv_hypercall;
651         u64 hv_tsc_page;
652 
653         #ifdef CONFIG_KVM_MMU_AUDIT
654         int audit_point;
655         #endif
656 
657         bool boot_vcpu_runs_old_kvmclock;
658 
659         u64 disabled_quirks;
660 };
661 
662 struct kvm_vm_stat {
663         u32 mmu_shadow_zapped;
664         u32 mmu_pte_write;
665         u32 mmu_pte_updated;
666         u32 mmu_pde_zapped;
667         u32 mmu_flooded;
668         u32 mmu_recycled;
669         u32 mmu_cache_miss;
670         u32 mmu_unsync;
671         u32 remote_tlb_flush;
672         u32 lpages;
673 };
674 
675 struct kvm_vcpu_stat {
676         u32 pf_fixed;
677         u32 pf_guest;
678         u32 tlb_flush;
679         u32 invlpg;
680 
681         u32 exits;
682         u32 io_exits;
683         u32 mmio_exits;
684         u32 signal_exits;
685         u32 irq_window_exits;
686         u32 nmi_window_exits;
687         u32 halt_exits;
688         u32 halt_successful_poll;
689         u32 halt_wakeup;
690         u32 request_irq_exits;
691         u32 irq_exits;
692         u32 host_state_reload;
693         u32 efer_reload;
694         u32 fpu_reload;
695         u32 insn_emulation;
696         u32 insn_emulation_fail;
697         u32 hypercalls;
698         u32 irq_injections;
699         u32 nmi_injections;
700 };
701 
702 struct x86_instruction_info;
703 
704 struct msr_data {
705         bool host_initiated;
706         u32 index;
707         u64 data;
708 };
709 
710 struct kvm_lapic_irq {
711         u32 vector;
712         u16 delivery_mode;
713         u16 dest_mode;
714         bool level;
715         u16 trig_mode;
716         u32 shorthand;
717         u32 dest_id;
718         bool msi_redir_hint;
719 };
720 
721 struct kvm_x86_ops {
722         int (*cpu_has_kvm_support)(void);          /* __init */
723         int (*disabled_by_bios)(void);             /* __init */
724         int (*hardware_enable)(void);
725         void (*hardware_disable)(void);
726         void (*check_processor_compatibility)(void *rtn);
727         int (*hardware_setup)(void);               /* __init */
728         void (*hardware_unsetup)(void);            /* __exit */
729         bool (*cpu_has_accelerated_tpr)(void);
730         bool (*cpu_has_high_real_mode_segbase)(void);
731         void (*cpuid_update)(struct kvm_vcpu *vcpu);
732 
733         /* Create, but do not attach this VCPU */
734         struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
735         void (*vcpu_free)(struct kvm_vcpu *vcpu);
736         void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
737 
738         void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
739         void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
740         void (*vcpu_put)(struct kvm_vcpu *vcpu);
741 
742         void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu);
743         int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
744         int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
745         u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
746         void (*get_segment)(struct kvm_vcpu *vcpu,
747                             struct kvm_segment *var, int seg);
748         int (*get_cpl)(struct kvm_vcpu *vcpu);
749         void (*set_segment)(struct kvm_vcpu *vcpu,
750                             struct kvm_segment *var, int seg);
751         void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
752         void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
753         void (*decache_cr3)(struct kvm_vcpu *vcpu);
754         void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
755         void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
756         void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
757         int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
758         void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
759         void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
760         void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
761         void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
762         void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
763         u64 (*get_dr6)(struct kvm_vcpu *vcpu);
764         void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
765         void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
766         void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
767         void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
768         unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
769         void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
770         void (*fpu_activate)(struct kvm_vcpu *vcpu);
771         void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
772 
773         void (*tlb_flush)(struct kvm_vcpu *vcpu);
774 
775         void (*run)(struct kvm_vcpu *vcpu);
776         int (*handle_exit)(struct kvm_vcpu *vcpu);
777         void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
778         void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
779         u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
780         void (*patch_hypercall)(struct kvm_vcpu *vcpu,
781                                 unsigned char *hypercall_addr);
782         void (*set_irq)(struct kvm_vcpu *vcpu);
783         void (*set_nmi)(struct kvm_vcpu *vcpu);
784         void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
785                                 bool has_error_code, u32 error_code,
786                                 bool reinject);
787         void (*cancel_injection)(struct kvm_vcpu *vcpu);
788         int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
789         int (*nmi_allowed)(struct kvm_vcpu *vcpu);
790         bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
791         void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
792         void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
793         void (*enable_irq_window)(struct kvm_vcpu *vcpu);
794         void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
795         int (*vm_has_apicv)(struct kvm *kvm);
796         void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
797         void (*hwapic_isr_update)(struct kvm *kvm, int isr);
798         void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
799         void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set);
800         void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
801         void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
802         void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
803         int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
804         int (*get_tdp_level)(void);
805         u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
806         int (*get_lpage_level)(void);
807         bool (*rdtscp_supported)(void);
808         bool (*invpcid_supported)(void);
809         void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host);
810 
811         void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
812 
813         void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
814 
815         bool (*has_wbinvd_exit)(void);
816 
817         void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale);
818         u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu);
819         void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
820 
821         u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc);
822         u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc);
823 
824         void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
825 
826         int (*check_intercept)(struct kvm_vcpu *vcpu,
827                                struct x86_instruction_info *info,
828                                enum x86_intercept_stage stage);
829         void (*handle_external_intr)(struct kvm_vcpu *vcpu);
830         bool (*mpx_supported)(void);
831         bool (*xsaves_supported)(void);
832 
833         int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
834 
835         void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
836 
837         /*
838          * Arch-specific dirty logging hooks. These hooks are only supposed to
839          * be valid if the specific arch has hardware-accelerated dirty logging
840          * mechanism. Currently only for PML on VMX.
841          *
842          *  - slot_enable_log_dirty:
843          *      called when enabling log dirty mode for the slot.
844          *  - slot_disable_log_dirty:
845          *      called when disabling log dirty mode for the slot.
846          *      also called when slot is created with log dirty disabled.
847          *  - flush_log_dirty:
848          *      called before reporting dirty_bitmap to userspace.
849          *  - enable_log_dirty_pt_masked:
850          *      called when reenabling log dirty for the GFNs in the mask after
851          *      corresponding bits are cleared in slot->dirty_bitmap.
852          */
853         void (*slot_enable_log_dirty)(struct kvm *kvm,
854                                       struct kvm_memory_slot *slot);
855         void (*slot_disable_log_dirty)(struct kvm *kvm,
856                                        struct kvm_memory_slot *slot);
857         void (*flush_log_dirty)(struct kvm *kvm);
858         void (*enable_log_dirty_pt_masked)(struct kvm *kvm,
859                                            struct kvm_memory_slot *slot,
860                                            gfn_t offset, unsigned long mask);
861         /* pmu operations of sub-arch */
862         const struct kvm_pmu_ops *pmu_ops;
863 };
864 
865 struct kvm_arch_async_pf {
866         u32 token;
867         gfn_t gfn;
868         unsigned long cr3;
869         bool direct_map;
870 };
871 
872 extern struct kvm_x86_ops *kvm_x86_ops;
873 
874 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
875                                            s64 adjustment)
876 {
877         kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false);
878 }
879 
880 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
881 {
882         kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true);
883 }
884 
885 int kvm_mmu_module_init(void);
886 void kvm_mmu_module_exit(void);
887 
888 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
889 int kvm_mmu_create(struct kvm_vcpu *vcpu);
890 void kvm_mmu_setup(struct kvm_vcpu *vcpu);
891 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
892                 u64 dirty_mask, u64 nx_mask, u64 x_mask);
893 
894 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
895 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
896                                       struct kvm_memory_slot *memslot);
897 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
898                                    const struct kvm_memory_slot *memslot);
899 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
900                                    struct kvm_memory_slot *memslot);
901 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
902                                         struct kvm_memory_slot *memslot);
903 void kvm_mmu_slot_set_dirty(struct kvm *kvm,
904                             struct kvm_memory_slot *memslot);
905 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
906                                    struct kvm_memory_slot *slot,
907                                    gfn_t gfn_offset, unsigned long mask);
908 void kvm_mmu_zap_all(struct kvm *kvm);
909 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots);
910 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
911 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
912 
913 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
914 
915 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
916                           const void *val, int bytes);
917 
918 struct kvm_irq_mask_notifier {
919         void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
920         int irq;
921         struct hlist_node link;
922 };
923 
924 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
925                                     struct kvm_irq_mask_notifier *kimn);
926 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
927                                       struct kvm_irq_mask_notifier *kimn);
928 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
929                              bool mask);
930 
931 extern bool tdp_enabled;
932 
933 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
934 
935 /* control of guest tsc rate supported? */
936 extern bool kvm_has_tsc_control;
937 /* minimum supported tsc_khz for guests */
938 extern u32  kvm_min_guest_tsc_khz;
939 /* maximum supported tsc_khz for guests */
940 extern u32  kvm_max_guest_tsc_khz;
941 
942 enum emulation_result {
943         EMULATE_DONE,         /* no further processing */
944         EMULATE_USER_EXIT,    /* kvm_run ready for userspace exit */
945         EMULATE_FAIL,         /* can't emulate this instruction */
946 };
947 
948 #define EMULTYPE_NO_DECODE          (1 << 0)
949 #define EMULTYPE_TRAP_UD            (1 << 1)
950 #define EMULTYPE_SKIP               (1 << 2)
951 #define EMULTYPE_RETRY              (1 << 3)
952 #define EMULTYPE_NO_REEXECUTE       (1 << 4)
953 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
954                             int emulation_type, void *insn, int insn_len);
955 
956 static inline int emulate_instruction(struct kvm_vcpu *vcpu,
957                         int emulation_type)
958 {
959         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
960 }
961 
962 void kvm_enable_efer_bits(u64);
963 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
964 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
965 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
966 
967 struct x86_emulate_ctxt;
968 
969 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
970 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
971 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
972 int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
973 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
974 
975 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
976 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
977 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
978 
979 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
980                     int reason, bool has_error_code, u32 error_code);
981 
982 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
983 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
984 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
985 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
986 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
987 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
988 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
989 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
990 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
991 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
992 
993 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
994 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
995 
996 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
997 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
998 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
999 
1000 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1001 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1002 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1003 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1004 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1005 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1006                             gfn_t gfn, void *data, int offset, int len,
1007                             u32 access);
1008 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1009 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1010 
1011 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1012                                        int irq_source_id, int level)
1013 {
1014         /* Logical OR for level trig interrupt */
1015         if (level)
1016                 __set_bit(irq_source_id, irq_state);
1017         else
1018                 __clear_bit(irq_source_id, irq_state);
1019 
1020         return !!(*irq_state);
1021 }
1022 
1023 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1024 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1025 
1026 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1027 
1028 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1029                        const u8 *new, int bytes);
1030 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1031 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
1032 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
1033 int kvm_mmu_load(struct kvm_vcpu *vcpu);
1034 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
1035 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
1036 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1037                            struct x86_exception *exception);
1038 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1039                               struct x86_exception *exception);
1040 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
1041                                struct x86_exception *exception);
1042 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1043                                struct x86_exception *exception);
1044 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1045                                 struct x86_exception *exception);
1046 
1047 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1048 
1049 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,
1050                        void *insn, int insn_len);
1051 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1052 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu);
1053 
1054 void kvm_enable_tdp(void);
1055 void kvm_disable_tdp(void);
1056 
1057 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1058                                   struct x86_exception *exception)
1059 {
1060         return gpa;
1061 }
1062 
1063 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
1064 {
1065         struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
1066 
1067         return (struct kvm_mmu_page *)page_private(page);
1068 }
1069 
1070 static inline u16 kvm_read_ldt(void)
1071 {
1072         u16 ldt;
1073         asm("sldt %0" : "=g"(ldt));
1074         return ldt;
1075 }
1076 
1077 static inline void kvm_load_ldt(u16 sel)
1078 {
1079         asm("lldt %0" : : "rm"(sel));
1080 }
1081 
1082 #ifdef CONFIG_X86_64
1083 static inline unsigned long read_msr(unsigned long msr)
1084 {
1085         u64 value;
1086 
1087         rdmsrl(msr, value);
1088         return value;
1089 }
1090 #endif
1091 
1092 static inline u32 get_rdx_init_val(void)
1093 {
1094         return 0x600; /* P6 family */
1095 }
1096 
1097 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1098 {
1099         kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1100 }
1101 
1102 static inline u64 get_canonical(u64 la)
1103 {
1104         return ((int64_t)la << 16) >> 16;
1105 }
1106 
1107 static inline bool is_noncanonical_address(u64 la)
1108 {
1109 #ifdef CONFIG_X86_64
1110         return get_canonical(la) != la;
1111 #else
1112         return false;
1113 #endif
1114 }
1115 
1116 #define TSS_IOPB_BASE_OFFSET 0x66
1117 #define TSS_BASE_SIZE 0x68
1118 #define TSS_IOPB_SIZE (65536 / 8)
1119 #define TSS_REDIRECTION_SIZE (256 / 8)
1120 #define RMODE_TSS_SIZE                                                  \
1121         (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1122 
1123 enum {
1124         TASK_SWITCH_CALL = 0,
1125         TASK_SWITCH_IRET = 1,
1126         TASK_SWITCH_JMP = 2,
1127         TASK_SWITCH_GATE = 3,
1128 };
1129 
1130 #define HF_GIF_MASK             (1 << 0)
1131 #define HF_HIF_MASK             (1 << 1)
1132 #define HF_VINTR_MASK           (1 << 2)
1133 #define HF_NMI_MASK             (1 << 3)
1134 #define HF_IRET_MASK            (1 << 4)
1135 #define HF_GUEST_MASK           (1 << 5) /* VCPU is in guest-mode */
1136 #define HF_SMM_MASK             (1 << 6)
1137 #define HF_SMM_INSIDE_NMI_MASK  (1 << 7)
1138 
1139 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
1140 #define KVM_ADDRESS_SPACE_NUM 2
1141 
1142 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
1143 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
1144 
1145 /*
1146  * Hardware virtualization extension instructions may fault if a
1147  * reboot turns off virtualization while processes are running.
1148  * Trap the fault and ignore the instruction if that happens.
1149  */
1150 asmlinkage void kvm_spurious_fault(void);
1151 
1152 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn)      \
1153         "666: " insn "\n\t" \
1154         "668: \n\t"                           \
1155         ".pushsection .fixup, \"ax\" \n" \
1156         "667: \n\t" \
1157         cleanup_insn "\n\t"                   \
1158         "cmpb $0, kvm_rebooting \n\t"         \
1159         "jne 668b \n\t"                       \
1160         __ASM_SIZE(push) " $666b \n\t"        \
1161         "call kvm_spurious_fault \n\t"        \
1162         ".popsection \n\t" \
1163         _ASM_EXTABLE(666b, 667b)
1164 
1165 #define __kvm_handle_fault_on_reboot(insn)              \
1166         ____kvm_handle_fault_on_reboot(insn, "")
1167 
1168 #define KVM_ARCH_WANT_MMU_NOTIFIER
1169 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
1170 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
1171 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
1172 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1173 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1174 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1175 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1176 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1177 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1178 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1179 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1180 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
1181                                            unsigned long address);
1182 
1183 void kvm_define_shared_msr(unsigned index, u32 msr);
1184 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1185 
1186 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
1187 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1188 
1189 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1190                                      struct kvm_async_pf *work);
1191 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1192                                  struct kvm_async_pf *work);
1193 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1194                                struct kvm_async_pf *work);
1195 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1196 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1197 
1198 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1199 
1200 int kvm_is_in_guest(void);
1201 
1202 int __x86_set_memory_region(struct kvm *kvm,
1203                             const struct kvm_userspace_memory_region *mem);
1204 int x86_set_memory_region(struct kvm *kvm,
1205                           const struct kvm_userspace_memory_region *mem);
1206 
1207 #endif /* _ASM_X86_KVM_HOST_H */
1208 

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