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TOMOYO Linux Cross Reference
Linux/arch/x86/kernel/cpu/microcode/intel.c

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  1 /*
  2  * Intel CPU Microcode Update Driver for Linux
  3  *
  4  * Copyright (C) 2000-2006 Tigran Aivazian <aivazian.tigran@gmail.com>
  5  *               2006 Shaohua Li <shaohua.li@intel.com>
  6  *
  7  * Intel CPU microcode early update for Linux
  8  *
  9  * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
 10  *                    H Peter Anvin" <hpa@zytor.com>
 11  *
 12  * This program is free software; you can redistribute it and/or
 13  * modify it under the terms of the GNU General Public License
 14  * as published by the Free Software Foundation; either version
 15  * 2 of the License, or (at your option) any later version.
 16  */
 17 
 18 /*
 19  * This needs to be before all headers so that pr_debug in printk.h doesn't turn
 20  * printk calls into no_printk().
 21  *
 22  *#define DEBUG
 23  */
 24 #define pr_fmt(fmt) "microcode: " fmt
 25 
 26 #include <linux/earlycpio.h>
 27 #include <linux/firmware.h>
 28 #include <linux/uaccess.h>
 29 #include <linux/vmalloc.h>
 30 #include <linux/initrd.h>
 31 #include <linux/kernel.h>
 32 #include <linux/slab.h>
 33 #include <linux/cpu.h>
 34 #include <linux/mm.h>
 35 
 36 #include <asm/microcode_intel.h>
 37 #include <asm/intel-family.h>
 38 #include <asm/processor.h>
 39 #include <asm/tlbflush.h>
 40 #include <asm/setup.h>
 41 #include <asm/msr.h>
 42 
 43 static const char ucode_path[] = "kernel/x86/microcode/GenuineIntel.bin";
 44 
 45 /* Current microcode patch used in early patching on the APs. */
 46 static struct microcode_intel *intel_ucode_patch;
 47 
 48 /* last level cache size per core */
 49 static int llc_size_per_core;
 50 
 51 static inline bool cpu_signatures_match(unsigned int s1, unsigned int p1,
 52                                         unsigned int s2, unsigned int p2)
 53 {
 54         if (s1 != s2)
 55                 return false;
 56 
 57         /* Processor flags are either both 0 ... */
 58         if (!p1 && !p2)
 59                 return true;
 60 
 61         /* ... or they intersect. */
 62         return p1 & p2;
 63 }
 64 
 65 /*
 66  * Returns 1 if update has been found, 0 otherwise.
 67  */
 68 static int find_matching_signature(void *mc, unsigned int csig, int cpf)
 69 {
 70         struct microcode_header_intel *mc_hdr = mc;
 71         struct extended_sigtable *ext_hdr;
 72         struct extended_signature *ext_sig;
 73         int i;
 74 
 75         if (cpu_signatures_match(csig, cpf, mc_hdr->sig, mc_hdr->pf))
 76                 return 1;
 77 
 78         /* Look for ext. headers: */
 79         if (get_totalsize(mc_hdr) <= get_datasize(mc_hdr) + MC_HEADER_SIZE)
 80                 return 0;
 81 
 82         ext_hdr = mc + get_datasize(mc_hdr) + MC_HEADER_SIZE;
 83         ext_sig = (void *)ext_hdr + EXT_HEADER_SIZE;
 84 
 85         for (i = 0; i < ext_hdr->count; i++) {
 86                 if (cpu_signatures_match(csig, cpf, ext_sig->sig, ext_sig->pf))
 87                         return 1;
 88                 ext_sig++;
 89         }
 90         return 0;
 91 }
 92 
 93 /*
 94  * Returns 1 if update has been found, 0 otherwise.
 95  */
 96 static int has_newer_microcode(void *mc, unsigned int csig, int cpf, int new_rev)
 97 {
 98         struct microcode_header_intel *mc_hdr = mc;
 99 
100         if (mc_hdr->rev <= new_rev)
101                 return 0;
102 
103         return find_matching_signature(mc, csig, cpf);
104 }
105 
106 /*
107  * Given CPU signature and a microcode patch, this function finds if the
108  * microcode patch has matching family and model with the CPU.
109  *
110  * %true - if there's a match
111  * %false - otherwise
112  */
113 static bool microcode_matches(struct microcode_header_intel *mc_header,
114                               unsigned long sig)
115 {
116         unsigned long total_size = get_totalsize(mc_header);
117         unsigned long data_size = get_datasize(mc_header);
118         struct extended_sigtable *ext_header;
119         unsigned int fam_ucode, model_ucode;
120         struct extended_signature *ext_sig;
121         unsigned int fam, model;
122         int ext_sigcount, i;
123 
124         fam   = x86_family(sig);
125         model = x86_model(sig);
126 
127         fam_ucode   = x86_family(mc_header->sig);
128         model_ucode = x86_model(mc_header->sig);
129 
130         if (fam == fam_ucode && model == model_ucode)
131                 return true;
132 
133         /* Look for ext. headers: */
134         if (total_size <= data_size + MC_HEADER_SIZE)
135                 return false;
136 
137         ext_header   = (void *) mc_header + data_size + MC_HEADER_SIZE;
138         ext_sig      = (void *)ext_header + EXT_HEADER_SIZE;
139         ext_sigcount = ext_header->count;
140 
141         for (i = 0; i < ext_sigcount; i++) {
142                 fam_ucode   = x86_family(ext_sig->sig);
143                 model_ucode = x86_model(ext_sig->sig);
144 
145                 if (fam == fam_ucode && model == model_ucode)
146                         return true;
147 
148                 ext_sig++;
149         }
150         return false;
151 }
152 
153 static struct ucode_patch *memdup_patch(void *data, unsigned int size)
154 {
155         struct ucode_patch *p;
156 
157         p = kzalloc(sizeof(struct ucode_patch), GFP_KERNEL);
158         if (!p)
159                 return NULL;
160 
161         p->data = kmemdup(data, size, GFP_KERNEL);
162         if (!p->data) {
163                 kfree(p);
164                 return NULL;
165         }
166 
167         return p;
168 }
169 
170 static void save_microcode_patch(void *data, unsigned int size)
171 {
172         struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
173         struct ucode_patch *iter, *tmp, *p = NULL;
174         bool prev_found = false;
175         unsigned int sig, pf;
176 
177         mc_hdr = (struct microcode_header_intel *)data;
178 
179         list_for_each_entry_safe(iter, tmp, &microcode_cache, plist) {
180                 mc_saved_hdr = (struct microcode_header_intel *)iter->data;
181                 sig          = mc_saved_hdr->sig;
182                 pf           = mc_saved_hdr->pf;
183 
184                 if (find_matching_signature(data, sig, pf)) {
185                         prev_found = true;
186 
187                         if (mc_hdr->rev <= mc_saved_hdr->rev)
188                                 continue;
189 
190                         p = memdup_patch(data, size);
191                         if (!p)
192                                 pr_err("Error allocating buffer %p\n", data);
193                         else {
194                                 list_replace(&iter->plist, &p->plist);
195                                 kfree(iter->data);
196                                 kfree(iter);
197                         }
198                 }
199         }
200 
201         /*
202          * There weren't any previous patches found in the list cache; save the
203          * newly found.
204          */
205         if (!prev_found) {
206                 p = memdup_patch(data, size);
207                 if (!p)
208                         pr_err("Error allocating buffer for %p\n", data);
209                 else
210                         list_add_tail(&p->plist, &microcode_cache);
211         }
212 
213         if (!p)
214                 return;
215 
216         /*
217          * Save for early loading. On 32-bit, that needs to be a physical
218          * address as the APs are running from physical addresses, before
219          * paging has been enabled.
220          */
221         if (IS_ENABLED(CONFIG_X86_32))
222                 intel_ucode_patch = (struct microcode_intel *)__pa_nodebug(p->data);
223         else
224                 intel_ucode_patch = p->data;
225 }
226 
227 static int microcode_sanity_check(void *mc, int print_err)
228 {
229         unsigned long total_size, data_size, ext_table_size;
230         struct microcode_header_intel *mc_header = mc;
231         struct extended_sigtable *ext_header = NULL;
232         u32 sum, orig_sum, ext_sigcount = 0, i;
233         struct extended_signature *ext_sig;
234 
235         total_size = get_totalsize(mc_header);
236         data_size = get_datasize(mc_header);
237 
238         if (data_size + MC_HEADER_SIZE > total_size) {
239                 if (print_err)
240                         pr_err("Error: bad microcode data file size.\n");
241                 return -EINVAL;
242         }
243 
244         if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
245                 if (print_err)
246                         pr_err("Error: invalid/unknown microcode update format.\n");
247                 return -EINVAL;
248         }
249 
250         ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
251         if (ext_table_size) {
252                 u32 ext_table_sum = 0;
253                 u32 *ext_tablep;
254 
255                 if ((ext_table_size < EXT_HEADER_SIZE)
256                  || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
257                         if (print_err)
258                                 pr_err("Error: truncated extended signature table.\n");
259                         return -EINVAL;
260                 }
261 
262                 ext_header = mc + MC_HEADER_SIZE + data_size;
263                 if (ext_table_size != exttable_size(ext_header)) {
264                         if (print_err)
265                                 pr_err("Error: extended signature table size mismatch.\n");
266                         return -EFAULT;
267                 }
268 
269                 ext_sigcount = ext_header->count;
270 
271                 /*
272                  * Check extended table checksum: the sum of all dwords that
273                  * comprise a valid table must be 0.
274                  */
275                 ext_tablep = (u32 *)ext_header;
276 
277                 i = ext_table_size / sizeof(u32);
278                 while (i--)
279                         ext_table_sum += ext_tablep[i];
280 
281                 if (ext_table_sum) {
282                         if (print_err)
283                                 pr_warn("Bad extended signature table checksum, aborting.\n");
284                         return -EINVAL;
285                 }
286         }
287 
288         /*
289          * Calculate the checksum of update data and header. The checksum of
290          * valid update data and header including the extended signature table
291          * must be 0.
292          */
293         orig_sum = 0;
294         i = (MC_HEADER_SIZE + data_size) / sizeof(u32);
295         while (i--)
296                 orig_sum += ((u32 *)mc)[i];
297 
298         if (orig_sum) {
299                 if (print_err)
300                         pr_err("Bad microcode data checksum, aborting.\n");
301                 return -EINVAL;
302         }
303 
304         if (!ext_table_size)
305                 return 0;
306 
307         /*
308          * Check extended signature checksum: 0 => valid.
309          */
310         for (i = 0; i < ext_sigcount; i++) {
311                 ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
312                           EXT_SIGNATURE_SIZE * i;
313 
314                 sum = (mc_header->sig + mc_header->pf + mc_header->cksum) -
315                       (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
316                 if (sum) {
317                         if (print_err)
318                                 pr_err("Bad extended signature checksum, aborting.\n");
319                         return -EINVAL;
320                 }
321         }
322         return 0;
323 }
324 
325 /*
326  * Get microcode matching with BSP's model. Only CPUs with the same model as
327  * BSP can stay in the platform.
328  */
329 static struct microcode_intel *
330 scan_microcode(void *data, size_t size, struct ucode_cpu_info *uci, bool save)
331 {
332         struct microcode_header_intel *mc_header;
333         struct microcode_intel *patch = NULL;
334         unsigned int mc_size;
335 
336         while (size) {
337                 if (size < sizeof(struct microcode_header_intel))
338                         break;
339 
340                 mc_header = (struct microcode_header_intel *)data;
341 
342                 mc_size = get_totalsize(mc_header);
343                 if (!mc_size ||
344                     mc_size > size ||
345                     microcode_sanity_check(data, 0) < 0)
346                         break;
347 
348                 size -= mc_size;
349 
350                 if (!microcode_matches(mc_header, uci->cpu_sig.sig)) {
351                         data += mc_size;
352                         continue;
353                 }
354 
355                 if (save) {
356                         save_microcode_patch(data, mc_size);
357                         goto next;
358                 }
359 
360 
361                 if (!patch) {
362                         if (!has_newer_microcode(data,
363                                                  uci->cpu_sig.sig,
364                                                  uci->cpu_sig.pf,
365                                                  uci->cpu_sig.rev))
366                                 goto next;
367 
368                 } else {
369                         struct microcode_header_intel *phdr = &patch->hdr;
370 
371                         if (!has_newer_microcode(data,
372                                                  phdr->sig,
373                                                  phdr->pf,
374                                                  phdr->rev))
375                                 goto next;
376                 }
377 
378                 /* We have a newer patch, save it. */
379                 patch = data;
380 
381 next:
382                 data += mc_size;
383         }
384 
385         if (size)
386                 return NULL;
387 
388         return patch;
389 }
390 
391 static int collect_cpu_info_early(struct ucode_cpu_info *uci)
392 {
393         unsigned int val[2];
394         unsigned int family, model;
395         struct cpu_signature csig = { 0 };
396         unsigned int eax, ebx, ecx, edx;
397 
398         memset(uci, 0, sizeof(*uci));
399 
400         eax = 0x00000001;
401         ecx = 0;
402         native_cpuid(&eax, &ebx, &ecx, &edx);
403         csig.sig = eax;
404 
405         family = x86_family(eax);
406         model  = x86_model(eax);
407 
408         if ((model >= 5) || (family > 6)) {
409                 /* get processor flags from MSR 0x17 */
410                 native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
411                 csig.pf = 1 << ((val[1] >> 18) & 7);
412         }
413 
414         csig.rev = intel_get_microcode_revision();
415 
416         uci->cpu_sig = csig;
417         uci->valid = 1;
418 
419         return 0;
420 }
421 
422 static void show_saved_mc(void)
423 {
424 #ifdef DEBUG
425         int i = 0, j;
426         unsigned int sig, pf, rev, total_size, data_size, date;
427         struct ucode_cpu_info uci;
428         struct ucode_patch *p;
429 
430         if (list_empty(&microcode_cache)) {
431                 pr_debug("no microcode data saved.\n");
432                 return;
433         }
434 
435         collect_cpu_info_early(&uci);
436 
437         sig     = uci.cpu_sig.sig;
438         pf      = uci.cpu_sig.pf;
439         rev     = uci.cpu_sig.rev;
440         pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
441 
442         list_for_each_entry(p, &microcode_cache, plist) {
443                 struct microcode_header_intel *mc_saved_header;
444                 struct extended_sigtable *ext_header;
445                 struct extended_signature *ext_sig;
446                 int ext_sigcount;
447 
448                 mc_saved_header = (struct microcode_header_intel *)p->data;
449 
450                 sig     = mc_saved_header->sig;
451                 pf      = mc_saved_header->pf;
452                 rev     = mc_saved_header->rev;
453                 date    = mc_saved_header->date;
454 
455                 total_size      = get_totalsize(mc_saved_header);
456                 data_size       = get_datasize(mc_saved_header);
457 
458                 pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, total size=0x%x, date = %04x-%02x-%02x\n",
459                          i++, sig, pf, rev, total_size,
460                          date & 0xffff,
461                          date >> 24,
462                          (date >> 16) & 0xff);
463 
464                 /* Look for ext. headers: */
465                 if (total_size <= data_size + MC_HEADER_SIZE)
466                         continue;
467 
468                 ext_header = (void *)mc_saved_header + data_size + MC_HEADER_SIZE;
469                 ext_sigcount = ext_header->count;
470                 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
471 
472                 for (j = 0; j < ext_sigcount; j++) {
473                         sig = ext_sig->sig;
474                         pf = ext_sig->pf;
475 
476                         pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
477                                  j, sig, pf);
478 
479                         ext_sig++;
480                 }
481         }
482 #endif
483 }
484 
485 /*
486  * Save this microcode patch. It will be loaded early when a CPU is
487  * hot-added or resumes.
488  */
489 static void save_mc_for_early(u8 *mc, unsigned int size)
490 {
491         /* Synchronization during CPU hotplug. */
492         static DEFINE_MUTEX(x86_cpu_microcode_mutex);
493 
494         mutex_lock(&x86_cpu_microcode_mutex);
495 
496         save_microcode_patch(mc, size);
497         show_saved_mc();
498 
499         mutex_unlock(&x86_cpu_microcode_mutex);
500 }
501 
502 static bool load_builtin_intel_microcode(struct cpio_data *cp)
503 {
504         unsigned int eax = 1, ebx, ecx = 0, edx;
505         char name[30];
506 
507         if (IS_ENABLED(CONFIG_X86_32))
508                 return false;
509 
510         native_cpuid(&eax, &ebx, &ecx, &edx);
511 
512         sprintf(name, "intel-ucode/%02x-%02x-%02x",
513                       x86_family(eax), x86_model(eax), x86_stepping(eax));
514 
515         return get_builtin_firmware(cp, name);
516 }
517 
518 /*
519  * Print ucode update info.
520  */
521 static void
522 print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
523 {
524         pr_info_once("microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
525                      uci->cpu_sig.rev,
526                      date & 0xffff,
527                      date >> 24,
528                      (date >> 16) & 0xff);
529 }
530 
531 #ifdef CONFIG_X86_32
532 
533 static int delay_ucode_info;
534 static int current_mc_date;
535 
536 /*
537  * Print early updated ucode info after printk works. This is delayed info dump.
538  */
539 void show_ucode_info_early(void)
540 {
541         struct ucode_cpu_info uci;
542 
543         if (delay_ucode_info) {
544                 collect_cpu_info_early(&uci);
545                 print_ucode_info(&uci, current_mc_date);
546                 delay_ucode_info = 0;
547         }
548 }
549 
550 /*
551  * At this point, we can not call printk() yet. Delay printing microcode info in
552  * show_ucode_info_early() until printk() works.
553  */
554 static void print_ucode(struct ucode_cpu_info *uci)
555 {
556         struct microcode_intel *mc;
557         int *delay_ucode_info_p;
558         int *current_mc_date_p;
559 
560         mc = uci->mc;
561         if (!mc)
562                 return;
563 
564         delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
565         current_mc_date_p = (int *)__pa_nodebug(&current_mc_date);
566 
567         *delay_ucode_info_p = 1;
568         *current_mc_date_p = mc->hdr.date;
569 }
570 #else
571 
572 static inline void print_ucode(struct ucode_cpu_info *uci)
573 {
574         struct microcode_intel *mc;
575 
576         mc = uci->mc;
577         if (!mc)
578                 return;
579 
580         print_ucode_info(uci, mc->hdr.date);
581 }
582 #endif
583 
584 static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
585 {
586         struct microcode_intel *mc;
587         u32 rev;
588 
589         mc = uci->mc;
590         if (!mc)
591                 return 0;
592 
593         /*
594          * Save us the MSR write below - which is a particular expensive
595          * operation - when the other hyperthread has updated the microcode
596          * already.
597          */
598         rev = intel_get_microcode_revision();
599         if (rev >= mc->hdr.rev) {
600                 uci->cpu_sig.rev = rev;
601                 return UCODE_OK;
602         }
603 
604         /*
605          * Writeback and invalidate caches before updating microcode to avoid
606          * internal issues depending on what the microcode is updating.
607          */
608         native_wbinvd();
609 
610         /* write microcode via MSR 0x79 */
611         native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
612 
613         rev = intel_get_microcode_revision();
614         if (rev != mc->hdr.rev)
615                 return -1;
616 
617         uci->cpu_sig.rev = rev;
618 
619         if (early)
620                 print_ucode(uci);
621         else
622                 print_ucode_info(uci, mc->hdr.date);
623 
624         return 0;
625 }
626 
627 int __init save_microcode_in_initrd_intel(void)
628 {
629         struct ucode_cpu_info uci;
630         struct cpio_data cp;
631 
632         /*
633          * initrd is going away, clear patch ptr. We will scan the microcode one
634          * last time before jettisoning and save a patch, if found. Then we will
635          * update that pointer too, with a stable patch address to use when
636          * resuming the cores.
637          */
638         intel_ucode_patch = NULL;
639 
640         if (!load_builtin_intel_microcode(&cp))
641                 cp = find_microcode_in_initrd(ucode_path, false);
642 
643         if (!(cp.data && cp.size))
644                 return 0;
645 
646         collect_cpu_info_early(&uci);
647 
648         scan_microcode(cp.data, cp.size, &uci, true);
649 
650         show_saved_mc();
651 
652         return 0;
653 }
654 
655 /*
656  * @res_patch, output: a pointer to the patch we found.
657  */
658 static struct microcode_intel *__load_ucode_intel(struct ucode_cpu_info *uci)
659 {
660         static const char *path;
661         struct cpio_data cp;
662         bool use_pa;
663 
664         if (IS_ENABLED(CONFIG_X86_32)) {
665                 path      = (const char *)__pa_nodebug(ucode_path);
666                 use_pa    = true;
667         } else {
668                 path      = ucode_path;
669                 use_pa    = false;
670         }
671 
672         /* try built-in microcode first */
673         if (!load_builtin_intel_microcode(&cp))
674                 cp = find_microcode_in_initrd(path, use_pa);
675 
676         if (!(cp.data && cp.size))
677                 return NULL;
678 
679         collect_cpu_info_early(uci);
680 
681         return scan_microcode(cp.data, cp.size, uci, false);
682 }
683 
684 void __init load_ucode_intel_bsp(void)
685 {
686         struct microcode_intel *patch;
687         struct ucode_cpu_info uci;
688 
689         patch = __load_ucode_intel(&uci);
690         if (!patch)
691                 return;
692 
693         uci.mc = patch;
694 
695         apply_microcode_early(&uci, true);
696 }
697 
698 void load_ucode_intel_ap(void)
699 {
700         struct microcode_intel *patch, **iup;
701         struct ucode_cpu_info uci;
702 
703         if (IS_ENABLED(CONFIG_X86_32))
704                 iup = (struct microcode_intel **) __pa_nodebug(&intel_ucode_patch);
705         else
706                 iup = &intel_ucode_patch;
707 
708 reget:
709         if (!*iup) {
710                 patch = __load_ucode_intel(&uci);
711                 if (!patch)
712                         return;
713 
714                 *iup = patch;
715         }
716 
717         uci.mc = *iup;
718 
719         if (apply_microcode_early(&uci, true)) {
720                 /* Mixed-silicon system? Try to refetch the proper patch: */
721                 *iup = NULL;
722 
723                 goto reget;
724         }
725 }
726 
727 static struct microcode_intel *find_patch(struct ucode_cpu_info *uci)
728 {
729         struct microcode_header_intel *phdr;
730         struct ucode_patch *iter, *tmp;
731 
732         list_for_each_entry_safe(iter, tmp, &microcode_cache, plist) {
733 
734                 phdr = (struct microcode_header_intel *)iter->data;
735 
736                 if (phdr->rev <= uci->cpu_sig.rev)
737                         continue;
738 
739                 if (!find_matching_signature(phdr,
740                                              uci->cpu_sig.sig,
741                                              uci->cpu_sig.pf))
742                         continue;
743 
744                 return iter->data;
745         }
746         return NULL;
747 }
748 
749 void reload_ucode_intel(void)
750 {
751         struct microcode_intel *p;
752         struct ucode_cpu_info uci;
753 
754         collect_cpu_info_early(&uci);
755 
756         p = find_patch(&uci);
757         if (!p)
758                 return;
759 
760         uci.mc = p;
761 
762         apply_microcode_early(&uci, false);
763 }
764 
765 static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
766 {
767         static struct cpu_signature prev;
768         struct cpuinfo_x86 *c = &cpu_data(cpu_num);
769         unsigned int val[2];
770 
771         memset(csig, 0, sizeof(*csig));
772 
773         csig->sig = cpuid_eax(0x00000001);
774 
775         if ((c->x86_model >= 5) || (c->x86 > 6)) {
776                 /* get processor flags from MSR 0x17 */
777                 rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
778                 csig->pf = 1 << ((val[1] >> 18) & 7);
779         }
780 
781         csig->rev = c->microcode;
782 
783         /* No extra locking on prev, races are harmless. */
784         if (csig->sig != prev.sig || csig->pf != prev.pf || csig->rev != prev.rev) {
785                 pr_info("sig=0x%x, pf=0x%x, revision=0x%x\n",
786                         csig->sig, csig->pf, csig->rev);
787                 prev = *csig;
788         }
789 
790         return 0;
791 }
792 
793 static enum ucode_state apply_microcode_intel(int cpu)
794 {
795         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
796         struct cpuinfo_x86 *c = &cpu_data(cpu);
797         struct microcode_intel *mc;
798         enum ucode_state ret;
799         static int prev_rev;
800         u32 rev;
801 
802         /* We should bind the task to the CPU */
803         if (WARN_ON(raw_smp_processor_id() != cpu))
804                 return UCODE_ERROR;
805 
806         /* Look for a newer patch in our cache: */
807         mc = find_patch(uci);
808         if (!mc) {
809                 mc = uci->mc;
810                 if (!mc)
811                         return UCODE_NFOUND;
812         }
813 
814         /*
815          * Save us the MSR write below - which is a particular expensive
816          * operation - when the other hyperthread has updated the microcode
817          * already.
818          */
819         rev = intel_get_microcode_revision();
820         if (rev >= mc->hdr.rev) {
821                 ret = UCODE_OK;
822                 goto out;
823         }
824 
825         /*
826          * Writeback and invalidate caches before updating microcode to avoid
827          * internal issues depending on what the microcode is updating.
828          */
829         native_wbinvd();
830 
831         /* write microcode via MSR 0x79 */
832         wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
833 
834         rev = intel_get_microcode_revision();
835 
836         if (rev != mc->hdr.rev) {
837                 pr_err("CPU%d update to revision 0x%x failed\n",
838                        cpu, mc->hdr.rev);
839                 return UCODE_ERROR;
840         }
841 
842         if (rev != prev_rev) {
843                 pr_info("updated to revision 0x%x, date = %04x-%02x-%02x\n",
844                         rev,
845                         mc->hdr.date & 0xffff,
846                         mc->hdr.date >> 24,
847                         (mc->hdr.date >> 16) & 0xff);
848                 prev_rev = rev;
849         }
850 
851         ret = UCODE_UPDATED;
852 
853 out:
854         uci->cpu_sig.rev = rev;
855         c->microcode     = rev;
856 
857         /* Update boot_cpu_data's revision too, if we're on the BSP: */
858         if (c->cpu_index == boot_cpu_data.cpu_index)
859                 boot_cpu_data.microcode = rev;
860 
861         return ret;
862 }
863 
864 static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
865                                 int (*get_ucode_data)(void *, const void *, size_t))
866 {
867         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
868         u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL;
869         int new_rev = uci->cpu_sig.rev;
870         unsigned int leftover = size;
871         unsigned int curr_mc_size = 0, new_mc_size = 0;
872         unsigned int csig, cpf;
873         enum ucode_state ret = UCODE_OK;
874 
875         while (leftover) {
876                 struct microcode_header_intel mc_header;
877                 unsigned int mc_size;
878 
879                 if (leftover < sizeof(mc_header)) {
880                         pr_err("error! Truncated header in microcode data file\n");
881                         break;
882                 }
883 
884                 if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
885                         break;
886 
887                 mc_size = get_totalsize(&mc_header);
888                 if (!mc_size || mc_size > leftover) {
889                         pr_err("error! Bad data in microcode data file\n");
890                         break;
891                 }
892 
893                 /* For performance reasons, reuse mc area when possible */
894                 if (!mc || mc_size > curr_mc_size) {
895                         vfree(mc);
896                         mc = vmalloc(mc_size);
897                         if (!mc)
898                                 break;
899                         curr_mc_size = mc_size;
900                 }
901 
902                 if (get_ucode_data(mc, ucode_ptr, mc_size) ||
903                     microcode_sanity_check(mc, 1) < 0) {
904                         break;
905                 }
906 
907                 csig = uci->cpu_sig.sig;
908                 cpf = uci->cpu_sig.pf;
909                 if (has_newer_microcode(mc, csig, cpf, new_rev)) {
910                         vfree(new_mc);
911                         new_rev = mc_header.rev;
912                         new_mc  = mc;
913                         new_mc_size = mc_size;
914                         mc = NULL;      /* trigger new vmalloc */
915                         ret = UCODE_NEW;
916                 }
917 
918                 ucode_ptr += mc_size;
919                 leftover  -= mc_size;
920         }
921 
922         vfree(mc);
923 
924         if (leftover) {
925                 vfree(new_mc);
926                 return UCODE_ERROR;
927         }
928 
929         if (!new_mc)
930                 return UCODE_NFOUND;
931 
932         vfree(uci->mc);
933         uci->mc = (struct microcode_intel *)new_mc;
934 
935         /*
936          * If early loading microcode is supported, save this mc into
937          * permanent memory. So it will be loaded early when a CPU is hot added
938          * or resumes.
939          */
940         save_mc_for_early(new_mc, new_mc_size);
941 
942         pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
943                  cpu, new_rev, uci->cpu_sig.rev);
944 
945         return ret;
946 }
947 
948 static int get_ucode_fw(void *to, const void *from, size_t n)
949 {
950         memcpy(to, from, n);
951         return 0;
952 }
953 
954 static bool is_blacklisted(unsigned int cpu)
955 {
956         struct cpuinfo_x86 *c = &cpu_data(cpu);
957 
958         /*
959          * Late loading on model 79 with microcode revision less than 0x0b000021
960          * and LLC size per core bigger than 2.5MB may result in a system hang.
961          * This behavior is documented in item BDF90, #334165 (Intel Xeon
962          * Processor E7-8800/4800 v4 Product Family).
963          */
964         if (c->x86 == 6 &&
965             c->x86_model == INTEL_FAM6_BROADWELL_X &&
966             c->x86_stepping == 0x01 &&
967             llc_size_per_core > 2621440 &&
968             c->microcode < 0x0b000021) {
969                 pr_err_once("Erratum BDF90: late loading with revision < 0x0b000021 (0x%x) disabled.\n", c->microcode);
970                 pr_err_once("Please consider either early loading through initrd/built-in or a potential BIOS update.\n");
971                 return true;
972         }
973 
974         return false;
975 }
976 
977 static enum ucode_state request_microcode_fw(int cpu, struct device *device,
978                                              bool refresh_fw)
979 {
980         char name[30];
981         struct cpuinfo_x86 *c = &cpu_data(cpu);
982         const struct firmware *firmware;
983         enum ucode_state ret;
984 
985         if (is_blacklisted(cpu))
986                 return UCODE_NFOUND;
987 
988         sprintf(name, "intel-ucode/%02x-%02x-%02x",
989                 c->x86, c->x86_model, c->x86_stepping);
990 
991         if (request_firmware_direct(&firmware, name, device)) {
992                 pr_debug("data file %s load failed\n", name);
993                 return UCODE_NFOUND;
994         }
995 
996         ret = generic_load_microcode(cpu, (void *)firmware->data,
997                                      firmware->size, &get_ucode_fw);
998 
999         release_firmware(firmware);
1000 
1001         return ret;
1002 }
1003 
1004 static int get_ucode_user(void *to, const void *from, size_t n)
1005 {
1006         return copy_from_user(to, from, n);
1007 }
1008 
1009 static enum ucode_state
1010 request_microcode_user(int cpu, const void __user *buf, size_t size)
1011 {
1012         if (is_blacklisted(cpu))
1013                 return UCODE_NFOUND;
1014 
1015         return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
1016 }
1017 
1018 static struct microcode_ops microcode_intel_ops = {
1019         .request_microcode_user           = request_microcode_user,
1020         .request_microcode_fw             = request_microcode_fw,
1021         .collect_cpu_info                 = collect_cpu_info,
1022         .apply_microcode                  = apply_microcode_intel,
1023 };
1024 
1025 static int __init calc_llc_size_per_core(struct cpuinfo_x86 *c)
1026 {
1027         u64 llc_size = c->x86_cache_size * 1024ULL;
1028 
1029         do_div(llc_size, c->x86_max_cores);
1030 
1031         return (int)llc_size;
1032 }
1033 
1034 struct microcode_ops * __init init_intel_microcode(void)
1035 {
1036         struct cpuinfo_x86 *c = &boot_cpu_data;
1037 
1038         if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
1039             cpu_has(c, X86_FEATURE_IA64)) {
1040                 pr_err("Intel CPU family 0x%x not supported\n", c->x86);
1041                 return NULL;
1042         }
1043 
1044         llc_size_per_core = calc_llc_size_per_core(c);
1045 
1046         return &microcode_intel_ops;
1047 }
1048 

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