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Linux/arch/x86/kernel/cpu/perf_event_intel_pt.c

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  1 /*
  2  * Intel(R) Processor Trace PMU driver for perf
  3  * Copyright (c) 2013-2014, Intel Corporation.
  4  *
  5  * This program is free software; you can redistribute it and/or modify it
  6  * under the terms and conditions of the GNU General Public License,
  7  * version 2, as published by the Free Software Foundation.
  8  *
  9  * This program is distributed in the hope it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 12  * more details.
 13  *
 14  * Intel PT is specified in the Intel Architecture Instruction Set Extensions
 15  * Programming Reference:
 16  * http://software.intel.com/en-us/intel-isa-extensions
 17  */
 18 
 19 #undef DEBUG
 20 
 21 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 22 
 23 #include <linux/types.h>
 24 #include <linux/slab.h>
 25 #include <linux/device.h>
 26 
 27 #include <asm/perf_event.h>
 28 #include <asm/insn.h>
 29 #include <asm/io.h>
 30 
 31 #include "perf_event.h"
 32 #include "intel_pt.h"
 33 
 34 static DEFINE_PER_CPU(struct pt, pt_ctx);
 35 
 36 static struct pt_pmu pt_pmu;
 37 
 38 enum cpuid_regs {
 39         CR_EAX = 0,
 40         CR_ECX,
 41         CR_EDX,
 42         CR_EBX
 43 };
 44 
 45 /*
 46  * Capabilities of Intel PT hardware, such as number of address bits or
 47  * supported output schemes, are cached and exported to userspace as "caps"
 48  * attribute group of pt pmu device
 49  * (/sys/bus/event_source/devices/intel_pt/caps/) so that userspace can store
 50  * relevant bits together with intel_pt traces.
 51  *
 52  * These are necessary for both trace decoding (payloads_lip, contains address
 53  * width encoded in IP-related packets), and event configuration (bitmasks with
 54  * permitted values for certain bit fields).
 55  */
 56 #define PT_CAP(_n, _l, _r, _m)                                          \
 57         [PT_CAP_ ## _n] = { .name = __stringify(_n), .leaf = _l,        \
 58                             .reg = _r, .mask = _m }
 59 
 60 static struct pt_cap_desc {
 61         const char      *name;
 62         u32             leaf;
 63         u8              reg;
 64         u32             mask;
 65 } pt_caps[] = {
 66         PT_CAP(max_subleaf,             0, CR_EAX, 0xffffffff),
 67         PT_CAP(cr3_filtering,           0, CR_EBX, BIT(0)),
 68         PT_CAP(topa_output,             0, CR_ECX, BIT(0)),
 69         PT_CAP(topa_multiple_entries,   0, CR_ECX, BIT(1)),
 70         PT_CAP(payloads_lip,            0, CR_ECX, BIT(31)),
 71 };
 72 
 73 static u32 pt_cap_get(enum pt_capabilities cap)
 74 {
 75         struct pt_cap_desc *cd = &pt_caps[cap];
 76         u32 c = pt_pmu.caps[cd->leaf * 4 + cd->reg];
 77         unsigned int shift = __ffs(cd->mask);
 78 
 79         return (c & cd->mask) >> shift;
 80 }
 81 
 82 static ssize_t pt_cap_show(struct device *cdev,
 83                            struct device_attribute *attr,
 84                            char *buf)
 85 {
 86         struct dev_ext_attribute *ea =
 87                 container_of(attr, struct dev_ext_attribute, attr);
 88         enum pt_capabilities cap = (long)ea->var;
 89 
 90         return snprintf(buf, PAGE_SIZE, "%x\n", pt_cap_get(cap));
 91 }
 92 
 93 static struct attribute_group pt_cap_group = {
 94         .name   = "caps",
 95 };
 96 
 97 PMU_FORMAT_ATTR(tsc,            "config:10"     );
 98 PMU_FORMAT_ATTR(noretcomp,      "config:11"     );
 99 
100 static struct attribute *pt_formats_attr[] = {
101         &format_attr_tsc.attr,
102         &format_attr_noretcomp.attr,
103         NULL,
104 };
105 
106 static struct attribute_group pt_format_group = {
107         .name   = "format",
108         .attrs  = pt_formats_attr,
109 };
110 
111 static const struct attribute_group *pt_attr_groups[] = {
112         &pt_cap_group,
113         &pt_format_group,
114         NULL,
115 };
116 
117 static int __init pt_pmu_hw_init(void)
118 {
119         struct dev_ext_attribute *de_attrs;
120         struct attribute **attrs;
121         size_t size;
122         int ret;
123         long i;
124 
125         attrs = NULL;
126         ret = -ENODEV;
127         if (!test_cpu_cap(&boot_cpu_data, X86_FEATURE_INTEL_PT))
128                 goto fail;
129 
130         for (i = 0; i < PT_CPUID_LEAVES; i++) {
131                 cpuid_count(20, i,
132                             &pt_pmu.caps[CR_EAX + i*4],
133                             &pt_pmu.caps[CR_EBX + i*4],
134                             &pt_pmu.caps[CR_ECX + i*4],
135                             &pt_pmu.caps[CR_EDX + i*4]);
136         }
137 
138         ret = -ENOMEM;
139         size = sizeof(struct attribute *) * (ARRAY_SIZE(pt_caps)+1);
140         attrs = kzalloc(size, GFP_KERNEL);
141         if (!attrs)
142                 goto fail;
143 
144         size = sizeof(struct dev_ext_attribute) * (ARRAY_SIZE(pt_caps)+1);
145         de_attrs = kzalloc(size, GFP_KERNEL);
146         if (!de_attrs)
147                 goto fail;
148 
149         for (i = 0; i < ARRAY_SIZE(pt_caps); i++) {
150                 struct dev_ext_attribute *de_attr = de_attrs + i;
151 
152                 de_attr->attr.attr.name = pt_caps[i].name;
153 
154                 sysfs_attr_init(&de_attr->attr.attr);
155 
156                 de_attr->attr.attr.mode         = S_IRUGO;
157                 de_attr->attr.show              = pt_cap_show;
158                 de_attr->var                    = (void *)i;
159 
160                 attrs[i] = &de_attr->attr.attr;
161         }
162 
163         pt_cap_group.attrs = attrs;
164 
165         return 0;
166 
167 fail:
168         kfree(attrs);
169 
170         return ret;
171 }
172 
173 #define PT_CONFIG_MASK (RTIT_CTL_TSC_EN | RTIT_CTL_DISRETC)
174 
175 static bool pt_event_valid(struct perf_event *event)
176 {
177         u64 config = event->attr.config;
178 
179         if ((config & PT_CONFIG_MASK) != config)
180                 return false;
181 
182         return true;
183 }
184 
185 /*
186  * PT configuration helpers
187  * These all are cpu affine and operate on a local PT
188  */
189 
190 static void pt_config(struct perf_event *event)
191 {
192         u64 reg;
193 
194         reg = RTIT_CTL_TOPA | RTIT_CTL_BRANCH_EN | RTIT_CTL_TRACEEN;
195 
196         if (!event->attr.exclude_kernel)
197                 reg |= RTIT_CTL_OS;
198         if (!event->attr.exclude_user)
199                 reg |= RTIT_CTL_USR;
200 
201         reg |= (event->attr.config & PT_CONFIG_MASK);
202 
203         wrmsrl(MSR_IA32_RTIT_CTL, reg);
204 }
205 
206 static void pt_config_start(bool start)
207 {
208         u64 ctl;
209 
210         rdmsrl(MSR_IA32_RTIT_CTL, ctl);
211         if (start)
212                 ctl |= RTIT_CTL_TRACEEN;
213         else
214                 ctl &= ~RTIT_CTL_TRACEEN;
215         wrmsrl(MSR_IA32_RTIT_CTL, ctl);
216 
217         /*
218          * A wrmsr that disables trace generation serializes other PT
219          * registers and causes all data packets to be written to memory,
220          * but a fence is required for the data to become globally visible.
221          *
222          * The below WMB, separating data store and aux_head store matches
223          * the consumer's RMB that separates aux_head load and data load.
224          */
225         if (!start)
226                 wmb();
227 }
228 
229 static void pt_config_buffer(void *buf, unsigned int topa_idx,
230                              unsigned int output_off)
231 {
232         u64 reg;
233 
234         wrmsrl(MSR_IA32_RTIT_OUTPUT_BASE, virt_to_phys(buf));
235 
236         reg = 0x7f | ((u64)topa_idx << 7) | ((u64)output_off << 32);
237 
238         wrmsrl(MSR_IA32_RTIT_OUTPUT_MASK, reg);
239 }
240 
241 /*
242  * Keep ToPA table-related metadata on the same page as the actual table,
243  * taking up a few words from the top
244  */
245 
246 #define TENTS_PER_PAGE (((PAGE_SIZE - 40) / sizeof(struct topa_entry)) - 1)
247 
248 /**
249  * struct topa - page-sized ToPA table with metadata at the top
250  * @table:      actual ToPA table entries, as understood by PT hardware
251  * @list:       linkage to struct pt_buffer's list of tables
252  * @phys:       physical address of this page
253  * @offset:     offset of the first entry in this table in the buffer
254  * @size:       total size of all entries in this table
255  * @last:       index of the last initialized entry in this table
256  */
257 struct topa {
258         struct topa_entry       table[TENTS_PER_PAGE];
259         struct list_head        list;
260         u64                     phys;
261         u64                     offset;
262         size_t                  size;
263         int                     last;
264 };
265 
266 /* make -1 stand for the last table entry */
267 #define TOPA_ENTRY(t, i) ((i) == -1 ? &(t)->table[(t)->last] : &(t)->table[(i)])
268 
269 /**
270  * topa_alloc() - allocate page-sized ToPA table
271  * @cpu:        CPU on which to allocate.
272  * @gfp:        Allocation flags.
273  *
274  * Return:      On success, return the pointer to ToPA table page.
275  */
276 static struct topa *topa_alloc(int cpu, gfp_t gfp)
277 {
278         int node = cpu_to_node(cpu);
279         struct topa *topa;
280         struct page *p;
281 
282         p = alloc_pages_node(node, gfp | __GFP_ZERO, 0);
283         if (!p)
284                 return NULL;
285 
286         topa = page_address(p);
287         topa->last = 0;
288         topa->phys = page_to_phys(p);
289 
290         /*
291          * In case of singe-entry ToPA, always put the self-referencing END
292          * link as the 2nd entry in the table
293          */
294         if (!pt_cap_get(PT_CAP_topa_multiple_entries)) {
295                 TOPA_ENTRY(topa, 1)->base = topa->phys >> TOPA_SHIFT;
296                 TOPA_ENTRY(topa, 1)->end = 1;
297         }
298 
299         return topa;
300 }
301 
302 /**
303  * topa_free() - free a page-sized ToPA table
304  * @topa:       Table to deallocate.
305  */
306 static void topa_free(struct topa *topa)
307 {
308         free_page((unsigned long)topa);
309 }
310 
311 /**
312  * topa_insert_table() - insert a ToPA table into a buffer
313  * @buf:         PT buffer that's being extended.
314  * @topa:        New topa table to be inserted.
315  *
316  * If it's the first table in this buffer, set up buffer's pointers
317  * accordingly; otherwise, add a END=1 link entry to @topa to the current
318  * "last" table and adjust the last table pointer to @topa.
319  */
320 static void topa_insert_table(struct pt_buffer *buf, struct topa *topa)
321 {
322         struct topa *last = buf->last;
323 
324         list_add_tail(&topa->list, &buf->tables);
325 
326         if (!buf->first) {
327                 buf->first = buf->last = buf->cur = topa;
328                 return;
329         }
330 
331         topa->offset = last->offset + last->size;
332         buf->last = topa;
333 
334         if (!pt_cap_get(PT_CAP_topa_multiple_entries))
335                 return;
336 
337         BUG_ON(last->last != TENTS_PER_PAGE - 1);
338 
339         TOPA_ENTRY(last, -1)->base = topa->phys >> TOPA_SHIFT;
340         TOPA_ENTRY(last, -1)->end = 1;
341 }
342 
343 /**
344  * topa_table_full() - check if a ToPA table is filled up
345  * @topa:       ToPA table.
346  */
347 static bool topa_table_full(struct topa *topa)
348 {
349         /* single-entry ToPA is a special case */
350         if (!pt_cap_get(PT_CAP_topa_multiple_entries))
351                 return !!topa->last;
352 
353         return topa->last == TENTS_PER_PAGE - 1;
354 }
355 
356 /**
357  * topa_insert_pages() - create a list of ToPA tables
358  * @buf:        PT buffer being initialized.
359  * @gfp:        Allocation flags.
360  *
361  * This initializes a list of ToPA tables with entries from
362  * the data_pages provided by rb_alloc_aux().
363  *
364  * Return:      0 on success or error code.
365  */
366 static int topa_insert_pages(struct pt_buffer *buf, gfp_t gfp)
367 {
368         struct topa *topa = buf->last;
369         int order = 0;
370         struct page *p;
371 
372         p = virt_to_page(buf->data_pages[buf->nr_pages]);
373         if (PagePrivate(p))
374                 order = page_private(p);
375 
376         if (topa_table_full(topa)) {
377                 topa = topa_alloc(buf->cpu, gfp);
378                 if (!topa)
379                         return -ENOMEM;
380 
381                 topa_insert_table(buf, topa);
382         }
383 
384         TOPA_ENTRY(topa, -1)->base = page_to_phys(p) >> TOPA_SHIFT;
385         TOPA_ENTRY(topa, -1)->size = order;
386         if (!buf->snapshot && !pt_cap_get(PT_CAP_topa_multiple_entries)) {
387                 TOPA_ENTRY(topa, -1)->intr = 1;
388                 TOPA_ENTRY(topa, -1)->stop = 1;
389         }
390 
391         topa->last++;
392         topa->size += sizes(order);
393 
394         buf->nr_pages += 1ul << order;
395 
396         return 0;
397 }
398 
399 /**
400  * pt_topa_dump() - print ToPA tables and their entries
401  * @buf:        PT buffer.
402  */
403 static void pt_topa_dump(struct pt_buffer *buf)
404 {
405         struct topa *topa;
406 
407         list_for_each_entry(topa, &buf->tables, list) {
408                 int i;
409 
410                 pr_debug("# table @%p (%016Lx), off %llx size %zx\n", topa->table,
411                          topa->phys, topa->offset, topa->size);
412                 for (i = 0; i < TENTS_PER_PAGE; i++) {
413                         pr_debug("# entry @%p (%lx sz %u %c%c%c) raw=%16llx\n",
414                                  &topa->table[i],
415                                  (unsigned long)topa->table[i].base << TOPA_SHIFT,
416                                  sizes(topa->table[i].size),
417                                  topa->table[i].end ?  'E' : ' ',
418                                  topa->table[i].intr ? 'I' : ' ',
419                                  topa->table[i].stop ? 'S' : ' ',
420                                  *(u64 *)&topa->table[i]);
421                         if ((pt_cap_get(PT_CAP_topa_multiple_entries) &&
422                              topa->table[i].stop) ||
423                             topa->table[i].end)
424                                 break;
425                 }
426         }
427 }
428 
429 /**
430  * pt_buffer_advance() - advance to the next output region
431  * @buf:        PT buffer.
432  *
433  * Advance the current pointers in the buffer to the next ToPA entry.
434  */
435 static void pt_buffer_advance(struct pt_buffer *buf)
436 {
437         buf->output_off = 0;
438         buf->cur_idx++;
439 
440         if (buf->cur_idx == buf->cur->last) {
441                 if (buf->cur == buf->last)
442                         buf->cur = buf->first;
443                 else
444                         buf->cur = list_entry(buf->cur->list.next, struct topa,
445                                               list);
446                 buf->cur_idx = 0;
447         }
448 }
449 
450 /**
451  * pt_update_head() - calculate current offsets and sizes
452  * @pt:         Per-cpu pt context.
453  *
454  * Update buffer's current write pointer position and data size.
455  */
456 static void pt_update_head(struct pt *pt)
457 {
458         struct pt_buffer *buf = perf_get_aux(&pt->handle);
459         u64 topa_idx, base, old;
460 
461         /* offset of the first region in this table from the beginning of buf */
462         base = buf->cur->offset + buf->output_off;
463 
464         /* offset of the current output region within this table */
465         for (topa_idx = 0; topa_idx < buf->cur_idx; topa_idx++)
466                 base += sizes(buf->cur->table[topa_idx].size);
467 
468         if (buf->snapshot) {
469                 local_set(&buf->data_size, base);
470         } else {
471                 old = (local64_xchg(&buf->head, base) &
472                        ((buf->nr_pages << PAGE_SHIFT) - 1));
473                 if (base < old)
474                         base += buf->nr_pages << PAGE_SHIFT;
475 
476                 local_add(base - old, &buf->data_size);
477         }
478 }
479 
480 /**
481  * pt_buffer_region() - obtain current output region's address
482  * @buf:        PT buffer.
483  */
484 static void *pt_buffer_region(struct pt_buffer *buf)
485 {
486         return phys_to_virt(buf->cur->table[buf->cur_idx].base << TOPA_SHIFT);
487 }
488 
489 /**
490  * pt_buffer_region_size() - obtain current output region's size
491  * @buf:        PT buffer.
492  */
493 static size_t pt_buffer_region_size(struct pt_buffer *buf)
494 {
495         return sizes(buf->cur->table[buf->cur_idx].size);
496 }
497 
498 /**
499  * pt_handle_status() - take care of possible status conditions
500  * @pt:         Per-cpu pt context.
501  */
502 static void pt_handle_status(struct pt *pt)
503 {
504         struct pt_buffer *buf = perf_get_aux(&pt->handle);
505         int advance = 0;
506         u64 status;
507 
508         rdmsrl(MSR_IA32_RTIT_STATUS, status);
509 
510         if (status & RTIT_STATUS_ERROR) {
511                 pr_err_ratelimited("ToPA ERROR encountered, trying to recover\n");
512                 pt_topa_dump(buf);
513                 status &= ~RTIT_STATUS_ERROR;
514         }
515 
516         if (status & RTIT_STATUS_STOPPED) {
517                 status &= ~RTIT_STATUS_STOPPED;
518 
519                 /*
520                  * On systems that only do single-entry ToPA, hitting STOP
521                  * means we are already losing data; need to let the decoder
522                  * know.
523                  */
524                 if (!pt_cap_get(PT_CAP_topa_multiple_entries) ||
525                     buf->output_off == sizes(TOPA_ENTRY(buf->cur, buf->cur_idx)->size)) {
526                         local_inc(&buf->lost);
527                         advance++;
528                 }
529         }
530 
531         /*
532          * Also on single-entry ToPA implementations, interrupt will come
533          * before the output reaches its output region's boundary.
534          */
535         if (!pt_cap_get(PT_CAP_topa_multiple_entries) && !buf->snapshot &&
536             pt_buffer_region_size(buf) - buf->output_off <= TOPA_PMI_MARGIN) {
537                 void *head = pt_buffer_region(buf);
538 
539                 /* everything within this margin needs to be zeroed out */
540                 memset(head + buf->output_off, 0,
541                        pt_buffer_region_size(buf) -
542                        buf->output_off);
543                 advance++;
544         }
545 
546         if (advance)
547                 pt_buffer_advance(buf);
548 
549         wrmsrl(MSR_IA32_RTIT_STATUS, status);
550 }
551 
552 /**
553  * pt_read_offset() - translate registers into buffer pointers
554  * @buf:        PT buffer.
555  *
556  * Set buffer's output pointers from MSR values.
557  */
558 static void pt_read_offset(struct pt_buffer *buf)
559 {
560         u64 offset, base_topa;
561 
562         rdmsrl(MSR_IA32_RTIT_OUTPUT_BASE, base_topa);
563         buf->cur = phys_to_virt(base_topa);
564 
565         rdmsrl(MSR_IA32_RTIT_OUTPUT_MASK, offset);
566         /* offset within current output region */
567         buf->output_off = offset >> 32;
568         /* index of current output region within this table */
569         buf->cur_idx = (offset & 0xffffff80) >> 7;
570 }
571 
572 /**
573  * pt_topa_next_entry() - obtain index of the first page in the next ToPA entry
574  * @buf:        PT buffer.
575  * @pg:         Page offset in the buffer.
576  *
577  * When advancing to the next output region (ToPA entry), given a page offset
578  * into the buffer, we need to find the offset of the first page in the next
579  * region.
580  */
581 static unsigned int pt_topa_next_entry(struct pt_buffer *buf, unsigned int pg)
582 {
583         struct topa_entry *te = buf->topa_index[pg];
584 
585         /* one region */
586         if (buf->first == buf->last && buf->first->last == 1)
587                 return pg;
588 
589         do {
590                 pg++;
591                 pg &= buf->nr_pages - 1;
592         } while (buf->topa_index[pg] == te);
593 
594         return pg;
595 }
596 
597 /**
598  * pt_buffer_reset_markers() - place interrupt and stop bits in the buffer
599  * @buf:        PT buffer.
600  * @handle:     Current output handle.
601  *
602  * Place INT and STOP marks to prevent overwriting old data that the consumer
603  * hasn't yet collected and waking up the consumer after a certain fraction of
604  * the buffer has filled up. Only needed and sensible for non-snapshot counters.
605  *
606  * This obviously relies on buf::head to figure out buffer markers, so it has
607  * to be called after pt_buffer_reset_offsets() and before the hardware tracing
608  * is enabled.
609  */
610 static int pt_buffer_reset_markers(struct pt_buffer *buf,
611                                    struct perf_output_handle *handle)
612 
613 {
614         unsigned long head = local64_read(&buf->head);
615         unsigned long idx, npages, wakeup;
616 
617         /* can't stop in the middle of an output region */
618         if (buf->output_off + handle->size + 1 <
619             sizes(TOPA_ENTRY(buf->cur, buf->cur_idx)->size))
620                 return -EINVAL;
621 
622 
623         /* single entry ToPA is handled by marking all regions STOP=1 INT=1 */
624         if (!pt_cap_get(PT_CAP_topa_multiple_entries))
625                 return 0;
626 
627         /* clear STOP and INT from current entry */
628         buf->topa_index[buf->stop_pos]->stop = 0;
629         buf->topa_index[buf->intr_pos]->intr = 0;
630 
631         /* how many pages till the STOP marker */
632         npages = handle->size >> PAGE_SHIFT;
633 
634         /* if it's on a page boundary, fill up one more page */
635         if (!offset_in_page(head + handle->size + 1))
636                 npages++;
637 
638         idx = (head >> PAGE_SHIFT) + npages;
639         idx &= buf->nr_pages - 1;
640         buf->stop_pos = idx;
641 
642         wakeup = handle->wakeup >> PAGE_SHIFT;
643 
644         /* in the worst case, wake up the consumer one page before hard stop */
645         idx = (head >> PAGE_SHIFT) + npages - 1;
646         if (idx > wakeup)
647                 idx = wakeup;
648 
649         idx &= buf->nr_pages - 1;
650         buf->intr_pos = idx;
651 
652         buf->topa_index[buf->stop_pos]->stop = 1;
653         buf->topa_index[buf->intr_pos]->intr = 1;
654 
655         return 0;
656 }
657 
658 /**
659  * pt_buffer_setup_topa_index() - build topa_index[] table of regions
660  * @buf:        PT buffer.
661  *
662  * topa_index[] references output regions indexed by offset into the
663  * buffer for purposes of quick reverse lookup.
664  */
665 static void pt_buffer_setup_topa_index(struct pt_buffer *buf)
666 {
667         struct topa *cur = buf->first, *prev = buf->last;
668         struct topa_entry *te_cur = TOPA_ENTRY(cur, 0),
669                 *te_prev = TOPA_ENTRY(prev, prev->last - 1);
670         int pg = 0, idx = 0;
671 
672         while (pg < buf->nr_pages) {
673                 int tidx;
674 
675                 /* pages within one topa entry */
676                 for (tidx = 0; tidx < 1 << te_cur->size; tidx++, pg++)
677                         buf->topa_index[pg] = te_prev;
678 
679                 te_prev = te_cur;
680 
681                 if (idx == cur->last - 1) {
682                         /* advance to next topa table */
683                         idx = 0;
684                         cur = list_entry(cur->list.next, struct topa, list);
685                 } else {
686                         idx++;
687                 }
688                 te_cur = TOPA_ENTRY(cur, idx);
689         }
690 
691 }
692 
693 /**
694  * pt_buffer_reset_offsets() - adjust buffer's write pointers from aux_head
695  * @buf:        PT buffer.
696  * @head:       Write pointer (aux_head) from AUX buffer.
697  *
698  * Find the ToPA table and entry corresponding to given @head and set buffer's
699  * "current" pointers accordingly. This is done after we have obtained the
700  * current aux_head position from a successful call to perf_aux_output_begin()
701  * to make sure the hardware is writing to the right place.
702  *
703  * This function modifies buf::{cur,cur_idx,output_off} that will be programmed
704  * into PT msrs when the tracing is enabled and buf::head and buf::data_size,
705  * which are used to determine INT and STOP markers' locations by a subsequent
706  * call to pt_buffer_reset_markers().
707  */
708 static void pt_buffer_reset_offsets(struct pt_buffer *buf, unsigned long head)
709 {
710         int pg;
711 
712         if (buf->snapshot)
713                 head &= (buf->nr_pages << PAGE_SHIFT) - 1;
714 
715         pg = (head >> PAGE_SHIFT) & (buf->nr_pages - 1);
716         pg = pt_topa_next_entry(buf, pg);
717 
718         buf->cur = (struct topa *)((unsigned long)buf->topa_index[pg] & PAGE_MASK);
719         buf->cur_idx = ((unsigned long)buf->topa_index[pg] -
720                         (unsigned long)buf->cur) / sizeof(struct topa_entry);
721         buf->output_off = head & (sizes(buf->cur->table[buf->cur_idx].size) - 1);
722 
723         local64_set(&buf->head, head);
724         local_set(&buf->data_size, 0);
725 }
726 
727 /**
728  * pt_buffer_fini_topa() - deallocate ToPA structure of a buffer
729  * @buf:        PT buffer.
730  */
731 static void pt_buffer_fini_topa(struct pt_buffer *buf)
732 {
733         struct topa *topa, *iter;
734 
735         list_for_each_entry_safe(topa, iter, &buf->tables, list) {
736                 /*
737                  * right now, this is in free_aux() path only, so
738                  * no need to unlink this table from the list
739                  */
740                 topa_free(topa);
741         }
742 }
743 
744 /**
745  * pt_buffer_init_topa() - initialize ToPA table for pt buffer
746  * @buf:        PT buffer.
747  * @size:       Total size of all regions within this ToPA.
748  * @gfp:        Allocation flags.
749  */
750 static int pt_buffer_init_topa(struct pt_buffer *buf, unsigned long nr_pages,
751                                gfp_t gfp)
752 {
753         struct topa *topa;
754         int err;
755 
756         topa = topa_alloc(buf->cpu, gfp);
757         if (!topa)
758                 return -ENOMEM;
759 
760         topa_insert_table(buf, topa);
761 
762         while (buf->nr_pages < nr_pages) {
763                 err = topa_insert_pages(buf, gfp);
764                 if (err) {
765                         pt_buffer_fini_topa(buf);
766                         return -ENOMEM;
767                 }
768         }
769 
770         pt_buffer_setup_topa_index(buf);
771 
772         /* link last table to the first one, unless we're double buffering */
773         if (pt_cap_get(PT_CAP_topa_multiple_entries)) {
774                 TOPA_ENTRY(buf->last, -1)->base = buf->first->phys >> TOPA_SHIFT;
775                 TOPA_ENTRY(buf->last, -1)->end = 1;
776         }
777 
778         pt_topa_dump(buf);
779         return 0;
780 }
781 
782 /**
783  * pt_buffer_setup_aux() - set up topa tables for a PT buffer
784  * @cpu:        Cpu on which to allocate, -1 means current.
785  * @pages:      Array of pointers to buffer pages passed from perf core.
786  * @nr_pages:   Number of pages in the buffer.
787  * @snapshot:   If this is a snapshot/overwrite counter.
788  *
789  * This is a pmu::setup_aux callback that sets up ToPA tables and all the
790  * bookkeeping for an AUX buffer.
791  *
792  * Return:      Our private PT buffer structure.
793  */
794 static void *
795 pt_buffer_setup_aux(int cpu, void **pages, int nr_pages, bool snapshot)
796 {
797         struct pt_buffer *buf;
798         int node, ret;
799 
800         if (!nr_pages)
801                 return NULL;
802 
803         if (cpu == -1)
804                 cpu = raw_smp_processor_id();
805         node = cpu_to_node(cpu);
806 
807         buf = kzalloc_node(offsetof(struct pt_buffer, topa_index[nr_pages]),
808                            GFP_KERNEL, node);
809         if (!buf)
810                 return NULL;
811 
812         buf->cpu = cpu;
813         buf->snapshot = snapshot;
814         buf->data_pages = pages;
815 
816         INIT_LIST_HEAD(&buf->tables);
817 
818         ret = pt_buffer_init_topa(buf, nr_pages, GFP_KERNEL);
819         if (ret) {
820                 kfree(buf);
821                 return NULL;
822         }
823 
824         return buf;
825 }
826 
827 /**
828  * pt_buffer_free_aux() - perf AUX deallocation path callback
829  * @data:       PT buffer.
830  */
831 static void pt_buffer_free_aux(void *data)
832 {
833         struct pt_buffer *buf = data;
834 
835         pt_buffer_fini_topa(buf);
836         kfree(buf);
837 }
838 
839 /**
840  * pt_buffer_is_full() - check if the buffer is full
841  * @buf:        PT buffer.
842  * @pt:         Per-cpu pt handle.
843  *
844  * If the user hasn't read data from the output region that aux_head
845  * points to, the buffer is considered full: the user needs to read at
846  * least this region and update aux_tail to point past it.
847  */
848 static bool pt_buffer_is_full(struct pt_buffer *buf, struct pt *pt)
849 {
850         if (buf->snapshot)
851                 return false;
852 
853         if (local_read(&buf->data_size) >= pt->handle.size)
854                 return true;
855 
856         return false;
857 }
858 
859 /**
860  * intel_pt_interrupt() - PT PMI handler
861  */
862 void intel_pt_interrupt(void)
863 {
864         struct pt *pt = this_cpu_ptr(&pt_ctx);
865         struct pt_buffer *buf;
866         struct perf_event *event = pt->handle.event;
867 
868         /*
869          * There may be a dangling PT bit in the interrupt status register
870          * after PT has been disabled by pt_event_stop(). Make sure we don't
871          * do anything (particularly, re-enable) for this event here.
872          */
873         if (!ACCESS_ONCE(pt->handle_nmi))
874                 return;
875 
876         pt_config_start(false);
877 
878         if (!event)
879                 return;
880 
881         buf = perf_get_aux(&pt->handle);
882         if (!buf)
883                 return;
884 
885         pt_read_offset(buf);
886 
887         pt_handle_status(pt);
888 
889         pt_update_head(pt);
890 
891         perf_aux_output_end(&pt->handle, local_xchg(&buf->data_size, 0),
892                             local_xchg(&buf->lost, 0));
893 
894         if (!event->hw.state) {
895                 int ret;
896 
897                 buf = perf_aux_output_begin(&pt->handle, event);
898                 if (!buf) {
899                         event->hw.state = PERF_HES_STOPPED;
900                         return;
901                 }
902 
903                 pt_buffer_reset_offsets(buf, pt->handle.head);
904                 /* snapshot counters don't use PMI, so it's safe */
905                 ret = pt_buffer_reset_markers(buf, &pt->handle);
906                 if (ret) {
907                         perf_aux_output_end(&pt->handle, 0, true);
908                         return;
909                 }
910 
911                 pt_config_buffer(buf->cur->table, buf->cur_idx,
912                                  buf->output_off);
913                 wrmsrl(MSR_IA32_RTIT_STATUS, 0);
914                 pt_config(event);
915         }
916 }
917 
918 /*
919  * PMU callbacks
920  */
921 
922 static void pt_event_start(struct perf_event *event, int mode)
923 {
924         struct pt *pt = this_cpu_ptr(&pt_ctx);
925         struct pt_buffer *buf = perf_get_aux(&pt->handle);
926 
927         if (!buf || pt_buffer_is_full(buf, pt)) {
928                 event->hw.state = PERF_HES_STOPPED;
929                 return;
930         }
931 
932         ACCESS_ONCE(pt->handle_nmi) = 1;
933         event->hw.state = 0;
934 
935         pt_config_buffer(buf->cur->table, buf->cur_idx,
936                          buf->output_off);
937         wrmsrl(MSR_IA32_RTIT_STATUS, 0);
938         pt_config(event);
939 }
940 
941 static void pt_event_stop(struct perf_event *event, int mode)
942 {
943         struct pt *pt = this_cpu_ptr(&pt_ctx);
944 
945         /*
946          * Protect against the PMI racing with disabling wrmsr,
947          * see comment in intel_pt_interrupt().
948          */
949         ACCESS_ONCE(pt->handle_nmi) = 0;
950         pt_config_start(false);
951 
952         if (event->hw.state == PERF_HES_STOPPED)
953                 return;
954 
955         event->hw.state = PERF_HES_STOPPED;
956 
957         if (mode & PERF_EF_UPDATE) {
958                 struct pt_buffer *buf = perf_get_aux(&pt->handle);
959 
960                 if (!buf)
961                         return;
962 
963                 if (WARN_ON_ONCE(pt->handle.event != event))
964                         return;
965 
966                 pt_read_offset(buf);
967 
968                 pt_handle_status(pt);
969 
970                 pt_update_head(pt);
971         }
972 }
973 
974 static void pt_event_del(struct perf_event *event, int mode)
975 {
976         struct pt *pt = this_cpu_ptr(&pt_ctx);
977         struct pt_buffer *buf;
978 
979         pt_event_stop(event, PERF_EF_UPDATE);
980 
981         buf = perf_get_aux(&pt->handle);
982 
983         if (buf) {
984                 if (buf->snapshot)
985                         pt->handle.head =
986                                 local_xchg(&buf->data_size,
987                                            buf->nr_pages << PAGE_SHIFT);
988                 perf_aux_output_end(&pt->handle, local_xchg(&buf->data_size, 0),
989                                     local_xchg(&buf->lost, 0));
990         }
991 }
992 
993 static int pt_event_add(struct perf_event *event, int mode)
994 {
995         struct pt_buffer *buf;
996         struct pt *pt = this_cpu_ptr(&pt_ctx);
997         struct hw_perf_event *hwc = &event->hw;
998         int ret = -EBUSY;
999 
1000         if (pt->handle.event)
1001                 goto fail;
1002 
1003         buf = perf_aux_output_begin(&pt->handle, event);
1004         ret = -EINVAL;
1005         if (!buf)
1006                 goto fail_stop;
1007 
1008         pt_buffer_reset_offsets(buf, pt->handle.head);
1009         if (!buf->snapshot) {
1010                 ret = pt_buffer_reset_markers(buf, &pt->handle);
1011                 if (ret)
1012                         goto fail_end_stop;
1013         }
1014 
1015         if (mode & PERF_EF_START) {
1016                 pt_event_start(event, 0);
1017                 ret = -EBUSY;
1018                 if (hwc->state == PERF_HES_STOPPED)
1019                         goto fail_end_stop;
1020         } else {
1021                 hwc->state = PERF_HES_STOPPED;
1022         }
1023 
1024         return 0;
1025 
1026 fail_end_stop:
1027         perf_aux_output_end(&pt->handle, 0, true);
1028 fail_stop:
1029         hwc->state = PERF_HES_STOPPED;
1030 fail:
1031         return ret;
1032 }
1033 
1034 static void pt_event_read(struct perf_event *event)
1035 {
1036 }
1037 
1038 static void pt_event_destroy(struct perf_event *event)
1039 {
1040         x86_del_exclusive(x86_lbr_exclusive_pt);
1041 }
1042 
1043 static int pt_event_init(struct perf_event *event)
1044 {
1045         if (event->attr.type != pt_pmu.pmu.type)
1046                 return -ENOENT;
1047 
1048         if (!pt_event_valid(event))
1049                 return -EINVAL;
1050 
1051         if (x86_add_exclusive(x86_lbr_exclusive_pt))
1052                 return -EBUSY;
1053 
1054         event->destroy = pt_event_destroy;
1055 
1056         return 0;
1057 }
1058 
1059 static __init int pt_init(void)
1060 {
1061         int ret, cpu, prior_warn = 0;
1062 
1063         BUILD_BUG_ON(sizeof(struct topa) > PAGE_SIZE);
1064         get_online_cpus();
1065         for_each_online_cpu(cpu) {
1066                 u64 ctl;
1067 
1068                 ret = rdmsrl_safe_on_cpu(cpu, MSR_IA32_RTIT_CTL, &ctl);
1069                 if (!ret && (ctl & RTIT_CTL_TRACEEN))
1070                         prior_warn++;
1071         }
1072         put_online_cpus();
1073 
1074         if (prior_warn) {
1075                 x86_add_exclusive(x86_lbr_exclusive_pt);
1076                 pr_warn("PT is enabled at boot time, doing nothing\n");
1077 
1078                 return -EBUSY;
1079         }
1080 
1081         ret = pt_pmu_hw_init();
1082         if (ret)
1083                 return ret;
1084 
1085         if (!pt_cap_get(PT_CAP_topa_output)) {
1086                 pr_warn("ToPA output is not supported on this CPU\n");
1087                 return -ENODEV;
1088         }
1089 
1090         if (!pt_cap_get(PT_CAP_topa_multiple_entries))
1091                 pt_pmu.pmu.capabilities =
1092                         PERF_PMU_CAP_AUX_NO_SG | PERF_PMU_CAP_AUX_SW_DOUBLEBUF;
1093 
1094         pt_pmu.pmu.capabilities |= PERF_PMU_CAP_EXCLUSIVE | PERF_PMU_CAP_ITRACE;
1095         pt_pmu.pmu.attr_groups  = pt_attr_groups;
1096         pt_pmu.pmu.task_ctx_nr  = perf_sw_context;
1097         pt_pmu.pmu.event_init   = pt_event_init;
1098         pt_pmu.pmu.add          = pt_event_add;
1099         pt_pmu.pmu.del          = pt_event_del;
1100         pt_pmu.pmu.start        = pt_event_start;
1101         pt_pmu.pmu.stop         = pt_event_stop;
1102         pt_pmu.pmu.read         = pt_event_read;
1103         pt_pmu.pmu.setup_aux    = pt_buffer_setup_aux;
1104         pt_pmu.pmu.free_aux     = pt_buffer_free_aux;
1105         ret = perf_pmu_register(&pt_pmu.pmu, "intel_pt", -1);
1106 
1107         return ret;
1108 }
1109 arch_initcall(pt_init);
1110 

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