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Linux/arch/x86/kernel/devicetree.c

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  1 /*
  2  * Architecture specific OF callbacks.
  3  */
  4 #include <linux/bootmem.h>
  5 #include <linux/export.h>
  6 #include <linux/io.h>
  7 #include <linux/irqdomain.h>
  8 #include <linux/interrupt.h>
  9 #include <linux/list.h>
 10 #include <linux/of.h>
 11 #include <linux/of_fdt.h>
 12 #include <linux/of_address.h>
 13 #include <linux/of_platform.h>
 14 #include <linux/of_irq.h>
 15 #include <linux/slab.h>
 16 #include <linux/pci.h>
 17 #include <linux/of_pci.h>
 18 #include <linux/initrd.h>
 19 
 20 #include <asm/hpet.h>
 21 #include <asm/apic.h>
 22 #include <asm/pci_x86.h>
 23 
 24 __initdata u64 initial_dtb;
 25 char __initdata cmd_line[COMMAND_LINE_SIZE];
 26 
 27 int __initdata of_ioapic;
 28 
 29 unsigned long pci_address_to_pio(phys_addr_t address)
 30 {
 31         /*
 32          * The ioport address can be directly used by inX / outX
 33          */
 34         BUG_ON(address >= (1 << 16));
 35         return (unsigned long)address;
 36 }
 37 EXPORT_SYMBOL_GPL(pci_address_to_pio);
 38 
 39 void __init early_init_dt_scan_chosen_arch(unsigned long node)
 40 {
 41         BUG();
 42 }
 43 
 44 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
 45 {
 46         BUG();
 47 }
 48 
 49 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
 50 {
 51         return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
 52 }
 53 
 54 #ifdef CONFIG_BLK_DEV_INITRD
 55 void __init early_init_dt_setup_initrd_arch(unsigned long start,
 56                                             unsigned long end)
 57 {
 58         initrd_start = (unsigned long)__va(start);
 59         initrd_end = (unsigned long)__va(end);
 60         initrd_below_start_ok = 1;
 61 }
 62 #endif
 63 
 64 void __init add_dtb(u64 data)
 65 {
 66         initial_dtb = data + offsetof(struct setup_data, data);
 67 }
 68 
 69 /*
 70  * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
 71  */
 72 static struct of_device_id __initdata ce4100_ids[] = {
 73         { .compatible = "intel,ce4100-cp", },
 74         { .compatible = "isa", },
 75         { .compatible = "pci", },
 76         {},
 77 };
 78 
 79 static int __init add_bus_probe(void)
 80 {
 81         if (!of_have_populated_dt())
 82                 return 0;
 83 
 84         return of_platform_bus_probe(NULL, ce4100_ids, NULL);
 85 }
 86 module_init(add_bus_probe);
 87 
 88 #ifdef CONFIG_PCI
 89 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
 90 {
 91         struct device_node *np;
 92 
 93         for_each_node_by_type(np, "pci") {
 94                 const void *prop;
 95                 unsigned int bus_min;
 96 
 97                 prop = of_get_property(np, "bus-range", NULL);
 98                 if (!prop)
 99                         continue;
100                 bus_min = be32_to_cpup(prop);
101                 if (bus->number == bus_min)
102                         return np;
103         }
104         return NULL;
105 }
106 
107 static int x86_of_pci_irq_enable(struct pci_dev *dev)
108 {
109         struct of_irq oirq;
110         u32 virq;
111         int ret;
112         u8 pin;
113 
114         ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
115         if (ret)
116                 return ret;
117         if (!pin)
118                 return 0;
119 
120         ret = of_irq_map_pci(dev, &oirq);
121         if (ret)
122                 return ret;
123 
124         virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
125                         oirq.size);
126         if (virq == 0)
127                 return -EINVAL;
128         dev->irq = virq;
129         return 0;
130 }
131 
132 static void x86_of_pci_irq_disable(struct pci_dev *dev)
133 {
134 }
135 
136 void __cpuinit x86_of_pci_init(void)
137 {
138         pcibios_enable_irq = x86_of_pci_irq_enable;
139         pcibios_disable_irq = x86_of_pci_irq_disable;
140 }
141 #endif
142 
143 static void __init dtb_setup_hpet(void)
144 {
145 #ifdef CONFIG_HPET_TIMER
146         struct device_node *dn;
147         struct resource r;
148         int ret;
149 
150         dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
151         if (!dn)
152                 return;
153         ret = of_address_to_resource(dn, 0, &r);
154         if (ret) {
155                 WARN_ON(1);
156                 return;
157         }
158         hpet_address = r.start;
159 #endif
160 }
161 
162 static void __init dtb_lapic_setup(void)
163 {
164 #ifdef CONFIG_X86_LOCAL_APIC
165         struct device_node *dn;
166         struct resource r;
167         int ret;
168 
169         dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
170         if (!dn)
171                 return;
172 
173         ret = of_address_to_resource(dn, 0, &r);
174         if (WARN_ON(ret))
175                 return;
176 
177         /* Did the boot loader setup the local APIC ? */
178         if (!cpu_has_apic) {
179                 if (apic_force_enable(r.start))
180                         return;
181         }
182         smp_found_config = 1;
183         pic_mode = 1;
184         register_lapic_address(r.start);
185         generic_processor_info(boot_cpu_physical_apicid,
186                                GET_APIC_VERSION(apic_read(APIC_LVR)));
187 #endif
188 }
189 
190 #ifdef CONFIG_X86_IO_APIC
191 static unsigned int ioapic_id;
192 
193 static void __init dtb_add_ioapic(struct device_node *dn)
194 {
195         struct resource r;
196         int ret;
197 
198         ret = of_address_to_resource(dn, 0, &r);
199         if (ret) {
200                 printk(KERN_ERR "Can't obtain address from node %s.\n",
201                                 dn->full_name);
202                 return;
203         }
204         mp_register_ioapic(++ioapic_id, r.start, gsi_top);
205 }
206 
207 static void __init dtb_ioapic_setup(void)
208 {
209         struct device_node *dn;
210 
211         for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
212                 dtb_add_ioapic(dn);
213 
214         if (nr_ioapics) {
215                 of_ioapic = 1;
216                 return;
217         }
218         printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
219 }
220 #else
221 static void __init dtb_ioapic_setup(void) {}
222 #endif
223 
224 static void __init dtb_apic_setup(void)
225 {
226         dtb_lapic_setup();
227         dtb_ioapic_setup();
228 }
229 
230 #ifdef CONFIG_OF_FLATTREE
231 static void __init x86_flattree_get_config(void)
232 {
233         u32 size, map_len;
234         void *new_dtb;
235 
236         if (!initial_dtb)
237                 return;
238 
239         map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK),
240                         (u64)sizeof(struct boot_param_header));
241 
242         initial_boot_params = early_memremap(initial_dtb, map_len);
243         size = be32_to_cpu(initial_boot_params->totalsize);
244         if (map_len < size) {
245                 early_iounmap(initial_boot_params, map_len);
246                 initial_boot_params = early_memremap(initial_dtb, size);
247                 map_len = size;
248         }
249 
250         new_dtb = alloc_bootmem(size);
251         memcpy(new_dtb, initial_boot_params, size);
252         early_iounmap(initial_boot_params, map_len);
253 
254         initial_boot_params = new_dtb;
255 
256         /* root level address cells */
257         of_scan_flat_dt(early_init_dt_scan_root, NULL);
258 
259         unflatten_device_tree();
260 }
261 #else
262 static inline void x86_flattree_get_config(void) { }
263 #endif
264 
265 void __init x86_dtb_init(void)
266 {
267         x86_flattree_get_config();
268 
269         if (!of_have_populated_dt())
270                 return;
271 
272         dtb_setup_hpet();
273         dtb_apic_setup();
274 }
275 
276 #ifdef CONFIG_X86_IO_APIC
277 
278 struct of_ioapic_type {
279         u32 out_type;
280         u32 trigger;
281         u32 polarity;
282 };
283 
284 static struct of_ioapic_type of_ioapic_type[] =
285 {
286         {
287                 .out_type       = IRQ_TYPE_EDGE_RISING,
288                 .trigger        = IOAPIC_EDGE,
289                 .polarity       = 1,
290         },
291         {
292                 .out_type       = IRQ_TYPE_LEVEL_LOW,
293                 .trigger        = IOAPIC_LEVEL,
294                 .polarity       = 0,
295         },
296         {
297                 .out_type       = IRQ_TYPE_LEVEL_HIGH,
298                 .trigger        = IOAPIC_LEVEL,
299                 .polarity       = 1,
300         },
301         {
302                 .out_type       = IRQ_TYPE_EDGE_FALLING,
303                 .trigger        = IOAPIC_EDGE,
304                 .polarity       = 0,
305         },
306 };
307 
308 static int ioapic_xlate(struct irq_domain *domain,
309                         struct device_node *controller,
310                         const u32 *intspec, u32 intsize,
311                         irq_hw_number_t *out_hwirq, u32 *out_type)
312 {
313         struct io_apic_irq_attr attr;
314         struct of_ioapic_type *it;
315         u32 line, idx;
316         int rc;
317 
318         if (WARN_ON(intsize < 2))
319                 return -EINVAL;
320 
321         line = intspec[0];
322 
323         if (intspec[1] >= ARRAY_SIZE(of_ioapic_type))
324                 return -EINVAL;
325 
326         it = &of_ioapic_type[intspec[1]];
327 
328         idx = (u32) domain->host_data;
329         set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity);
330 
331         rc = io_apic_setup_irq_pin_once(irq_find_mapping(domain, line),
332                                         cpu_to_node(0), &attr);
333         if (rc)
334                 return rc;
335 
336         *out_hwirq = line;
337         *out_type = it->out_type;
338         return 0;
339 }
340 
341 const struct irq_domain_ops ioapic_irq_domain_ops = {
342         .xlate = ioapic_xlate,
343 };
344 
345 static void __init ioapic_add_ofnode(struct device_node *np)
346 {
347         struct resource r;
348         int i, ret;
349 
350         ret = of_address_to_resource(np, 0, &r);
351         if (ret) {
352                 printk(KERN_ERR "Failed to obtain address for %s\n",
353                                 np->full_name);
354                 return;
355         }
356 
357         for (i = 0; i < nr_ioapics; i++) {
358                 if (r.start == mpc_ioapic_addr(i)) {
359                         struct irq_domain *id;
360                         struct mp_ioapic_gsi *gsi_cfg;
361 
362                         gsi_cfg = mp_ioapic_gsi_routing(i);
363 
364                         id = irq_domain_add_legacy(np, 32, gsi_cfg->gsi_base, 0,
365                                                    &ioapic_irq_domain_ops,
366                                                    (void*)i);
367                         BUG_ON(!id);
368                         return;
369                 }
370         }
371         printk(KERN_ERR "IOxAPIC at %s is not registered.\n", np->full_name);
372 }
373 
374 void __init x86_add_irq_domains(void)
375 {
376         struct device_node *dp;
377 
378         if (!of_have_populated_dt())
379                 return;
380 
381         for_each_node_with_property(dp, "interrupt-controller") {
382                 if (of_device_is_compatible(dp, "intel,ce4100-ioapic"))
383                         ioapic_add_ofnode(dp);
384         }
385 }
386 #else
387 void __init x86_add_irq_domains(void) { }
388 #endif
389 

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