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Linux/arch/x86/kernel/hw_breakpoint.c

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  1 /*
  2  * This program is free software; you can redistribute it and/or modify
  3  * it under the terms of the GNU General Public License as published by
  4  * the Free Software Foundation; either version 2 of the License, or
  5  * (at your option) any later version.
  6  *
  7  * This program is distributed in the hope that it will be useful,
  8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 10  * GNU General Public License for more details.
 11  *
 12  * You should have received a copy of the GNU General Public License
 13  * along with this program; if not, write to the Free Software
 14  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 15  *
 16  * Copyright (C) 2007 Alan Stern
 17  * Copyright (C) 2009 IBM Corporation
 18  * Copyright (C) 2009 Frederic Weisbecker <fweisbec@gmail.com>
 19  *
 20  * Authors: Alan Stern <stern@rowland.harvard.edu>
 21  *          K.Prasad <prasad@linux.vnet.ibm.com>
 22  *          Frederic Weisbecker <fweisbec@gmail.com>
 23  */
 24 
 25 /*
 26  * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
 27  * using the CPU's debug registers.
 28  */
 29 
 30 #include <linux/perf_event.h>
 31 #include <linux/hw_breakpoint.h>
 32 #include <linux/irqflags.h>
 33 #include <linux/notifier.h>
 34 #include <linux/kallsyms.h>
 35 #include <linux/kprobes.h>
 36 #include <linux/percpu.h>
 37 #include <linux/kdebug.h>
 38 #include <linux/kernel.h>
 39 #include <linux/export.h>
 40 #include <linux/sched.h>
 41 #include <linux/smp.h>
 42 
 43 #include <asm/hw_breakpoint.h>
 44 #include <asm/processor.h>
 45 #include <asm/debugreg.h>
 46 #include <asm/user.h>
 47 
 48 /* Per cpu debug control register value */
 49 DEFINE_PER_CPU(unsigned long, cpu_dr7);
 50 EXPORT_PER_CPU_SYMBOL(cpu_dr7);
 51 
 52 /* Per cpu debug address registers values */
 53 static DEFINE_PER_CPU(unsigned long, cpu_debugreg[HBP_NUM]);
 54 
 55 /*
 56  * Stores the breakpoints currently in use on each breakpoint address
 57  * register for each cpus
 58  */
 59 static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
 60 
 61 
 62 static inline unsigned long
 63 __encode_dr7(int drnum, unsigned int len, unsigned int type)
 64 {
 65         unsigned long bp_info;
 66 
 67         bp_info = (len | type) & 0xf;
 68         bp_info <<= (DR_CONTROL_SHIFT + drnum * DR_CONTROL_SIZE);
 69         bp_info |= (DR_GLOBAL_ENABLE << (drnum * DR_ENABLE_SIZE));
 70 
 71         return bp_info;
 72 }
 73 
 74 /*
 75  * Encode the length, type, Exact, and Enable bits for a particular breakpoint
 76  * as stored in debug register 7.
 77  */
 78 unsigned long encode_dr7(int drnum, unsigned int len, unsigned int type)
 79 {
 80         return __encode_dr7(drnum, len, type) | DR_GLOBAL_SLOWDOWN;
 81 }
 82 
 83 /*
 84  * Decode the length and type bits for a particular breakpoint as
 85  * stored in debug register 7.  Return the "enabled" status.
 86  */
 87 int decode_dr7(unsigned long dr7, int bpnum, unsigned *len, unsigned *type)
 88 {
 89         int bp_info = dr7 >> (DR_CONTROL_SHIFT + bpnum * DR_CONTROL_SIZE);
 90 
 91         *len = (bp_info & 0xc) | 0x40;
 92         *type = (bp_info & 0x3) | 0x80;
 93 
 94         return (dr7 >> (bpnum * DR_ENABLE_SIZE)) & 0x3;
 95 }
 96 
 97 /*
 98  * Install a perf counter breakpoint.
 99  *
100  * We seek a free debug address register and use it for this
101  * breakpoint. Eventually we enable it in the debug control register.
102  *
103  * Atomic: we hold the counter->ctx->lock and we only handle variables
104  * and registers local to this cpu.
105  */
106 int arch_install_hw_breakpoint(struct perf_event *bp)
107 {
108         struct arch_hw_breakpoint *info = counter_arch_bp(bp);
109         unsigned long *dr7;
110         int i;
111 
112         for (i = 0; i < HBP_NUM; i++) {
113                 struct perf_event **slot = this_cpu_ptr(&bp_per_reg[i]);
114 
115                 if (!*slot) {
116                         *slot = bp;
117                         break;
118                 }
119         }
120 
121         if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
122                 return -EBUSY;
123 
124         set_debugreg(info->address, i);
125         __this_cpu_write(cpu_debugreg[i], info->address);
126 
127         dr7 = this_cpu_ptr(&cpu_dr7);
128         *dr7 |= encode_dr7(i, info->len, info->type);
129 
130         set_debugreg(*dr7, 7);
131         if (info->mask)
132                 set_dr_addr_mask(info->mask, i);
133 
134         return 0;
135 }
136 
137 /*
138  * Uninstall the breakpoint contained in the given counter.
139  *
140  * First we search the debug address register it uses and then we disable
141  * it.
142  *
143  * Atomic: we hold the counter->ctx->lock and we only handle variables
144  * and registers local to this cpu.
145  */
146 void arch_uninstall_hw_breakpoint(struct perf_event *bp)
147 {
148         struct arch_hw_breakpoint *info = counter_arch_bp(bp);
149         unsigned long *dr7;
150         int i;
151 
152         for (i = 0; i < HBP_NUM; i++) {
153                 struct perf_event **slot = this_cpu_ptr(&bp_per_reg[i]);
154 
155                 if (*slot == bp) {
156                         *slot = NULL;
157                         break;
158                 }
159         }
160 
161         if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
162                 return;
163 
164         dr7 = this_cpu_ptr(&cpu_dr7);
165         *dr7 &= ~__encode_dr7(i, info->len, info->type);
166 
167         set_debugreg(*dr7, 7);
168         if (info->mask)
169                 set_dr_addr_mask(0, i);
170 }
171 
172 /*
173  * Check for virtual address in kernel space.
174  */
175 int arch_check_bp_in_kernelspace(struct perf_event *bp)
176 {
177         unsigned int len;
178         unsigned long va;
179         struct arch_hw_breakpoint *info = counter_arch_bp(bp);
180 
181         va = info->address;
182         len = bp->attr.bp_len;
183 
184         /*
185          * We don't need to worry about va + len - 1 overflowing:
186          * we already require that va is aligned to a multiple of len.
187          */
188         return (va >= TASK_SIZE_MAX) || ((va + len - 1) >= TASK_SIZE_MAX);
189 }
190 
191 int arch_bp_generic_fields(int x86_len, int x86_type,
192                            int *gen_len, int *gen_type)
193 {
194         /* Type */
195         switch (x86_type) {
196         case X86_BREAKPOINT_EXECUTE:
197                 if (x86_len != X86_BREAKPOINT_LEN_X)
198                         return -EINVAL;
199 
200                 *gen_type = HW_BREAKPOINT_X;
201                 *gen_len = sizeof(long);
202                 return 0;
203         case X86_BREAKPOINT_WRITE:
204                 *gen_type = HW_BREAKPOINT_W;
205                 break;
206         case X86_BREAKPOINT_RW:
207                 *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
208                 break;
209         default:
210                 return -EINVAL;
211         }
212 
213         /* Len */
214         switch (x86_len) {
215         case X86_BREAKPOINT_LEN_1:
216                 *gen_len = HW_BREAKPOINT_LEN_1;
217                 break;
218         case X86_BREAKPOINT_LEN_2:
219                 *gen_len = HW_BREAKPOINT_LEN_2;
220                 break;
221         case X86_BREAKPOINT_LEN_4:
222                 *gen_len = HW_BREAKPOINT_LEN_4;
223                 break;
224 #ifdef CONFIG_X86_64
225         case X86_BREAKPOINT_LEN_8:
226                 *gen_len = HW_BREAKPOINT_LEN_8;
227                 break;
228 #endif
229         default:
230                 return -EINVAL;
231         }
232 
233         return 0;
234 }
235 
236 
237 static int arch_build_bp_info(struct perf_event *bp)
238 {
239         struct arch_hw_breakpoint *info = counter_arch_bp(bp);
240 
241         info->address = bp->attr.bp_addr;
242 
243         /* Type */
244         switch (bp->attr.bp_type) {
245         case HW_BREAKPOINT_W:
246                 info->type = X86_BREAKPOINT_WRITE;
247                 break;
248         case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
249                 info->type = X86_BREAKPOINT_RW;
250                 break;
251         case HW_BREAKPOINT_X:
252                 /*
253                  * We don't allow kernel breakpoints in places that are not
254                  * acceptable for kprobes.  On non-kprobes kernels, we don't
255                  * allow kernel breakpoints at all.
256                  */
257                 if (bp->attr.bp_addr >= TASK_SIZE_MAX) {
258 #ifdef CONFIG_KPROBES
259                         if (within_kprobe_blacklist(bp->attr.bp_addr))
260                                 return -EINVAL;
261 #else
262                         return -EINVAL;
263 #endif
264                 }
265 
266                 info->type = X86_BREAKPOINT_EXECUTE;
267                 /*
268                  * x86 inst breakpoints need to have a specific undefined len.
269                  * But we still need to check userspace is not trying to setup
270                  * an unsupported length, to get a range breakpoint for example.
271                  */
272                 if (bp->attr.bp_len == sizeof(long)) {
273                         info->len = X86_BREAKPOINT_LEN_X;
274                         return 0;
275                 }
276         default:
277                 return -EINVAL;
278         }
279 
280         /* Len */
281         info->mask = 0;
282 
283         switch (bp->attr.bp_len) {
284         case HW_BREAKPOINT_LEN_1:
285                 info->len = X86_BREAKPOINT_LEN_1;
286                 break;
287         case HW_BREAKPOINT_LEN_2:
288                 info->len = X86_BREAKPOINT_LEN_2;
289                 break;
290         case HW_BREAKPOINT_LEN_4:
291                 info->len = X86_BREAKPOINT_LEN_4;
292                 break;
293 #ifdef CONFIG_X86_64
294         case HW_BREAKPOINT_LEN_8:
295                 info->len = X86_BREAKPOINT_LEN_8;
296                 break;
297 #endif
298         default:
299                 /* AMD range breakpoint */
300                 if (!is_power_of_2(bp->attr.bp_len))
301                         return -EINVAL;
302                 if (bp->attr.bp_addr & (bp->attr.bp_len - 1))
303                         return -EINVAL;
304 
305                 if (!boot_cpu_has(X86_FEATURE_BPEXT))
306                         return -EOPNOTSUPP;
307 
308                 /*
309                  * It's impossible to use a range breakpoint to fake out
310                  * user vs kernel detection because bp_len - 1 can't
311                  * have the high bit set.  If we ever allow range instruction
312                  * breakpoints, then we'll have to check for kprobe-blacklisted
313                  * addresses anywhere in the range.
314                  */
315                 info->mask = bp->attr.bp_len - 1;
316                 info->len = X86_BREAKPOINT_LEN_1;
317         }
318 
319         return 0;
320 }
321 
322 /*
323  * Validate the arch-specific HW Breakpoint register settings
324  */
325 int arch_validate_hwbkpt_settings(struct perf_event *bp)
326 {
327         struct arch_hw_breakpoint *info = counter_arch_bp(bp);
328         unsigned int align;
329         int ret;
330 
331 
332         ret = arch_build_bp_info(bp);
333         if (ret)
334                 return ret;
335 
336         switch (info->len) {
337         case X86_BREAKPOINT_LEN_1:
338                 align = 0;
339                 if (info->mask)
340                         align = info->mask;
341                 break;
342         case X86_BREAKPOINT_LEN_2:
343                 align = 1;
344                 break;
345         case X86_BREAKPOINT_LEN_4:
346                 align = 3;
347                 break;
348 #ifdef CONFIG_X86_64
349         case X86_BREAKPOINT_LEN_8:
350                 align = 7;
351                 break;
352 #endif
353         default:
354                 WARN_ON_ONCE(1);
355         }
356 
357         /*
358          * Check that the low-order bits of the address are appropriate
359          * for the alignment implied by len.
360          */
361         if (info->address & align)
362                 return -EINVAL;
363 
364         return 0;
365 }
366 
367 /*
368  * Dump the debug register contents to the user.
369  * We can't dump our per cpu values because it
370  * may contain cpu wide breakpoint, something that
371  * doesn't belong to the current task.
372  *
373  * TODO: include non-ptrace user breakpoints (perf)
374  */
375 void aout_dump_debugregs(struct user *dump)
376 {
377         int i;
378         int dr7 = 0;
379         struct perf_event *bp;
380         struct arch_hw_breakpoint *info;
381         struct thread_struct *thread = &current->thread;
382 
383         for (i = 0; i < HBP_NUM; i++) {
384                 bp = thread->ptrace_bps[i];
385 
386                 if (bp && !bp->attr.disabled) {
387                         dump->u_debugreg[i] = bp->attr.bp_addr;
388                         info = counter_arch_bp(bp);
389                         dr7 |= encode_dr7(i, info->len, info->type);
390                 } else {
391                         dump->u_debugreg[i] = 0;
392                 }
393         }
394 
395         dump->u_debugreg[4] = 0;
396         dump->u_debugreg[5] = 0;
397         dump->u_debugreg[6] = current->thread.debugreg6;
398 
399         dump->u_debugreg[7] = dr7;
400 }
401 EXPORT_SYMBOL_GPL(aout_dump_debugregs);
402 
403 /*
404  * Release the user breakpoints used by ptrace
405  */
406 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
407 {
408         int i;
409         struct thread_struct *t = &tsk->thread;
410 
411         for (i = 0; i < HBP_NUM; i++) {
412                 unregister_hw_breakpoint(t->ptrace_bps[i]);
413                 t->ptrace_bps[i] = NULL;
414         }
415 
416         t->debugreg6 = 0;
417         t->ptrace_dr7 = 0;
418 }
419 
420 void hw_breakpoint_restore(void)
421 {
422         set_debugreg(__this_cpu_read(cpu_debugreg[0]), 0);
423         set_debugreg(__this_cpu_read(cpu_debugreg[1]), 1);
424         set_debugreg(__this_cpu_read(cpu_debugreg[2]), 2);
425         set_debugreg(__this_cpu_read(cpu_debugreg[3]), 3);
426         set_debugreg(current->thread.debugreg6, 6);
427         set_debugreg(__this_cpu_read(cpu_dr7), 7);
428 }
429 EXPORT_SYMBOL_GPL(hw_breakpoint_restore);
430 
431 /*
432  * Handle debug exception notifications.
433  *
434  * Return value is either NOTIFY_STOP or NOTIFY_DONE as explained below.
435  *
436  * NOTIFY_DONE returned if one of the following conditions is true.
437  * i) When the causative address is from user-space and the exception
438  * is a valid one, i.e. not triggered as a result of lazy debug register
439  * switching
440  * ii) When there are more bits than trap<n> set in DR6 register (such
441  * as BD, BS or BT) indicating that more than one debug condition is
442  * met and requires some more action in do_debug().
443  *
444  * NOTIFY_STOP returned for all other cases
445  *
446  */
447 static int hw_breakpoint_handler(struct die_args *args)
448 {
449         int i, cpu, rc = NOTIFY_STOP;
450         struct perf_event *bp;
451         unsigned long dr7, dr6;
452         unsigned long *dr6_p;
453 
454         /* The DR6 value is pointed by args->err */
455         dr6_p = (unsigned long *)ERR_PTR(args->err);
456         dr6 = *dr6_p;
457 
458         /* If it's a single step, TRAP bits are random */
459         if (dr6 & DR_STEP)
460                 return NOTIFY_DONE;
461 
462         /* Do an early return if no trap bits are set in DR6 */
463         if ((dr6 & DR_TRAP_BITS) == 0)
464                 return NOTIFY_DONE;
465 
466         get_debugreg(dr7, 7);
467         /* Disable breakpoints during exception handling */
468         set_debugreg(0UL, 7);
469         /*
470          * Assert that local interrupts are disabled
471          * Reset the DRn bits in the virtualized register value.
472          * The ptrace trigger routine will add in whatever is needed.
473          */
474         current->thread.debugreg6 &= ~DR_TRAP_BITS;
475         cpu = get_cpu();
476 
477         /* Handle all the breakpoints that were triggered */
478         for (i = 0; i < HBP_NUM; ++i) {
479                 if (likely(!(dr6 & (DR_TRAP0 << i))))
480                         continue;
481 
482                 /*
483                  * The counter may be concurrently released but that can only
484                  * occur from a call_rcu() path. We can then safely fetch
485                  * the breakpoint, use its callback, touch its counter
486                  * while we are in an rcu_read_lock() path.
487                  */
488                 rcu_read_lock();
489 
490                 bp = per_cpu(bp_per_reg[i], cpu);
491                 /*
492                  * Reset the 'i'th TRAP bit in dr6 to denote completion of
493                  * exception handling
494                  */
495                 (*dr6_p) &= ~(DR_TRAP0 << i);
496                 /*
497                  * bp can be NULL due to lazy debug register switching
498                  * or due to concurrent perf counter removing.
499                  */
500                 if (!bp) {
501                         rcu_read_unlock();
502                         break;
503                 }
504 
505                 perf_bp_event(bp, args->regs);
506 
507                 /*
508                  * Set up resume flag to avoid breakpoint recursion when
509                  * returning back to origin.
510                  */
511                 if (bp->hw.info.type == X86_BREAKPOINT_EXECUTE)
512                         args->regs->flags |= X86_EFLAGS_RF;
513 
514                 rcu_read_unlock();
515         }
516         /*
517          * Further processing in do_debug() is needed for a) user-space
518          * breakpoints (to generate signals) and b) when the system has
519          * taken exception due to multiple causes
520          */
521         if ((current->thread.debugreg6 & DR_TRAP_BITS) ||
522             (dr6 & (~DR_TRAP_BITS)))
523                 rc = NOTIFY_DONE;
524 
525         set_debugreg(dr7, 7);
526         put_cpu();
527 
528         return rc;
529 }
530 
531 /*
532  * Handle debug exception notifications.
533  */
534 int hw_breakpoint_exceptions_notify(
535                 struct notifier_block *unused, unsigned long val, void *data)
536 {
537         if (val != DIE_DEBUG)
538                 return NOTIFY_DONE;
539 
540         return hw_breakpoint_handler(data);
541 }
542 
543 void hw_breakpoint_pmu_read(struct perf_event *bp)
544 {
545         /* TODO */
546 }
547 

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