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Linux/arch/x86/kernel/i387.c

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  1 /*
  2  *  Copyright (C) 1994 Linus Torvalds
  3  *
  4  *  Pentium III FXSR, SSE support
  5  *  General FPU state handling cleanups
  6  *      Gareth Hughes <gareth@valinux.com>, May 2000
  7  */
  8 #include <linux/module.h>
  9 #include <linux/regset.h>
 10 #include <linux/sched.h>
 11 #include <linux/slab.h>
 12 
 13 #include <asm/sigcontext.h>
 14 #include <asm/processor.h>
 15 #include <asm/math_emu.h>
 16 #include <asm/tlbflush.h>
 17 #include <asm/uaccess.h>
 18 #include <asm/ptrace.h>
 19 #include <asm/i387.h>
 20 #include <asm/fpu-internal.h>
 21 #include <asm/user.h>
 22 
 23 /*
 24  * Were we in an interrupt that interrupted kernel mode?
 25  *
 26  * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
 27  * pair does nothing at all: the thread must not have fpu (so
 28  * that we don't try to save the FPU state), and TS must
 29  * be set (so that the clts/stts pair does nothing that is
 30  * visible in the interrupted kernel thread).
 31  *
 32  * Except for the eagerfpu case when we return 1 unless we've already
 33  * been eager and saved the state in kernel_fpu_begin().
 34  */
 35 static inline bool interrupted_kernel_fpu_idle(void)
 36 {
 37         if (use_eager_fpu())
 38                 return __thread_has_fpu(current);
 39 
 40         return !__thread_has_fpu(current) &&
 41                 (read_cr0() & X86_CR0_TS);
 42 }
 43 
 44 /*
 45  * Were we in user mode (or vm86 mode) when we were
 46  * interrupted?
 47  *
 48  * Doing kernel_fpu_begin/end() is ok if we are running
 49  * in an interrupt context from user mode - we'll just
 50  * save the FPU state as required.
 51  */
 52 static inline bool interrupted_user_mode(void)
 53 {
 54         struct pt_regs *regs = get_irq_regs();
 55         return regs && user_mode_vm(regs);
 56 }
 57 
 58 /*
 59  * Can we use the FPU in kernel mode with the
 60  * whole "kernel_fpu_begin/end()" sequence?
 61  *
 62  * It's always ok in process context (ie "not interrupt")
 63  * but it is sometimes ok even from an irq.
 64  */
 65 bool irq_fpu_usable(void)
 66 {
 67         return !in_interrupt() ||
 68                 interrupted_user_mode() ||
 69                 interrupted_kernel_fpu_idle();
 70 }
 71 EXPORT_SYMBOL(irq_fpu_usable);
 72 
 73 void __kernel_fpu_begin(void)
 74 {
 75         struct task_struct *me = current;
 76 
 77         if (__thread_has_fpu(me)) {
 78                 __thread_clear_has_fpu(me);
 79                 __save_init_fpu(me);
 80                 /* We do 'stts()' in __kernel_fpu_end() */
 81         } else if (!use_eager_fpu()) {
 82                 this_cpu_write(fpu_owner_task, NULL);
 83                 clts();
 84         }
 85 }
 86 EXPORT_SYMBOL(__kernel_fpu_begin);
 87 
 88 void __kernel_fpu_end(void)
 89 {
 90         if (use_eager_fpu()) {
 91                 /*
 92                  * For eager fpu, most the time, tsk_used_math() is true.
 93                  * Restore the user math as we are done with the kernel usage.
 94                  * At few instances during thread exit, signal handling etc,
 95                  * tsk_used_math() is false. Those few places will take proper
 96                  * actions, so we don't need to restore the math here.
 97                  */
 98                 if (likely(tsk_used_math(current)))
 99                         math_state_restore();
100         } else {
101                 stts();
102         }
103 }
104 EXPORT_SYMBOL(__kernel_fpu_end);
105 
106 void unlazy_fpu(struct task_struct *tsk)
107 {
108         preempt_disable();
109         if (__thread_has_fpu(tsk)) {
110                 __save_init_fpu(tsk);
111                 __thread_fpu_end(tsk);
112         } else
113                 tsk->thread.fpu_counter = 0;
114         preempt_enable();
115 }
116 EXPORT_SYMBOL(unlazy_fpu);
117 
118 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
119 unsigned int xstate_size;
120 EXPORT_SYMBOL_GPL(xstate_size);
121 static struct i387_fxsave_struct fx_scratch;
122 
123 static void mxcsr_feature_mask_init(void)
124 {
125         unsigned long mask = 0;
126 
127         if (cpu_has_fxsr) {
128                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
129                 asm volatile("fxsave %0" : "+m" (fx_scratch));
130                 mask = fx_scratch.mxcsr_mask;
131                 if (mask == 0)
132                         mask = 0x0000ffbf;
133         }
134         mxcsr_feature_mask &= mask;
135 }
136 
137 static void init_thread_xstate(void)
138 {
139         /*
140          * Note that xstate_size might be overwriten later during
141          * xsave_init().
142          */
143 
144         if (!cpu_has_fpu) {
145                 /*
146                  * Disable xsave as we do not support it if i387
147                  * emulation is enabled.
148                  */
149                 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
150                 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
151                 xstate_size = sizeof(struct i387_soft_struct);
152                 return;
153         }
154 
155         if (cpu_has_fxsr)
156                 xstate_size = sizeof(struct i387_fxsave_struct);
157         else
158                 xstate_size = sizeof(struct i387_fsave_struct);
159 
160         /*
161          * Quirk: we don't yet handle the XSAVES* instructions
162          * correctly, as we don't correctly convert between
163          * standard and compacted format when interfacing
164          * with user-space - so disable it for now.
165          *
166          * The difference is small: with recent CPUs the
167          * compacted format is only marginally smaller than
168          * the standard FPU state format.
169          *
170          * ( This is easy to backport while we are fixing
171          *   XSAVES* support. )
172          */
173         setup_clear_cpu_cap(X86_FEATURE_XSAVES);
174 }
175 
176 /*
177  * Called at bootup to set up the initial FPU state that is later cloned
178  * into all processes.
179  */
180 
181 void fpu_init(void)
182 {
183         unsigned long cr0;
184         unsigned long cr4_mask = 0;
185 
186 #ifndef CONFIG_MATH_EMULATION
187         if (!cpu_has_fpu) {
188                 pr_emerg("No FPU found and no math emulation present\n");
189                 pr_emerg("Giving up\n");
190                 for (;;)
191                         asm volatile("hlt");
192         }
193 #endif
194         if (cpu_has_fxsr)
195                 cr4_mask |= X86_CR4_OSFXSR;
196         if (cpu_has_xmm)
197                 cr4_mask |= X86_CR4_OSXMMEXCPT;
198         if (cr4_mask)
199                 cr4_set_bits(cr4_mask);
200 
201         cr0 = read_cr0();
202         cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
203         if (!cpu_has_fpu)
204                 cr0 |= X86_CR0_EM;
205         write_cr0(cr0);
206 
207         /*
208          * init_thread_xstate is only called once to avoid overriding
209          * xstate_size during boot time or during CPU hotplug.
210          */
211         if (xstate_size == 0)
212                 init_thread_xstate();
213 
214         mxcsr_feature_mask_init();
215         xsave_init();
216         eager_fpu_init();
217 }
218 
219 void fpu_finit(struct fpu *fpu)
220 {
221         if (!cpu_has_fpu) {
222                 finit_soft_fpu(&fpu->state->soft);
223                 return;
224         }
225 
226         if (cpu_has_fxsr) {
227                 fx_finit(&fpu->state->fxsave);
228         } else {
229                 struct i387_fsave_struct *fp = &fpu->state->fsave;
230                 memset(fp, 0, xstate_size);
231                 fp->cwd = 0xffff037fu;
232                 fp->swd = 0xffff0000u;
233                 fp->twd = 0xffffffffu;
234                 fp->fos = 0xffff0000u;
235         }
236 }
237 EXPORT_SYMBOL_GPL(fpu_finit);
238 
239 /*
240  * The _current_ task is using the FPU for the first time
241  * so initialize it and set the mxcsr to its default
242  * value at reset if we support XMM instructions and then
243  * remember the current task has used the FPU.
244  */
245 int init_fpu(struct task_struct *tsk)
246 {
247         int ret;
248 
249         if (tsk_used_math(tsk)) {
250                 if (cpu_has_fpu && tsk == current)
251                         unlazy_fpu(tsk);
252                 tsk->thread.fpu.last_cpu = ~0;
253                 return 0;
254         }
255 
256         /*
257          * Memory allocation at the first usage of the FPU and other state.
258          */
259         ret = fpu_alloc(&tsk->thread.fpu);
260         if (ret)
261                 return ret;
262 
263         fpu_finit(&tsk->thread.fpu);
264 
265         set_stopped_child_used_math(tsk);
266         return 0;
267 }
268 EXPORT_SYMBOL_GPL(init_fpu);
269 
270 /*
271  * The xstateregs_active() routine is the same as the fpregs_active() routine,
272  * as the "regset->n" for the xstate regset will be updated based on the feature
273  * capabilites supported by the xsave.
274  */
275 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
276 {
277         return tsk_used_math(target) ? regset->n : 0;
278 }
279 
280 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
281 {
282         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
283 }
284 
285 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
286                 unsigned int pos, unsigned int count,
287                 void *kbuf, void __user *ubuf)
288 {
289         int ret;
290 
291         if (!cpu_has_fxsr)
292                 return -ENODEV;
293 
294         ret = init_fpu(target);
295         if (ret)
296                 return ret;
297 
298         sanitize_i387_state(target);
299 
300         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
301                                    &target->thread.fpu.state->fxsave, 0, -1);
302 }
303 
304 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
305                 unsigned int pos, unsigned int count,
306                 const void *kbuf, const void __user *ubuf)
307 {
308         int ret;
309 
310         if (!cpu_has_fxsr)
311                 return -ENODEV;
312 
313         ret = init_fpu(target);
314         if (ret)
315                 return ret;
316 
317         sanitize_i387_state(target);
318 
319         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
320                                  &target->thread.fpu.state->fxsave, 0, -1);
321 
322         /*
323          * mxcsr reserved bits must be masked to zero for security reasons.
324          */
325         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
326 
327         /*
328          * update the header bits in the xsave header, indicating the
329          * presence of FP and SSE state.
330          */
331         if (cpu_has_xsave)
332                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
333 
334         return ret;
335 }
336 
337 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
338                 unsigned int pos, unsigned int count,
339                 void *kbuf, void __user *ubuf)
340 {
341         int ret;
342 
343         if (!cpu_has_xsave)
344                 return -ENODEV;
345 
346         ret = init_fpu(target);
347         if (ret)
348                 return ret;
349 
350         /*
351          * Copy the 48bytes defined by the software first into the xstate
352          * memory layout in the thread struct, so that we can copy the entire
353          * xstateregs to the user using one user_regset_copyout().
354          */
355         memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
356                xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
357 
358         /*
359          * Copy the xstate memory layout.
360          */
361         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
362                                   &target->thread.fpu.state->xsave, 0, -1);
363         return ret;
364 }
365 
366 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
367                   unsigned int pos, unsigned int count,
368                   const void *kbuf, const void __user *ubuf)
369 {
370         int ret;
371         struct xsave_hdr_struct *xsave_hdr;
372 
373         if (!cpu_has_xsave)
374                 return -ENODEV;
375 
376         ret = init_fpu(target);
377         if (ret)
378                 return ret;
379 
380         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
381                                  &target->thread.fpu.state->xsave, 0, -1);
382 
383         /*
384          * mxcsr reserved bits must be masked to zero for security reasons.
385          */
386         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
387 
388         xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
389 
390         xsave_hdr->xstate_bv &= pcntxt_mask;
391 
392         /* xcomp_bv must be 0 when using uncompacted format */
393         if (!ret && xsave_hdr->xcomp_bv)
394                 ret = -EINVAL;
395 
396         /*
397          * These bits must be zero.
398          */
399         memset(xsave_hdr->reserved, 0, 48);
400 
401         /*
402          * In case of failure, mark all states as init:
403          */
404         if (ret)
405                 fpu_finit(&target->thread.fpu);
406 
407         return ret;
408 }
409 
410 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
411 
412 /*
413  * FPU tag word conversions.
414  */
415 
416 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
417 {
418         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
419 
420         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
421         tmp = ~twd;
422         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
423         /* and move the valid bits to the lower byte. */
424         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
425         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
426         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
427 
428         return tmp;
429 }
430 
431 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16)
432 #define FP_EXP_TAG_VALID        0
433 #define FP_EXP_TAG_ZERO         1
434 #define FP_EXP_TAG_SPECIAL      2
435 #define FP_EXP_TAG_EMPTY        3
436 
437 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
438 {
439         struct _fpxreg *st;
440         u32 tos = (fxsave->swd >> 11) & 7;
441         u32 twd = (unsigned long) fxsave->twd;
442         u32 tag;
443         u32 ret = 0xffff0000u;
444         int i;
445 
446         for (i = 0; i < 8; i++, twd >>= 1) {
447                 if (twd & 0x1) {
448                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
449 
450                         switch (st->exponent & 0x7fff) {
451                         case 0x7fff:
452                                 tag = FP_EXP_TAG_SPECIAL;
453                                 break;
454                         case 0x0000:
455                                 if (!st->significand[0] &&
456                                     !st->significand[1] &&
457                                     !st->significand[2] &&
458                                     !st->significand[3])
459                                         tag = FP_EXP_TAG_ZERO;
460                                 else
461                                         tag = FP_EXP_TAG_SPECIAL;
462                                 break;
463                         default:
464                                 if (st->significand[3] & 0x8000)
465                                         tag = FP_EXP_TAG_VALID;
466                                 else
467                                         tag = FP_EXP_TAG_SPECIAL;
468                                 break;
469                         }
470                 } else {
471                         tag = FP_EXP_TAG_EMPTY;
472                 }
473                 ret |= tag << (2 * i);
474         }
475         return ret;
476 }
477 
478 /*
479  * FXSR floating point environment conversions.
480  */
481 
482 void
483 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
484 {
485         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
486         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
487         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
488         int i;
489 
490         env->cwd = fxsave->cwd | 0xffff0000u;
491         env->swd = fxsave->swd | 0xffff0000u;
492         env->twd = twd_fxsr_to_i387(fxsave);
493 
494 #ifdef CONFIG_X86_64
495         env->fip = fxsave->rip;
496         env->foo = fxsave->rdp;
497         /*
498          * should be actually ds/cs at fpu exception time, but
499          * that information is not available in 64bit mode.
500          */
501         env->fcs = task_pt_regs(tsk)->cs;
502         if (tsk == current) {
503                 savesegment(ds, env->fos);
504         } else {
505                 env->fos = tsk->thread.ds;
506         }
507         env->fos |= 0xffff0000;
508 #else
509         env->fip = fxsave->fip;
510         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
511         env->foo = fxsave->foo;
512         env->fos = fxsave->fos;
513 #endif
514 
515         for (i = 0; i < 8; ++i)
516                 memcpy(&to[i], &from[i], sizeof(to[0]));
517 }
518 
519 void convert_to_fxsr(struct task_struct *tsk,
520                      const struct user_i387_ia32_struct *env)
521 
522 {
523         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
524         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
525         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
526         int i;
527 
528         fxsave->cwd = env->cwd;
529         fxsave->swd = env->swd;
530         fxsave->twd = twd_i387_to_fxsr(env->twd);
531         fxsave->fop = (u16) ((u32) env->fcs >> 16);
532 #ifdef CONFIG_X86_64
533         fxsave->rip = env->fip;
534         fxsave->rdp = env->foo;
535         /* cs and ds ignored */
536 #else
537         fxsave->fip = env->fip;
538         fxsave->fcs = (env->fcs & 0xffff);
539         fxsave->foo = env->foo;
540         fxsave->fos = env->fos;
541 #endif
542 
543         for (i = 0; i < 8; ++i)
544                 memcpy(&to[i], &from[i], sizeof(from[0]));
545 }
546 
547 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
548                unsigned int pos, unsigned int count,
549                void *kbuf, void __user *ubuf)
550 {
551         struct user_i387_ia32_struct env;
552         int ret;
553 
554         ret = init_fpu(target);
555         if (ret)
556                 return ret;
557 
558         if (!static_cpu_has(X86_FEATURE_FPU))
559                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
560 
561         if (!cpu_has_fxsr)
562                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
563                                            &target->thread.fpu.state->fsave, 0,
564                                            -1);
565 
566         sanitize_i387_state(target);
567 
568         if (kbuf && pos == 0 && count == sizeof(env)) {
569                 convert_from_fxsr(kbuf, target);
570                 return 0;
571         }
572 
573         convert_from_fxsr(&env, target);
574 
575         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
576 }
577 
578 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
579                unsigned int pos, unsigned int count,
580                const void *kbuf, const void __user *ubuf)
581 {
582         struct user_i387_ia32_struct env;
583         int ret;
584 
585         ret = init_fpu(target);
586         if (ret)
587                 return ret;
588 
589         sanitize_i387_state(target);
590 
591         if (!static_cpu_has(X86_FEATURE_FPU))
592                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
593 
594         if (!cpu_has_fxsr)
595                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
596                                           &target->thread.fpu.state->fsave, 0,
597                                           -1);
598 
599         if (pos > 0 || count < sizeof(env))
600                 convert_from_fxsr(&env, target);
601 
602         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
603         if (!ret)
604                 convert_to_fxsr(target, &env);
605 
606         /*
607          * update the header bit in the xsave header, indicating the
608          * presence of FP.
609          */
610         if (cpu_has_xsave)
611                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
612         return ret;
613 }
614 
615 /*
616  * FPU state for core dumps.
617  * This is only used for a.out dumps now.
618  * It is declared generically using elf_fpregset_t (which is
619  * struct user_i387_struct) but is in fact only used for 32-bit
620  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
621  */
622 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
623 {
624         struct task_struct *tsk = current;
625         int fpvalid;
626 
627         fpvalid = !!used_math();
628         if (fpvalid)
629                 fpvalid = !fpregs_get(tsk, NULL,
630                                       0, sizeof(struct user_i387_ia32_struct),
631                                       fpu, NULL);
632 
633         return fpvalid;
634 }
635 EXPORT_SYMBOL(dump_fpu);
636 
637 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */
638 
639 static int __init no_387(char *s)
640 {
641         setup_clear_cpu_cap(X86_FEATURE_FPU);
642         return 1;
643 }
644 
645 __setup("no387", no_387);
646 
647 void fpu_detect(struct cpuinfo_x86 *c)
648 {
649         unsigned long cr0;
650         u16 fsw, fcw;
651 
652         fsw = fcw = 0xffff;
653 
654         cr0 = read_cr0();
655         cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
656         write_cr0(cr0);
657 
658         asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
659                      : "+m" (fsw), "+m" (fcw));
660 
661         if (fsw == 0 && (fcw & 0x103f) == 0x003f)
662                 set_cpu_cap(c, X86_FEATURE_FPU);
663         else
664                 clear_cpu_cap(c, X86_FEATURE_FPU);
665 
666         /* The final cr0 value is set in fpu_init() */
667 }
668 

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