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TOMOYO Linux Cross Reference
Linux/arch/x86/kvm/ioapic.c

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  1 /*
  2  *  Copyright (C) 2001  MandrakeSoft S.A.
  3  *  Copyright 2010 Red Hat, Inc. and/or its affiliates.
  4  *
  5  *    MandrakeSoft S.A.
  6  *    43, rue d'Aboukir
  7  *    75002 Paris - France
  8  *    http://www.linux-mandrake.com/
  9  *    http://www.mandrakesoft.com/
 10  *
 11  *  This library is free software; you can redistribute it and/or
 12  *  modify it under the terms of the GNU Lesser General Public
 13  *  License as published by the Free Software Foundation; either
 14  *  version 2 of the License, or (at your option) any later version.
 15  *
 16  *  This library is distributed in the hope that it will be useful,
 17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 19  *  Lesser General Public License for more details.
 20  *
 21  *  You should have received a copy of the GNU Lesser General Public
 22  *  License along with this library; if not, write to the Free Software
 23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 24  *
 25  *  Yunhong Jiang <yunhong.jiang@intel.com>
 26  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
 27  *  Based on Xen 3.1 code.
 28  */
 29 
 30 #include <linux/kvm_host.h>
 31 #include <linux/kvm.h>
 32 #include <linux/mm.h>
 33 #include <linux/highmem.h>
 34 #include <linux/smp.h>
 35 #include <linux/hrtimer.h>
 36 #include <linux/io.h>
 37 #include <linux/slab.h>
 38 #include <linux/export.h>
 39 #include <asm/processor.h>
 40 #include <asm/page.h>
 41 #include <asm/current.h>
 42 #include <trace/events/kvm.h>
 43 
 44 #include "ioapic.h"
 45 #include "lapic.h"
 46 #include "irq.h"
 47 
 48 #if 0
 49 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
 50 #else
 51 #define ioapic_debug(fmt, arg...)
 52 #endif
 53 static int ioapic_service(struct kvm_ioapic *vioapic, int irq,
 54                 bool line_status);
 55 
 56 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
 57                                           unsigned long addr,
 58                                           unsigned long length)
 59 {
 60         unsigned long result = 0;
 61 
 62         switch (ioapic->ioregsel) {
 63         case IOAPIC_REG_VERSION:
 64                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
 65                           | (IOAPIC_VERSION_ID & 0xff));
 66                 break;
 67 
 68         case IOAPIC_REG_APIC_ID:
 69         case IOAPIC_REG_ARB_ID:
 70                 result = ((ioapic->id & 0xf) << 24);
 71                 break;
 72 
 73         default:
 74                 {
 75                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
 76                         u64 redir_content;
 77 
 78                         if (redir_index < IOAPIC_NUM_PINS)
 79                                 redir_content =
 80                                         ioapic->redirtbl[redir_index].bits;
 81                         else
 82                                 redir_content = ~0ULL;
 83 
 84                         result = (ioapic->ioregsel & 0x1) ?
 85                             (redir_content >> 32) & 0xffffffff :
 86                             redir_content & 0xffffffff;
 87                         break;
 88                 }
 89         }
 90 
 91         return result;
 92 }
 93 
 94 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
 95 {
 96         ioapic->rtc_status.pending_eoi = 0;
 97         bitmap_zero(ioapic->rtc_status.dest_map.map, KVM_MAX_VCPUS);
 98 }
 99 
100 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic);
101 
102 static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic *ioapic)
103 {
104         if (WARN_ON(ioapic->rtc_status.pending_eoi < 0))
105                 kvm_rtc_eoi_tracking_restore_all(ioapic);
106 }
107 
108 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
109 {
110         bool new_val, old_val;
111         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
112         union kvm_ioapic_redirect_entry *e;
113 
114         e = &ioapic->redirtbl[RTC_GSI];
115         if (!kvm_apic_match_dest(vcpu, NULL, 0, e->fields.dest_id,
116                                 e->fields.dest_mode))
117                 return;
118 
119         new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
120         old_val = test_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map.map);
121 
122         if (new_val == old_val)
123                 return;
124 
125         if (new_val) {
126                 __set_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map.map);
127                 ioapic->rtc_status.pending_eoi++;
128         } else {
129                 __clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map.map);
130                 ioapic->rtc_status.pending_eoi--;
131                 rtc_status_pending_eoi_check_valid(ioapic);
132         }
133 }
134 
135 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
136 {
137         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
138 
139         spin_lock(&ioapic->lock);
140         __rtc_irq_eoi_tracking_restore_one(vcpu);
141         spin_unlock(&ioapic->lock);
142 }
143 
144 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
145 {
146         struct kvm_vcpu *vcpu;
147         int i;
148 
149         if (RTC_GSI >= IOAPIC_NUM_PINS)
150                 return;
151 
152         rtc_irq_eoi_tracking_reset(ioapic);
153         kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
154             __rtc_irq_eoi_tracking_restore_one(vcpu);
155 }
156 
157 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
158 {
159         if (test_and_clear_bit(vcpu->vcpu_id,
160                                ioapic->rtc_status.dest_map.map)) {
161                 --ioapic->rtc_status.pending_eoi;
162                 rtc_status_pending_eoi_check_valid(ioapic);
163         }
164 }
165 
166 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
167 {
168         if (ioapic->rtc_status.pending_eoi > 0)
169                 return true; /* coalesced */
170 
171         return false;
172 }
173 
174 static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq,
175                 int irq_level, bool line_status)
176 {
177         union kvm_ioapic_redirect_entry entry;
178         u32 mask = 1 << irq;
179         u32 old_irr;
180         int edge, ret;
181 
182         entry = ioapic->redirtbl[irq];
183         edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
184 
185         if (!irq_level) {
186                 ioapic->irr &= ~mask;
187                 ret = 1;
188                 goto out;
189         }
190 
191         /*
192          * Return 0 for coalesced interrupts; for edge-triggered interrupts,
193          * this only happens if a previous edge has not been delivered due
194          * do masking.  For level interrupts, the remote_irr field tells
195          * us if the interrupt is waiting for an EOI.
196          *
197          * RTC is special: it is edge-triggered, but userspace likes to know
198          * if it has been already ack-ed via EOI because coalesced RTC
199          * interrupts lead to time drift in Windows guests.  So we track
200          * EOI manually for the RTC interrupt.
201          */
202         if (irq == RTC_GSI && line_status &&
203                 rtc_irq_check_coalesced(ioapic)) {
204                 ret = 0;
205                 goto out;
206         }
207 
208         old_irr = ioapic->irr;
209         ioapic->irr |= mask;
210         if (edge)
211                 ioapic->irr_delivered &= ~mask;
212         if ((edge && old_irr == ioapic->irr) ||
213             (!edge && entry.fields.remote_irr)) {
214                 ret = 0;
215                 goto out;
216         }
217 
218         ret = ioapic_service(ioapic, irq, line_status);
219 
220 out:
221         trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
222         return ret;
223 }
224 
225 static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr)
226 {
227         u32 idx;
228 
229         rtc_irq_eoi_tracking_reset(ioapic);
230         for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS)
231                 ioapic_set_irq(ioapic, idx, 1, true);
232 
233         kvm_rtc_eoi_tracking_restore_all(ioapic);
234 }
235 
236 
237 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, ulong *ioapic_handled_vectors)
238 {
239         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
240         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
241         union kvm_ioapic_redirect_entry *e;
242         int index;
243 
244         spin_lock(&ioapic->lock);
245 
246         /* Make sure we see any missing RTC EOI */
247         if (test_bit(vcpu->vcpu_id, dest_map->map))
248                 __set_bit(dest_map->vectors[vcpu->vcpu_id],
249                           ioapic_handled_vectors);
250 
251         for (index = 0; index < IOAPIC_NUM_PINS; index++) {
252                 e = &ioapic->redirtbl[index];
253                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
254                     kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) ||
255                     index == RTC_GSI) {
256                         if (kvm_apic_match_dest(vcpu, NULL, 0,
257                                      e->fields.dest_id, e->fields.dest_mode) ||
258                             (e->fields.trig_mode == IOAPIC_EDGE_TRIG &&
259                              kvm_apic_pending_eoi(vcpu, e->fields.vector)))
260                                 __set_bit(e->fields.vector,
261                                           ioapic_handled_vectors);
262                 }
263         }
264         spin_unlock(&ioapic->lock);
265 }
266 
267 void kvm_vcpu_request_scan_ioapic(struct kvm *kvm)
268 {
269         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
270 
271         if (!ioapic)
272                 return;
273         kvm_make_scan_ioapic_request(kvm);
274 }
275 
276 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
277 {
278         unsigned index;
279         bool mask_before, mask_after;
280         union kvm_ioapic_redirect_entry *e;
281 
282         switch (ioapic->ioregsel) {
283         case IOAPIC_REG_VERSION:
284                 /* Writes are ignored. */
285                 break;
286 
287         case IOAPIC_REG_APIC_ID:
288                 ioapic->id = (val >> 24) & 0xf;
289                 break;
290 
291         case IOAPIC_REG_ARB_ID:
292                 break;
293 
294         default:
295                 index = (ioapic->ioregsel - 0x10) >> 1;
296 
297                 ioapic_debug("change redir index %x val %x\n", index, val);
298                 if (index >= IOAPIC_NUM_PINS)
299                         return;
300                 e = &ioapic->redirtbl[index];
301                 mask_before = e->fields.mask;
302                 if (ioapic->ioregsel & 1) {
303                         e->bits &= 0xffffffff;
304                         e->bits |= (u64) val << 32;
305                 } else {
306                         e->bits &= ~0xffffffffULL;
307                         e->bits |= (u32) val;
308                         e->fields.remote_irr = 0;
309                 }
310                 mask_after = e->fields.mask;
311                 if (mask_before != mask_after)
312                         kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
313                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
314                     && ioapic->irr & (1 << index))
315                         ioapic_service(ioapic, index, false);
316                 kvm_vcpu_request_scan_ioapic(ioapic->kvm);
317                 break;
318         }
319 }
320 
321 static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
322 {
323         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
324         struct kvm_lapic_irq irqe;
325         int ret;
326 
327         if (entry->fields.mask)
328                 return -1;
329 
330         ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
331                      "vector=%x trig_mode=%x\n",
332                      entry->fields.dest_id, entry->fields.dest_mode,
333                      entry->fields.delivery_mode, entry->fields.vector,
334                      entry->fields.trig_mode);
335 
336         irqe.dest_id = entry->fields.dest_id;
337         irqe.vector = entry->fields.vector;
338         irqe.dest_mode = entry->fields.dest_mode;
339         irqe.trig_mode = entry->fields.trig_mode;
340         irqe.delivery_mode = entry->fields.delivery_mode << 8;
341         irqe.level = 1;
342         irqe.shorthand = 0;
343         irqe.msi_redir_hint = false;
344 
345         if (irqe.trig_mode == IOAPIC_EDGE_TRIG)
346                 ioapic->irr_delivered |= 1 << irq;
347 
348         if (irq == RTC_GSI && line_status) {
349                 /*
350                  * pending_eoi cannot ever become negative (see
351                  * rtc_status_pending_eoi_check_valid) and the caller
352                  * ensures that it is only called if it is >= zero, namely
353                  * if rtc_irq_check_coalesced returns false).
354                  */
355                 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
356                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
357                                                &ioapic->rtc_status.dest_map);
358                 ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
359         } else
360                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
361 
362         if (ret && irqe.trig_mode == IOAPIC_LEVEL_TRIG)
363                 entry->fields.remote_irr = 1;
364 
365         return ret;
366 }
367 
368 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
369                        int level, bool line_status)
370 {
371         int ret, irq_level;
372 
373         BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
374 
375         spin_lock(&ioapic->lock);
376         irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
377                                          irq_source_id, level);
378         ret = ioapic_set_irq(ioapic, irq, irq_level, line_status);
379 
380         spin_unlock(&ioapic->lock);
381 
382         return ret;
383 }
384 
385 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
386 {
387         int i;
388 
389         spin_lock(&ioapic->lock);
390         for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
391                 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
392         spin_unlock(&ioapic->lock);
393 }
394 
395 static void kvm_ioapic_eoi_inject_work(struct work_struct *work)
396 {
397         int i;
398         struct kvm_ioapic *ioapic = container_of(work, struct kvm_ioapic,
399                                                  eoi_inject.work);
400         spin_lock(&ioapic->lock);
401         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
402                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
403 
404                 if (ent->fields.trig_mode != IOAPIC_LEVEL_TRIG)
405                         continue;
406 
407                 if (ioapic->irr & (1 << i) && !ent->fields.remote_irr)
408                         ioapic_service(ioapic, i, false);
409         }
410         spin_unlock(&ioapic->lock);
411 }
412 
413 #define IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT 10000
414 
415 static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
416                         struct kvm_ioapic *ioapic, int vector, int trigger_mode)
417 {
418         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
419         struct kvm_lapic *apic = vcpu->arch.apic;
420         int i;
421 
422         /* RTC special handling */
423         if (test_bit(vcpu->vcpu_id, dest_map->map) &&
424             vector == dest_map->vectors[vcpu->vcpu_id])
425                 rtc_irq_eoi(ioapic, vcpu);
426 
427         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
428                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
429 
430                 if (ent->fields.vector != vector)
431                         continue;
432 
433                 /*
434                  * We are dropping lock while calling ack notifiers because ack
435                  * notifier callbacks for assigned devices call into IOAPIC
436                  * recursively. Since remote_irr is cleared only after call
437                  * to notifiers if the same vector will be delivered while lock
438                  * is dropped it will be put into irr and will be delivered
439                  * after ack notifier returns.
440                  */
441                 spin_unlock(&ioapic->lock);
442                 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
443                 spin_lock(&ioapic->lock);
444 
445                 if (trigger_mode != IOAPIC_LEVEL_TRIG ||
446                     kvm_apic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI)
447                         continue;
448 
449                 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
450                 ent->fields.remote_irr = 0;
451                 if (!ent->fields.mask && (ioapic->irr & (1 << i))) {
452                         ++ioapic->irq_eoi[i];
453                         if (ioapic->irq_eoi[i] == IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT) {
454                                 /*
455                                  * Real hardware does not deliver the interrupt
456                                  * immediately during eoi broadcast, and this
457                                  * lets a buggy guest make slow progress
458                                  * even if it does not correctly handle a
459                                  * level-triggered interrupt.  Emulate this
460                                  * behavior if we detect an interrupt storm.
461                                  */
462                                 schedule_delayed_work(&ioapic->eoi_inject, HZ / 100);
463                                 ioapic->irq_eoi[i] = 0;
464                                 trace_kvm_ioapic_delayed_eoi_inj(ent->bits);
465                         } else {
466                                 ioapic_service(ioapic, i, false);
467                         }
468                 } else {
469                         ioapic->irq_eoi[i] = 0;
470                 }
471         }
472 }
473 
474 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
475 {
476         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
477 
478         spin_lock(&ioapic->lock);
479         __kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
480         spin_unlock(&ioapic->lock);
481 }
482 
483 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
484 {
485         return container_of(dev, struct kvm_ioapic, dev);
486 }
487 
488 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
489 {
490         return ((addr >= ioapic->base_address &&
491                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
492 }
493 
494 static int ioapic_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
495                                 gpa_t addr, int len, void *val)
496 {
497         struct kvm_ioapic *ioapic = to_ioapic(this);
498         u32 result;
499         if (!ioapic_in_range(ioapic, addr))
500                 return -EOPNOTSUPP;
501 
502         ioapic_debug("addr %lx\n", (unsigned long)addr);
503         ASSERT(!(addr & 0xf));  /* check alignment */
504 
505         addr &= 0xff;
506         spin_lock(&ioapic->lock);
507         switch (addr) {
508         case IOAPIC_REG_SELECT:
509                 result = ioapic->ioregsel;
510                 break;
511 
512         case IOAPIC_REG_WINDOW:
513                 result = ioapic_read_indirect(ioapic, addr, len);
514                 break;
515 
516         default:
517                 result = 0;
518                 break;
519         }
520         spin_unlock(&ioapic->lock);
521 
522         switch (len) {
523         case 8:
524                 *(u64 *) val = result;
525                 break;
526         case 1:
527         case 2:
528         case 4:
529                 memcpy(val, (char *)&result, len);
530                 break;
531         default:
532                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
533         }
534         return 0;
535 }
536 
537 static int ioapic_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
538                                  gpa_t addr, int len, const void *val)
539 {
540         struct kvm_ioapic *ioapic = to_ioapic(this);
541         u32 data;
542         if (!ioapic_in_range(ioapic, addr))
543                 return -EOPNOTSUPP;
544 
545         ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
546                      (void*)addr, len, val);
547         ASSERT(!(addr & 0xf));  /* check alignment */
548 
549         switch (len) {
550         case 8:
551         case 4:
552                 data = *(u32 *) val;
553                 break;
554         case 2:
555                 data = *(u16 *) val;
556                 break;
557         case 1:
558                 data = *(u8  *) val;
559                 break;
560         default:
561                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
562                 return 0;
563         }
564 
565         addr &= 0xff;
566         spin_lock(&ioapic->lock);
567         switch (addr) {
568         case IOAPIC_REG_SELECT:
569                 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
570                 break;
571 
572         case IOAPIC_REG_WINDOW:
573                 ioapic_write_indirect(ioapic, data);
574                 break;
575 
576         default:
577                 break;
578         }
579         spin_unlock(&ioapic->lock);
580         return 0;
581 }
582 
583 static void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
584 {
585         int i;
586 
587         cancel_delayed_work_sync(&ioapic->eoi_inject);
588         for (i = 0; i < IOAPIC_NUM_PINS; i++)
589                 ioapic->redirtbl[i].fields.mask = 1;
590         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
591         ioapic->ioregsel = 0;
592         ioapic->irr = 0;
593         ioapic->irr_delivered = 0;
594         ioapic->id = 0;
595         memset(ioapic->irq_eoi, 0x00, IOAPIC_NUM_PINS);
596         rtc_irq_eoi_tracking_reset(ioapic);
597 }
598 
599 static const struct kvm_io_device_ops ioapic_mmio_ops = {
600         .read     = ioapic_mmio_read,
601         .write    = ioapic_mmio_write,
602 };
603 
604 int kvm_ioapic_init(struct kvm *kvm)
605 {
606         struct kvm_ioapic *ioapic;
607         int ret;
608 
609         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
610         if (!ioapic)
611                 return -ENOMEM;
612         spin_lock_init(&ioapic->lock);
613         INIT_DELAYED_WORK(&ioapic->eoi_inject, kvm_ioapic_eoi_inject_work);
614         kvm->arch.vioapic = ioapic;
615         kvm_ioapic_reset(ioapic);
616         kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
617         ioapic->kvm = kvm;
618         mutex_lock(&kvm->slots_lock);
619         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
620                                       IOAPIC_MEM_LENGTH, &ioapic->dev);
621         mutex_unlock(&kvm->slots_lock);
622         if (ret < 0) {
623                 kvm->arch.vioapic = NULL;
624                 kfree(ioapic);
625                 return ret;
626         }
627 
628         kvm_vcpu_request_scan_ioapic(kvm);
629         return ret;
630 }
631 
632 void kvm_ioapic_destroy(struct kvm *kvm)
633 {
634         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
635 
636         cancel_delayed_work_sync(&ioapic->eoi_inject);
637         kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
638         kvm->arch.vioapic = NULL;
639         kfree(ioapic);
640 }
641 
642 int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
643 {
644         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
645         if (!ioapic)
646                 return -EINVAL;
647 
648         spin_lock(&ioapic->lock);
649         memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
650         state->irr &= ~ioapic->irr_delivered;
651         spin_unlock(&ioapic->lock);
652         return 0;
653 }
654 
655 int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
656 {
657         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
658         if (!ioapic)
659                 return -EINVAL;
660 
661         spin_lock(&ioapic->lock);
662         memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
663         ioapic->irr = 0;
664         ioapic->irr_delivered = 0;
665         kvm_vcpu_request_scan_ioapic(kvm);
666         kvm_ioapic_inject_all(ioapic, state->irr);
667         spin_unlock(&ioapic->lock);
668         return 0;
669 }
670 

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