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TOMOYO Linux Cross Reference
Linux/arch/x86/kvm/x86.c

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  1 /*
  2  * Kernel-based Virtual Machine driver for Linux
  3  *
  4  * derived from drivers/kvm/kvm_main.c
  5  *
  6  * Copyright (C) 2006 Qumranet, Inc.
  7  * Copyright (C) 2008 Qumranet, Inc.
  8  * Copyright IBM Corporation, 2008
  9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
 10  *
 11  * Authors:
 12  *   Avi Kivity   <avi@qumranet.com>
 13  *   Yaniv Kamay  <yaniv@qumranet.com>
 14  *   Amit Shah    <amit.shah@qumranet.com>
 15  *   Ben-Ami Yassour <benami@il.ibm.com>
 16  *
 17  * This work is licensed under the terms of the GNU GPL, version 2.  See
 18  * the COPYING file in the top-level directory.
 19  *
 20  */
 21 
 22 #include <linux/kvm_host.h>
 23 #include "irq.h"
 24 #include "mmu.h"
 25 #include "i8254.h"
 26 #include "tss.h"
 27 #include "kvm_cache_regs.h"
 28 #include "x86.h"
 29 #include "cpuid.h"
 30 #include "assigned-dev.h"
 31 #include "pmu.h"
 32 #include "hyperv.h"
 33 
 34 #include <linux/clocksource.h>
 35 #include <linux/interrupt.h>
 36 #include <linux/kvm.h>
 37 #include <linux/fs.h>
 38 #include <linux/vmalloc.h>
 39 #include <linux/module.h>
 40 #include <linux/mman.h>
 41 #include <linux/highmem.h>
 42 #include <linux/iommu.h>
 43 #include <linux/intel-iommu.h>
 44 #include <linux/cpufreq.h>
 45 #include <linux/user-return-notifier.h>
 46 #include <linux/srcu.h>
 47 #include <linux/slab.h>
 48 #include <linux/perf_event.h>
 49 #include <linux/uaccess.h>
 50 #include <linux/hash.h>
 51 #include <linux/pci.h>
 52 #include <linux/timekeeper_internal.h>
 53 #include <linux/pvclock_gtod.h>
 54 #include <linux/kvm_irqfd.h>
 55 #include <linux/irqbypass.h>
 56 #include <trace/events/kvm.h>
 57 
 58 #define CREATE_TRACE_POINTS
 59 #include "trace.h"
 60 
 61 #include <asm/debugreg.h>
 62 #include <asm/msr.h>
 63 #include <asm/desc.h>
 64 #include <asm/mce.h>
 65 #include <linux/kernel_stat.h>
 66 #include <asm/fpu/internal.h> /* Ugh! */
 67 #include <asm/pvclock.h>
 68 #include <asm/div64.h>
 69 #include <asm/irq_remapping.h>
 70 
 71 #define MAX_IO_MSRS 256
 72 #define KVM_MAX_MCE_BANKS 32
 73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
 74 
 75 #define emul_to_vcpu(ctxt) \
 76         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
 77 
 78 /* EFER defaults:
 79  * - enable syscall per default because its emulated by KVM
 80  * - enable LME and LMA per default on 64 bit KVM
 81  */
 82 #ifdef CONFIG_X86_64
 83 static
 84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 85 #else
 86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 87 #endif
 88 
 89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
 90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
 91 
 92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 93 static void process_nmi(struct kvm_vcpu *vcpu);
 94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 95 
 96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 98 
 99 static bool __read_mostly ignore_msrs = 0;
100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
101 
102 unsigned int min_timer_period_us = 500;
103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
104 
105 static bool __read_mostly kvmclock_periodic_sync = true;
106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
107 
108 bool __read_mostly kvm_has_tsc_control;
109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
110 u32  __read_mostly kvm_max_guest_tsc_khz;
111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
112 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
114 u64  __read_mostly kvm_max_tsc_scaling_ratio;
115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
116 static u64 __read_mostly kvm_default_tsc_scaling_ratio;
117 
118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
119 static u32 __read_mostly tsc_tolerance_ppm = 250;
120 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
121 
122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
123 unsigned int __read_mostly lapic_timer_advance_ns = 0;
124 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
125 
126 static bool __read_mostly vector_hashing = true;
127 module_param(vector_hashing, bool, S_IRUGO);
128 
129 static bool __read_mostly backwards_tsc_observed = false;
130 
131 #define KVM_NR_SHARED_MSRS 16
132 
133 struct kvm_shared_msrs_global {
134         int nr;
135         u32 msrs[KVM_NR_SHARED_MSRS];
136 };
137 
138 struct kvm_shared_msrs {
139         struct user_return_notifier urn;
140         bool registered;
141         struct kvm_shared_msr_values {
142                 u64 host;
143                 u64 curr;
144         } values[KVM_NR_SHARED_MSRS];
145 };
146 
147 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
148 static struct kvm_shared_msrs __percpu *shared_msrs;
149 
150 struct kvm_stats_debugfs_item debugfs_entries[] = {
151         { "pf_fixed", VCPU_STAT(pf_fixed) },
152         { "pf_guest", VCPU_STAT(pf_guest) },
153         { "tlb_flush", VCPU_STAT(tlb_flush) },
154         { "invlpg", VCPU_STAT(invlpg) },
155         { "exits", VCPU_STAT(exits) },
156         { "io_exits", VCPU_STAT(io_exits) },
157         { "mmio_exits", VCPU_STAT(mmio_exits) },
158         { "signal_exits", VCPU_STAT(signal_exits) },
159         { "irq_window", VCPU_STAT(irq_window_exits) },
160         { "nmi_window", VCPU_STAT(nmi_window_exits) },
161         { "halt_exits", VCPU_STAT(halt_exits) },
162         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
163         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
164         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
165         { "hypercalls", VCPU_STAT(hypercalls) },
166         { "request_irq", VCPU_STAT(request_irq_exits) },
167         { "irq_exits", VCPU_STAT(irq_exits) },
168         { "host_state_reload", VCPU_STAT(host_state_reload) },
169         { "efer_reload", VCPU_STAT(efer_reload) },
170         { "fpu_reload", VCPU_STAT(fpu_reload) },
171         { "insn_emulation", VCPU_STAT(insn_emulation) },
172         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
173         { "irq_injections", VCPU_STAT(irq_injections) },
174         { "nmi_injections", VCPU_STAT(nmi_injections) },
175         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
176         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
177         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
178         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
179         { "mmu_flooded", VM_STAT(mmu_flooded) },
180         { "mmu_recycled", VM_STAT(mmu_recycled) },
181         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
182         { "mmu_unsync", VM_STAT(mmu_unsync) },
183         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
184         { "largepages", VM_STAT(lpages) },
185         { NULL }
186 };
187 
188 u64 __read_mostly host_xcr0;
189 
190 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
191 
192 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
193 {
194         int i;
195         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
196                 vcpu->arch.apf.gfns[i] = ~0;
197 }
198 
199 static void kvm_on_user_return(struct user_return_notifier *urn)
200 {
201         unsigned slot;
202         struct kvm_shared_msrs *locals
203                 = container_of(urn, struct kvm_shared_msrs, urn);
204         struct kvm_shared_msr_values *values;
205 
206         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
207                 values = &locals->values[slot];
208                 if (values->host != values->curr) {
209                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
210                         values->curr = values->host;
211                 }
212         }
213         locals->registered = false;
214         user_return_notifier_unregister(urn);
215 }
216 
217 static void shared_msr_update(unsigned slot, u32 msr)
218 {
219         u64 value;
220         unsigned int cpu = smp_processor_id();
221         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
222 
223         /* only read, and nobody should modify it at this time,
224          * so don't need lock */
225         if (slot >= shared_msrs_global.nr) {
226                 printk(KERN_ERR "kvm: invalid MSR slot!");
227                 return;
228         }
229         rdmsrl_safe(msr, &value);
230         smsr->values[slot].host = value;
231         smsr->values[slot].curr = value;
232 }
233 
234 void kvm_define_shared_msr(unsigned slot, u32 msr)
235 {
236         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
237         shared_msrs_global.msrs[slot] = msr;
238         if (slot >= shared_msrs_global.nr)
239                 shared_msrs_global.nr = slot + 1;
240 }
241 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
242 
243 static void kvm_shared_msr_cpu_online(void)
244 {
245         unsigned i;
246 
247         for (i = 0; i < shared_msrs_global.nr; ++i)
248                 shared_msr_update(i, shared_msrs_global.msrs[i]);
249 }
250 
251 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
252 {
253         unsigned int cpu = smp_processor_id();
254         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
255         int err;
256 
257         if (((value ^ smsr->values[slot].curr) & mask) == 0)
258                 return 0;
259         smsr->values[slot].curr = value;
260         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
261         if (err)
262                 return 1;
263 
264         if (!smsr->registered) {
265                 smsr->urn.on_user_return = kvm_on_user_return;
266                 user_return_notifier_register(&smsr->urn);
267                 smsr->registered = true;
268         }
269         return 0;
270 }
271 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
272 
273 static void drop_user_return_notifiers(void)
274 {
275         unsigned int cpu = smp_processor_id();
276         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
277 
278         if (smsr->registered)
279                 kvm_on_user_return(&smsr->urn);
280 }
281 
282 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
283 {
284         return vcpu->arch.apic_base;
285 }
286 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
287 
288 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
289 {
290         u64 old_state = vcpu->arch.apic_base &
291                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
292         u64 new_state = msr_info->data &
293                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
294         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
295                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
296 
297         if (!msr_info->host_initiated &&
298             ((msr_info->data & reserved_bits) != 0 ||
299              new_state == X2APIC_ENABLE ||
300              (new_state == MSR_IA32_APICBASE_ENABLE &&
301               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
302              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
303               old_state == 0)))
304                 return 1;
305 
306         kvm_lapic_set_base(vcpu, msr_info->data);
307         return 0;
308 }
309 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
310 
311 asmlinkage __visible void kvm_spurious_fault(void)
312 {
313         /* Fault while not rebooting.  We want the trace. */
314         BUG();
315 }
316 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
317 
318 #define EXCPT_BENIGN            0
319 #define EXCPT_CONTRIBUTORY      1
320 #define EXCPT_PF                2
321 
322 static int exception_class(int vector)
323 {
324         switch (vector) {
325         case PF_VECTOR:
326                 return EXCPT_PF;
327         case DE_VECTOR:
328         case TS_VECTOR:
329         case NP_VECTOR:
330         case SS_VECTOR:
331         case GP_VECTOR:
332                 return EXCPT_CONTRIBUTORY;
333         default:
334                 break;
335         }
336         return EXCPT_BENIGN;
337 }
338 
339 #define EXCPT_FAULT             0
340 #define EXCPT_TRAP              1
341 #define EXCPT_ABORT             2
342 #define EXCPT_INTERRUPT         3
343 
344 static int exception_type(int vector)
345 {
346         unsigned int mask;
347 
348         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
349                 return EXCPT_INTERRUPT;
350 
351         mask = 1 << vector;
352 
353         /* #DB is trap, as instruction watchpoints are handled elsewhere */
354         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
355                 return EXCPT_TRAP;
356 
357         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
358                 return EXCPT_ABORT;
359 
360         /* Reserved exceptions will result in fault */
361         return EXCPT_FAULT;
362 }
363 
364 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
365                 unsigned nr, bool has_error, u32 error_code,
366                 bool reinject)
367 {
368         u32 prev_nr;
369         int class1, class2;
370 
371         kvm_make_request(KVM_REQ_EVENT, vcpu);
372 
373         if (!vcpu->arch.exception.pending) {
374         queue:
375                 if (has_error && !is_protmode(vcpu))
376                         has_error = false;
377                 vcpu->arch.exception.pending = true;
378                 vcpu->arch.exception.has_error_code = has_error;
379                 vcpu->arch.exception.nr = nr;
380                 vcpu->arch.exception.error_code = error_code;
381                 vcpu->arch.exception.reinject = reinject;
382                 return;
383         }
384 
385         /* to check exception */
386         prev_nr = vcpu->arch.exception.nr;
387         if (prev_nr == DF_VECTOR) {
388                 /* triple fault -> shutdown */
389                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
390                 return;
391         }
392         class1 = exception_class(prev_nr);
393         class2 = exception_class(nr);
394         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
395                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
396                 /* generate double fault per SDM Table 5-5 */
397                 vcpu->arch.exception.pending = true;
398                 vcpu->arch.exception.has_error_code = true;
399                 vcpu->arch.exception.nr = DF_VECTOR;
400                 vcpu->arch.exception.error_code = 0;
401         } else
402                 /* replace previous exception with a new one in a hope
403                    that instruction re-execution will regenerate lost
404                    exception */
405                 goto queue;
406 }
407 
408 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
409 {
410         kvm_multiple_exception(vcpu, nr, false, 0, false);
411 }
412 EXPORT_SYMBOL_GPL(kvm_queue_exception);
413 
414 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
415 {
416         kvm_multiple_exception(vcpu, nr, false, 0, true);
417 }
418 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
419 
420 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
421 {
422         if (err)
423                 kvm_inject_gp(vcpu, 0);
424         else
425                 kvm_x86_ops->skip_emulated_instruction(vcpu);
426 }
427 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
428 
429 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
430 {
431         ++vcpu->stat.pf_guest;
432         vcpu->arch.cr2 = fault->address;
433         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
434 }
435 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
436 
437 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
438 {
439         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
440                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
441         else
442                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
443 
444         return fault->nested_page_fault;
445 }
446 
447 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
448 {
449         atomic_inc(&vcpu->arch.nmi_queued);
450         kvm_make_request(KVM_REQ_NMI, vcpu);
451 }
452 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
453 
454 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
455 {
456         kvm_multiple_exception(vcpu, nr, true, error_code, false);
457 }
458 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
459 
460 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
461 {
462         kvm_multiple_exception(vcpu, nr, true, error_code, true);
463 }
464 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
465 
466 /*
467  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
468  * a #GP and return false.
469  */
470 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
471 {
472         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
473                 return true;
474         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
475         return false;
476 }
477 EXPORT_SYMBOL_GPL(kvm_require_cpl);
478 
479 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
480 {
481         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
482                 return true;
483 
484         kvm_queue_exception(vcpu, UD_VECTOR);
485         return false;
486 }
487 EXPORT_SYMBOL_GPL(kvm_require_dr);
488 
489 /*
490  * This function will be used to read from the physical memory of the currently
491  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
492  * can read from guest physical or from the guest's guest physical memory.
493  */
494 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
495                             gfn_t ngfn, void *data, int offset, int len,
496                             u32 access)
497 {
498         struct x86_exception exception;
499         gfn_t real_gfn;
500         gpa_t ngpa;
501 
502         ngpa     = gfn_to_gpa(ngfn);
503         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
504         if (real_gfn == UNMAPPED_GVA)
505                 return -EFAULT;
506 
507         real_gfn = gpa_to_gfn(real_gfn);
508 
509         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
510 }
511 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
512 
513 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
514                                void *data, int offset, int len, u32 access)
515 {
516         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
517                                        data, offset, len, access);
518 }
519 
520 /*
521  * Load the pae pdptrs.  Return true is they are all valid.
522  */
523 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
524 {
525         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
526         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
527         int i;
528         int ret;
529         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
530 
531         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
532                                       offset * sizeof(u64), sizeof(pdpte),
533                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
534         if (ret < 0) {
535                 ret = 0;
536                 goto out;
537         }
538         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
539                 if (is_present_gpte(pdpte[i]) &&
540                     (pdpte[i] &
541                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
542                         ret = 0;
543                         goto out;
544                 }
545         }
546         ret = 1;
547 
548         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
549         __set_bit(VCPU_EXREG_PDPTR,
550                   (unsigned long *)&vcpu->arch.regs_avail);
551         __set_bit(VCPU_EXREG_PDPTR,
552                   (unsigned long *)&vcpu->arch.regs_dirty);
553 out:
554 
555         return ret;
556 }
557 EXPORT_SYMBOL_GPL(load_pdptrs);
558 
559 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
560 {
561         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
562         bool changed = true;
563         int offset;
564         gfn_t gfn;
565         int r;
566 
567         if (is_long_mode(vcpu) || !is_pae(vcpu))
568                 return false;
569 
570         if (!test_bit(VCPU_EXREG_PDPTR,
571                       (unsigned long *)&vcpu->arch.regs_avail))
572                 return true;
573 
574         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
575         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
576         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
577                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
578         if (r < 0)
579                 goto out;
580         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
581 out:
582 
583         return changed;
584 }
585 
586 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
587 {
588         unsigned long old_cr0 = kvm_read_cr0(vcpu);
589         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
590 
591         cr0 |= X86_CR0_ET;
592 
593 #ifdef CONFIG_X86_64
594         if (cr0 & 0xffffffff00000000UL)
595                 return 1;
596 #endif
597 
598         cr0 &= ~CR0_RESERVED_BITS;
599 
600         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
601                 return 1;
602 
603         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
604                 return 1;
605 
606         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
607 #ifdef CONFIG_X86_64
608                 if ((vcpu->arch.efer & EFER_LME)) {
609                         int cs_db, cs_l;
610 
611                         if (!is_pae(vcpu))
612                                 return 1;
613                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
614                         if (cs_l)
615                                 return 1;
616                 } else
617 #endif
618                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
619                                                  kvm_read_cr3(vcpu)))
620                         return 1;
621         }
622 
623         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
624                 return 1;
625 
626         kvm_x86_ops->set_cr0(vcpu, cr0);
627 
628         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
629                 kvm_clear_async_pf_completion_queue(vcpu);
630                 kvm_async_pf_hash_reset(vcpu);
631         }
632 
633         if ((cr0 ^ old_cr0) & update_bits)
634                 kvm_mmu_reset_context(vcpu);
635 
636         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
637             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
638             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
639                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
640 
641         return 0;
642 }
643 EXPORT_SYMBOL_GPL(kvm_set_cr0);
644 
645 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
646 {
647         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
648 }
649 EXPORT_SYMBOL_GPL(kvm_lmsw);
650 
651 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
652 {
653         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
654                         !vcpu->guest_xcr0_loaded) {
655                 /* kvm_set_xcr() also depends on this */
656                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
657                 vcpu->guest_xcr0_loaded = 1;
658         }
659 }
660 
661 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
662 {
663         if (vcpu->guest_xcr0_loaded) {
664                 if (vcpu->arch.xcr0 != host_xcr0)
665                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
666                 vcpu->guest_xcr0_loaded = 0;
667         }
668 }
669 
670 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
671 {
672         u64 xcr0 = xcr;
673         u64 old_xcr0 = vcpu->arch.xcr0;
674         u64 valid_bits;
675 
676         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
677         if (index != XCR_XFEATURE_ENABLED_MASK)
678                 return 1;
679         if (!(xcr0 & XFEATURE_MASK_FP))
680                 return 1;
681         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
682                 return 1;
683 
684         /*
685          * Do not allow the guest to set bits that we do not support
686          * saving.  However, xcr0 bit 0 is always set, even if the
687          * emulated CPU does not support XSAVE (see fx_init).
688          */
689         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
690         if (xcr0 & ~valid_bits)
691                 return 1;
692 
693         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
694             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
695                 return 1;
696 
697         if (xcr0 & XFEATURE_MASK_AVX512) {
698                 if (!(xcr0 & XFEATURE_MASK_YMM))
699                         return 1;
700                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
701                         return 1;
702         }
703         vcpu->arch.xcr0 = xcr0;
704 
705         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
706                 kvm_update_cpuid(vcpu);
707         return 0;
708 }
709 
710 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
711 {
712         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
713             __kvm_set_xcr(vcpu, index, xcr)) {
714                 kvm_inject_gp(vcpu, 0);
715                 return 1;
716         }
717         return 0;
718 }
719 EXPORT_SYMBOL_GPL(kvm_set_xcr);
720 
721 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
722 {
723         unsigned long old_cr4 = kvm_read_cr4(vcpu);
724         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
725                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
726 
727         if (cr4 & CR4_RESERVED_BITS)
728                 return 1;
729 
730         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
731                 return 1;
732 
733         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
734                 return 1;
735 
736         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
737                 return 1;
738 
739         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
740                 return 1;
741 
742         if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
743                 return 1;
744 
745         if (is_long_mode(vcpu)) {
746                 if (!(cr4 & X86_CR4_PAE))
747                         return 1;
748         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
749                    && ((cr4 ^ old_cr4) & pdptr_bits)
750                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
751                                    kvm_read_cr3(vcpu)))
752                 return 1;
753 
754         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
755                 if (!guest_cpuid_has_pcid(vcpu))
756                         return 1;
757 
758                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
759                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
760                         return 1;
761         }
762 
763         if (kvm_x86_ops->set_cr4(vcpu, cr4))
764                 return 1;
765 
766         if (((cr4 ^ old_cr4) & pdptr_bits) ||
767             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
768                 kvm_mmu_reset_context(vcpu);
769 
770         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
771                 kvm_update_cpuid(vcpu);
772 
773         return 0;
774 }
775 EXPORT_SYMBOL_GPL(kvm_set_cr4);
776 
777 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
778 {
779 #ifdef CONFIG_X86_64
780         cr3 &= ~CR3_PCID_INVD;
781 #endif
782 
783         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
784                 kvm_mmu_sync_roots(vcpu);
785                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
786                 return 0;
787         }
788 
789         if (is_long_mode(vcpu)) {
790                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
791                         return 1;
792         } else if (is_pae(vcpu) && is_paging(vcpu) &&
793                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
794                 return 1;
795 
796         vcpu->arch.cr3 = cr3;
797         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
798         kvm_mmu_new_cr3(vcpu);
799         return 0;
800 }
801 EXPORT_SYMBOL_GPL(kvm_set_cr3);
802 
803 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
804 {
805         if (cr8 & CR8_RESERVED_BITS)
806                 return 1;
807         if (lapic_in_kernel(vcpu))
808                 kvm_lapic_set_tpr(vcpu, cr8);
809         else
810                 vcpu->arch.cr8 = cr8;
811         return 0;
812 }
813 EXPORT_SYMBOL_GPL(kvm_set_cr8);
814 
815 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
816 {
817         if (lapic_in_kernel(vcpu))
818                 return kvm_lapic_get_cr8(vcpu);
819         else
820                 return vcpu->arch.cr8;
821 }
822 EXPORT_SYMBOL_GPL(kvm_get_cr8);
823 
824 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
825 {
826         int i;
827 
828         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
829                 for (i = 0; i < KVM_NR_DB_REGS; i++)
830                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
831                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
832         }
833 }
834 
835 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
836 {
837         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
838                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
839 }
840 
841 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
842 {
843         unsigned long dr7;
844 
845         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
846                 dr7 = vcpu->arch.guest_debug_dr7;
847         else
848                 dr7 = vcpu->arch.dr7;
849         kvm_x86_ops->set_dr7(vcpu, dr7);
850         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
851         if (dr7 & DR7_BP_EN_MASK)
852                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
853 }
854 
855 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
856 {
857         u64 fixed = DR6_FIXED_1;
858 
859         if (!guest_cpuid_has_rtm(vcpu))
860                 fixed |= DR6_RTM;
861         return fixed;
862 }
863 
864 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
865 {
866         switch (dr) {
867         case 0 ... 3:
868                 vcpu->arch.db[dr] = val;
869                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
870                         vcpu->arch.eff_db[dr] = val;
871                 break;
872         case 4:
873                 /* fall through */
874         case 6:
875                 if (val & 0xffffffff00000000ULL)
876                         return -1; /* #GP */
877                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
878                 kvm_update_dr6(vcpu);
879                 break;
880         case 5:
881                 /* fall through */
882         default: /* 7 */
883                 if (val & 0xffffffff00000000ULL)
884                         return -1; /* #GP */
885                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
886                 kvm_update_dr7(vcpu);
887                 break;
888         }
889 
890         return 0;
891 }
892 
893 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
894 {
895         if (__kvm_set_dr(vcpu, dr, val)) {
896                 kvm_inject_gp(vcpu, 0);
897                 return 1;
898         }
899         return 0;
900 }
901 EXPORT_SYMBOL_GPL(kvm_set_dr);
902 
903 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
904 {
905         switch (dr) {
906         case 0 ... 3:
907                 *val = vcpu->arch.db[dr];
908                 break;
909         case 4:
910                 /* fall through */
911         case 6:
912                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
913                         *val = vcpu->arch.dr6;
914                 else
915                         *val = kvm_x86_ops->get_dr6(vcpu);
916                 break;
917         case 5:
918                 /* fall through */
919         default: /* 7 */
920                 *val = vcpu->arch.dr7;
921                 break;
922         }
923         return 0;
924 }
925 EXPORT_SYMBOL_GPL(kvm_get_dr);
926 
927 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
928 {
929         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
930         u64 data;
931         int err;
932 
933         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
934         if (err)
935                 return err;
936         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
937         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
938         return err;
939 }
940 EXPORT_SYMBOL_GPL(kvm_rdpmc);
941 
942 /*
943  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
944  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
945  *
946  * This list is modified at module load time to reflect the
947  * capabilities of the host cpu. This capabilities test skips MSRs that are
948  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
949  * may depend on host virtualization features rather than host cpu features.
950  */
951 
952 static u32 msrs_to_save[] = {
953         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
954         MSR_STAR,
955 #ifdef CONFIG_X86_64
956         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
957 #endif
958         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
959         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
960 };
961 
962 static unsigned num_msrs_to_save;
963 
964 static u32 emulated_msrs[] = {
965         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
966         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
967         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
968         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
969         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
970         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
971         HV_X64_MSR_RESET,
972         HV_X64_MSR_VP_INDEX,
973         HV_X64_MSR_VP_RUNTIME,
974         HV_X64_MSR_SCONTROL,
975         HV_X64_MSR_STIMER0_CONFIG,
976         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
977         MSR_KVM_PV_EOI_EN,
978 
979         MSR_IA32_TSC_ADJUST,
980         MSR_IA32_TSCDEADLINE,
981         MSR_IA32_MISC_ENABLE,
982         MSR_IA32_MCG_STATUS,
983         MSR_IA32_MCG_CTL,
984         MSR_IA32_SMBASE,
985 };
986 
987 static unsigned num_emulated_msrs;
988 
989 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
990 {
991         if (efer & efer_reserved_bits)
992                 return false;
993 
994         if (efer & EFER_FFXSR) {
995                 struct kvm_cpuid_entry2 *feat;
996 
997                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
998                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
999                         return false;
1000         }
1001 
1002         if (efer & EFER_SVME) {
1003                 struct kvm_cpuid_entry2 *feat;
1004 
1005                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1006                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1007                         return false;
1008         }
1009 
1010         return true;
1011 }
1012 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1013 
1014 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1015 {
1016         u64 old_efer = vcpu->arch.efer;
1017 
1018         if (!kvm_valid_efer(vcpu, efer))
1019                 return 1;
1020 
1021         if (is_paging(vcpu)
1022             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1023                 return 1;
1024 
1025         efer &= ~EFER_LMA;
1026         efer |= vcpu->arch.efer & EFER_LMA;
1027 
1028         kvm_x86_ops->set_efer(vcpu, efer);
1029 
1030         /* Update reserved bits */
1031         if ((efer ^ old_efer) & EFER_NX)
1032                 kvm_mmu_reset_context(vcpu);
1033 
1034         return 0;
1035 }
1036 
1037 void kvm_enable_efer_bits(u64 mask)
1038 {
1039        efer_reserved_bits &= ~mask;
1040 }
1041 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1042 
1043 /*
1044  * Writes msr value into into the appropriate "register".
1045  * Returns 0 on success, non-0 otherwise.
1046  * Assumes vcpu_load() was already called.
1047  */
1048 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1049 {
1050         switch (msr->index) {
1051         case MSR_FS_BASE:
1052         case MSR_GS_BASE:
1053         case MSR_KERNEL_GS_BASE:
1054         case MSR_CSTAR:
1055         case MSR_LSTAR:
1056                 if (is_noncanonical_address(msr->data))
1057                         return 1;
1058                 break;
1059         case MSR_IA32_SYSENTER_EIP:
1060         case MSR_IA32_SYSENTER_ESP:
1061                 /*
1062                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1063                  * non-canonical address is written on Intel but not on
1064                  * AMD (which ignores the top 32-bits, because it does
1065                  * not implement 64-bit SYSENTER).
1066                  *
1067                  * 64-bit code should hence be able to write a non-canonical
1068                  * value on AMD.  Making the address canonical ensures that
1069                  * vmentry does not fail on Intel after writing a non-canonical
1070                  * value, and that something deterministic happens if the guest
1071                  * invokes 64-bit SYSENTER.
1072                  */
1073                 msr->data = get_canonical(msr->data);
1074         }
1075         return kvm_x86_ops->set_msr(vcpu, msr);
1076 }
1077 EXPORT_SYMBOL_GPL(kvm_set_msr);
1078 
1079 /*
1080  * Adapt set_msr() to msr_io()'s calling convention
1081  */
1082 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1083 {
1084         struct msr_data msr;
1085         int r;
1086 
1087         msr.index = index;
1088         msr.host_initiated = true;
1089         r = kvm_get_msr(vcpu, &msr);
1090         if (r)
1091                 return r;
1092 
1093         *data = msr.data;
1094         return 0;
1095 }
1096 
1097 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1098 {
1099         struct msr_data msr;
1100 
1101         msr.data = *data;
1102         msr.index = index;
1103         msr.host_initiated = true;
1104         return kvm_set_msr(vcpu, &msr);
1105 }
1106 
1107 #ifdef CONFIG_X86_64
1108 struct pvclock_gtod_data {
1109         seqcount_t      seq;
1110 
1111         struct { /* extract of a clocksource struct */
1112                 int vclock_mode;
1113                 cycle_t cycle_last;
1114                 cycle_t mask;
1115                 u32     mult;
1116                 u32     shift;
1117         } clock;
1118 
1119         u64             boot_ns;
1120         u64             nsec_base;
1121 };
1122 
1123 static struct pvclock_gtod_data pvclock_gtod_data;
1124 
1125 static void update_pvclock_gtod(struct timekeeper *tk)
1126 {
1127         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1128         u64 boot_ns;
1129 
1130         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1131 
1132         write_seqcount_begin(&vdata->seq);
1133 
1134         /* copy pvclock gtod data */
1135         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1136         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1137         vdata->clock.mask               = tk->tkr_mono.mask;
1138         vdata->clock.mult               = tk->tkr_mono.mult;
1139         vdata->clock.shift              = tk->tkr_mono.shift;
1140 
1141         vdata->boot_ns                  = boot_ns;
1142         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1143 
1144         write_seqcount_end(&vdata->seq);
1145 }
1146 #endif
1147 
1148 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1149 {
1150         /*
1151          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1152          * vcpu_enter_guest.  This function is only called from
1153          * the physical CPU that is running vcpu.
1154          */
1155         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1156 }
1157 
1158 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1159 {
1160         int version;
1161         int r;
1162         struct pvclock_wall_clock wc;
1163         struct timespec boot;
1164 
1165         if (!wall_clock)
1166                 return;
1167 
1168         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1169         if (r)
1170                 return;
1171 
1172         if (version & 1)
1173                 ++version;  /* first time write, random junk */
1174 
1175         ++version;
1176 
1177         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1178                 return;
1179 
1180         /*
1181          * The guest calculates current wall clock time by adding
1182          * system time (updated by kvm_guest_time_update below) to the
1183          * wall clock specified here.  guest system time equals host
1184          * system time for us, thus we must fill in host boot time here.
1185          */
1186         getboottime(&boot);
1187 
1188         if (kvm->arch.kvmclock_offset) {
1189                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1190                 boot = timespec_sub(boot, ts);
1191         }
1192         wc.sec = boot.tv_sec;
1193         wc.nsec = boot.tv_nsec;
1194         wc.version = version;
1195 
1196         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1197 
1198         version++;
1199         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1200 }
1201 
1202 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1203 {
1204         do_shl32_div32(dividend, divisor);
1205         return dividend;
1206 }
1207 
1208 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1209                                s8 *pshift, u32 *pmultiplier)
1210 {
1211         uint64_t scaled64;
1212         int32_t  shift = 0;
1213         uint64_t tps64;
1214         uint32_t tps32;
1215 
1216         tps64 = base_hz;
1217         scaled64 = scaled_hz;
1218         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1219                 tps64 >>= 1;
1220                 shift--;
1221         }
1222 
1223         tps32 = (uint32_t)tps64;
1224         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1225                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1226                         scaled64 >>= 1;
1227                 else
1228                         tps32 <<= 1;
1229                 shift++;
1230         }
1231 
1232         *pshift = shift;
1233         *pmultiplier = div_frac(scaled64, tps32);
1234 
1235         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1236                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1237 }
1238 
1239 #ifdef CONFIG_X86_64
1240 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1241 #endif
1242 
1243 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1244 static unsigned long max_tsc_khz;
1245 
1246 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1247 {
1248         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1249                                    vcpu->arch.virtual_tsc_shift);
1250 }
1251 
1252 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1253 {
1254         u64 v = (u64)khz * (1000000 + ppm);
1255         do_div(v, 1000000);
1256         return v;
1257 }
1258 
1259 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1260 {
1261         u64 ratio;
1262 
1263         /* Guest TSC same frequency as host TSC? */
1264         if (!scale) {
1265                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1266                 return 0;
1267         }
1268 
1269         /* TSC scaling supported? */
1270         if (!kvm_has_tsc_control) {
1271                 if (user_tsc_khz > tsc_khz) {
1272                         vcpu->arch.tsc_catchup = 1;
1273                         vcpu->arch.tsc_always_catchup = 1;
1274                         return 0;
1275                 } else {
1276                         WARN(1, "user requested TSC rate below hardware speed\n");
1277                         return -1;
1278                 }
1279         }
1280 
1281         /* TSC scaling required  - calculate ratio */
1282         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1283                                 user_tsc_khz, tsc_khz);
1284 
1285         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1286                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1287                           user_tsc_khz);
1288                 return -1;
1289         }
1290 
1291         vcpu->arch.tsc_scaling_ratio = ratio;
1292         return 0;
1293 }
1294 
1295 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1296 {
1297         u32 thresh_lo, thresh_hi;
1298         int use_scaling = 0;
1299 
1300         /* tsc_khz can be zero if TSC calibration fails */
1301         if (user_tsc_khz == 0) {
1302                 /* set tsc_scaling_ratio to a safe value */
1303                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1304                 return -1;
1305         }
1306 
1307         /* Compute a scale to convert nanoseconds in TSC cycles */
1308         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1309                            &vcpu->arch.virtual_tsc_shift,
1310                            &vcpu->arch.virtual_tsc_mult);
1311         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1312 
1313         /*
1314          * Compute the variation in TSC rate which is acceptable
1315          * within the range of tolerance and decide if the
1316          * rate being applied is within that bounds of the hardware
1317          * rate.  If so, no scaling or compensation need be done.
1318          */
1319         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1320         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1321         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1322                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1323                 use_scaling = 1;
1324         }
1325         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1326 }
1327 
1328 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1329 {
1330         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1331                                       vcpu->arch.virtual_tsc_mult,
1332                                       vcpu->arch.virtual_tsc_shift);
1333         tsc += vcpu->arch.this_tsc_write;
1334         return tsc;
1335 }
1336 
1337 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1338 {
1339 #ifdef CONFIG_X86_64
1340         bool vcpus_matched;
1341         struct kvm_arch *ka = &vcpu->kvm->arch;
1342         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1343 
1344         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1345                          atomic_read(&vcpu->kvm->online_vcpus));
1346 
1347         /*
1348          * Once the masterclock is enabled, always perform request in
1349          * order to update it.
1350          *
1351          * In order to enable masterclock, the host clocksource must be TSC
1352          * and the vcpus need to have matched TSCs.  When that happens,
1353          * perform request to enable masterclock.
1354          */
1355         if (ka->use_master_clock ||
1356             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1357                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1358 
1359         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1360                             atomic_read(&vcpu->kvm->online_vcpus),
1361                             ka->use_master_clock, gtod->clock.vclock_mode);
1362 #endif
1363 }
1364 
1365 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1366 {
1367         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1368         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1369 }
1370 
1371 /*
1372  * Multiply tsc by a fixed point number represented by ratio.
1373  *
1374  * The most significant 64-N bits (mult) of ratio represent the
1375  * integral part of the fixed point number; the remaining N bits
1376  * (frac) represent the fractional part, ie. ratio represents a fixed
1377  * point number (mult + frac * 2^(-N)).
1378  *
1379  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1380  */
1381 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1382 {
1383         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1384 }
1385 
1386 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1387 {
1388         u64 _tsc = tsc;
1389         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1390 
1391         if (ratio != kvm_default_tsc_scaling_ratio)
1392                 _tsc = __scale_tsc(ratio, tsc);
1393 
1394         return _tsc;
1395 }
1396 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1397 
1398 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1399 {
1400         u64 tsc;
1401 
1402         tsc = kvm_scale_tsc(vcpu, rdtsc());
1403 
1404         return target_tsc - tsc;
1405 }
1406 
1407 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1408 {
1409         return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1410 }
1411 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1412 
1413 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1414 {
1415         struct kvm *kvm = vcpu->kvm;
1416         u64 offset, ns, elapsed;
1417         unsigned long flags;
1418         s64 usdiff;
1419         bool matched;
1420         bool already_matched;
1421         u64 data = msr->data;
1422 
1423         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1424         offset = kvm_compute_tsc_offset(vcpu, data);
1425         ns = get_kernel_ns();
1426         elapsed = ns - kvm->arch.last_tsc_nsec;
1427 
1428         if (vcpu->arch.virtual_tsc_khz) {
1429                 int faulted = 0;
1430 
1431                 /* n.b - signed multiplication and division required */
1432                 usdiff = data - kvm->arch.last_tsc_write;
1433 #ifdef CONFIG_X86_64
1434                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1435 #else
1436                 /* do_div() only does unsigned */
1437                 asm("1: idivl %[divisor]\n"
1438                     "2: xor %%edx, %%edx\n"
1439                     "   movl $0, %[faulted]\n"
1440                     "3:\n"
1441                     ".section .fixup,\"ax\"\n"
1442                     "4: movl $1, %[faulted]\n"
1443                     "   jmp  3b\n"
1444                     ".previous\n"
1445 
1446                 _ASM_EXTABLE(1b, 4b)
1447 
1448                 : "=A"(usdiff), [faulted] "=r" (faulted)
1449                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1450 
1451 #endif
1452                 do_div(elapsed, 1000);
1453                 usdiff -= elapsed;
1454                 if (usdiff < 0)
1455                         usdiff = -usdiff;
1456 
1457                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1458                 if (faulted)
1459                         usdiff = USEC_PER_SEC;
1460         } else
1461                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1462 
1463         /*
1464          * Special case: TSC write with a small delta (1 second) of virtual
1465          * cycle time against real time is interpreted as an attempt to
1466          * synchronize the CPU.
1467          *
1468          * For a reliable TSC, we can match TSC offsets, and for an unstable
1469          * TSC, we add elapsed time in this computation.  We could let the
1470          * compensation code attempt to catch up if we fall behind, but
1471          * it's better to try to match offsets from the beginning.
1472          */
1473         if (usdiff < USEC_PER_SEC &&
1474             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1475                 if (!check_tsc_unstable()) {
1476                         offset = kvm->arch.cur_tsc_offset;
1477                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1478                 } else {
1479                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1480                         data += delta;
1481                         offset = kvm_compute_tsc_offset(vcpu, data);
1482                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1483                 }
1484                 matched = true;
1485                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1486         } else {
1487                 /*
1488                  * We split periods of matched TSC writes into generations.
1489                  * For each generation, we track the original measured
1490                  * nanosecond time, offset, and write, so if TSCs are in
1491                  * sync, we can match exact offset, and if not, we can match
1492                  * exact software computation in compute_guest_tsc()
1493                  *
1494                  * These values are tracked in kvm->arch.cur_xxx variables.
1495                  */
1496                 kvm->arch.cur_tsc_generation++;
1497                 kvm->arch.cur_tsc_nsec = ns;
1498                 kvm->arch.cur_tsc_write = data;
1499                 kvm->arch.cur_tsc_offset = offset;
1500                 matched = false;
1501                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1502                          kvm->arch.cur_tsc_generation, data);
1503         }
1504 
1505         /*
1506          * We also track th most recent recorded KHZ, write and time to
1507          * allow the matching interval to be extended at each write.
1508          */
1509         kvm->arch.last_tsc_nsec = ns;
1510         kvm->arch.last_tsc_write = data;
1511         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1512 
1513         vcpu->arch.last_guest_tsc = data;
1514 
1515         /* Keep track of which generation this VCPU has synchronized to */
1516         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1517         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1518         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1519 
1520         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1521                 update_ia32_tsc_adjust_msr(vcpu, offset);
1522         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1523         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1524 
1525         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1526         if (!matched) {
1527                 kvm->arch.nr_vcpus_matched_tsc = 0;
1528         } else if (!already_matched) {
1529                 kvm->arch.nr_vcpus_matched_tsc++;
1530         }
1531 
1532         kvm_track_tsc_matching(vcpu);
1533         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1534 }
1535 
1536 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1537 
1538 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1539                                            s64 adjustment)
1540 {
1541         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1542 }
1543 
1544 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1545 {
1546         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1547                 WARN_ON(adjustment < 0);
1548         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1549         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1550 }
1551 
1552 #ifdef CONFIG_X86_64
1553 
1554 static cycle_t read_tsc(void)
1555 {
1556         cycle_t ret = (cycle_t)rdtsc_ordered();
1557         u64 last = pvclock_gtod_data.clock.cycle_last;
1558 
1559         if (likely(ret >= last))
1560                 return ret;
1561 
1562         /*
1563          * GCC likes to generate cmov here, but this branch is extremely
1564          * predictable (it's just a function of time and the likely is
1565          * very likely) and there's a data dependence, so force GCC
1566          * to generate a branch instead.  I don't barrier() because
1567          * we don't actually need a barrier, and if this function
1568          * ever gets inlined it will generate worse code.
1569          */
1570         asm volatile ("");
1571         return last;
1572 }
1573 
1574 static inline u64 vgettsc(cycle_t *cycle_now)
1575 {
1576         long v;
1577         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1578 
1579         *cycle_now = read_tsc();
1580 
1581         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1582         return v * gtod->clock.mult;
1583 }
1584 
1585 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1586 {
1587         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1588         unsigned long seq;
1589         int mode;
1590         u64 ns;
1591 
1592         do {
1593                 seq = read_seqcount_begin(&gtod->seq);
1594                 mode = gtod->clock.vclock_mode;
1595                 ns = gtod->nsec_base;
1596                 ns += vgettsc(cycle_now);
1597                 ns >>= gtod->clock.shift;
1598                 ns += gtod->boot_ns;
1599         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1600         *t = ns;
1601 
1602         return mode;
1603 }
1604 
1605 /* returns true if host is using tsc clocksource */
1606 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1607 {
1608         /* checked again under seqlock below */
1609         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1610                 return false;
1611 
1612         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1613 }
1614 #endif
1615 
1616 /*
1617  *
1618  * Assuming a stable TSC across physical CPUS, and a stable TSC
1619  * across virtual CPUs, the following condition is possible.
1620  * Each numbered line represents an event visible to both
1621  * CPUs at the next numbered event.
1622  *
1623  * "timespecX" represents host monotonic time. "tscX" represents
1624  * RDTSC value.
1625  *
1626  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1627  *
1628  * 1.  read timespec0,tsc0
1629  * 2.                                   | timespec1 = timespec0 + N
1630  *                                      | tsc1 = tsc0 + M
1631  * 3. transition to guest               | transition to guest
1632  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1633  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1634  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1635  *
1636  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1637  *
1638  *      - ret0 < ret1
1639  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1640  *              ...
1641  *      - 0 < N - M => M < N
1642  *
1643  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1644  * always the case (the difference between two distinct xtime instances
1645  * might be smaller then the difference between corresponding TSC reads,
1646  * when updating guest vcpus pvclock areas).
1647  *
1648  * To avoid that problem, do not allow visibility of distinct
1649  * system_timestamp/tsc_timestamp values simultaneously: use a master
1650  * copy of host monotonic time values. Update that master copy
1651  * in lockstep.
1652  *
1653  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1654  *
1655  */
1656 
1657 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1658 {
1659 #ifdef CONFIG_X86_64
1660         struct kvm_arch *ka = &kvm->arch;
1661         int vclock_mode;
1662         bool host_tsc_clocksource, vcpus_matched;
1663 
1664         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1665                         atomic_read(&kvm->online_vcpus));
1666 
1667         /*
1668          * If the host uses TSC clock, then passthrough TSC as stable
1669          * to the guest.
1670          */
1671         host_tsc_clocksource = kvm_get_time_and_clockread(
1672                                         &ka->master_kernel_ns,
1673                                         &ka->master_cycle_now);
1674 
1675         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1676                                 && !backwards_tsc_observed
1677                                 && !ka->boot_vcpu_runs_old_kvmclock;
1678 
1679         if (ka->use_master_clock)
1680                 atomic_set(&kvm_guest_has_master_clock, 1);
1681 
1682         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1683         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1684                                         vcpus_matched);
1685 #endif
1686 }
1687 
1688 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1689 {
1690         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1691 }
1692 
1693 static void kvm_gen_update_masterclock(struct kvm *kvm)
1694 {
1695 #ifdef CONFIG_X86_64
1696         int i;
1697         struct kvm_vcpu *vcpu;
1698         struct kvm_arch *ka = &kvm->arch;
1699 
1700         spin_lock(&ka->pvclock_gtod_sync_lock);
1701         kvm_make_mclock_inprogress_request(kvm);
1702         /* no guest entries from this point */
1703         pvclock_update_vm_gtod_copy(kvm);
1704 
1705         kvm_for_each_vcpu(i, vcpu, kvm)
1706                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1707 
1708         /* guest entries allowed */
1709         kvm_for_each_vcpu(i, vcpu, kvm)
1710                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1711 
1712         spin_unlock(&ka->pvclock_gtod_sync_lock);
1713 #endif
1714 }
1715 
1716 static int kvm_guest_time_update(struct kvm_vcpu *v)
1717 {
1718         unsigned long flags, tgt_tsc_khz;
1719         struct kvm_vcpu_arch *vcpu = &v->arch;
1720         struct kvm_arch *ka = &v->kvm->arch;
1721         s64 kernel_ns;
1722         u64 tsc_timestamp, host_tsc;
1723         struct pvclock_vcpu_time_info guest_hv_clock;
1724         u8 pvclock_flags;
1725         bool use_master_clock;
1726 
1727         kernel_ns = 0;
1728         host_tsc = 0;
1729 
1730         /*
1731          * If the host uses TSC clock, then passthrough TSC as stable
1732          * to the guest.
1733          */
1734         spin_lock(&ka->pvclock_gtod_sync_lock);
1735         use_master_clock = ka->use_master_clock;
1736         if (use_master_clock) {
1737                 host_tsc = ka->master_cycle_now;
1738                 kernel_ns = ka->master_kernel_ns;
1739         }
1740         spin_unlock(&ka->pvclock_gtod_sync_lock);
1741 
1742         /* Keep irq disabled to prevent changes to the clock */
1743         local_irq_save(flags);
1744         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1745         if (unlikely(tgt_tsc_khz == 0)) {
1746                 local_irq_restore(flags);
1747                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1748                 return 1;
1749         }
1750         if (!use_master_clock) {
1751                 host_tsc = rdtsc();
1752                 kernel_ns = get_kernel_ns();
1753         }
1754 
1755         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1756 
1757         /*
1758          * We may have to catch up the TSC to match elapsed wall clock
1759          * time for two reasons, even if kvmclock is used.
1760          *   1) CPU could have been running below the maximum TSC rate
1761          *   2) Broken TSC compensation resets the base at each VCPU
1762          *      entry to avoid unknown leaps of TSC even when running
1763          *      again on the same CPU.  This may cause apparent elapsed
1764          *      time to disappear, and the guest to stand still or run
1765          *      very slowly.
1766          */
1767         if (vcpu->tsc_catchup) {
1768                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1769                 if (tsc > tsc_timestamp) {
1770                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1771                         tsc_timestamp = tsc;
1772                 }
1773         }
1774 
1775         local_irq_restore(flags);
1776 
1777         if (!vcpu->pv_time_enabled)
1778                 return 0;
1779 
1780         if (kvm_has_tsc_control)
1781                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1782 
1783         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1784                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1785                                    &vcpu->hv_clock.tsc_shift,
1786                                    &vcpu->hv_clock.tsc_to_system_mul);
1787                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1788         }
1789 
1790         /* With all the info we got, fill in the values */
1791         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1792         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1793         vcpu->last_guest_tsc = tsc_timestamp;
1794 
1795         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1796                 &guest_hv_clock, sizeof(guest_hv_clock))))
1797                 return 0;
1798 
1799         /* This VCPU is paused, but it's legal for a guest to read another
1800          * VCPU's kvmclock, so we really have to follow the specification where
1801          * it says that version is odd if data is being modified, and even after
1802          * it is consistent.
1803          *
1804          * Version field updates must be kept separate.  This is because
1805          * kvm_write_guest_cached might use a "rep movs" instruction, and
1806          * writes within a string instruction are weakly ordered.  So there
1807          * are three writes overall.
1808          *
1809          * As a small optimization, only write the version field in the first
1810          * and third write.  The vcpu->pv_time cache is still valid, because the
1811          * version field is the first in the struct.
1812          */
1813         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1814 
1815         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1816         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1817                                 &vcpu->hv_clock,
1818                                 sizeof(vcpu->hv_clock.version));
1819 
1820         smp_wmb();
1821 
1822         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1823         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1824 
1825         if (vcpu->pvclock_set_guest_stopped_request) {
1826                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1827                 vcpu->pvclock_set_guest_stopped_request = false;
1828         }
1829 
1830         /* If the host uses TSC clocksource, then it is stable */
1831         if (use_master_clock)
1832                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1833 
1834         vcpu->hv_clock.flags = pvclock_flags;
1835 
1836         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1837 
1838         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1839                                 &vcpu->hv_clock,
1840                                 sizeof(vcpu->hv_clock));
1841 
1842         smp_wmb();
1843 
1844         vcpu->hv_clock.version++;
1845         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1846                                 &vcpu->hv_clock,
1847                                 sizeof(vcpu->hv_clock.version));
1848         return 0;
1849 }
1850 
1851 /*
1852  * kvmclock updates which are isolated to a given vcpu, such as
1853  * vcpu->cpu migration, should not allow system_timestamp from
1854  * the rest of the vcpus to remain static. Otherwise ntp frequency
1855  * correction applies to one vcpu's system_timestamp but not
1856  * the others.
1857  *
1858  * So in those cases, request a kvmclock update for all vcpus.
1859  * We need to rate-limit these requests though, as they can
1860  * considerably slow guests that have a large number of vcpus.
1861  * The time for a remote vcpu to update its kvmclock is bound
1862  * by the delay we use to rate-limit the updates.
1863  */
1864 
1865 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1866 
1867 static void kvmclock_update_fn(struct work_struct *work)
1868 {
1869         int i;
1870         struct delayed_work *dwork = to_delayed_work(work);
1871         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1872                                            kvmclock_update_work);
1873         struct kvm *kvm = container_of(ka, struct kvm, arch);
1874         struct kvm_vcpu *vcpu;
1875 
1876         kvm_for_each_vcpu(i, vcpu, kvm) {
1877                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1878                 kvm_vcpu_kick(vcpu);
1879         }
1880 }
1881 
1882 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1883 {
1884         struct kvm *kvm = v->kvm;
1885 
1886         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1887         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1888                                         KVMCLOCK_UPDATE_DELAY);
1889 }
1890 
1891 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1892 
1893 static void kvmclock_sync_fn(struct work_struct *work)
1894 {
1895         struct delayed_work *dwork = to_delayed_work(work);
1896         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1897                                            kvmclock_sync_work);
1898         struct kvm *kvm = container_of(ka, struct kvm, arch);
1899 
1900         if (!kvmclock_periodic_sync)
1901                 return;
1902 
1903         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1904         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1905                                         KVMCLOCK_SYNC_PERIOD);
1906 }
1907 
1908 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1909 {
1910         u64 mcg_cap = vcpu->arch.mcg_cap;
1911         unsigned bank_num = mcg_cap & 0xff;
1912 
1913         switch (msr) {
1914         case MSR_IA32_MCG_STATUS:
1915                 vcpu->arch.mcg_status = data;
1916                 break;
1917         case MSR_IA32_MCG_CTL:
1918                 if (!(mcg_cap & MCG_CTL_P))
1919                         return 1;
1920                 if (data != 0 && data != ~(u64)0)
1921                         return -1;
1922                 vcpu->arch.mcg_ctl = data;
1923                 break;
1924         default:
1925                 if (msr >= MSR_IA32_MC0_CTL &&
1926                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1927                         u32 offset = msr - MSR_IA32_MC0_CTL;
1928                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1929                          * some Linux kernels though clear bit 10 in bank 4 to
1930                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1931                          * this to avoid an uncatched #GP in the guest
1932                          */
1933                         if ((offset & 0x3) == 0 &&
1934                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1935                                 return -1;
1936                         vcpu->arch.mce_banks[offset] = data;
1937                         break;
1938                 }
1939                 return 1;
1940         }
1941         return 0;
1942 }
1943 
1944 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1945 {
1946         struct kvm *kvm = vcpu->kvm;
1947         int lm = is_long_mode(vcpu);
1948         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1949                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1950         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1951                 : kvm->arch.xen_hvm_config.blob_size_32;
1952         u32 page_num = data & ~PAGE_MASK;
1953         u64 page_addr = data & PAGE_MASK;
1954         u8 *page;
1955         int r;
1956 
1957         r = -E2BIG;
1958         if (page_num >= blob_size)
1959                 goto out;
1960         r = -ENOMEM;
1961         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1962         if (IS_ERR(page)) {
1963                 r = PTR_ERR(page);
1964                 goto out;
1965         }
1966         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1967                 goto out_free;
1968         r = 0;
1969 out_free:
1970         kfree(page);
1971 out:
1972         return r;
1973 }
1974 
1975 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1976 {
1977         gpa_t gpa = data & ~0x3f;
1978 
1979         /* Bits 2:5 are reserved, Should be zero */
1980         if (data & 0x3c)
1981                 return 1;
1982 
1983         vcpu->arch.apf.msr_val = data;
1984 
1985         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1986                 kvm_clear_async_pf_completion_queue(vcpu);
1987                 kvm_async_pf_hash_reset(vcpu);
1988                 return 0;
1989         }
1990 
1991         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1992                                         sizeof(u32)))
1993                 return 1;
1994 
1995         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1996         kvm_async_pf_wakeup_all(vcpu);
1997         return 0;
1998 }
1999 
2000 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2001 {
2002         vcpu->arch.pv_time_enabled = false;
2003 }
2004 
2005 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
2006 {
2007         u64 delta;
2008 
2009         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2010                 return;
2011 
2012         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2013         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2014         vcpu->arch.st.accum_steal = delta;
2015 }
2016 
2017 static void record_steal_time(struct kvm_vcpu *vcpu)
2018 {
2019         accumulate_steal_time(vcpu);
2020 
2021         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2022                 return;
2023 
2024         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2025                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2026                 return;
2027 
2028         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2029         vcpu->arch.st.steal.version += 2;
2030         vcpu->arch.st.accum_steal = 0;
2031 
2032         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2033                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2034 }
2035 
2036 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2037 {
2038         bool pr = false;
2039         u32 msr = msr_info->index;
2040         u64 data = msr_info->data;
2041 
2042         switch (msr) {
2043         case MSR_AMD64_NB_CFG:
2044         case MSR_IA32_UCODE_REV:
2045         case MSR_IA32_UCODE_WRITE:
2046         case MSR_VM_HSAVE_PA:
2047         case MSR_AMD64_PATCH_LOADER:
2048         case MSR_AMD64_BU_CFG2:
2049                 break;
2050 
2051         case MSR_EFER:
2052                 return set_efer(vcpu, data);
2053         case MSR_K7_HWCR:
2054                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2055                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2056                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2057                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2058                 if (data != 0) {
2059                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2060                                     data);
2061                         return 1;
2062                 }
2063                 break;
2064         case MSR_FAM10H_MMIO_CONF_BASE:
2065                 if (data != 0) {
2066                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2067                                     "0x%llx\n", data);
2068                         return 1;
2069                 }
2070                 break;
2071         case MSR_IA32_DEBUGCTLMSR:
2072                 if (!data) {
2073                         /* We support the non-activated case already */
2074                         break;
2075                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2076                         /* Values other than LBR and BTF are vendor-specific,
2077                            thus reserved and should throw a #GP */
2078                         return 1;
2079                 }
2080                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2081                             __func__, data);
2082                 break;
2083         case 0x200 ... 0x2ff:
2084                 return kvm_mtrr_set_msr(vcpu, msr, data);
2085         case MSR_IA32_APICBASE:
2086                 return kvm_set_apic_base(vcpu, msr_info);
2087         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2088                 return kvm_x2apic_msr_write(vcpu, msr, data);
2089         case MSR_IA32_TSCDEADLINE:
2090                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2091                 break;
2092         case MSR_IA32_TSC_ADJUST:
2093                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2094                         if (!msr_info->host_initiated) {
2095                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2096                                 adjust_tsc_offset_guest(vcpu, adj);
2097                         }
2098                         vcpu->arch.ia32_tsc_adjust_msr = data;
2099                 }
2100                 break;
2101         case MSR_IA32_MISC_ENABLE:
2102                 vcpu->arch.ia32_misc_enable_msr = data;
2103                 break;
2104         case MSR_IA32_SMBASE:
2105                 if (!msr_info->host_initiated)
2106                         return 1;
2107                 vcpu->arch.smbase = data;
2108                 break;
2109         case MSR_KVM_WALL_CLOCK_NEW:
2110         case MSR_KVM_WALL_CLOCK:
2111                 vcpu->kvm->arch.wall_clock = data;
2112                 kvm_write_wall_clock(vcpu->kvm, data);
2113                 break;
2114         case MSR_KVM_SYSTEM_TIME_NEW:
2115         case MSR_KVM_SYSTEM_TIME: {
2116                 u64 gpa_offset;
2117                 struct kvm_arch *ka = &vcpu->kvm->arch;
2118 
2119                 kvmclock_reset(vcpu);
2120 
2121                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2122                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2123 
2124                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2125                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2126                                         &vcpu->requests);
2127 
2128                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2129                 }
2130 
2131                 vcpu->arch.time = data;
2132                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2133 
2134                 /* we verify if the enable bit is set... */
2135                 if (!(data & 1))
2136                         break;
2137 
2138                 gpa_offset = data & ~(PAGE_MASK | 1);
2139 
2140                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2141                      &vcpu->arch.pv_time, data & ~1ULL,
2142                      sizeof(struct pvclock_vcpu_time_info)))
2143                         vcpu->arch.pv_time_enabled = false;
2144                 else
2145                         vcpu->arch.pv_time_enabled = true;
2146 
2147                 break;
2148         }
2149         case MSR_KVM_ASYNC_PF_EN:
2150                 if (kvm_pv_enable_async_pf(vcpu, data))
2151                         return 1;
2152                 break;
2153         case MSR_KVM_STEAL_TIME:
2154 
2155                 if (unlikely(!sched_info_on()))
2156                         return 1;
2157 
2158                 if (data & KVM_STEAL_RESERVED_MASK)
2159                         return 1;
2160 
2161                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2162                                                 data & KVM_STEAL_VALID_BITS,
2163                                                 sizeof(struct kvm_steal_time)))
2164                         return 1;
2165 
2166                 vcpu->arch.st.msr_val = data;
2167 
2168                 if (!(data & KVM_MSR_ENABLED))
2169                         break;
2170 
2171                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2172 
2173                 break;
2174         case MSR_KVM_PV_EOI_EN:
2175                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2176                         return 1;
2177                 break;
2178 
2179         case MSR_IA32_MCG_CTL:
2180         case MSR_IA32_MCG_STATUS:
2181         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2182                 return set_msr_mce(vcpu, msr, data);
2183 
2184         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2185         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2186                 pr = true; /* fall through */
2187         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2188         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2189                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2190                         return kvm_pmu_set_msr(vcpu, msr_info);
2191 
2192                 if (pr || data != 0)
2193                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2194                                     "0x%x data 0x%llx\n", msr, data);
2195                 break;
2196         case MSR_K7_CLK_CTL:
2197                 /*
2198                  * Ignore all writes to this no longer documented MSR.
2199                  * Writes are only relevant for old K7 processors,
2200                  * all pre-dating SVM, but a recommended workaround from
2201                  * AMD for these chips. It is possible to specify the
2202                  * affected processor models on the command line, hence
2203                  * the need to ignore the workaround.
2204                  */
2205                 break;
2206         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2207         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2208         case HV_X64_MSR_CRASH_CTL:
2209         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2210                 return kvm_hv_set_msr_common(vcpu, msr, data,
2211                                              msr_info->host_initiated);
2212         case MSR_IA32_BBL_CR_CTL3:
2213                 /* Drop writes to this legacy MSR -- see rdmsr
2214                  * counterpart for further detail.
2215                  */
2216                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2217                 break;
2218         case MSR_AMD64_OSVW_ID_LENGTH:
2219                 if (!guest_cpuid_has_osvw(vcpu))
2220                         return 1;
2221                 vcpu->arch.osvw.length = data;
2222                 break;
2223         case MSR_AMD64_OSVW_STATUS:
2224                 if (!guest_cpuid_has_osvw(vcpu))
2225                         return 1;
2226                 vcpu->arch.osvw.status = data;
2227                 break;
2228         default:
2229                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2230                         return xen_hvm_config(vcpu, data);
2231                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2232                         return kvm_pmu_set_msr(vcpu, msr_info);
2233                 if (!ignore_msrs) {
2234                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2235                                     msr, data);
2236                         return 1;
2237                 } else {
2238                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2239                                     msr, data);
2240                         break;
2241                 }
2242         }
2243         return 0;
2244 }
2245 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2246 
2247 
2248 /*
2249  * Reads an msr value (of 'msr_index') into 'pdata'.
2250  * Returns 0 on success, non-0 otherwise.
2251  * Assumes vcpu_load() was already called.
2252  */
2253 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2254 {
2255         return kvm_x86_ops->get_msr(vcpu, msr);
2256 }
2257 EXPORT_SYMBOL_GPL(kvm_get_msr);
2258 
2259 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2260 {
2261         u64 data;
2262         u64 mcg_cap = vcpu->arch.mcg_cap;
2263         unsigned bank_num = mcg_cap & 0xff;
2264 
2265         switch (msr) {
2266         case MSR_IA32_P5_MC_ADDR:
2267         case MSR_IA32_P5_MC_TYPE:
2268                 data = 0;
2269                 break;
2270         case MSR_IA32_MCG_CAP:
2271                 data = vcpu->arch.mcg_cap;
2272                 break;
2273         case MSR_IA32_MCG_CTL:
2274                 if (!(mcg_cap & MCG_CTL_P))
2275                         return 1;
2276                 data = vcpu->arch.mcg_ctl;
2277                 break;
2278         case MSR_IA32_MCG_STATUS:
2279                 data = vcpu->arch.mcg_status;
2280                 break;
2281         default:
2282                 if (msr >= MSR_IA32_MC0_CTL &&
2283                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2284                         u32 offset = msr - MSR_IA32_MC0_CTL;
2285                         data = vcpu->arch.mce_banks[offset];
2286                         break;
2287                 }
2288                 return 1;
2289         }
2290         *pdata = data;
2291         return 0;
2292 }
2293 
2294 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2295 {
2296         switch (msr_info->index) {
2297         case MSR_IA32_PLATFORM_ID:
2298         case MSR_IA32_EBL_CR_POWERON:
2299         case MSR_IA32_DEBUGCTLMSR:
2300         case MSR_IA32_LASTBRANCHFROMIP:
2301         case MSR_IA32_LASTBRANCHTOIP:
2302         case MSR_IA32_LASTINTFROMIP:
2303         case MSR_IA32_LASTINTTOIP:
2304         case MSR_K8_SYSCFG:
2305         case MSR_K8_TSEG_ADDR:
2306         case MSR_K8_TSEG_MASK:
2307         case MSR_K7_HWCR:
2308         case MSR_VM_HSAVE_PA:
2309         case MSR_K8_INT_PENDING_MSG:
2310         case MSR_AMD64_NB_CFG:
2311         case MSR_FAM10H_MMIO_CONF_BASE:
2312         case MSR_AMD64_BU_CFG2:
2313                 msr_info->data = 0;
2314                 break;
2315         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2316         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2317         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2318         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2319                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2320                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2321                 msr_info->data = 0;
2322                 break;
2323         case MSR_IA32_UCODE_REV:
2324                 msr_info->data = 0x100000000ULL;
2325                 break;
2326         case MSR_MTRRcap:
2327         case 0x200 ... 0x2ff:
2328                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2329         case 0xcd: /* fsb frequency */
2330                 msr_info->data = 3;
2331                 break;
2332                 /*
2333                  * MSR_EBC_FREQUENCY_ID
2334                  * Conservative value valid for even the basic CPU models.
2335                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2336                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2337                  * and 266MHz for model 3, or 4. Set Core Clock
2338                  * Frequency to System Bus Frequency Ratio to 1 (bits
2339                  * 31:24) even though these are only valid for CPU
2340                  * models > 2, however guests may end up dividing or
2341                  * multiplying by zero otherwise.
2342                  */
2343         case MSR_EBC_FREQUENCY_ID:
2344                 msr_info->data = 1 << 24;
2345                 break;
2346         case MSR_IA32_APICBASE:
2347                 msr_info->data = kvm_get_apic_base(vcpu);
2348                 break;
2349         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2350                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2351                 break;
2352         case MSR_IA32_TSCDEADLINE:
2353                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2354                 break;
2355         case MSR_IA32_TSC_ADJUST:
2356                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2357                 break;
2358         case MSR_IA32_MISC_ENABLE:
2359                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2360                 break;
2361         case MSR_IA32_SMBASE:
2362                 if (!msr_info->host_initiated)
2363                         return 1;
2364                 msr_info->data = vcpu->arch.smbase;
2365                 break;
2366         case MSR_IA32_PERF_STATUS:
2367                 /* TSC increment by tick */
2368                 msr_info->data = 1000ULL;
2369                 /* CPU multiplier */
2370                 msr_info->data |= (((uint64_t)4ULL) << 40);
2371                 break;
2372         case MSR_EFER:
2373                 msr_info->data = vcpu->arch.efer;
2374                 break;
2375         case MSR_KVM_WALL_CLOCK:
2376         case MSR_KVM_WALL_CLOCK_NEW:
2377                 msr_info->data = vcpu->kvm->arch.wall_clock;
2378                 break;
2379         case MSR_KVM_SYSTEM_TIME:
2380         case MSR_KVM_SYSTEM_TIME_NEW:
2381                 msr_info->data = vcpu->arch.time;
2382                 break;
2383         case MSR_KVM_ASYNC_PF_EN:
2384                 msr_info->data = vcpu->arch.apf.msr_val;
2385                 break;
2386         case MSR_KVM_STEAL_TIME:
2387                 msr_info->data = vcpu->arch.st.msr_val;
2388                 break;
2389         case MSR_KVM_PV_EOI_EN:
2390                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2391                 break;
2392         case MSR_IA32_P5_MC_ADDR:
2393         case MSR_IA32_P5_MC_TYPE:
2394         case MSR_IA32_MCG_CAP:
2395         case MSR_IA32_MCG_CTL:
2396         case MSR_IA32_MCG_STATUS:
2397         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2398                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2399         case MSR_K7_CLK_CTL:
2400                 /*
2401                  * Provide expected ramp-up count for K7. All other
2402                  * are set to zero, indicating minimum divisors for
2403                  * every field.
2404                  *
2405                  * This prevents guest kernels on AMD host with CPU
2406                  * type 6, model 8 and higher from exploding due to
2407                  * the rdmsr failing.
2408                  */
2409                 msr_info->data = 0x20000000;
2410                 break;
2411         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2412         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2413         case HV_X64_MSR_CRASH_CTL:
2414         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2415                 return kvm_hv_get_msr_common(vcpu,
2416                                              msr_info->index, &msr_info->data);
2417                 break;
2418         case MSR_IA32_BBL_CR_CTL3:
2419                 /* This legacy MSR exists but isn't fully documented in current
2420                  * silicon.  It is however accessed by winxp in very narrow
2421                  * scenarios where it sets bit #19, itself documented as
2422                  * a "reserved" bit.  Best effort attempt to source coherent
2423                  * read data here should the balance of the register be
2424                  * interpreted by the guest:
2425                  *
2426                  * L2 cache control register 3: 64GB range, 256KB size,
2427                  * enabled, latency 0x1, configured
2428                  */
2429                 msr_info->data = 0xbe702111;
2430                 break;
2431         case MSR_AMD64_OSVW_ID_LENGTH:
2432                 if (!guest_cpuid_has_osvw(vcpu))
2433                         return 1;
2434                 msr_info->data = vcpu->arch.osvw.length;
2435                 break;
2436         case MSR_AMD64_OSVW_STATUS:
2437                 if (!guest_cpuid_has_osvw(vcpu))
2438                         return 1;
2439                 msr_info->data = vcpu->arch.osvw.status;
2440                 break;
2441         default:
2442                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2443                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2444                 if (!ignore_msrs) {
2445                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2446                         return 1;
2447                 } else {
2448                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2449                         msr_info->data = 0;
2450                 }
2451                 break;
2452         }
2453         return 0;
2454 }
2455 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2456 
2457 /*
2458  * Read or write a bunch of msrs. All parameters are kernel addresses.
2459  *
2460  * @return number of msrs set successfully.
2461  */
2462 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2463                     struct kvm_msr_entry *entries,
2464                     int (*do_msr)(struct kvm_vcpu *vcpu,
2465                                   unsigned index, u64 *data))
2466 {
2467         int i, idx;
2468 
2469         idx = srcu_read_lock(&vcpu->kvm->srcu);
2470         for (i = 0; i < msrs->nmsrs; ++i)
2471                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2472                         break;
2473         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2474 
2475         return i;
2476 }
2477 
2478 /*
2479  * Read or write a bunch of msrs. Parameters are user addresses.
2480  *
2481  * @return number of msrs set successfully.
2482  */
2483 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2484                   int (*do_msr)(struct kvm_vcpu *vcpu,
2485                                 unsigned index, u64 *data),
2486                   int writeback)
2487 {
2488         struct kvm_msrs msrs;
2489         struct kvm_msr_entry *entries;
2490         int r, n;
2491         unsigned size;
2492 
2493         r = -EFAULT;
2494         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2495                 goto out;
2496 
2497         r = -E2BIG;
2498         if (msrs.nmsrs >= MAX_IO_MSRS)
2499                 goto out;
2500 
2501         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2502         entries = memdup_user(user_msrs->entries, size);
2503         if (IS_ERR(entries)) {
2504                 r = PTR_ERR(entries);
2505                 goto out;
2506         }
2507 
2508         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2509         if (r < 0)
2510                 goto out_free;
2511 
2512         r = -EFAULT;
2513         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2514                 goto out_free;
2515 
2516         r = n;
2517 
2518 out_free:
2519         kfree(entries);
2520 out:
2521         return r;
2522 }
2523 
2524 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2525 {
2526         int r;
2527 
2528         switch (ext) {
2529         case KVM_CAP_IRQCHIP:
2530         case KVM_CAP_HLT:
2531         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2532         case KVM_CAP_SET_TSS_ADDR:
2533         case KVM_CAP_EXT_CPUID:
2534         case KVM_CAP_EXT_EMUL_CPUID:
2535         case KVM_CAP_CLOCKSOURCE:
2536         case KVM_CAP_PIT:
2537         case KVM_CAP_NOP_IO_DELAY:
2538         case KVM_CAP_MP_STATE:
2539         case KVM_CAP_SYNC_MMU:
2540         case KVM_CAP_USER_NMI:
2541         case KVM_CAP_REINJECT_CONTROL:
2542         case KVM_CAP_IRQ_INJECT_STATUS:
2543         case KVM_CAP_IOEVENTFD:
2544         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2545         case KVM_CAP_PIT2:
2546         case KVM_CAP_PIT_STATE2:
2547         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2548         case KVM_CAP_XEN_HVM:
2549         case KVM_CAP_ADJUST_CLOCK:
2550         case KVM_CAP_VCPU_EVENTS:
2551         case KVM_CAP_HYPERV:
2552         case KVM_CAP_HYPERV_VAPIC:
2553         case KVM_CAP_HYPERV_SPIN:
2554         case KVM_CAP_HYPERV_SYNIC:
2555         case KVM_CAP_PCI_SEGMENT:
2556         case KVM_CAP_DEBUGREGS:
2557         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2558         case KVM_CAP_XSAVE:
2559         case KVM_CAP_ASYNC_PF:
2560         case KVM_CAP_GET_TSC_KHZ:
2561         case KVM_CAP_KVMCLOCK_CTRL:
2562         case KVM_CAP_READONLY_MEM:
2563         case KVM_CAP_HYPERV_TIME:
2564         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2565         case KVM_CAP_TSC_DEADLINE_TIMER:
2566         case KVM_CAP_ENABLE_CAP_VM:
2567         case KVM_CAP_DISABLE_QUIRKS:
2568         case KVM_CAP_SET_BOOT_CPU_ID:
2569         case KVM_CAP_SPLIT_IRQCHIP:
2570 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2571         case KVM_CAP_ASSIGN_DEV_IRQ:
2572         case KVM_CAP_PCI_2_3:
2573 #endif
2574                 r = 1;
2575                 break;
2576         case KVM_CAP_X86_SMM:
2577                 /* SMBASE is usually relocated above 1M on modern chipsets,
2578                  * and SMM handlers might indeed rely on 4G segment limits,
2579                  * so do not report SMM to be available if real mode is
2580                  * emulated via vm86 mode.  Still, do not go to great lengths
2581                  * to avoid userspace's usage of the feature, because it is a
2582                  * fringe case that is not enabled except via specific settings
2583                  * of the module parameters.
2584                  */
2585                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2586                 break;
2587         case KVM_CAP_COALESCED_MMIO:
2588                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2589                 break;
2590         case KVM_CAP_VAPIC:
2591                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2592                 break;
2593         case KVM_CAP_NR_VCPUS:
2594                 r = KVM_SOFT_MAX_VCPUS;
2595                 break;
2596         case KVM_CAP_MAX_VCPUS:
2597                 r = KVM_MAX_VCPUS;
2598                 break;
2599         case KVM_CAP_NR_MEMSLOTS:
2600                 r = KVM_USER_MEM_SLOTS;
2601                 break;
2602         case KVM_CAP_PV_MMU:    /* obsolete */
2603                 r = 0;
2604                 break;
2605 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2606         case KVM_CAP_IOMMU:
2607                 r = iommu_present(&pci_bus_type);
2608                 break;
2609 #endif
2610         case KVM_CAP_MCE:
2611                 r = KVM_MAX_MCE_BANKS;
2612                 break;
2613         case KVM_CAP_XCRS:
2614                 r = cpu_has_xsave;
2615                 break;
2616         case KVM_CAP_TSC_CONTROL:
2617                 r = kvm_has_tsc_control;
2618                 break;
2619         default:
2620                 r = 0;
2621                 break;
2622         }
2623         return r;
2624 
2625 }
2626 
2627 long kvm_arch_dev_ioctl(struct file *filp,
2628                         unsigned int ioctl, unsigned long arg)
2629 {
2630         void __user *argp = (void __user *)arg;
2631         long r;
2632 
2633         switch (ioctl) {
2634         case KVM_GET_MSR_INDEX_LIST: {
2635                 struct kvm_msr_list __user *user_msr_list = argp;
2636                 struct kvm_msr_list msr_list;
2637                 unsigned n;
2638 
2639                 r = -EFAULT;
2640                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2641                         goto out;
2642                 n = msr_list.nmsrs;
2643                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2644                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2645                         goto out;
2646                 r = -E2BIG;
2647                 if (n < msr_list.nmsrs)
2648                         goto out;
2649                 r = -EFAULT;
2650                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2651                                  num_msrs_to_save * sizeof(u32)))
2652                         goto out;
2653                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2654                                  &emulated_msrs,
2655                                  num_emulated_msrs * sizeof(u32)))
2656                         goto out;
2657                 r = 0;
2658                 break;
2659         }
2660         case KVM_GET_SUPPORTED_CPUID:
2661         case KVM_GET_EMULATED_CPUID: {
2662                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2663                 struct kvm_cpuid2 cpuid;
2664 
2665                 r = -EFAULT;
2666                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2667                         goto out;
2668 
2669                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2670                                             ioctl);
2671                 if (r)
2672                         goto out;
2673 
2674                 r = -EFAULT;
2675                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2676                         goto out;
2677                 r = 0;
2678                 break;
2679         }
2680         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2681                 u64 mce_cap;
2682 
2683                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2684                 r = -EFAULT;
2685                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2686                         goto out;
2687                 r = 0;
2688                 break;
2689         }
2690         default:
2691                 r = -EINVAL;
2692         }
2693 out:
2694         return r;
2695 }
2696 
2697 static void wbinvd_ipi(void *garbage)
2698 {
2699         wbinvd();
2700 }
2701 
2702 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2703 {
2704         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2705 }
2706 
2707 static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
2708 {
2709         set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
2710 }
2711 
2712 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2713 {
2714         /* Address WBINVD may be executed by guest */
2715         if (need_emulate_wbinvd(vcpu)) {
2716                 if (kvm_x86_ops->has_wbinvd_exit())
2717                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2718                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2719                         smp_call_function_single(vcpu->cpu,
2720                                         wbinvd_ipi, NULL, 1);
2721         }
2722 
2723         kvm_x86_ops->vcpu_load(vcpu, cpu);
2724 
2725         /* Apply any externally detected TSC adjustments (due to suspend) */
2726         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2727                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2728                 vcpu->arch.tsc_offset_adjustment = 0;
2729                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2730         }
2731 
2732         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2733                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2734                                 rdtsc() - vcpu->arch.last_host_tsc;
2735                 if (tsc_delta < 0)
2736                         mark_tsc_unstable("KVM discovered backwards TSC");
2737                 if (check_tsc_unstable()) {
2738                         u64 offset = kvm_compute_tsc_offset(vcpu,
2739                                                 vcpu->arch.last_guest_tsc);
2740                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2741                         vcpu->arch.tsc_catchup = 1;
2742                 }
2743                 /*
2744                  * On a host with synchronized TSC, there is no need to update
2745                  * kvmclock on vcpu->cpu migration
2746                  */
2747                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2748                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2749                 if (vcpu->cpu != cpu)
2750                         kvm_migrate_timers(vcpu);
2751                 vcpu->cpu = cpu;
2752         }
2753 
2754         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2755 }
2756 
2757 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2758 {
2759         kvm_x86_ops->vcpu_put(vcpu);
2760         kvm_put_guest_fpu(vcpu);
2761         vcpu->arch.last_host_tsc = rdtsc();
2762 }
2763 
2764 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2765                                     struct kvm_lapic_state *s)
2766 {
2767         if (vcpu->arch.apicv_active)
2768                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2769 
2770         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2771 
2772         return 0;
2773 }
2774 
2775 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2776                                     struct kvm_lapic_state *s)
2777 {
2778         kvm_apic_post_state_restore(vcpu, s);
2779         update_cr8_intercept(vcpu);
2780 
2781         return 0;
2782 }
2783 
2784 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2785 {
2786         return (!lapic_in_kernel(vcpu) ||
2787                 kvm_apic_accept_pic_intr(vcpu));
2788 }
2789 
2790 /*
2791  * if userspace requested an interrupt window, check that the
2792  * interrupt window is open.
2793  *
2794  * No need to exit to userspace if we already have an interrupt queued.
2795  */
2796 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2797 {
2798         return kvm_arch_interrupt_allowed(vcpu) &&
2799                 !kvm_cpu_has_interrupt(vcpu) &&
2800                 !kvm_event_needs_reinjection(vcpu) &&
2801                 kvm_cpu_accept_dm_intr(vcpu);
2802 }
2803 
2804 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2805                                     struct kvm_interrupt *irq)
2806 {
2807         if (irq->irq >= KVM_NR_INTERRUPTS)
2808                 return -EINVAL;
2809 
2810         if (!irqchip_in_kernel(vcpu->kvm)) {
2811                 kvm_queue_interrupt(vcpu, irq->irq, false);
2812                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2813                 return 0;
2814         }
2815 
2816         /*
2817          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2818          * fail for in-kernel 8259.
2819          */
2820         if (pic_in_kernel(vcpu->kvm))
2821                 return -ENXIO;
2822 
2823         if (vcpu->arch.pending_external_vector != -1)
2824                 return -EEXIST;
2825 
2826         vcpu->arch.pending_external_vector = irq->irq;
2827         kvm_make_request(KVM_REQ_EVENT, vcpu);
2828         return 0;
2829 }
2830 
2831 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2832 {
2833         kvm_inject_nmi(vcpu);
2834 
2835         return 0;
2836 }
2837 
2838 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2839 {
2840         kvm_make_request(KVM_REQ_SMI, vcpu);
2841 
2842         return 0;
2843 }
2844 
2845 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2846                                            struct kvm_tpr_access_ctl *tac)
2847 {
2848         if (tac->flags)
2849                 return -EINVAL;
2850         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2851         return 0;
2852 }
2853 
2854 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2855                                         u64 mcg_cap)
2856 {
2857         int r;
2858         unsigned bank_num = mcg_cap & 0xff, bank;
2859 
2860         r = -EINVAL;
2861         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2862                 goto out;
2863         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2864                 goto out;
2865         r = 0;
2866         vcpu->arch.mcg_cap = mcg_cap;
2867         /* Init IA32_MCG_CTL to all 1s */
2868         if (mcg_cap & MCG_CTL_P)
2869                 vcpu->arch.mcg_ctl = ~(u64)0;
2870         /* Init IA32_MCi_CTL to all 1s */
2871         for (bank = 0; bank < bank_num; bank++)
2872                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2873 out:
2874         return r;
2875 }
2876 
2877 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2878                                       struct kvm_x86_mce *mce)
2879 {
2880         u64 mcg_cap = vcpu->arch.mcg_cap;
2881         unsigned bank_num = mcg_cap & 0xff;
2882         u64 *banks = vcpu->arch.mce_banks;
2883 
2884         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2885                 return -EINVAL;
2886         /*
2887          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2888          * reporting is disabled
2889          */
2890         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2891             vcpu->arch.mcg_ctl != ~(u64)0)
2892                 return 0;
2893         banks += 4 * mce->bank;
2894         /*
2895          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2896          * reporting is disabled for the bank
2897          */
2898         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2899                 return 0;
2900         if (mce->status & MCI_STATUS_UC) {
2901                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2902                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2903                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2904                         return 0;
2905                 }
2906                 if (banks[1] & MCI_STATUS_VAL)
2907                         mce->status |= MCI_STATUS_OVER;
2908                 banks[2] = mce->addr;
2909                 banks[3] = mce->misc;
2910                 vcpu->arch.mcg_status = mce->mcg_status;
2911                 banks[1] = mce->status;
2912                 kvm_queue_exception(vcpu, MC_VECTOR);
2913         } else if (!(banks[1] & MCI_STATUS_VAL)
2914                    || !(banks[1] & MCI_STATUS_UC)) {
2915                 if (banks[1] & MCI_STATUS_VAL)
2916                         mce->status |= MCI_STATUS_OVER;
2917                 banks[2] = mce->addr;
2918                 banks[3] = mce->misc;
2919                 banks[1] = mce->status;
2920         } else
2921                 banks[1] |= MCI_STATUS_OVER;
2922         return 0;
2923 }
2924 
2925 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2926                                                struct kvm_vcpu_events *events)
2927 {
2928         process_nmi(vcpu);
2929         events->exception.injected =
2930                 vcpu->arch.exception.pending &&
2931                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2932         events->exception.nr = vcpu->arch.exception.nr;
2933         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2934         events->exception.pad = 0;
2935         events->exception.error_code = vcpu->arch.exception.error_code;
2936 
2937         events->interrupt.injected =
2938                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2939         events->interrupt.nr = vcpu->arch.interrupt.nr;
2940         events->interrupt.soft = 0;
2941         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2942 
2943         events->nmi.injected = vcpu->arch.nmi_injected;
2944         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2945         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2946         events->nmi.pad = 0;
2947 
2948         events->sipi_vector = 0; /* never valid when reporting to user space */
2949 
2950         events->smi.smm = is_smm(vcpu);
2951         events->smi.pending = vcpu->arch.smi_pending;
2952         events->smi.smm_inside_nmi =
2953                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2954         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2955 
2956         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2957                          | KVM_VCPUEVENT_VALID_SHADOW
2958                          | KVM_VCPUEVENT_VALID_SMM);
2959         memset(&events->reserved, 0, sizeof(events->reserved));
2960 }
2961 
2962 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2963                                               struct kvm_vcpu_events *events)
2964 {
2965         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2966                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2967                               | KVM_VCPUEVENT_VALID_SHADOW
2968                               | KVM_VCPUEVENT_VALID_SMM))
2969                 return -EINVAL;
2970 
2971         process_nmi(vcpu);
2972         vcpu->arch.exception.pending = events->exception.injected;
2973         vcpu->arch.exception.nr = events->exception.nr;
2974         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2975         vcpu->arch.exception.error_code = events->exception.error_code;
2976 
2977         vcpu->arch.interrupt.pending = events->interrupt.injected;
2978         vcpu->arch.interrupt.nr = events->interrupt.nr;
2979         vcpu->arch.interrupt.soft = events->interrupt.soft;
2980         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2981                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2982                                                   events->interrupt.shadow);
2983 
2984         vcpu->arch.nmi_injected = events->nmi.injected;
2985         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2986                 vcpu->arch.nmi_pending = events->nmi.pending;
2987         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2988 
2989         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2990             lapic_in_kernel(vcpu))
2991                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2992 
2993         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2994                 if (events->smi.smm)
2995                         vcpu->arch.hflags |= HF_SMM_MASK;
2996                 else
2997                         vcpu->arch.hflags &= ~HF_SMM_MASK;
2998                 vcpu->arch.smi_pending = events->smi.pending;
2999                 if (events->smi.smm_inside_nmi)
3000                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3001                 else
3002                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3003                 if (lapic_in_kernel(vcpu)) {
3004                         if (events->smi.latched_init)
3005                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3006                         else
3007                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3008                 }
3009         }
3010 
3011         kvm_make_request(KVM_REQ_EVENT, vcpu);
3012 
3013         return 0;
3014 }
3015 
3016 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3017                                              struct kvm_debugregs *dbgregs)
3018 {
3019         unsigned long val;
3020 
3021         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3022         kvm_get_dr(vcpu, 6, &val);
3023         dbgregs->dr6 = val;
3024         dbgregs->dr7 = vcpu->arch.dr7;
3025         dbgregs->flags = 0;
3026         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3027 }
3028 
3029 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3030                                             struct kvm_debugregs *dbgregs)
3031 {
3032         if (dbgregs->flags)
3033                 return -EINVAL;
3034 
3035         if (dbgregs->dr6 & ~0xffffffffull)
3036                 return -EINVAL;
3037         if (dbgregs->dr7 & ~0xffffffffull)
3038                 return -EINVAL;
3039 
3040         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3041         kvm_update_dr0123(vcpu);
3042         vcpu->arch.dr6 = dbgregs->dr6;
3043         kvm_update_dr6(vcpu);
3044         vcpu->arch.dr7 = dbgregs->dr7;
3045         kvm_update_dr7(vcpu);
3046 
3047         return 0;
3048 }
3049 
3050 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3051 
3052 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3053 {
3054         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3055         u64 xstate_bv = xsave->header.xfeatures;
3056         u64 valid;
3057 
3058         /*
3059          * Copy legacy XSAVE area, to avoid complications with CPUID
3060          * leaves 0 and 1 in the loop below.
3061          */
3062         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3063 
3064         /* Set XSTATE_BV */
3065         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3066 
3067         /*
3068          * Copy each region from the possibly compacted offset to the
3069          * non-compacted offset.
3070          */
3071         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3072         while (valid) {
3073                 u64 feature = valid & -valid;
3074                 int index = fls64(feature) - 1;
3075                 void *src = get_xsave_addr(xsave, feature);
3076 
3077                 if (src) {
3078                         u32 size, offset, ecx, edx;
3079                         cpuid_count(XSTATE_CPUID, index,
3080                                     &size, &offset, &ecx, &edx);
3081                         memcpy(dest + offset, src, size);
3082                 }
3083 
3084                 valid -= feature;
3085         }
3086 }
3087 
3088 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3089 {
3090         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3091         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3092         u64 valid;
3093 
3094         /*
3095          * Copy legacy XSAVE area, to avoid complications with CPUID
3096          * leaves 0 and 1 in the loop below.
3097          */
3098         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3099 
3100         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3101         xsave->header.xfeatures = xstate_bv;
3102         if (cpu_has_xsaves)
3103                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3104 
3105         /*
3106          * Copy each region from the non-compacted offset to the
3107          * possibly compacted offset.
3108          */
3109         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3110         while (valid) {
3111                 u64 feature = valid & -valid;
3112                 int index = fls64(feature) - 1;
3113                 void *dest = get_xsave_addr(xsave, feature);
3114 
3115                 if (dest) {
3116                         u32 size, offset, ecx, edx;
3117                         cpuid_count(XSTATE_CPUID, index,
3118                                     &size, &offset, &ecx, &edx);
3119                         memcpy(dest, src + offset, size);
3120                 }
3121 
3122                 valid -= feature;
3123         }
3124 }
3125 
3126 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3127                                          struct kvm_xsave *guest_xsave)
3128 {
3129         if (cpu_has_xsave) {
3130                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3131                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3132         } else {
3133                 memcpy(guest_xsave->region,
3134                         &vcpu->arch.guest_fpu.state.fxsave,
3135                         sizeof(struct fxregs_state));
3136                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3137                         XFEATURE_MASK_FPSSE;
3138         }
3139 }
3140 
3141 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3142                                         struct kvm_xsave *guest_xsave)
3143 {
3144         u64 xstate_bv =
3145                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3146 
3147         if (cpu_has_xsave) {
3148                 /*
3149                  * Here we allow setting states that are not present in
3150                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3151                  * with old userspace.
3152                  */
3153                 if (xstate_bv & ~kvm_supported_xcr0())
3154                         return -EINVAL;
3155                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3156         } else {
3157                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3158                         return -EINVAL;
3159                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3160                         guest_xsave->region, sizeof(struct fxregs_state));
3161         }
3162         return 0;
3163 }
3164 
3165 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3166                                         struct kvm_xcrs *guest_xcrs)
3167 {
3168         if (!cpu_has_xsave) {
3169                 guest_xcrs->nr_xcrs = 0;
3170                 return;
3171         }
3172 
3173         guest_xcrs->nr_xcrs = 1;
3174         guest_xcrs->flags = 0;
3175         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3176         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3177 }
3178 
3179 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3180                                        struct kvm_xcrs *guest_xcrs)
3181 {
3182         int i, r = 0;
3183 
3184         if (!cpu_has_xsave)
3185                 return -EINVAL;
3186 
3187         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3188                 return -EINVAL;
3189 
3190         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3191                 /* Only support XCR0 currently */
3192                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3193                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3194                                 guest_xcrs->xcrs[i].value);
3195                         break;
3196                 }
3197         if (r)
3198                 r = -EINVAL;
3199         return r;
3200 }
3201 
3202 /*
3203  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3204  * stopped by the hypervisor.  This function will be called from the host only.
3205  * EINVAL is returned when the host attempts to set the flag for a guest that
3206  * does not support pv clocks.
3207  */
3208 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3209 {
3210         if (!vcpu->arch.pv_time_enabled)
3211                 return -EINVAL;
3212         vcpu->arch.pvclock_set_guest_stopped_request = true;
3213         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3214         return 0;
3215 }
3216 
3217 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3218                                      struct kvm_enable_cap *cap)
3219 {
3220         if (cap->flags)
3221                 return -EINVAL;
3222 
3223         switch (cap->cap) {
3224         case KVM_CAP_HYPERV_SYNIC:
3225                 return kvm_hv_activate_synic(vcpu);
3226         default:
3227                 return -EINVAL;
3228         }
3229 }
3230 
3231 long kvm_arch_vcpu_ioctl(struct file *filp,
3232                          unsigned int ioctl, unsigned long arg)
3233 {
3234         struct kvm_vcpu *vcpu = filp->private_data;
3235         void __user *argp = (void __user *)arg;
3236         int r;
3237         union {
3238                 struct kvm_lapic_state *lapic;
3239                 struct kvm_xsave *xsave;
3240                 struct kvm_xcrs *xcrs;
3241                 void *buffer;
3242         } u;
3243 
3244         u.buffer = NULL;
3245         switch (ioctl) {
3246         case KVM_GET_LAPIC: {
3247                 r = -EINVAL;
3248                 if (!lapic_in_kernel(vcpu))
3249                         goto out;
3250                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3251 
3252                 r = -ENOMEM;
3253                 if (!u.lapic)
3254                         goto out;
3255                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3256                 if (r)
3257                         goto out;
3258                 r = -EFAULT;
3259                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3260                         goto out;
3261                 r = 0;
3262                 break;
3263         }
3264         case KVM_SET_LAPIC: {
3265                 r = -EINVAL;
3266                 if (!lapic_in_kernel(vcpu))
3267                         goto out;
3268                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3269                 if (IS_ERR(u.lapic))
3270                         return PTR_ERR(u.lapic);
3271 
3272                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3273                 break;
3274         }
3275         case KVM_INTERRUPT: {
3276                 struct kvm_interrupt irq;
3277 
3278                 r = -EFAULT;
3279                 if (copy_from_user(&irq, argp, sizeof irq))
3280                         goto out;
3281                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3282                 break;
3283         }
3284         case KVM_NMI: {
3285                 r = kvm_vcpu_ioctl_nmi(vcpu);
3286                 break;
3287         }
3288         case KVM_SMI: {
3289                 r = kvm_vcpu_ioctl_smi(vcpu);
3290                 break;
3291         }
3292         case KVM_SET_CPUID: {
3293                 struct kvm_cpuid __user *cpuid_arg = argp;
3294                 struct kvm_cpuid cpuid;
3295 
3296                 r = -EFAULT;
3297                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3298                         goto out;
3299                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3300                 break;
3301         }
3302         case KVM_SET_CPUID2: {
3303                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3304                 struct kvm_cpuid2 cpuid;
3305 
3306                 r = -EFAULT;
3307                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3308                         goto out;
3309                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3310                                               cpuid_arg->entries);
3311                 break;
3312         }
3313         case KVM_GET_CPUID2: {
3314                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3315                 struct kvm_cpuid2 cpuid;
3316 
3317                 r = -EFAULT;
3318                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3319                         goto out;
3320                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3321                                               cpuid_arg->entries);
3322                 if (r)
3323                         goto out;
3324                 r = -EFAULT;
3325                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3326                         goto out;
3327                 r = 0;
3328                 break;
3329         }
3330         case KVM_GET_MSRS:
3331                 r = msr_io(vcpu, argp, do_get_msr, 1);
3332                 break;
3333         case KVM_SET_MSRS:
3334                 r = msr_io(vcpu, argp, do_set_msr, 0);
3335                 break;
3336         case KVM_TPR_ACCESS_REPORTING: {
3337                 struct kvm_tpr_access_ctl tac;
3338 
3339                 r = -EFAULT;
3340                 if (copy_from_user(&tac, argp, sizeof tac))
3341                         goto out;
3342                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3343                 if (r)
3344                         goto out;
3345                 r = -EFAULT;
3346                 if (copy_to_user(argp, &tac, sizeof tac))
3347                         goto out;
3348                 r = 0;
3349                 break;
3350         };
3351         case KVM_SET_VAPIC_ADDR: {
3352                 struct kvm_vapic_addr va;
3353 
3354                 r = -EINVAL;
3355                 if (!lapic_in_kernel(vcpu))
3356                         goto out;
3357                 r = -EFAULT;
3358                 if (copy_from_user(&va, argp, sizeof va))
3359                         goto out;
3360                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3361                 break;
3362         }
3363         case KVM_X86_SETUP_MCE: {
3364                 u64 mcg_cap;
3365 
3366                 r = -EFAULT;
3367                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3368                         goto out;
3369                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3370                 break;
3371         }
3372         case KVM_X86_SET_MCE: {
3373                 struct kvm_x86_mce mce;
3374 
3375                 r = -EFAULT;
3376                 if (copy_from_user(&mce, argp, sizeof mce))
3377                         goto out;
3378                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3379                 break;
3380         }
3381         case KVM_GET_VCPU_EVENTS: {
3382                 struct kvm_vcpu_events events;
3383 
3384                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3385 
3386                 r = -EFAULT;
3387                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3388                         break;
3389                 r = 0;
3390                 break;
3391         }
3392         case KVM_SET_VCPU_EVENTS: {
3393                 struct kvm_vcpu_events events;
3394 
3395                 r = -EFAULT;
3396                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3397                         break;
3398 
3399                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3400                 break;
3401         }
3402         case KVM_GET_DEBUGREGS: {
3403                 struct kvm_debugregs dbgregs;
3404 
3405                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3406 
3407                 r = -EFAULT;
3408                 if (copy_to_user(argp, &dbgregs,
3409                                  sizeof(struct kvm_debugregs)))
3410                         break;
3411                 r = 0;
3412                 break;
3413         }
3414         case KVM_SET_DEBUGREGS: {
3415                 struct kvm_debugregs dbgregs;
3416 
3417                 r = -EFAULT;
3418                 if (copy_from_user(&dbgregs, argp,
3419                                    sizeof(struct kvm_debugregs)))
3420                         break;
3421 
3422                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3423                 break;
3424         }
3425         case KVM_GET_XSAVE: {
3426                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3427                 r = -ENOMEM;
3428                 if (!u.xsave)
3429                         break;
3430 
3431                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3432 
3433                 r = -EFAULT;
3434                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3435                         break;
3436                 r = 0;
3437                 break;
3438         }
3439         case KVM_SET_XSAVE: {
3440                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3441                 if (IS_ERR(u.xsave))
3442                         return PTR_ERR(u.xsave);
3443 
3444                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3445                 break;
3446         }
3447         case KVM_GET_XCRS: {
3448                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3449                 r = -ENOMEM;
3450                 if (!u.xcrs)
3451                         break;
3452 
3453                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3454 
3455                 r = -EFAULT;
3456                 if (copy_to_user(argp, u.xcrs,
3457                                  sizeof(struct kvm_xcrs)))
3458                         break;
3459                 r = 0;
3460                 break;
3461         }
3462         case KVM_SET_XCRS: {
3463                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3464                 if (IS_ERR(u.xcrs))
3465                         return PTR_ERR(u.xcrs);
3466 
3467                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3468                 break;
3469         }
3470         case KVM_SET_TSC_KHZ: {
3471                 u32 user_tsc_khz;
3472 
3473                 r = -EINVAL;
3474                 user_tsc_khz = (u32)arg;
3475 
3476                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3477                         goto out;
3478 
3479                 if (user_tsc_khz == 0)
3480                         user_tsc_khz = tsc_khz;
3481 
3482                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3483                         r = 0;
3484 
3485                 goto out;
3486         }
3487         case KVM_GET_TSC_KHZ: {
3488                 r = vcpu->arch.virtual_tsc_khz;
3489                 goto out;
3490         }
3491         case KVM_KVMCLOCK_CTRL: {
3492                 r = kvm_set_guest_paused(vcpu);
3493                 goto out;
3494         }
3495         case KVM_ENABLE_CAP: {
3496                 struct kvm_enable_cap cap;
3497 
3498                 r = -EFAULT;
3499                 if (copy_from_user(&cap, argp, sizeof(cap)))
3500                         goto out;
3501                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3502                 break;
3503         }
3504         default:
3505                 r = -EINVAL;
3506         }
3507 out:
3508         kfree(u.buffer);
3509         return r;
3510 }
3511 
3512 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3513 {
3514         return VM_FAULT_SIGBUS;
3515 }
3516 
3517 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3518 {
3519         int ret;
3520 
3521         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3522                 return -EINVAL;
3523         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3524         return ret;
3525 }
3526 
3527 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3528                                               u64 ident_addr)
3529 {
3530         kvm->arch.ept_identity_map_addr = ident_addr;
3531         return 0;
3532 }
3533 
3534 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3535                                           u32 kvm_nr_mmu_pages)
3536 {
3537         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3538                 return -EINVAL;
3539 
3540         mutex_lock(&kvm->slots_lock);
3541 
3542         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3543         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3544 
3545         mutex_unlock(&kvm->slots_lock);
3546         return 0;
3547 }
3548 
3549 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3550 {
3551         return kvm->arch.n_max_mmu_pages;
3552 }
3553 
3554 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3555 {
3556         int r;
3557 
3558         r = 0;
3559         switch (chip->chip_id) {
3560         case KVM_IRQCHIP_PIC_MASTER:
3561                 memcpy(&chip->chip.pic,
3562                         &pic_irqchip(kvm)->pics[0],
3563                         sizeof(struct kvm_pic_state));
3564                 break;
3565         case KVM_IRQCHIP_PIC_SLAVE:
3566                 memcpy(&chip->chip.pic,
3567                         &pic_irqchip(kvm)->pics[1],
3568                         sizeof(struct kvm_pic_state));
3569                 break;
3570         case KVM_IRQCHIP_IOAPIC:
3571                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3572                 break;
3573         default:
3574                 r = -EINVAL;
3575                 break;
3576         }
3577         return r;
3578 }
3579 
3580 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3581 {
3582         int r;
3583 
3584         r = 0;
3585         switch (chip->chip_id) {
3586         case KVM_IRQCHIP_PIC_MASTER:
3587                 spin_lock(&pic_irqchip(kvm)->lock);
3588                 memcpy(&pic_irqchip(kvm)->pics[0],
3589                         &chip->chip.pic,
3590                         sizeof(struct kvm_pic_state));
3591                 spin_unlock(&pic_irqchip(kvm)->lock);
3592                 break;
3593         case KVM_IRQCHIP_PIC_SLAVE:
3594                 spin_lock(&pic_irqchip(kvm)->lock);
3595                 memcpy(&pic_irqchip(kvm)->pics[1],
3596                         &chip->chip.pic,
3597                         sizeof(struct kvm_pic_state));
3598                 spin_unlock(&pic_irqchip(kvm)->lock);
3599                 break;
3600         case KVM_IRQCHIP_IOAPIC:
3601                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3602                 break;
3603         default:
3604                 r = -EINVAL;
3605                 break;
3606         }
3607         kvm_pic_update_irq(pic_irqchip(kvm));
3608         return r;
3609 }
3610 
3611 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3612 {
3613         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3614 
3615         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3616 
3617         mutex_lock(&kps->lock);
3618         memcpy(ps, &kps->channels, sizeof(*ps));
3619         mutex_unlock(&kps->lock);
3620         return 0;
3621 }
3622 
3623 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3624 {
3625         int i;
3626         struct kvm_pit *pit = kvm->arch.vpit;
3627 
3628         mutex_lock(&pit->pit_state.lock);
3629         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3630         for (i = 0; i < 3; i++)
3631                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3632         mutex_unlock(&pit->pit_state.lock);
3633         return 0;
3634 }
3635 
3636 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3637 {
3638         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3639         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3640                 sizeof(ps->channels));
3641         ps->flags = kvm->arch.vpit->pit_state.flags;
3642         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3643         memset(&ps->reserved, 0, sizeof(ps->reserved));
3644         return 0;
3645 }
3646 
3647 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3648 {
3649         int start = 0;
3650         int i;
3651         u32 prev_legacy, cur_legacy;
3652         struct kvm_pit *pit = kvm->arch.vpit;
3653 
3654         mutex_lock(&pit->pit_state.lock);
3655         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3656         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3657         if (!prev_legacy && cur_legacy)
3658                 start = 1;
3659         memcpy(&pit->pit_state.channels, &ps->channels,
3660                sizeof(pit->pit_state.channels));
3661         pit->pit_state.flags = ps->flags;
3662         for (i = 0; i < 3; i++)
3663                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3664                                    start && i == 0);
3665         mutex_unlock(&pit->pit_state.lock);
3666         return 0;
3667 }
3668 
3669 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3670                                  struct kvm_reinject_control *control)
3671 {
3672         struct kvm_pit *pit = kvm->arch.vpit;
3673 
3674         if (!pit)
3675                 return -ENXIO;
3676 
3677         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3678          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3679          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3680          */
3681         mutex_lock(&pit->pit_state.lock);
3682         kvm_pit_set_reinject(pit, control->pit_reinject);
3683         mutex_unlock(&pit->pit_state.lock);
3684 
3685         return 0;
3686 }
3687 
3688 /**
3689  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3690  * @kvm: kvm instance
3691  * @log: slot id and address to which we copy the log
3692  *
3693  * Steps 1-4 below provide general overview of dirty page logging. See
3694  * kvm_get_dirty_log_protect() function description for additional details.
3695  *
3696  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3697  * always flush the TLB (step 4) even if previous step failed  and the dirty
3698  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3699  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3700  * writes will be marked dirty for next log read.
3701  *
3702  *   1. Take a snapshot of the bit and clear it if needed.
3703  *   2. Write protect the corresponding page.
3704  *   3. Copy the snapshot to the userspace.
3705  *   4. Flush TLB's if needed.
3706  */
3707 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3708 {
3709         bool is_dirty = false;
3710         int r;
3711 
3712         mutex_lock(&kvm->slots_lock);
3713 
3714         /*
3715          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3716          */
3717         if (kvm_x86_ops->flush_log_dirty)
3718                 kvm_x86_ops->flush_log_dirty(kvm);
3719 
3720         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3721 
3722         /*
3723          * All the TLBs can be flushed out of mmu lock, see the comments in
3724          * kvm_mmu_slot_remove_write_access().
3725          */
3726         lockdep_assert_held(&kvm->slots_lock);
3727         if (is_dirty)
3728                 kvm_flush_remote_tlbs(kvm);
3729 
3730         mutex_unlock(&kvm->slots_lock);
3731         return r;
3732 }
3733 
3734 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3735                         bool line_status)
3736 {
3737         if (!irqchip_in_kernel(kvm))
3738                 return -ENXIO;
3739 
3740         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3741                                         irq_event->irq, irq_event->level,
3742                                         line_status);
3743         return 0;
3744 }
3745 
3746 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3747                                    struct kvm_enable_cap *cap)
3748 {
3749         int r;
3750 
3751         if (cap->flags)
3752                 return -EINVAL;
3753 
3754         switch (cap->cap) {
3755         case KVM_CAP_DISABLE_QUIRKS:
3756                 kvm->arch.disabled_quirks = cap->args[0];
3757                 r = 0;
3758                 break;
3759         case KVM_CAP_SPLIT_IRQCHIP: {
3760                 mutex_lock(&kvm->lock);
3761                 r = -EINVAL;
3762                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3763                         goto split_irqchip_unlock;
3764                 r = -EEXIST;
3765                 if (irqchip_in_kernel(kvm))
3766                         goto split_irqchip_unlock;
3767                 if (atomic_read(&kvm->online_vcpus))
3768                         goto split_irqchip_unlock;
3769                 r = kvm_setup_empty_irq_routing(kvm);
3770                 if (r)
3771                         goto split_irqchip_unlock;
3772                 /* Pairs with irqchip_in_kernel. */
3773                 smp_wmb();
3774                 kvm->arch.irqchip_split = true;
3775                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3776                 r = 0;
3777 split_irqchip_unlock:
3778                 mutex_unlock(&kvm->lock);
3779                 break;
3780         }
3781         default:
3782                 r = -EINVAL;
3783                 break;
3784         }
3785         return r;
3786 }
3787 
3788 long kvm_arch_vm_ioctl(struct file *filp,
3789                        unsigned int ioctl, unsigned long arg)
3790 {
3791         struct kvm *kvm = filp->private_data;
3792         void __user *argp = (void __user *)arg;
3793         int r = -ENOTTY;
3794         /*
3795          * This union makes it completely explicit to gcc-3.x
3796          * that these two variables' stack usage should be
3797          * combined, not added together.
3798          */
3799         union {
3800                 struct kvm_pit_state ps;
3801                 struct kvm_pit_state2 ps2;
3802                 struct kvm_pit_config pit_config;
3803         } u;
3804 
3805         switch (ioctl) {
3806         case KVM_SET_TSS_ADDR:
3807                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3808                 break;
3809         case KVM_SET_IDENTITY_MAP_ADDR: {
3810                 u64 ident_addr;
3811 
3812                 r = -EFAULT;
3813                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3814                         goto out;
3815                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3816                 break;
3817         }
3818         case KVM_SET_NR_MMU_PAGES:
3819                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3820                 break;
3821         case KVM_GET_NR_MMU_PAGES:
3822                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3823                 break;
3824         case KVM_CREATE_IRQCHIP: {
3825                 struct kvm_pic *vpic;
3826 
3827                 mutex_lock(&kvm->lock);
3828                 r = -EEXIST;
3829                 if (kvm->arch.vpic)
3830                         goto create_irqchip_unlock;
3831                 r = -EINVAL;
3832                 if (atomic_read(&kvm->online_vcpus))
3833                         goto create_irqchip_unlock;
3834                 r = -ENOMEM;
3835                 vpic = kvm_create_pic(kvm);
3836                 if (vpic) {
3837                         r = kvm_ioapic_init(kvm);
3838                         if (r) {
3839                                 mutex_lock(&kvm->slots_lock);
3840                                 kvm_destroy_pic(vpic);
3841                                 mutex_unlock(&kvm->slots_lock);
3842                                 goto create_irqchip_unlock;
3843                         }
3844                 } else
3845                         goto create_irqchip_unlock;
3846                 r = kvm_setup_default_irq_routing(kvm);
3847                 if (r) {
3848                         mutex_lock(&kvm->slots_lock);
3849                         mutex_lock(&kvm->irq_lock);
3850                         kvm_ioapic_destroy(kvm);
3851                         kvm_destroy_pic(vpic);
3852                         mutex_unlock(&kvm->irq_lock);
3853                         mutex_unlock(&kvm->slots_lock);
3854                         goto create_irqchip_unlock;
3855                 }
3856                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3857                 smp_wmb();
3858                 kvm->arch.vpic = vpic;
3859         create_irqchip_unlock:
3860                 mutex_unlock(&kvm->lock);
3861                 break;
3862         }
3863         case KVM_CREATE_PIT:
3864                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3865                 goto create_pit;
3866         case KVM_CREATE_PIT2:
3867                 r = -EFAULT;
3868                 if (copy_from_user(&u.pit_config, argp,
3869                                    sizeof(struct kvm_pit_config)))
3870                         goto out;
3871         create_pit:
3872                 mutex_lock(&kvm->slots_lock);
3873                 r = -EEXIST;
3874                 if (kvm->arch.vpit)
3875                         goto create_pit_unlock;
3876                 r = -ENOMEM;
3877                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3878                 if (kvm->arch.vpit)
3879                         r = 0;
3880         create_pit_unlock:
3881                 mutex_unlock(&kvm->slots_lock);
3882                 break;
3883         case KVM_GET_IRQCHIP: {
3884                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3885                 struct kvm_irqchip *chip;
3886 
3887                 chip = memdup_user(argp, sizeof(*chip));
3888                 if (IS_ERR(chip)) {
3889                         r = PTR_ERR(chip);
3890                         goto out;
3891                 }
3892 
3893                 r = -ENXIO;
3894                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3895                         goto get_irqchip_out;
3896                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3897                 if (r)
3898                         goto get_irqchip_out;
3899                 r = -EFAULT;
3900                 if (copy_to_user(argp, chip, sizeof *chip))
3901                         goto get_irqchip_out;
3902                 r = 0;
3903         get_irqchip_out:
3904                 kfree(chip);
3905                 break;
3906         }
3907         case KVM_SET_IRQCHIP: {
3908                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3909                 struct kvm_irqchip *chip;
3910 
3911                 chip = memdup_user(argp, sizeof(*chip));
3912                 if (IS_ERR(chip)) {
3913                         r = PTR_ERR(chip);
3914                         goto out;
3915                 }
3916 
3917                 r = -ENXIO;
3918                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3919                         goto set_irqchip_out;
3920                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3921                 if (r)
3922                         goto set_irqchip_out;
3923                 r = 0;
3924         set_irqchip_out:
3925                 kfree(chip);
3926                 break;
3927         }
3928         case KVM_GET_PIT: {
3929                 r = -EFAULT;
3930                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3931                         goto out;
3932                 r = -ENXIO;
3933                 if (!kvm->arch.vpit)
3934                         goto out;
3935                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3936                 if (r)
3937                         goto out;
3938                 r = -EFAULT;
3939                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3940                         goto out;
3941                 r = 0;
3942                 break;
3943         }
3944         case KVM_SET_PIT: {
3945                 r = -EFAULT;
3946                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3947                         goto out;
3948                 r = -ENXIO;
3949                 if (!kvm->arch.vpit)
3950                         goto out;
3951                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3952                 break;
3953         }
3954         case KVM_GET_PIT2: {
3955                 r = -ENXIO;
3956                 if (!kvm->arch.vpit)
3957                         goto out;
3958                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3959                 if (r)
3960                         goto out;
3961                 r = -EFAULT;
3962                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3963                         goto out;
3964                 r = 0;
3965                 break;
3966         }
3967         case KVM_SET_PIT2: {
3968                 r = -EFAULT;
3969                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3970                         goto out;
3971                 r = -ENXIO;
3972                 if (!kvm->arch.vpit)
3973                         goto out;
3974                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3975                 break;
3976         }
3977         case KVM_REINJECT_CONTROL: {
3978                 struct kvm_reinject_control control;
3979                 r =  -EFAULT;
3980                 if (copy_from_user(&control, argp, sizeof(control)))
3981                         goto out;
3982                 r = kvm_vm_ioctl_reinject(kvm, &control);
3983                 break;
3984         }
3985         case KVM_SET_BOOT_CPU_ID:
3986                 r = 0;
3987                 mutex_lock(&kvm->lock);
3988                 if (atomic_read(&kvm->online_vcpus) != 0)
3989                         r = -EBUSY;
3990                 else
3991                         kvm->arch.bsp_vcpu_id = arg;
3992                 mutex_unlock(&kvm->lock);
3993                 break;
3994         case KVM_XEN_HVM_CONFIG: {
3995                 r = -EFAULT;
3996                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3997                                    sizeof(struct kvm_xen_hvm_config)))
3998                         goto out;
3999                 r = -EINVAL;
4000                 if (kvm->arch.xen_hvm_config.flags)
4001                         goto out;
4002                 r = 0;
4003                 break;
4004         }
4005         case KVM_SET_CLOCK: {
4006                 struct kvm_clock_data user_ns;
4007                 u64 now_ns;
4008                 s64 delta;
4009 
4010                 r = -EFAULT;
4011                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4012                         goto out;
4013 
4014                 r = -EINVAL;
4015                 if (user_ns.flags)
4016                         goto out;
4017 
4018                 r = 0;
4019                 local_irq_disable();
4020                 now_ns = get_kernel_ns();
4021                 delta = user_ns.clock - now_ns;
4022                 local_irq_enable();
4023                 kvm->arch.kvmclock_offset = delta;
4024                 kvm_gen_update_masterclock(kvm);
4025                 break;
4026         }
4027         case KVM_GET_CLOCK: {
4028                 struct kvm_clock_data user_ns;
4029                 u64 now_ns;
4030 
4031                 local_irq_disable();
4032                 now_ns = get_kernel_ns();
4033                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
4034                 local_irq_enable();
4035                 user_ns.flags = 0;
4036                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4037 
4038                 r = -EFAULT;
4039                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4040                         goto out;
4041                 r = 0;
4042                 break;
4043         }
4044         case KVM_ENABLE_CAP: {
4045                 struct kvm_enable_cap cap;
4046 
4047                 r = -EFAULT;
4048                 if (copy_from_user(&cap, argp, sizeof(cap)))
4049                         goto out;
4050                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4051                 break;
4052         }
4053         default:
4054                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4055         }
4056 out:
4057         return r;
4058 }
4059 
4060 static void kvm_init_msr_list(void)
4061 {
4062         u32 dummy[2];
4063         unsigned i, j;
4064 
4065         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4066                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4067                         continue;
4068 
4069                 /*
4070                  * Even MSRs that are valid in the host may not be exposed
4071                  * to the guests in some cases.
4072                  */
4073                 switch (msrs_to_save[i]) {
4074                 case MSR_IA32_BNDCFGS:
4075                         if (!kvm_x86_ops->mpx_supported())
4076                                 continue;
4077                         break;
4078                 case MSR_TSC_AUX:
4079                         if (!kvm_x86_ops->rdtscp_supported())
4080                                 continue;
4081                         break;
4082                 default:
4083                         break;
4084                 }
4085 
4086                 if (j < i)
4087                         msrs_to_save[j] = msrs_to_save[i];
4088                 j++;
4089         }
4090         num_msrs_to_save = j;
4091 
4092         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4093                 switch (emulated_msrs[i]) {
4094                 case MSR_IA32_SMBASE:
4095                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4096                                 continue;
4097                         break;
4098                 default:
4099                         break;
4100                 }
4101 
4102                 if (j < i)
4103                         emulated_msrs[j] = emulated_msrs[i];
4104                 j++;
4105         }
4106         num_emulated_msrs = j;
4107 }
4108 
4109 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4110                            const void *v)
4111 {
4112         int handled = 0;
4113         int n;
4114 
4115         do {
4116                 n = min(len, 8);
4117                 if (!(lapic_in_kernel(vcpu) &&
4118                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4119                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4120                         break;
4121                 handled += n;
4122                 addr += n;
4123                 len -= n;
4124                 v += n;
4125         } while (len);
4126 
4127         return handled;
4128 }
4129 
4130 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4131 {
4132         int handled = 0;
4133         int n;
4134 
4135         do {
4136                 n = min(len, 8);
4137                 if (!(lapic_in_kernel(vcpu) &&
4138                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4139                                          addr, n, v))
4140                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4141                         break;
4142                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4143                 handled += n;
4144                 addr += n;
4145                 len -= n;
4146                 v += n;
4147         } while (len);
4148 
4149         return handled;
4150 }
4151 
4152 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4153                         struct kvm_segment *var, int seg)
4154 {
4155         kvm_x86_ops->set_segment(vcpu, var, seg);
4156 }
4157 
4158 void kvm_get_segment(struct kvm_vcpu *vcpu,
4159                      struct kvm_segment *var, int seg)
4160 {
4161         kvm_x86_ops->get_segment(vcpu, var, seg);
4162 }
4163 
4164 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4165                            struct x86_exception *exception)
4166 {
4167         gpa_t t_gpa;
4168 
4169         BUG_ON(!mmu_is_nested(vcpu));
4170 
4171         /* NPT walks are always user-walks */
4172         access |= PFERR_USER_MASK;
4173         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4174 
4175         return t_gpa;
4176 }
4177 
4178 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4179                               struct x86_exception *exception)
4180 {
4181         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4182         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4183 }
4184 
4185  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4186                                 struct x86_exception *exception)
4187 {
4188         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4189         access |= PFERR_FETCH_MASK;
4190         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4191 }
4192 
4193 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4194                                struct x86_exception *exception)
4195 {
4196         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4197         access |= PFERR_WRITE_MASK;
4198         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4199 }
4200 
4201 /* uses this to access any guest's mapped memory without checking CPL */
4202 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4203                                 struct x86_exception *exception)
4204 {
4205         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4206 }
4207 
4208 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4209                                       struct kvm_vcpu *vcpu, u32 access,
4210                                       struct x86_exception *exception)
4211 {
4212         void *data = val;
4213         int r = X86EMUL_CONTINUE;
4214 
4215         while (bytes) {
4216                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4217                                                             exception);
4218                 unsigned offset = addr & (PAGE_SIZE-1);
4219                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4220                 int ret;
4221 
4222                 if (gpa == UNMAPPED_GVA)
4223                         return X86EMUL_PROPAGATE_FAULT;
4224                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4225                                                offset, toread);
4226                 if (ret < 0) {
4227                         r = X86EMUL_IO_NEEDED;
4228                         goto out;
4229                 }
4230 
4231                 bytes -= toread;
4232                 data += toread;
4233                 addr += toread;
4234         }
4235 out:
4236         return r;
4237 }
4238 
4239 /* used for instruction fetching */
4240 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4241                                 gva_t addr, void *val, unsigned int bytes,
4242                                 struct x86_exception *exception)
4243 {
4244         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4245         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4246         unsigned offset;
4247         int ret;
4248 
4249         /* Inline kvm_read_guest_virt_helper for speed.  */
4250         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4251                                                     exception);
4252         if (unlikely(gpa == UNMAPPED_GVA))
4253                 return X86EMUL_PROPAGATE_FAULT;
4254 
4255         offset = addr & (PAGE_SIZE-1);
4256         if (WARN_ON(offset + bytes > PAGE_SIZE))
4257                 bytes = (unsigned)PAGE_SIZE - offset;
4258         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4259                                        offset, bytes);
4260         if (unlikely(ret < 0))
4261                 return X86EMUL_IO_NEEDED;
4262 
4263         return X86EMUL_CONTINUE;
4264 }
4265 
4266 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4267                                gva_t addr, void *val, unsigned int bytes,
4268                                struct x86_exception *exception)
4269 {
4270         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4271         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4272 
4273         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4274                                           exception);
4275 }
4276 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4277 
4278 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4279                                       gva_t addr, void *val, unsigned int bytes,
4280                                       struct x86_exception *exception)
4281 {
4282         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4283         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4284 }
4285 
4286 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4287                 unsigned long addr, void *val, unsigned int bytes)
4288 {
4289         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4290         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4291 
4292         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4293 }
4294 
4295 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4296                                        gva_t addr, void *val,
4297                                        unsigned int bytes,
4298                                        struct x86_exception *exception)
4299 {
4300         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4301         void *data = val;
4302         int r = X86EMUL_CONTINUE;
4303 
4304         while (bytes) {
4305                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4306                                                              PFERR_WRITE_MASK,
4307                                                              exception);
4308                 unsigned offset = addr & (PAGE_SIZE-1);
4309                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4310                 int ret;
4311 
4312                 if (gpa == UNMAPPED_GVA)
4313                         return X86EMUL_PROPAGATE_FAULT;
4314                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4315                 if (ret < 0) {
4316                         r = X86EMUL_IO_NEEDED;
4317                         goto out;
4318                 }
4319 
4320                 bytes -= towrite;
4321                 data += towrite;
4322                 addr += towrite;
4323         }
4324 out:
4325         return r;
4326 }
4327 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4328 
4329 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4330                                 gpa_t *gpa, struct x86_exception *exception,
4331                                 bool write)
4332 {
4333         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4334                 | (write ? PFERR_WRITE_MASK : 0);
4335 
4336         /*
4337          * currently PKRU is only applied to ept enabled guest so
4338          * there is no pkey in EPT page table for L1 guest or EPT
4339          * shadow page table for L2 guest.
4340          */
4341         if (vcpu_match_mmio_gva(vcpu, gva)
4342             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4343                                  vcpu->arch.access, 0, access)) {
4344                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4345                                         (gva & (PAGE_SIZE - 1));
4346                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4347                 return 1;
4348         }
4349 
4350         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4351 
4352         if (*gpa == UNMAPPED_GVA)
4353                 return -1;
4354 
4355         /* For APIC access vmexit */
4356         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4357                 return 1;
4358 
4359         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4360                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4361                 return 1;
4362         }
4363 
4364         return 0;
4365 }
4366 
4367 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4368                         const void *val, int bytes)
4369 {
4370         int ret;
4371 
4372         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4373         if (ret < 0)
4374                 return 0;
4375         kvm_page_track_write(vcpu, gpa, val, bytes);
4376         return 1;
4377 }
4378 
4379 struct read_write_emulator_ops {
4380         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4381                                   int bytes);
4382         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4383                                   void *val, int bytes);
4384         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4385                                int bytes, void *val);
4386         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4387                                     void *val, int bytes);
4388         bool write;
4389 };
4390 
4391 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4392 {
4393         if (vcpu->mmio_read_completed) {
4394                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4395                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4396                 vcpu->mmio_read_completed = 0;
4397                 return 1;
4398         }
4399 
4400         return 0;
4401 }
4402 
4403 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4404                         void *val, int bytes)
4405 {
4406         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4407 }
4408 
4409 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4410                          void *val, int bytes)
4411 {
4412         return emulator_write_phys(vcpu, gpa, val, bytes);
4413 }
4414 
4415 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4416 {
4417         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4418         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4419 }
4420 
4421 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4422                           void *val, int bytes)
4423 {
4424         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4425         return X86EMUL_IO_NEEDED;
4426 }
4427 
4428 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4429                            void *val, int bytes)
4430 {
4431         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4432 
4433         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4434         return X86EMUL_CONTINUE;
4435 }
4436 
4437 static const struct read_write_emulator_ops read_emultor = {
4438         .read_write_prepare = read_prepare,
4439         .read_write_emulate = read_emulate,
4440         .read_write_mmio = vcpu_mmio_read,
4441         .read_write_exit_mmio = read_exit_mmio,
4442 };
4443 
4444 static const struct read_write_emulator_ops write_emultor = {
4445         .read_write_emulate = write_emulate,
4446         .read_write_mmio = write_mmio,
4447         .read_write_exit_mmio = write_exit_mmio,
4448         .write = true,
4449 };
4450 
4451 static int emulator_read_write_onepage(unsigned long addr, void *val,
4452                                        unsigned int bytes,
4453                                        struct x86_exception *exception,
4454                                        struct kvm_vcpu *vcpu,
4455                                        const struct read_write_emulator_ops *ops)
4456 {
4457         gpa_t gpa;
4458         int handled, ret;
4459         bool write = ops->write;
4460         struct kvm_mmio_fragment *frag;
4461 
4462         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4463 
4464         if (ret < 0)
4465                 return X86EMUL_PROPAGATE_FAULT;
4466 
4467         /* For APIC access vmexit */
4468         if (ret)
4469                 goto mmio;
4470 
4471         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4472                 return X86EMUL_CONTINUE;
4473 
4474 mmio:
4475         /*
4476          * Is this MMIO handled locally?
4477          */
4478         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4479         if (handled == bytes)
4480                 return X86EMUL_CONTINUE;
4481 
4482         gpa += handled;
4483         bytes -= handled;
4484         val += handled;
4485 
4486         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4487         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4488         frag->gpa = gpa;
4489         frag->data = val;
4490         frag->len = bytes;
4491         return X86EMUL_CONTINUE;
4492 }
4493 
4494 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4495                         unsigned long addr,
4496                         void *val, unsigned int bytes,
4497                         struct x86_exception *exception,
4498                         const struct read_write_emulator_ops *ops)
4499 {
4500         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4501         gpa_t gpa;
4502         int rc;
4503 
4504         if (ops->read_write_prepare &&
4505                   ops->read_write_prepare(vcpu, val, bytes))
4506                 return X86EMUL_CONTINUE;
4507 
4508         vcpu->mmio_nr_fragments = 0;
4509 
4510         /* Crossing a page boundary? */
4511         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4512                 int now;
4513 
4514                 now = -addr & ~PAGE_MASK;
4515                 rc = emulator_read_write_onepage(addr, val, now, exception,
4516                                                  vcpu, ops);
4517 
4518                 if (rc != X86EMUL_CONTINUE)
4519                         return rc;
4520                 addr += now;
4521                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4522                         addr = (u32)addr;
4523                 val += now;
4524                 bytes -= now;
4525         }
4526 
4527         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4528                                          vcpu, ops);
4529         if (rc != X86EMUL_CONTINUE)
4530                 return rc;
4531 
4532         if (!vcpu->mmio_nr_fragments)
4533                 return rc;
4534 
4535         gpa = vcpu->mmio_fragments[0].gpa;
4536 
4537         vcpu->mmio_needed = 1;
4538         vcpu->mmio_cur_fragment = 0;
4539 
4540         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4541         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4542         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4543         vcpu->run->mmio.phys_addr = gpa;
4544 
4545         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4546 }
4547 
4548 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4549                                   unsigned long addr,
4550                                   void *val,
4551                                   unsigned int bytes,
4552                                   struct x86_exception *exception)
4553 {
4554         return emulator_read_write(ctxt, addr, val, bytes,
4555                                    exception, &read_emultor);
4556 }
4557 
4558 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4559                             unsigned long addr,
4560                             const void *val,
4561                             unsigned int bytes,
4562                             struct x86_exception *exception)
4563 {
4564         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4565                                    exception, &write_emultor);
4566 }
4567 
4568 #define CMPXCHG_TYPE(t, ptr, old, new) \
4569         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4570 
4571 #ifdef CONFIG_X86_64
4572 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4573 #else
4574 #  define CMPXCHG64(ptr, old, new) \
4575         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4576 #endif
4577 
4578 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4579                                      unsigned long addr,
4580                                      const void *old,
4581                                      const void *new,
4582                                      unsigned int bytes,
4583                                      struct x86_exception *exception)
4584 {
4585         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4586         gpa_t gpa;
4587         struct page *page;
4588         char *kaddr;
4589         bool exchanged;
4590 
4591         /* guests cmpxchg8b have to be emulated atomically */
4592         if (bytes > 8 || (bytes & (bytes - 1)))
4593                 goto emul_write;
4594 
4595         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4596 
4597         if (gpa == UNMAPPED_GVA ||
4598             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4599                 goto emul_write;
4600 
4601         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4602                 goto emul_write;
4603 
4604         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4605         if (is_error_page(page))
4606                 goto emul_write;
4607 
4608         kaddr = kmap_atomic(page);
4609         kaddr += offset_in_page(gpa);
4610         switch (bytes) {
4611         case 1:
4612                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4613                 break;
4614         case 2:
4615                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4616                 break;
4617         case 4:
4618                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4619                 break;
4620         case 8:
4621                 exchanged = CMPXCHG64(kaddr, old, new);
4622                 break;
4623         default:
4624                 BUG();
4625         }
4626         kunmap_atomic(kaddr);
4627         kvm_release_page_dirty(page);
4628 
4629         if (!exchanged)
4630                 return X86EMUL_CMPXCHG_FAILED;
4631 
4632         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4633         kvm_page_track_write(vcpu, gpa, new, bytes);
4634 
4635         return X86EMUL_CONTINUE;
4636 
4637 emul_write:
4638         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4639 
4640         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4641 }
4642 
4643 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4644 {
4645         /* TODO: String I/O for in kernel device */
4646         int r;
4647 
4648         if (vcpu->arch.pio.in)
4649                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4650                                     vcpu->arch.pio.size, pd);
4651         else
4652                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4653                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4654                                      pd);
4655         return r;
4656 }
4657 
4658 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4659                                unsigned short port, void *val,
4660                                unsigned int count, bool in)
4661 {
4662         vcpu->arch.pio.port = port;
4663         vcpu->arch.pio.in = in;
4664         vcpu->arch.pio.count  = count;
4665         vcpu->arch.pio.size = size;
4666 
4667         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4668                 vcpu->arch.pio.count = 0;
4669                 return 1;
4670         }
4671 
4672         vcpu->run->exit_reason = KVM_EXIT_IO;
4673         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4674         vcpu->run->io.size = size;
4675         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4676         vcpu->run->io.count = count;
4677         vcpu->run->io.port = port;
4678 
4679         return 0;
4680 }
4681 
4682 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4683                                     int size, unsigned short port, void *val,
4684                                     unsigned int count)
4685 {
4686         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4687         int ret;
4688 
4689         if (vcpu->arch.pio.count)
4690                 goto data_avail;
4691 
4692         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4693         if (ret) {
4694 data_avail:
4695                 memcpy(val, vcpu->arch.pio_data, size * count);
4696                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4697                 vcpu->arch.pio.count = 0;
4698                 return 1;
4699         }
4700 
4701         return 0;
4702 }
4703 
4704 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4705                                      int size, unsigned short port,
4706                                      const void *val, unsigned int count)
4707 {
4708         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4709 
4710         memcpy(vcpu->arch.pio_data, val, size * count);
4711         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4712         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4713 }
4714 
4715 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4716 {
4717         return kvm_x86_ops->get_segment_base(vcpu, seg);
4718 }
4719 
4720 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4721 {
4722         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4723 }
4724 
4725 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4726 {
4727         if (!need_emulate_wbinvd(vcpu))
4728                 return X86EMUL_CONTINUE;
4729 
4730         if (kvm_x86_ops->has_wbinvd_exit()) {
4731                 int cpu = get_cpu();
4732 
4733                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4734                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4735                                 wbinvd_ipi, NULL, 1);
4736                 put_cpu();
4737                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4738         } else
4739                 wbinvd();
4740         return X86EMUL_CONTINUE;
4741 }
4742 
4743 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4744 {
4745         kvm_x86_ops->skip_emulated_instruction(vcpu);
4746         return kvm_emulate_wbinvd_noskip(vcpu);
4747 }
4748 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4749 
4750 
4751 
4752 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4753 {
4754         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4755 }
4756 
4757 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4758                            unsigned long *dest)
4759 {
4760         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4761 }
4762 
4763 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4764                            unsigned long value)
4765 {
4766 
4767         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4768 }
4769 
4770 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4771 {
4772         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4773 }
4774 
4775 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4776 {
4777         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4778         unsigned long value;
4779 
4780         switch (cr) {
4781         case 0:
4782                 value = kvm_read_cr0(vcpu);
4783                 break;
4784         case 2:
4785                 value = vcpu->arch.cr2;
4786                 break;
4787         case 3:
4788                 value = kvm_read_cr3(vcpu);
4789                 break;
4790         case 4:
4791                 value = kvm_read_cr4(vcpu);
4792                 break;
4793         case 8:
4794                 value = kvm_get_cr8(vcpu);
4795                 break;
4796         default:
4797                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4798                 return 0;
4799         }
4800 
4801         return value;
4802 }
4803 
4804 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4805 {
4806         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4807         int res = 0;
4808 
4809         switch (cr) {
4810         case 0:
4811                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4812                 break;
4813         case 2:
4814                 vcpu->arch.cr2 = val;
4815                 break;
4816         case 3:
4817                 res = kvm_set_cr3(vcpu, val);
4818                 break;
4819         case 4:
4820                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4821                 break;
4822         case 8:
4823                 res = kvm_set_cr8(vcpu, val);
4824                 break;
4825         default:
4826                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4827                 res = -1;
4828         }
4829 
4830         return res;
4831 }
4832 
4833 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4834 {
4835         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4836 }
4837 
4838 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4839 {
4840         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4841 }
4842 
4843 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4844 {
4845         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4846 }
4847 
4848 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4849 {
4850         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4851 }
4852 
4853 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4854 {
4855         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4856 }
4857 
4858 static unsigned long emulator_get_cached_segment_base(
4859         struct x86_emulate_ctxt *ctxt, int seg)
4860 {
4861         return get_segment_base(emul_to_vcpu(ctxt), seg);
4862 }
4863 
4864 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4865                                  struct desc_struct *desc, u32 *base3,
4866                                  int seg)
4867 {
4868         struct kvm_segment var;
4869 
4870         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4871         *selector = var.selector;
4872 
4873         if (var.unusable) {
4874                 memset(desc, 0, sizeof(*desc));
4875                 return false;
4876         }
4877 
4878         if (var.g)
4879                 var.limit >>= 12;
4880         set_desc_limit(desc, var.limit);
4881         set_desc_base(desc, (unsigned long)var.base);
4882 #ifdef CONFIG_X86_64
4883         if (base3)
4884                 *base3 = var.base >> 32;
4885 #endif
4886         desc->type = var.type;
4887         desc->s = var.s;
4888         desc->dpl = var.dpl;
4889         desc->p = var.present;
4890         desc->avl = var.avl;
4891         desc->l = var.l;
4892         desc->d = var.db;
4893         desc->g = var.g;
4894 
4895         return true;
4896 }
4897 
4898 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4899                                  struct desc_struct *desc, u32 base3,
4900                                  int seg)
4901 {
4902         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4903         struct kvm_segment var;
4904 
4905         var.selector = selector;
4906         var.base = get_desc_base(desc);
4907 #ifdef CONFIG_X86_64
4908         var.base |= ((u64)base3) << 32;
4909 #endif
4910         var.limit = get_desc_limit(desc);
4911         if (desc->g)
4912                 var.limit = (var.limit << 12) | 0xfff;
4913         var.type = desc->type;
4914         var.dpl = desc->dpl;
4915         var.db = desc->d;
4916         var.s = desc->s;
4917         var.l = desc->l;
4918         var.g = desc->g;
4919         var.avl = desc->avl;
4920         var.present = desc->p;
4921         var.unusable = !var.present;
4922         var.padding = 0;
4923 
4924         kvm_set_segment(vcpu, &var, seg);
4925         return;
4926 }
4927 
4928 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4929                             u32 msr_index, u64 *pdata)
4930 {
4931         struct msr_data msr;
4932         int r;
4933 
4934         msr.index = msr_index;
4935         msr.host_initiated = false;
4936         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4937         if (r)
4938                 return r;
4939 
4940         *pdata = msr.data;
4941         return 0;
4942 }
4943 
4944 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4945                             u32 msr_index, u64 data)
4946 {
4947         struct msr_data msr;
4948 
4949         msr.data = data;
4950         msr.index = msr_index;
4951         msr.host_initiated = false;
4952         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4953 }
4954 
4955 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4956 {
4957         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4958 
4959         return vcpu->arch.smbase;
4960 }
4961 
4962 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4963 {
4964         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4965 
4966         vcpu->arch.smbase = smbase;
4967 }
4968 
4969 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4970                               u32 pmc)
4971 {
4972         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4973 }
4974 
4975 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4976                              u32 pmc, u64 *pdata)
4977 {
4978         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4979 }
4980 
4981 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4982 {
4983         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4984 }
4985 
4986 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4987 {
4988         preempt_disable();
4989         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4990         /*
4991          * CR0.TS may reference the host fpu state, not the guest fpu state,
4992          * so it may be clear at this point.
4993          */
4994         clts();
4995 }
4996 
4997 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4998 {
4999         preempt_enable();
5000 }
5001 
5002 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5003                               struct x86_instruction_info *info,
5004                               enum x86_intercept_stage stage)
5005 {
5006         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5007 }
5008 
5009 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5010                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5011 {
5012         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5013 }
5014 
5015 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5016 {
5017         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5018 }
5019 
5020 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5021 {
5022         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5023 }
5024 
5025 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5026 {
5027         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5028 }
5029 
5030 static const struct x86_emulate_ops emulate_ops = {
5031         .read_gpr            = emulator_read_gpr,
5032         .write_gpr           = emulator_write_gpr,
5033         .read_std            = kvm_read_guest_virt_system,
5034         .write_std           = kvm_write_guest_virt_system,
5035         .read_phys           = kvm_read_guest_phys_system,
5036         .fetch               = kvm_fetch_guest_virt,
5037         .read_emulated       = emulator_read_emulated,
5038         .write_emulated      = emulator_write_emulated,
5039         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5040         .invlpg              = emulator_invlpg,
5041         .pio_in_emulated     = emulator_pio_in_emulated,
5042         .pio_out_emulated    = emulator_pio_out_emulated,
5043         .get_segment         = emulator_get_segment,
5044         .set_segment         = emulator_set_segment,
5045         .get_cached_segment_base = emulator_get_cached_segment_base,
5046         .get_gdt             = emulator_get_gdt,
5047         .get_idt             = emulator_get_idt,
5048         .set_gdt             = emulator_set_gdt,
5049         .set_idt             = emulator_set_idt,
5050         .get_cr              = emulator_get_cr,
5051         .set_cr              = emulator_set_cr,
5052         .cpl                 = emulator_get_cpl,
5053         .get_dr              = emulator_get_dr,
5054         .set_dr              = emulator_set_dr,
5055         .get_smbase          = emulator_get_smbase,
5056         .set_smbase          = emulator_set_smbase,
5057         .set_msr             = emulator_set_msr,
5058         .get_msr             = emulator_get_msr,
5059         .check_pmc           = emulator_check_pmc,
5060         .read_pmc            = emulator_read_pmc,
5061         .halt                = emulator_halt,
5062         .wbinvd              = emulator_wbinvd,
5063         .fix_hypercall       = emulator_fix_hypercall,
5064         .get_fpu             = emulator_get_fpu,
5065         .put_fpu             = emulator_put_fpu,
5066         .intercept           = emulator_intercept,
5067         .get_cpuid           = emulator_get_cpuid,
5068         .set_nmi_mask        = emulator_set_nmi_mask,
5069 };
5070 
5071 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5072 {
5073         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5074         /*
5075          * an sti; sti; sequence only disable interrupts for the first
5076          * instruction. So, if the last instruction, be it emulated or
5077          * not, left the system with the INT_STI flag enabled, it
5078          * means that the last instruction is an sti. We should not
5079          * leave the flag on in this case. The same goes for mov ss
5080          */
5081         if (int_shadow & mask)
5082                 mask = 0;
5083         if (unlikely(int_shadow || mask)) {
5084                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5085                 if (!mask)
5086                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5087         }
5088 }
5089 
5090 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5091 {
5092         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5093         if (ctxt->exception.vector == PF_VECTOR)
5094                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5095 
5096         if (ctxt->exception.error_code_valid)
5097                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5098                                       ctxt->exception.error_code);
5099         else
5100                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5101         return false;
5102 }
5103 
5104 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5105 {
5106         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5107         int cs_db, cs_l;
5108 
5109         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5110 
5111         ctxt->eflags = kvm_get_rflags(vcpu);
5112         ctxt->eip = kvm_rip_read(vcpu);
5113         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5114                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5115                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5116                      cs_db                              ? X86EMUL_MODE_PROT32 :
5117                                                           X86EMUL_MODE_PROT16;
5118         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5119         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5120         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5121         ctxt->emul_flags = vcpu->arch.hflags;
5122 
5123         init_decode_cache(ctxt);
5124         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5125 }
5126 
5127 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5128 {
5129         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5130         int ret;
5131 
5132         init_emulate_ctxt(vcpu);
5133 
5134         ctxt->op_bytes = 2;
5135         ctxt->ad_bytes = 2;
5136         ctxt->_eip = ctxt->eip + inc_eip;
5137         ret = emulate_int_real(ctxt, irq);
5138 
5139         if (ret != X86EMUL_CONTINUE)
5140                 return EMULATE_FAIL;
5141 
5142         ctxt->eip = ctxt->_eip;
5143         kvm_rip_write(vcpu, ctxt->eip);
5144         kvm_set_rflags(vcpu, ctxt->eflags);
5145 
5146         if (irq == NMI_VECTOR)
5147                 vcpu->arch.nmi_pending = 0;
5148         else
5149                 vcpu->arch.interrupt.pending = false;
5150 
5151         return EMULATE_DONE;
5152 }
5153 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5154 
5155 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5156 {
5157         int r = EMULATE_DONE;
5158 
5159         ++vcpu->stat.insn_emulation_fail;
5160         trace_kvm_emulate_insn_failed(vcpu);
5161         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5162                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5163                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5164                 vcpu->run->internal.ndata = 0;
5165                 r = EMULATE_FAIL;
5166         }
5167         kvm_queue_exception(vcpu, UD_VECTOR);
5168 
5169         return r;
5170 }
5171 
5172 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5173                                   bool write_fault_to_shadow_pgtable,
5174                                   int emulation_type)
5175 {
5176         gpa_t gpa = cr2;
5177         kvm_pfn_t pfn;
5178 
5179         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5180                 return false;
5181 
5182         if (!vcpu->arch.mmu.direct_map) {
5183                 /*
5184                  * Write permission should be allowed since only
5185                  * write access need to be emulated.
5186                  */
5187                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5188 
5189                 /*
5190                  * If the mapping is invalid in guest, let cpu retry
5191                  * it to generate fault.
5192                  */
5193                 if (gpa == UNMAPPED_GVA)
5194                         return true;
5195         }
5196 
5197         /*
5198          * Do not retry the unhandleable instruction if it faults on the
5199          * readonly host memory, otherwise it will goto a infinite loop:
5200          * retry instruction -> write #PF -> emulation fail -> retry
5201          * instruction -> ...
5202          */
5203         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5204 
5205         /*
5206          * If the instruction failed on the error pfn, it can not be fixed,
5207          * report the error to userspace.
5208          */
5209         if (is_error_noslot_pfn(pfn))
5210                 return false;
5211 
5212         kvm_release_pfn_clean(pfn);
5213 
5214         /* The instructions are well-emulated on direct mmu. */
5215         if (vcpu->arch.mmu.direct_map) {
5216                 unsigned int indirect_shadow_pages;
5217 
5218                 spin_lock(&vcpu->kvm->mmu_lock);
5219                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5220                 spin_unlock(&vcpu->kvm->mmu_lock);
5221 
5222                 if (indirect_shadow_pages)
5223                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5224 
5225                 return true;
5226         }
5227 
5228         /*
5229          * if emulation was due to access to shadowed page table
5230          * and it failed try to unshadow page and re-enter the
5231          * guest to let CPU execute the instruction.
5232          */
5233         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5234 
5235         /*
5236          * If the access faults on its page table, it can not
5237          * be fixed by unprotecting shadow page and it should
5238          * be reported to userspace.
5239          */
5240         return !write_fault_to_shadow_pgtable;
5241 }
5242 
5243 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5244                               unsigned long cr2,  int emulation_type)
5245 {
5246         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5247         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5248 
5249         last_retry_eip = vcpu->arch.last_retry_eip;
5250         last_retry_addr = vcpu->arch.last_retry_addr;
5251 
5252         /*
5253          * If the emulation is caused by #PF and it is non-page_table
5254          * writing instruction, it means the VM-EXIT is caused by shadow
5255          * page protected, we can zap the shadow page and retry this
5256          * instruction directly.
5257          *
5258          * Note: if the guest uses a non-page-table modifying instruction
5259          * on the PDE that points to the instruction, then we will unmap
5260          * the instruction and go to an infinite loop. So, we cache the
5261          * last retried eip and the last fault address, if we meet the eip
5262          * and the address again, we can break out of the potential infinite
5263          * loop.
5264          */
5265         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5266 
5267         if (!(emulation_type & EMULTYPE_RETRY))
5268                 return false;
5269 
5270         if (x86_page_table_writing_insn(ctxt))
5271                 return false;
5272 
5273         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5274                 return false;
5275 
5276         vcpu->arch.last_retry_eip = ctxt->eip;
5277         vcpu->arch.last_retry_addr = cr2;
5278 
5279         if (!vcpu->arch.mmu.direct_map)
5280                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5281 
5282         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5283 
5284         return true;
5285 }
5286 
5287 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5288 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5289 
5290 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5291 {
5292         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5293                 /* This is a good place to trace that we are exiting SMM.  */
5294                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5295 
5296                 if (unlikely(vcpu->arch.smi_pending)) {
5297                         kvm_make_request(KVM_REQ_SMI, vcpu);
5298                         vcpu->arch.smi_pending = 0;
5299                 } else {
5300                         /* Process a latched INIT, if any.  */
5301                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5302                 }
5303         }
5304 
5305         kvm_mmu_reset_context(vcpu);
5306 }
5307 
5308 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5309 {
5310         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5311 
5312         vcpu->arch.hflags = emul_flags;
5313 
5314         if (changed & HF_SMM_MASK)
5315                 kvm_smm_changed(vcpu);
5316 }
5317 
5318 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5319                                 unsigned long *db)
5320 {
5321         u32 dr6 = 0;
5322         int i;
5323         u32 enable, rwlen;
5324 
5325         enable = dr7;
5326         rwlen = dr7 >> 16;
5327         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5328                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5329                         dr6 |= (1 << i);
5330         return dr6;
5331 }
5332 
5333 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5334 {
5335         struct kvm_run *kvm_run = vcpu->run;
5336 
5337         /*
5338          * rflags is the old, "raw" value of the flags.  The new value has
5339          * not been saved yet.
5340          *
5341          * This is correct even for TF set by the guest, because "the
5342          * processor will not generate this exception after the instruction
5343          * that sets the TF flag".
5344          */
5345         if (unlikely(rflags & X86_EFLAGS_TF)) {
5346                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5347                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5348                                                   DR6_RTM;
5349                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5350                         kvm_run->debug.arch.exception = DB_VECTOR;
5351                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5352                         *r = EMULATE_USER_EXIT;
5353                 } else {
5354                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5355                         /*
5356                          * "Certain debug exceptions may clear bit 0-3.  The
5357                          * remaining contents of the DR6 register are never
5358                          * cleared by the processor".
5359                          */
5360                         vcpu->arch.dr6 &= ~15;
5361                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5362                         kvm_queue_exception(vcpu, DB_VECTOR);
5363                 }
5364         }
5365 }
5366 
5367 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5368 {
5369         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5370             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5371                 struct kvm_run *kvm_run = vcpu->run;
5372                 unsigned long eip = kvm_get_linear_rip(vcpu);
5373                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5374                                            vcpu->arch.guest_debug_dr7,
5375                                            vcpu->arch.eff_db);
5376 
5377                 if (dr6 != 0) {
5378                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5379                         kvm_run->debug.arch.pc = eip;
5380                         kvm_run->debug.arch.exception = DB_VECTOR;
5381                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5382                         *r = EMULATE_USER_EXIT;
5383                         return true;
5384                 }
5385         }
5386 
5387         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5388             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5389                 unsigned long eip = kvm_get_linear_rip(vcpu);
5390                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5391                                            vcpu->arch.dr7,
5392                                            vcpu->arch.db);
5393 
5394                 if (dr6 != 0) {
5395                         vcpu->arch.dr6 &= ~15;
5396                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5397                         kvm_queue_exception(vcpu, DB_VECTOR);
5398                         *r = EMULATE_DONE;
5399                         return true;
5400                 }
5401         }
5402 
5403         return false;
5404 }
5405 
5406 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5407                             unsigned long cr2,
5408                             int emulation_type,
5409                             void *insn,
5410                             int insn_len)
5411 {
5412         int r;
5413         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5414         bool writeback = true;
5415         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5416 
5417         /*
5418          * Clear write_fault_to_shadow_pgtable here to ensure it is
5419          * never reused.
5420          */
5421         vcpu->arch.write_fault_to_shadow_pgtable = false;
5422         kvm_clear_exception_queue(vcpu);
5423 
5424         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5425                 init_emulate_ctxt(vcpu);
5426 
5427                 /*
5428                  * We will reenter on the same instruction since
5429                  * we do not set complete_userspace_io.  This does not
5430                  * handle watchpoints yet, those would be handled in
5431                  * the emulate_ops.
5432                  */
5433                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5434                         return r;
5435 
5436                 ctxt->interruptibility = 0;
5437                 ctxt->have_exception = false;
5438                 ctxt->exception.vector = -1;
5439                 ctxt->perm_ok = false;
5440 
5441                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5442 
5443                 r = x86_decode_insn(ctxt, insn, insn_len);
5444 
5445                 trace_kvm_emulate_insn_start(vcpu);
5446                 ++vcpu->stat.insn_emulation;
5447                 if (r != EMULATION_OK)  {
5448                         if (emulation_type & EMULTYPE_TRAP_UD)
5449                                 return EMULATE_FAIL;
5450                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5451                                                 emulation_type))
5452                                 return EMULATE_DONE;
5453                         if (emulation_type & EMULTYPE_SKIP)
5454                                 return EMULATE_FAIL;
5455                         return handle_emulation_failure(vcpu);
5456                 }
5457         }
5458 
5459         if (emulation_type & EMULTYPE_SKIP) {
5460                 kvm_rip_write(vcpu, ctxt->_eip);
5461                 if (ctxt->eflags & X86_EFLAGS_RF)
5462                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5463                 return EMULATE_DONE;
5464         }
5465 
5466         if (retry_instruction(ctxt, cr2, emulation_type))
5467                 return EMULATE_DONE;
5468 
5469         /* this is needed for vmware backdoor interface to work since it
5470            changes registers values  during IO operation */
5471         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5472                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5473                 emulator_invalidate_register_cache(ctxt);
5474         }
5475 
5476 restart:
5477         r = x86_emulate_insn(ctxt);
5478 
5479         if (r == EMULATION_INTERCEPTED)
5480                 return EMULATE_DONE;
5481 
5482         if (r == EMULATION_FAILED) {
5483                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5484                                         emulation_type))
5485                         return EMULATE_DONE;
5486 
5487                 return handle_emulation_failure(vcpu);
5488         }
5489 
5490         if (ctxt->have_exception) {
5491                 r = EMULATE_DONE;
5492                 if (inject_emulated_exception(vcpu))
5493                         return r;
5494         } else if (vcpu->arch.pio.count) {
5495                 if (!vcpu->arch.pio.in) {
5496                         /* FIXME: return into emulator if single-stepping.  */
5497                         vcpu->arch.pio.count = 0;
5498                 } else {
5499                         writeback = false;
5500                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5501                 }
5502                 r = EMULATE_USER_EXIT;
5503         } else if (vcpu->mmio_needed) {
5504                 if (!vcpu->mmio_is_write)
5505                         writeback = false;
5506                 r = EMULATE_USER_EXIT;
5507                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5508         } else if (r == EMULATION_RESTART)
5509                 goto restart;
5510         else
5511                 r = EMULATE_DONE;
5512 
5513         if (writeback) {
5514                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5515                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5516                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5517                 if (vcpu->arch.hflags != ctxt->emul_flags)
5518                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5519                 kvm_rip_write(vcpu, ctxt->eip);
5520                 if (r == EMULATE_DONE)
5521                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5522                 if (!ctxt->have_exception ||
5523                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5524                         __kvm_set_rflags(vcpu, ctxt->eflags);
5525 
5526                 /*
5527                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5528                  * do nothing, and it will be requested again as soon as
5529                  * the shadow expires.  But we still need to check here,
5530                  * because POPF has no interrupt shadow.
5531                  */
5532                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5533                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5534         } else
5535                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5536 
5537         return r;
5538 }
5539 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5540 
5541 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5542 {
5543         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5544         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5545                                             size, port, &val, 1);
5546         /* do not return to emulator after return from userspace */
5547         vcpu->arch.pio.count = 0;
5548         return ret;
5549 }
5550 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5551 
5552 static void tsc_bad(void *info)
5553 {
5554         __this_cpu_write(cpu_tsc_khz, 0);
5555 }
5556 
5557 static void tsc_khz_changed(void *data)
5558 {
5559         struct cpufreq_freqs *freq = data;
5560         unsigned long khz = 0;
5561 
5562         if (data)
5563                 khz = freq->new;
5564         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5565                 khz = cpufreq_quick_get(raw_smp_processor_id());
5566         if (!khz)
5567                 khz = tsc_khz;
5568         __this_cpu_write(cpu_tsc_khz, khz);
5569 }
5570 
5571 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5572                                      void *data)
5573 {
5574         struct cpufreq_freqs *freq = data;
5575         struct kvm *kvm;
5576         struct kvm_vcpu *vcpu;
5577         int i, send_ipi = 0;
5578 
5579         /*
5580          * We allow guests to temporarily run on slowing clocks,
5581          * provided we notify them after, or to run on accelerating
5582          * clocks, provided we notify them before.  Thus time never
5583          * goes backwards.
5584          *
5585          * However, we have a problem.  We can't atomically update
5586          * the frequency of a given CPU from this function; it is
5587          * merely a notifier, which can be called from any CPU.
5588          * Changing the TSC frequency at arbitrary points in time
5589          * requires a recomputation of local variables related to
5590          * the TSC for each VCPU.  We must flag these local variables
5591          * to be updated and be sure the update takes place with the
5592          * new frequency before any guests proceed.
5593          *
5594          * Unfortunately, the combination of hotplug CPU and frequency
5595          * change creates an intractable locking scenario; the order
5596          * of when these callouts happen is undefined with respect to
5597          * CPU hotplug, and they can race with each other.  As such,
5598          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5599          * undefined; you can actually have a CPU frequency change take
5600          * place in between the computation of X and the setting of the
5601          * variable.  To protect against this problem, all updates of
5602          * the per_cpu tsc_khz variable are done in an interrupt
5603          * protected IPI, and all callers wishing to update the value
5604          * must wait for a synchronous IPI to complete (which is trivial
5605          * if the caller is on the CPU already).  This establishes the
5606          * necessary total order on variable updates.
5607          *
5608          * Note that because a guest time update may take place
5609          * anytime after the setting of the VCPU's request bit, the
5610          * correct TSC value must be set before the request.  However,
5611          * to ensure the update actually makes it to any guest which
5612          * starts running in hardware virtualization between the set
5613          * and the acquisition of the spinlock, we must also ping the
5614          * CPU after setting the request bit.
5615          *
5616          */
5617 
5618         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5619                 return 0;
5620         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5621                 return 0;
5622 
5623         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5624 
5625         spin_lock(&kvm_lock);
5626         list_for_each_entry(kvm, &vm_list, vm_list) {
5627                 kvm_for_each_vcpu(i, vcpu, kvm) {
5628                         if (vcpu->cpu != freq->cpu)
5629                                 continue;
5630                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5631                         if (vcpu->cpu != smp_processor_id())
5632                                 send_ipi = 1;
5633                 }
5634         }
5635         spin_unlock(&kvm_lock);
5636 
5637         if (freq->old < freq->new && send_ipi) {
5638                 /*
5639                  * We upscale the frequency.  Must make the guest
5640                  * doesn't see old kvmclock values while running with
5641                  * the new frequency, otherwise we risk the guest sees
5642                  * time go backwards.
5643                  *
5644                  * In case we update the frequency for another cpu
5645                  * (which might be in guest context) send an interrupt
5646                  * to kick the cpu out of guest context.  Next time
5647                  * guest context is entered kvmclock will be updated,
5648                  * so the guest will not see stale values.
5649                  */
5650                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5651         }
5652         return 0;
5653 }
5654 
5655 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5656         .notifier_call  = kvmclock_cpufreq_notifier
5657 };
5658 
5659 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5660                                         unsigned long action, void *hcpu)
5661 {
5662         unsigned int cpu = (unsigned long)hcpu;
5663 
5664         switch (action) {
5665                 case CPU_ONLINE:
5666                 case CPU_DOWN_FAILED:
5667                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5668                         break;
5669                 case CPU_DOWN_PREPARE:
5670                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5671                         break;
5672         }
5673         return NOTIFY_OK;
5674 }
5675 
5676 static struct notifier_block kvmclock_cpu_notifier_block = {
5677         .notifier_call  = kvmclock_cpu_notifier,
5678         .priority = -INT_MAX
5679 };
5680 
5681 static void kvm_timer_init(void)
5682 {
5683         int cpu;
5684 
5685         max_tsc_khz = tsc_khz;
5686 
5687         cpu_notifier_register_begin();
5688         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5689 #ifdef CONFIG_CPU_FREQ
5690                 struct cpufreq_policy policy;
5691                 memset(&policy, 0, sizeof(policy));
5692                 cpu = get_cpu();
5693                 cpufreq_get_policy(&policy, cpu);
5694                 if (policy.cpuinfo.max_freq)
5695                         max_tsc_khz = policy.cpuinfo.max_freq;
5696                 put_cpu();
5697 #endif
5698                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5699                                           CPUFREQ_TRANSITION_NOTIFIER);
5700         }
5701         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5702         for_each_online_cpu(cpu)
5703                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5704 
5705         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5706         cpu_notifier_register_done();
5707 
5708 }
5709 
5710 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5711 
5712 int kvm_is_in_guest(void)
5713 {
5714         return __this_cpu_read(current_vcpu) != NULL;
5715 }
5716 
5717 static int kvm_is_user_mode(void)
5718 {
5719         int user_mode = 3;
5720 
5721         if (__this_cpu_read(current_vcpu))
5722                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5723 
5724         return user_mode != 0;
5725 }
5726 
5727 static unsigned long kvm_get_guest_ip(void)
5728 {
5729         unsigned long ip = 0;
5730 
5731         if (__this_cpu_read(current_vcpu))
5732                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5733 
5734         return ip;
5735 }
5736 
5737 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5738         .is_in_guest            = kvm_is_in_guest,
5739         .is_user_mode           = kvm_is_user_mode,
5740         .get_guest_ip           = kvm_get_guest_ip,
5741 };
5742 
5743 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5744 {
5745         __this_cpu_write(current_vcpu, vcpu);
5746 }
5747 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5748 
5749 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5750 {
5751         __this_cpu_write(current_vcpu, NULL);
5752 }
5753 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5754 
5755 static void kvm_set_mmio_spte_mask(void)
5756 {
5757         u64 mask;
5758         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5759 
5760         /*
5761          * Set the reserved bits and the present bit of an paging-structure
5762          * entry to generate page fault with PFER.RSV = 1.
5763          */
5764          /* Mask the reserved physical address bits. */
5765         mask = rsvd_bits(maxphyaddr, 51);
5766 
5767         /* Bit 62 is always reserved for 32bit host. */
5768         mask |= 0x3ull << 62;
5769 
5770         /* Set the present bit. */
5771         mask |= 1ull;
5772 
5773 #ifdef CONFIG_X86_64
5774         /*
5775          * If reserved bit is not supported, clear the present bit to disable
5776          * mmio page fault.
5777          */
5778         if (maxphyaddr == 52)
5779                 mask &= ~1ull;
5780 #endif
5781 
5782         kvm_mmu_set_mmio_spte_mask(mask);
5783 }
5784 
5785 #ifdef CONFIG_X86_64
5786 static void pvclock_gtod_update_fn(struct work_struct *work)
5787 {
5788         struct kvm *kvm;
5789 
5790         struct kvm_vcpu *vcpu;
5791         int i;
5792 
5793         spin_lock(&kvm_lock);
5794         list_for_each_entry(kvm, &vm_list, vm_list)
5795                 kvm_for_each_vcpu(i, vcpu, kvm)
5796                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5797         atomic_set(&kvm_guest_has_master_clock, 0);
5798         spin_unlock(&kvm_lock);
5799 }
5800 
5801 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5802 
5803 /*
5804  * Notification about pvclock gtod data update.
5805  */
5806 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5807                                void *priv)
5808 {
5809         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5810         struct timekeeper *tk = priv;
5811 
5812         update_pvclock_gtod(tk);
5813 
5814         /* disable master clock if host does not trust, or does not
5815          * use, TSC clocksource
5816          */
5817         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5818             atomic_read(&kvm_guest_has_master_clock) != 0)
5819                 queue_work(system_long_wq, &pvclock_gtod_work);
5820 
5821         return 0;
5822 }
5823 
5824 static struct notifier_block pvclock_gtod_notifier = {
5825         .notifier_call = pvclock_gtod_notify,
5826 };
5827 #endif
5828 
5829 int kvm_arch_init(void *opaque)
5830 {
5831         int r;
5832         struct kvm_x86_ops *ops = opaque;
5833 
5834         if (kvm_x86_ops) {
5835                 printk(KERN_ERR "kvm: already loaded the other module\n");
5836                 r = -EEXIST;
5837                 goto out;
5838         }
5839 
5840         if (!ops->cpu_has_kvm_support()) {
5841                 printk(KERN_ERR "kvm: no hardware support\n");
5842                 r = -EOPNOTSUPP;
5843                 goto out;
5844         }
5845         if (ops->disabled_by_bios()) {
5846                 printk(KERN_ERR "kvm: disabled by bios\n");
5847                 r = -EOPNOTSUPP;
5848                 goto out;
5849         }
5850 
5851         r = -ENOMEM;
5852         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5853         if (!shared_msrs) {
5854                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5855                 goto out;
5856         }
5857 
5858         r = kvm_mmu_module_init();
5859         if (r)
5860                 goto out_free_percpu;
5861 
5862         kvm_set_mmio_spte_mask();
5863 
5864         kvm_x86_ops = ops;
5865 
5866         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5867                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5868 
5869         kvm_timer_init();
5870 
5871         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5872 
5873         if (cpu_has_xsave)
5874                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5875 
5876         kvm_lapic_init();
5877 #ifdef CONFIG_X86_64
5878         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5879 #endif
5880 
5881         return 0;
5882 
5883 out_free_percpu:
5884         free_percpu(shared_msrs);
5885 out:
5886         return r;
5887 }
5888 
5889 void kvm_arch_exit(void)
5890 {
5891         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5892 
5893         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5894                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5895                                             CPUFREQ_TRANSITION_NOTIFIER);
5896         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5897 #ifdef CONFIG_X86_64
5898         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5899 #endif
5900         kvm_x86_ops = NULL;
5901         kvm_mmu_module_exit();
5902         free_percpu(shared_msrs);
5903 }
5904 
5905 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5906 {
5907         ++vcpu->stat.halt_exits;
5908         if (lapic_in_kernel(vcpu)) {
5909                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;