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TOMOYO Linux Cross Reference
Linux/arch/x86/lguest/boot.c

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  1 /*P:010
  2  * A hypervisor allows multiple Operating Systems to run on a single machine.
  3  * To quote David Wheeler: "Any problem in computer science can be solved with
  4  * another layer of indirection."
  5  *
  6  * We keep things simple in two ways.  First, we start with a normal Linux
  7  * kernel and insert a module (lg.ko) which allows us to run other Linux
  8  * kernels the same way we'd run processes.  We call the first kernel the Host,
  9  * and the others the Guests.  The program which sets up and configures Guests
 10  * (such as the example in tools/lguest/lguest.c) is called the Launcher.
 11  *
 12  * Secondly, we only run specially modified Guests, not normal kernels: setting
 13  * CONFIG_LGUEST_GUEST to "y" compiles this file into the kernel so it knows
 14  * how to be a Guest at boot time.  This means that you can use the same kernel
 15  * you boot normally (ie. as a Host) as a Guest.
 16  *
 17  * These Guests know that they cannot do privileged operations, such as disable
 18  * interrupts, and that they have to ask the Host to do such things explicitly.
 19  * This file consists of all the replacements for such low-level native
 20  * hardware operations: these special Guest versions call the Host.
 21  *
 22  * So how does the kernel know it's a Guest?  We'll see that later, but let's
 23  * just say that we end up here where we replace the native functions various
 24  * "paravirt" structures with our Guest versions, then boot like normal.
 25 :*/
 26 
 27 /*
 28  * Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
 29  *
 30  * This program is free software; you can redistribute it and/or modify
 31  * it under the terms of the GNU General Public License as published by
 32  * the Free Software Foundation; either version 2 of the License, or
 33  * (at your option) any later version.
 34  *
 35  * This program is distributed in the hope that it will be useful, but
 36  * WITHOUT ANY WARRANTY; without even the implied warranty of
 37  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 38  * NON INFRINGEMENT.  See the GNU General Public License for more
 39  * details.
 40  *
 41  * You should have received a copy of the GNU General Public License
 42  * along with this program; if not, write to the Free Software
 43  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 44  */
 45 #include <linux/kernel.h>
 46 #include <linux/start_kernel.h>
 47 #include <linux/string.h>
 48 #include <linux/console.h>
 49 #include <linux/screen_info.h>
 50 #include <linux/irq.h>
 51 #include <linux/interrupt.h>
 52 #include <linux/clocksource.h>
 53 #include <linux/clockchips.h>
 54 #include <linux/lguest.h>
 55 #include <linux/lguest_launcher.h>
 56 #include <linux/virtio_console.h>
 57 #include <linux/pm.h>
 58 #include <linux/export.h>
 59 #include <linux/pci.h>
 60 #include <linux/virtio_pci.h>
 61 #include <asm/acpi.h>
 62 #include <asm/apic.h>
 63 #include <asm/lguest.h>
 64 #include <asm/paravirt.h>
 65 #include <asm/param.h>
 66 #include <asm/page.h>
 67 #include <asm/pgtable.h>
 68 #include <asm/desc.h>
 69 #include <asm/setup.h>
 70 #include <asm/e820.h>
 71 #include <asm/mce.h>
 72 #include <asm/io.h>
 73 #include <asm/i387.h>
 74 #include <asm/stackprotector.h>
 75 #include <asm/reboot.h>         /* for struct machine_ops */
 76 #include <asm/kvm_para.h>
 77 #include <asm/pci_x86.h>
 78 #include <asm/pci-direct.h>
 79 
 80 /*G:010
 81  * Welcome to the Guest!
 82  *
 83  * The Guest in our tale is a simple creature: identical to the Host but
 84  * behaving in simplified but equivalent ways.  In particular, the Guest is the
 85  * same kernel as the Host (or at least, built from the same source code).
 86 :*/
 87 
 88 struct lguest_data lguest_data = {
 89         .hcall_status = { [0 ... LHCALL_RING_SIZE-1] = 0xFF },
 90         .noirq_start = (u32)lguest_noirq_start,
 91         .noirq_end = (u32)lguest_noirq_end,
 92         .kernel_address = PAGE_OFFSET,
 93         .blocked_interrupts = { 1 }, /* Block timer interrupts */
 94         .syscall_vec = SYSCALL_VECTOR,
 95 };
 96 
 97 /*G:037
 98  * async_hcall() is pretty simple: I'm quite proud of it really.  We have a
 99  * ring buffer of stored hypercalls which the Host will run though next time we
100  * do a normal hypercall.  Each entry in the ring has 5 slots for the hypercall
101  * arguments, and a "hcall_status" word which is 0 if the call is ready to go,
102  * and 255 once the Host has finished with it.
103  *
104  * If we come around to a slot which hasn't been finished, then the table is
105  * full and we just make the hypercall directly.  This has the nice side
106  * effect of causing the Host to run all the stored calls in the ring buffer
107  * which empties it for next time!
108  */
109 static void async_hcall(unsigned long call, unsigned long arg1,
110                         unsigned long arg2, unsigned long arg3,
111                         unsigned long arg4)
112 {
113         /* Note: This code assumes we're uniprocessor. */
114         static unsigned int next_call;
115         unsigned long flags;
116 
117         /*
118          * Disable interrupts if not already disabled: we don't want an
119          * interrupt handler making a hypercall while we're already doing
120          * one!
121          */
122         local_irq_save(flags);
123         if (lguest_data.hcall_status[next_call] != 0xFF) {
124                 /* Table full, so do normal hcall which will flush table. */
125                 hcall(call, arg1, arg2, arg3, arg4);
126         } else {
127                 lguest_data.hcalls[next_call].arg0 = call;
128                 lguest_data.hcalls[next_call].arg1 = arg1;
129                 lguest_data.hcalls[next_call].arg2 = arg2;
130                 lguest_data.hcalls[next_call].arg3 = arg3;
131                 lguest_data.hcalls[next_call].arg4 = arg4;
132                 /* Arguments must all be written before we mark it to go */
133                 wmb();
134                 lguest_data.hcall_status[next_call] = 0;
135                 if (++next_call == LHCALL_RING_SIZE)
136                         next_call = 0;
137         }
138         local_irq_restore(flags);
139 }
140 
141 /*G:035
142  * Notice the lazy_hcall() above, rather than hcall().  This is our first real
143  * optimization trick!
144  *
145  * When lazy_mode is set, it means we're allowed to defer all hypercalls and do
146  * them as a batch when lazy_mode is eventually turned off.  Because hypercalls
147  * are reasonably expensive, batching them up makes sense.  For example, a
148  * large munmap might update dozens of page table entries: that code calls
149  * paravirt_enter_lazy_mmu(), does the dozen updates, then calls
150  * lguest_leave_lazy_mode().
151  *
152  * So, when we're in lazy mode, we call async_hcall() to store the call for
153  * future processing:
154  */
155 static void lazy_hcall1(unsigned long call, unsigned long arg1)
156 {
157         if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
158                 hcall(call, arg1, 0, 0, 0);
159         else
160                 async_hcall(call, arg1, 0, 0, 0);
161 }
162 
163 /* You can imagine what lazy_hcall2, 3 and 4 look like. :*/
164 static void lazy_hcall2(unsigned long call,
165                         unsigned long arg1,
166                         unsigned long arg2)
167 {
168         if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
169                 hcall(call, arg1, arg2, 0, 0);
170         else
171                 async_hcall(call, arg1, arg2, 0, 0);
172 }
173 
174 static void lazy_hcall3(unsigned long call,
175                         unsigned long arg1,
176                         unsigned long arg2,
177                         unsigned long arg3)
178 {
179         if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
180                 hcall(call, arg1, arg2, arg3, 0);
181         else
182                 async_hcall(call, arg1, arg2, arg3, 0);
183 }
184 
185 #ifdef CONFIG_X86_PAE
186 static void lazy_hcall4(unsigned long call,
187                         unsigned long arg1,
188                         unsigned long arg2,
189                         unsigned long arg3,
190                         unsigned long arg4)
191 {
192         if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
193                 hcall(call, arg1, arg2, arg3, arg4);
194         else
195                 async_hcall(call, arg1, arg2, arg3, arg4);
196 }
197 #endif
198 
199 /*G:036
200  * When lazy mode is turned off, we issue the do-nothing hypercall to
201  * flush any stored calls, and call the generic helper to reset the
202  * per-cpu lazy mode variable.
203  */
204 static void lguest_leave_lazy_mmu_mode(void)
205 {
206         hcall(LHCALL_FLUSH_ASYNC, 0, 0, 0, 0);
207         paravirt_leave_lazy_mmu();
208 }
209 
210 /*
211  * We also catch the end of context switch; we enter lazy mode for much of
212  * that too, so again we need to flush here.
213  *
214  * (Technically, this is lazy CPU mode, and normally we're in lazy MMU
215  * mode, but unlike Xen, lguest doesn't care about the difference).
216  */
217 static void lguest_end_context_switch(struct task_struct *next)
218 {
219         hcall(LHCALL_FLUSH_ASYNC, 0, 0, 0, 0);
220         paravirt_end_context_switch(next);
221 }
222 
223 /*G:032
224  * After that diversion we return to our first native-instruction
225  * replacements: four functions for interrupt control.
226  *
227  * The simplest way of implementing these would be to have "turn interrupts
228  * off" and "turn interrupts on" hypercalls.  Unfortunately, this is too slow:
229  * these are by far the most commonly called functions of those we override.
230  *
231  * So instead we keep an "irq_enabled" field inside our "struct lguest_data",
232  * which the Guest can update with a single instruction.  The Host knows to
233  * check there before it tries to deliver an interrupt.
234  */
235 
236 /*
237  * save_flags() is expected to return the processor state (ie. "flags").  The
238  * flags word contains all kind of stuff, but in practice Linux only cares
239  * about the interrupt flag.  Our "save_flags()" just returns that.
240  */
241 asmlinkage __visible unsigned long lguest_save_fl(void)
242 {
243         return lguest_data.irq_enabled;
244 }
245 
246 /* Interrupts go off... */
247 asmlinkage __visible void lguest_irq_disable(void)
248 {
249         lguest_data.irq_enabled = 0;
250 }
251 
252 /*
253  * Let's pause a moment.  Remember how I said these are called so often?
254  * Jeremy Fitzhardinge optimized them so hard early in 2009 that he had to
255  * break some rules.  In particular, these functions are assumed to save their
256  * own registers if they need to: normal C functions assume they can trash the
257  * eax register.  To use normal C functions, we use
258  * PV_CALLEE_SAVE_REGS_THUNK(), which pushes %eax onto the stack, calls the
259  * C function, then restores it.
260  */
261 PV_CALLEE_SAVE_REGS_THUNK(lguest_save_fl);
262 PV_CALLEE_SAVE_REGS_THUNK(lguest_irq_disable);
263 /*:*/
264 
265 /* These are in i386_head.S */
266 extern void lg_irq_enable(void);
267 extern void lg_restore_fl(unsigned long flags);
268 
269 /*M:003
270  * We could be more efficient in our checking of outstanding interrupts, rather
271  * than using a branch.  One way would be to put the "irq_enabled" field in a
272  * page by itself, and have the Host write-protect it when an interrupt comes
273  * in when irqs are disabled.  There will then be a page fault as soon as
274  * interrupts are re-enabled.
275  *
276  * A better method is to implement soft interrupt disable generally for x86:
277  * instead of disabling interrupts, we set a flag.  If an interrupt does come
278  * in, we then disable them for real.  This is uncommon, so we could simply use
279  * a hypercall for interrupt control and not worry about efficiency.
280 :*/
281 
282 /*G:034
283  * The Interrupt Descriptor Table (IDT).
284  *
285  * The IDT tells the processor what to do when an interrupt comes in.  Each
286  * entry in the table is a 64-bit descriptor: this holds the privilege level,
287  * address of the handler, and... well, who cares?  The Guest just asks the
288  * Host to make the change anyway, because the Host controls the real IDT.
289  */
290 static void lguest_write_idt_entry(gate_desc *dt,
291                                    int entrynum, const gate_desc *g)
292 {
293         /*
294          * The gate_desc structure is 8 bytes long: we hand it to the Host in
295          * two 32-bit chunks.  The whole 32-bit kernel used to hand descriptors
296          * around like this; typesafety wasn't a big concern in Linux's early
297          * years.
298          */
299         u32 *desc = (u32 *)g;
300         /* Keep the local copy up to date. */
301         native_write_idt_entry(dt, entrynum, g);
302         /* Tell Host about this new entry. */
303         hcall(LHCALL_LOAD_IDT_ENTRY, entrynum, desc[0], desc[1], 0);
304 }
305 
306 /*
307  * Changing to a different IDT is very rare: we keep the IDT up-to-date every
308  * time it is written, so we can simply loop through all entries and tell the
309  * Host about them.
310  */
311 static void lguest_load_idt(const struct desc_ptr *desc)
312 {
313         unsigned int i;
314         struct desc_struct *idt = (void *)desc->address;
315 
316         for (i = 0; i < (desc->size+1)/8; i++)
317                 hcall(LHCALL_LOAD_IDT_ENTRY, i, idt[i].a, idt[i].b, 0);
318 }
319 
320 /*
321  * The Global Descriptor Table.
322  *
323  * The Intel architecture defines another table, called the Global Descriptor
324  * Table (GDT).  You tell the CPU where it is (and its size) using the "lgdt"
325  * instruction, and then several other instructions refer to entries in the
326  * table.  There are three entries which the Switcher needs, so the Host simply
327  * controls the entire thing and the Guest asks it to make changes using the
328  * LOAD_GDT hypercall.
329  *
330  * This is the exactly like the IDT code.
331  */
332 static void lguest_load_gdt(const struct desc_ptr *desc)
333 {
334         unsigned int i;
335         struct desc_struct *gdt = (void *)desc->address;
336 
337         for (i = 0; i < (desc->size+1)/8; i++)
338                 hcall(LHCALL_LOAD_GDT_ENTRY, i, gdt[i].a, gdt[i].b, 0);
339 }
340 
341 /*
342  * For a single GDT entry which changes, we simply change our copy and
343  * then tell the host about it.
344  */
345 static void lguest_write_gdt_entry(struct desc_struct *dt, int entrynum,
346                                    const void *desc, int type)
347 {
348         native_write_gdt_entry(dt, entrynum, desc, type);
349         /* Tell Host about this new entry. */
350         hcall(LHCALL_LOAD_GDT_ENTRY, entrynum,
351               dt[entrynum].a, dt[entrynum].b, 0);
352 }
353 
354 /*
355  * There are three "thread local storage" GDT entries which change
356  * on every context switch (these three entries are how glibc implements
357  * __thread variables).  As an optimization, we have a hypercall
358  * specifically for this case.
359  *
360  * Wouldn't it be nicer to have a general LOAD_GDT_ENTRIES hypercall
361  * which took a range of entries?
362  */
363 static void lguest_load_tls(struct thread_struct *t, unsigned int cpu)
364 {
365         /*
366          * There's one problem which normal hardware doesn't have: the Host
367          * can't handle us removing entries we're currently using.  So we clear
368          * the GS register here: if it's needed it'll be reloaded anyway.
369          */
370         lazy_load_gs(0);
371         lazy_hcall2(LHCALL_LOAD_TLS, __pa(&t->tls_array), cpu);
372 }
373 
374 /*G:038
375  * That's enough excitement for now, back to ploughing through each of the
376  * different pv_ops structures (we're about 1/3 of the way through).
377  *
378  * This is the Local Descriptor Table, another weird Intel thingy.  Linux only
379  * uses this for some strange applications like Wine.  We don't do anything
380  * here, so they'll get an informative and friendly Segmentation Fault.
381  */
382 static void lguest_set_ldt(const void *addr, unsigned entries)
383 {
384 }
385 
386 /*
387  * This loads a GDT entry into the "Task Register": that entry points to a
388  * structure called the Task State Segment.  Some comments scattered though the
389  * kernel code indicate that this used for task switching in ages past, along
390  * with blood sacrifice and astrology.
391  *
392  * Now there's nothing interesting in here that we don't get told elsewhere.
393  * But the native version uses the "ltr" instruction, which makes the Host
394  * complain to the Guest about a Segmentation Fault and it'll oops.  So we
395  * override the native version with a do-nothing version.
396  */
397 static void lguest_load_tr_desc(void)
398 {
399 }
400 
401 /*
402  * The "cpuid" instruction is a way of querying both the CPU identity
403  * (manufacturer, model, etc) and its features.  It was introduced before the
404  * Pentium in 1993 and keeps getting extended by both Intel, AMD and others.
405  * As you might imagine, after a decade and a half this treatment, it is now a
406  * giant ball of hair.  Its entry in the current Intel manual runs to 28 pages.
407  *
408  * This instruction even it has its own Wikipedia entry.  The Wikipedia entry
409  * has been translated into 6 languages.  I am not making this up!
410  *
411  * We could get funky here and identify ourselves as "GenuineLguest", but
412  * instead we just use the real "cpuid" instruction.  Then I pretty much turned
413  * off feature bits until the Guest booted.  (Don't say that: you'll damage
414  * lguest sales!)  Shut up, inner voice!  (Hey, just pointing out that this is
415  * hardly future proof.)  No one's listening!  They don't like you anyway,
416  * parenthetic weirdo!
417  *
418  * Replacing the cpuid so we can turn features off is great for the kernel, but
419  * anyone (including userspace) can just use the raw "cpuid" instruction and
420  * the Host won't even notice since it isn't privileged.  So we try not to get
421  * too worked up about it.
422  */
423 static void lguest_cpuid(unsigned int *ax, unsigned int *bx,
424                          unsigned int *cx, unsigned int *dx)
425 {
426         int function = *ax;
427 
428         native_cpuid(ax, bx, cx, dx);
429         switch (function) {
430         /*
431          * CPUID 0 gives the highest legal CPUID number (and the ID string).
432          * We futureproof our code a little by sticking to known CPUID values.
433          */
434         case 0:
435                 if (*ax > 5)
436                         *ax = 5;
437                 break;
438 
439         /*
440          * CPUID 1 is a basic feature request.
441          *
442          * CX: we only allow kernel to see SSE3, CMPXCHG16B and SSSE3
443          * DX: SSE, SSE2, FXSR, MMX, CMOV, CMPXCHG8B, TSC, FPU and PAE.
444          */
445         case 1:
446                 *cx &= 0x00002201;
447                 *dx &= 0x07808151;
448                 /*
449                  * The Host can do a nice optimization if it knows that the
450                  * kernel mappings (addresses above 0xC0000000 or whatever
451                  * PAGE_OFFSET is set to) haven't changed.  But Linux calls
452                  * flush_tlb_user() for both user and kernel mappings unless
453                  * the Page Global Enable (PGE) feature bit is set.
454                  */
455                 *dx |= 0x00002000;
456                 /*
457                  * We also lie, and say we're family id 5.  6 or greater
458                  * leads to a rdmsr in early_init_intel which we can't handle.
459                  * Family ID is returned as bits 8-12 in ax.
460                  */
461                 *ax &= 0xFFFFF0FF;
462                 *ax |= 0x00000500;
463                 break;
464 
465         /*
466          * This is used to detect if we're running under KVM.  We might be,
467          * but that's a Host matter, not us.  So say we're not.
468          */
469         case KVM_CPUID_SIGNATURE:
470                 *bx = *cx = *dx = 0;
471                 break;
472 
473         /*
474          * 0x80000000 returns the highest Extended Function, so we futureproof
475          * like we do above by limiting it to known fields.
476          */
477         case 0x80000000:
478                 if (*ax > 0x80000008)
479                         *ax = 0x80000008;
480                 break;
481 
482         /*
483          * PAE systems can mark pages as non-executable.  Linux calls this the
484          * NX bit.  Intel calls it XD (eXecute Disable), AMD EVP (Enhanced
485          * Virus Protection).  We just switch it off here, since we don't
486          * support it.
487          */
488         case 0x80000001:
489                 *dx &= ~(1 << 20);
490                 break;
491         }
492 }
493 
494 /*
495  * Intel has four control registers, imaginatively named cr0, cr2, cr3 and cr4.
496  * I assume there's a cr1, but it hasn't bothered us yet, so we'll not bother
497  * it.  The Host needs to know when the Guest wants to change them, so we have
498  * a whole series of functions like read_cr0() and write_cr0().
499  *
500  * We start with cr0.  cr0 allows you to turn on and off all kinds of basic
501  * features, but Linux only really cares about one: the horrifically-named Task
502  * Switched (TS) bit at bit 3 (ie. 8)
503  *
504  * What does the TS bit do?  Well, it causes the CPU to trap (interrupt 7) if
505  * the floating point unit is used.  Which allows us to restore FPU state
506  * lazily after a task switch, and Linux uses that gratefully, but wouldn't a
507  * name like "FPUTRAP bit" be a little less cryptic?
508  *
509  * We store cr0 locally because the Host never changes it.  The Guest sometimes
510  * wants to read it and we'd prefer not to bother the Host unnecessarily.
511  */
512 static unsigned long current_cr0;
513 static void lguest_write_cr0(unsigned long val)
514 {
515         lazy_hcall1(LHCALL_TS, val & X86_CR0_TS);
516         current_cr0 = val;
517 }
518 
519 static unsigned long lguest_read_cr0(void)
520 {
521         return current_cr0;
522 }
523 
524 /*
525  * Intel provided a special instruction to clear the TS bit for people too cool
526  * to use write_cr0() to do it.  This "clts" instruction is faster, because all
527  * the vowels have been optimized out.
528  */
529 static void lguest_clts(void)
530 {
531         lazy_hcall1(LHCALL_TS, 0);
532         current_cr0 &= ~X86_CR0_TS;
533 }
534 
535 /*
536  * cr2 is the virtual address of the last page fault, which the Guest only ever
537  * reads.  The Host kindly writes this into our "struct lguest_data", so we
538  * just read it out of there.
539  */
540 static unsigned long lguest_read_cr2(void)
541 {
542         return lguest_data.cr2;
543 }
544 
545 /* See lguest_set_pte() below. */
546 static bool cr3_changed = false;
547 static unsigned long current_cr3;
548 
549 /*
550  * cr3 is the current toplevel pagetable page: the principle is the same as
551  * cr0.  Keep a local copy, and tell the Host when it changes.
552  */
553 static void lguest_write_cr3(unsigned long cr3)
554 {
555         lazy_hcall1(LHCALL_NEW_PGTABLE, cr3);
556         current_cr3 = cr3;
557 
558         /* These two page tables are simple, linear, and used during boot */
559         if (cr3 != __pa_symbol(swapper_pg_dir) &&
560             cr3 != __pa_symbol(initial_page_table))
561                 cr3_changed = true;
562 }
563 
564 static unsigned long lguest_read_cr3(void)
565 {
566         return current_cr3;
567 }
568 
569 /* cr4 is used to enable and disable PGE, but we don't care. */
570 static unsigned long lguest_read_cr4(void)
571 {
572         return 0;
573 }
574 
575 static void lguest_write_cr4(unsigned long val)
576 {
577 }
578 
579 /*
580  * Page Table Handling.
581  *
582  * Now would be a good time to take a rest and grab a coffee or similarly
583  * relaxing stimulant.  The easy parts are behind us, and the trek gradually
584  * winds uphill from here.
585  *
586  * Quick refresher: memory is divided into "pages" of 4096 bytes each.  The CPU
587  * maps virtual addresses to physical addresses using "page tables".  We could
588  * use one huge index of 1 million entries: each address is 4 bytes, so that's
589  * 1024 pages just to hold the page tables.   But since most virtual addresses
590  * are unused, we use a two level index which saves space.  The cr3 register
591  * contains the physical address of the top level "page directory" page, which
592  * contains physical addresses of up to 1024 second-level pages.  Each of these
593  * second level pages contains up to 1024 physical addresses of actual pages,
594  * or Page Table Entries (PTEs).
595  *
596  * Here's a diagram, where arrows indicate physical addresses:
597  *
598  * cr3 ---> +---------+
599  *          |      --------->+---------+
600  *          |         |      | PADDR1  |
601  *        Mid-level   |      | PADDR2  |
602  *        (PMD) page  |      |         |
603  *          |         |    Lower-level |
604  *          |         |    (PTE) page  |
605  *          |         |      |         |
606  *            ....               ....
607  *
608  * So to convert a virtual address to a physical address, we look up the top
609  * level, which points us to the second level, which gives us the physical
610  * address of that page.  If the top level entry was not present, or the second
611  * level entry was not present, then the virtual address is invalid (we
612  * say "the page was not mapped").
613  *
614  * Put another way, a 32-bit virtual address is divided up like so:
615  *
616  *  1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
617  * |<---- 10 bits ---->|<---- 10 bits ---->|<------ 12 bits ------>|
618  *    Index into top     Index into second      Offset within page
619  *  page directory page    pagetable page
620  *
621  * Now, unfortunately, this isn't the whole story: Intel added Physical Address
622  * Extension (PAE) to allow 32 bit systems to use 64GB of memory (ie. 36 bits).
623  * These are held in 64-bit page table entries, so we can now only fit 512
624  * entries in a page, and the neat three-level tree breaks down.
625  *
626  * The result is a four level page table:
627  *
628  * cr3 --> [ 4 Upper  ]
629  *         [   Level  ]
630  *         [  Entries ]
631  *         [(PUD Page)]---> +---------+
632  *                          |      --------->+---------+
633  *                          |         |      | PADDR1  |
634  *                        Mid-level   |      | PADDR2  |
635  *                        (PMD) page  |      |         |
636  *                          |         |    Lower-level |
637  *                          |         |    (PTE) page  |
638  *                          |         |      |         |
639  *                            ....               ....
640  *
641  *
642  * And the virtual address is decoded as:
643  *
644  *         1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
645  *      |<-2->|<--- 9 bits ---->|<---- 9 bits --->|<------ 12 bits ------>|
646  * Index into    Index into mid    Index into lower    Offset within page
647  * top entries   directory page     pagetable page
648  *
649  * It's too hard to switch between these two formats at runtime, so Linux only
650  * supports one or the other depending on whether CONFIG_X86_PAE is set.  Many
651  * distributions turn it on, and not just for people with silly amounts of
652  * memory: the larger PTE entries allow room for the NX bit, which lets the
653  * kernel disable execution of pages and increase security.
654  *
655  * This was a problem for lguest, which couldn't run on these distributions;
656  * then Matias Zabaljauregui figured it all out and implemented it, and only a
657  * handful of puppies were crushed in the process!
658  *
659  * Back to our point: the kernel spends a lot of time changing both the
660  * top-level page directory and lower-level pagetable pages.  The Guest doesn't
661  * know physical addresses, so while it maintains these page tables exactly
662  * like normal, it also needs to keep the Host informed whenever it makes a
663  * change: the Host will create the real page tables based on the Guests'.
664  */
665 
666 /*
667  * The Guest calls this after it has set a second-level entry (pte), ie. to map
668  * a page into a process' address space.  We tell the Host the toplevel and
669  * address this corresponds to.  The Guest uses one pagetable per process, so
670  * we need to tell the Host which one we're changing (mm->pgd).
671  */
672 static void lguest_pte_update(struct mm_struct *mm, unsigned long addr,
673                                pte_t *ptep)
674 {
675 #ifdef CONFIG_X86_PAE
676         /* PAE needs to hand a 64 bit page table entry, so it uses two args. */
677         lazy_hcall4(LHCALL_SET_PTE, __pa(mm->pgd), addr,
678                     ptep->pte_low, ptep->pte_high);
679 #else
680         lazy_hcall3(LHCALL_SET_PTE, __pa(mm->pgd), addr, ptep->pte_low);
681 #endif
682 }
683 
684 /* This is the "set and update" combo-meal-deal version. */
685 static void lguest_set_pte_at(struct mm_struct *mm, unsigned long addr,
686                               pte_t *ptep, pte_t pteval)
687 {
688         native_set_pte(ptep, pteval);
689         lguest_pte_update(mm, addr, ptep);
690 }
691 
692 /*
693  * The Guest calls lguest_set_pud to set a top-level entry and lguest_set_pmd
694  * to set a middle-level entry when PAE is activated.
695  *
696  * Again, we set the entry then tell the Host which page we changed,
697  * and the index of the entry we changed.
698  */
699 #ifdef CONFIG_X86_PAE
700 static void lguest_set_pud(pud_t *pudp, pud_t pudval)
701 {
702         native_set_pud(pudp, pudval);
703 
704         /* 32 bytes aligned pdpt address and the index. */
705         lazy_hcall2(LHCALL_SET_PGD, __pa(pudp) & 0xFFFFFFE0,
706                    (__pa(pudp) & 0x1F) / sizeof(pud_t));
707 }
708 
709 static void lguest_set_pmd(pmd_t *pmdp, pmd_t pmdval)
710 {
711         native_set_pmd(pmdp, pmdval);
712         lazy_hcall2(LHCALL_SET_PMD, __pa(pmdp) & PAGE_MASK,
713                    (__pa(pmdp) & (PAGE_SIZE - 1)) / sizeof(pmd_t));
714 }
715 #else
716 
717 /* The Guest calls lguest_set_pmd to set a top-level entry when !PAE. */
718 static void lguest_set_pmd(pmd_t *pmdp, pmd_t pmdval)
719 {
720         native_set_pmd(pmdp, pmdval);
721         lazy_hcall2(LHCALL_SET_PGD, __pa(pmdp) & PAGE_MASK,
722                    (__pa(pmdp) & (PAGE_SIZE - 1)) / sizeof(pmd_t));
723 }
724 #endif
725 
726 /*
727  * There are a couple of legacy places where the kernel sets a PTE, but we
728  * don't know the top level any more.  This is useless for us, since we don't
729  * know which pagetable is changing or what address, so we just tell the Host
730  * to forget all of them.  Fortunately, this is very rare.
731  *
732  * ... except in early boot when the kernel sets up the initial pagetables,
733  * which makes booting astonishingly slow: 48 seconds!  So we don't even tell
734  * the Host anything changed until we've done the first real page table switch,
735  * which brings boot back to 4.3 seconds.
736  */
737 static void lguest_set_pte(pte_t *ptep, pte_t pteval)
738 {
739         native_set_pte(ptep, pteval);
740         if (cr3_changed)
741                 lazy_hcall1(LHCALL_FLUSH_TLB, 1);
742 }
743 
744 #ifdef CONFIG_X86_PAE
745 /*
746  * With 64-bit PTE values, we need to be careful setting them: if we set 32
747  * bits at a time, the hardware could see a weird half-set entry.  These
748  * versions ensure we update all 64 bits at once.
749  */
750 static void lguest_set_pte_atomic(pte_t *ptep, pte_t pte)
751 {
752         native_set_pte_atomic(ptep, pte);
753         if (cr3_changed)
754                 lazy_hcall1(LHCALL_FLUSH_TLB, 1);
755 }
756 
757 static void lguest_pte_clear(struct mm_struct *mm, unsigned long addr,
758                              pte_t *ptep)
759 {
760         native_pte_clear(mm, addr, ptep);
761         lguest_pte_update(mm, addr, ptep);
762 }
763 
764 static void lguest_pmd_clear(pmd_t *pmdp)
765 {
766         lguest_set_pmd(pmdp, __pmd(0));
767 }
768 #endif
769 
770 /*
771  * Unfortunately for Lguest, the pv_mmu_ops for page tables were based on
772  * native page table operations.  On native hardware you can set a new page
773  * table entry whenever you want, but if you want to remove one you have to do
774  * a TLB flush (a TLB is a little cache of page table entries kept by the CPU).
775  *
776  * So the lguest_set_pte_at() and lguest_set_pmd() functions above are only
777  * called when a valid entry is written, not when it's removed (ie. marked not
778  * present).  Instead, this is where we come when the Guest wants to remove a
779  * page table entry: we tell the Host to set that entry to 0 (ie. the present
780  * bit is zero).
781  */
782 static void lguest_flush_tlb_single(unsigned long addr)
783 {
784         /* Simply set it to zero: if it was not, it will fault back in. */
785         lazy_hcall3(LHCALL_SET_PTE, current_cr3, addr, 0);
786 }
787 
788 /*
789  * This is what happens after the Guest has removed a large number of entries.
790  * This tells the Host that any of the page table entries for userspace might
791  * have changed, ie. virtual addresses below PAGE_OFFSET.
792  */
793 static void lguest_flush_tlb_user(void)
794 {
795         lazy_hcall1(LHCALL_FLUSH_TLB, 0);
796 }
797 
798 /*
799  * This is called when the kernel page tables have changed.  That's not very
800  * common (unless the Guest is using highmem, which makes the Guest extremely
801  * slow), so it's worth separating this from the user flushing above.
802  */
803 static void lguest_flush_tlb_kernel(void)
804 {
805         lazy_hcall1(LHCALL_FLUSH_TLB, 1);
806 }
807 
808 /*
809  * The Unadvanced Programmable Interrupt Controller.
810  *
811  * This is an attempt to implement the simplest possible interrupt controller.
812  * I spent some time looking though routines like set_irq_chip_and_handler,
813  * set_irq_chip_and_handler_name, set_irq_chip_data and set_phasers_to_stun and
814  * I *think* this is as simple as it gets.
815  *
816  * We can tell the Host what interrupts we want blocked ready for using the
817  * lguest_data.interrupts bitmap, so disabling (aka "masking") them is as
818  * simple as setting a bit.  We don't actually "ack" interrupts as such, we
819  * just mask and unmask them.  I wonder if we should be cleverer?
820  */
821 static void disable_lguest_irq(struct irq_data *data)
822 {
823         set_bit(data->irq, lguest_data.blocked_interrupts);
824 }
825 
826 static void enable_lguest_irq(struct irq_data *data)
827 {
828         clear_bit(data->irq, lguest_data.blocked_interrupts);
829 }
830 
831 /* This structure describes the lguest IRQ controller. */
832 static struct irq_chip lguest_irq_controller = {
833         .name           = "lguest",
834         .irq_mask       = disable_lguest_irq,
835         .irq_mask_ack   = disable_lguest_irq,
836         .irq_unmask     = enable_lguest_irq,
837 };
838 
839 static int lguest_enable_irq(struct pci_dev *dev)
840 {
841         u8 line = 0;
842 
843         /* We literally use the PCI interrupt line as the irq number. */
844         pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &line);
845         irq_set_chip_and_handler_name(line, &lguest_irq_controller,
846                                       handle_level_irq, "level");
847         dev->irq = line;
848         return 0;
849 }
850 
851 /* We don't do hotplug PCI, so this shouldn't be called. */
852 static void lguest_disable_irq(struct pci_dev *dev)
853 {
854         WARN_ON(1);
855 }
856 
857 /*
858  * This sets up the Interrupt Descriptor Table (IDT) entry for each hardware
859  * interrupt (except 128, which is used for system calls), and then tells the
860  * Linux infrastructure that each interrupt is controlled by our level-based
861  * lguest interrupt controller.
862  */
863 static void __init lguest_init_IRQ(void)
864 {
865         unsigned int i;
866 
867         for (i = FIRST_EXTERNAL_VECTOR; i < FIRST_SYSTEM_VECTOR; i++) {
868                 /* Some systems map "vectors" to interrupts weirdly.  Not us! */
869                 __this_cpu_write(vector_irq[i], i - FIRST_EXTERNAL_VECTOR);
870                 if (i != SYSCALL_VECTOR)
871                         set_intr_gate(i, interrupt[i - FIRST_EXTERNAL_VECTOR]);
872         }
873 
874         /*
875          * This call is required to set up for 4k stacks, where we have
876          * separate stacks for hard and soft interrupts.
877          */
878         irq_ctx_init(smp_processor_id());
879 }
880 
881 /*
882  * Interrupt descriptors are allocated as-needed, but low-numbered ones are
883  * reserved by the generic x86 code.  So we ignore irq_alloc_desc_at if it
884  * tells us the irq is already used: other errors (ie. ENOMEM) we take
885  * seriously.
886  */
887 int lguest_setup_irq(unsigned int irq)
888 {
889         int err;
890 
891         /* Returns -ve error or vector number. */
892         err = irq_alloc_desc_at(irq, 0);
893         if (err < 0 && err != -EEXIST)
894                 return err;
895 
896         irq_set_chip_and_handler_name(irq, &lguest_irq_controller,
897                                       handle_level_irq, "level");
898         return 0;
899 }
900 
901 /*
902  * Time.
903  *
904  * It would be far better for everyone if the Guest had its own clock, but
905  * until then the Host gives us the time on every interrupt.
906  */
907 static void lguest_get_wallclock(struct timespec *now)
908 {
909         *now = lguest_data.time;
910 }
911 
912 /*
913  * The TSC is an Intel thing called the Time Stamp Counter.  The Host tells us
914  * what speed it runs at, or 0 if it's unusable as a reliable clock source.
915  * This matches what we want here: if we return 0 from this function, the x86
916  * TSC clock will give up and not register itself.
917  */
918 static unsigned long lguest_tsc_khz(void)
919 {
920         return lguest_data.tsc_khz;
921 }
922 
923 /*
924  * If we can't use the TSC, the kernel falls back to our lower-priority
925  * "lguest_clock", where we read the time value given to us by the Host.
926  */
927 static cycle_t lguest_clock_read(struct clocksource *cs)
928 {
929         unsigned long sec, nsec;
930 
931         /*
932          * Since the time is in two parts (seconds and nanoseconds), we risk
933          * reading it just as it's changing from 99 & 0.999999999 to 100 and 0,
934          * and getting 99 and 0.  As Linux tends to come apart under the stress
935          * of time travel, we must be careful:
936          */
937         do {
938                 /* First we read the seconds part. */
939                 sec = lguest_data.time.tv_sec;
940                 /*
941                  * This read memory barrier tells the compiler and the CPU that
942                  * this can't be reordered: we have to complete the above
943                  * before going on.
944                  */
945                 rmb();
946                 /* Now we read the nanoseconds part. */
947                 nsec = lguest_data.time.tv_nsec;
948                 /* Make sure we've done that. */
949                 rmb();
950                 /* Now if the seconds part has changed, try again. */
951         } while (unlikely(lguest_data.time.tv_sec != sec));
952 
953         /* Our lguest clock is in real nanoseconds. */
954         return sec*1000000000ULL + nsec;
955 }
956 
957 /* This is the fallback clocksource: lower priority than the TSC clocksource. */
958 static struct clocksource lguest_clock = {
959         .name           = "lguest",
960         .rating         = 200,
961         .read           = lguest_clock_read,
962         .mask           = CLOCKSOURCE_MASK(64),
963         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
964 };
965 
966 /*
967  * We also need a "struct clock_event_device": Linux asks us to set it to go
968  * off some time in the future.  Actually, James Morris figured all this out, I
969  * just applied the patch.
970  */
971 static int lguest_clockevent_set_next_event(unsigned long delta,
972                                            struct clock_event_device *evt)
973 {
974         /* FIXME: I don't think this can ever happen, but James tells me he had
975          * to put this code in.  Maybe we should remove it now.  Anyone? */
976         if (delta < LG_CLOCK_MIN_DELTA) {
977                 if (printk_ratelimit())
978                         printk(KERN_DEBUG "%s: small delta %lu ns\n",
979                                __func__, delta);
980                 return -ETIME;
981         }
982 
983         /* Please wake us this far in the future. */
984         hcall(LHCALL_SET_CLOCKEVENT, delta, 0, 0, 0);
985         return 0;
986 }
987 
988 static void lguest_clockevent_set_mode(enum clock_event_mode mode,
989                                       struct clock_event_device *evt)
990 {
991         switch (mode) {
992         case CLOCK_EVT_MODE_UNUSED:
993         case CLOCK_EVT_MODE_SHUTDOWN:
994                 /* A 0 argument shuts the clock down. */
995                 hcall(LHCALL_SET_CLOCKEVENT, 0, 0, 0, 0);
996                 break;
997         case CLOCK_EVT_MODE_ONESHOT:
998                 /* This is what we expect. */
999                 break;
1000         case CLOCK_EVT_MODE_PERIODIC:
1001                 BUG();
1002         case CLOCK_EVT_MODE_RESUME:
1003                 break;
1004         }
1005 }
1006 
1007 /* This describes our primitive timer chip. */
1008 static struct clock_event_device lguest_clockevent = {
1009         .name                   = "lguest",
1010         .features               = CLOCK_EVT_FEAT_ONESHOT,
1011         .set_next_event         = lguest_clockevent_set_next_event,
1012         .set_mode               = lguest_clockevent_set_mode,
1013         .rating                 = INT_MAX,
1014         .mult                   = 1,
1015         .shift                  = 0,
1016         .min_delta_ns           = LG_CLOCK_MIN_DELTA,
1017         .max_delta_ns           = LG_CLOCK_MAX_DELTA,
1018 };
1019 
1020 /*
1021  * This is the Guest timer interrupt handler (hardware interrupt 0).  We just
1022  * call the clockevent infrastructure and it does whatever needs doing.
1023  */
1024 static void lguest_time_irq(unsigned int irq, struct irq_desc *desc)
1025 {
1026         unsigned long flags;
1027 
1028         /* Don't interrupt us while this is running. */
1029         local_irq_save(flags);
1030         lguest_clockevent.event_handler(&lguest_clockevent);
1031         local_irq_restore(flags);
1032 }
1033 
1034 /*
1035  * At some point in the boot process, we get asked to set up our timing
1036  * infrastructure.  The kernel doesn't expect timer interrupts before this, but
1037  * we cleverly initialized the "blocked_interrupts" field of "struct
1038  * lguest_data" so that timer interrupts were blocked until now.
1039  */
1040 static void lguest_time_init(void)
1041 {
1042         /* Set up the timer interrupt (0) to go to our simple timer routine */
1043         lguest_setup_irq(0);
1044         irq_set_handler(0, lguest_time_irq);
1045 
1046         clocksource_register_hz(&lguest_clock, NSEC_PER_SEC);
1047 
1048         /* We can't set cpumask in the initializer: damn C limitations!  Set it
1049          * here and register our timer device. */
1050         lguest_clockevent.cpumask = cpumask_of(0);
1051         clockevents_register_device(&lguest_clockevent);
1052 
1053         /* Finally, we unblock the timer interrupt. */
1054         clear_bit(0, lguest_data.blocked_interrupts);
1055 }
1056 
1057 /*
1058  * Miscellaneous bits and pieces.
1059  *
1060  * Here is an oddball collection of functions which the Guest needs for things
1061  * to work.  They're pretty simple.
1062  */
1063 
1064 /*
1065  * The Guest needs to tell the Host what stack it expects traps to use.  For
1066  * native hardware, this is part of the Task State Segment mentioned above in
1067  * lguest_load_tr_desc(), but to help hypervisors there's this special call.
1068  *
1069  * We tell the Host the segment we want to use (__KERNEL_DS is the kernel data
1070  * segment), the privilege level (we're privilege level 1, the Host is 0 and
1071  * will not tolerate us trying to use that), the stack pointer, and the number
1072  * of pages in the stack.
1073  */
1074 static void lguest_load_sp0(struct tss_struct *tss,
1075                             struct thread_struct *thread)
1076 {
1077         lazy_hcall3(LHCALL_SET_STACK, __KERNEL_DS | 0x1, thread->sp0,
1078                    THREAD_SIZE / PAGE_SIZE);
1079 }
1080 
1081 /* Let's just say, I wouldn't do debugging under a Guest. */
1082 static unsigned long lguest_get_debugreg(int regno)
1083 {
1084         /* FIXME: Implement */
1085         return 0;
1086 }
1087 
1088 static void lguest_set_debugreg(int regno, unsigned long value)
1089 {
1090         /* FIXME: Implement */
1091 }
1092 
1093 /*
1094  * There are times when the kernel wants to make sure that no memory writes are
1095  * caught in the cache (that they've all reached real hardware devices).  This
1096  * doesn't matter for the Guest which has virtual hardware.
1097  *
1098  * On the Pentium 4 and above, cpuid() indicates that the Cache Line Flush
1099  * (clflush) instruction is available and the kernel uses that.  Otherwise, it
1100  * uses the older "Write Back and Invalidate Cache" (wbinvd) instruction.
1101  * Unlike clflush, wbinvd can only be run at privilege level 0.  So we can
1102  * ignore clflush, but replace wbinvd.
1103  */
1104 static void lguest_wbinvd(void)
1105 {
1106 }
1107 
1108 /*
1109  * If the Guest expects to have an Advanced Programmable Interrupt Controller,
1110  * we play dumb by ignoring writes and returning 0 for reads.  So it's no
1111  * longer Programmable nor Controlling anything, and I don't think 8 lines of
1112  * code qualifies for Advanced.  It will also never interrupt anything.  It
1113  * does, however, allow us to get through the Linux boot code.
1114  */
1115 #ifdef CONFIG_X86_LOCAL_APIC
1116 static void lguest_apic_write(u32 reg, u32 v)
1117 {
1118 }
1119 
1120 static u32 lguest_apic_read(u32 reg)
1121 {
1122         return 0;
1123 }
1124 
1125 static u64 lguest_apic_icr_read(void)
1126 {
1127         return 0;
1128 }
1129 
1130 static void lguest_apic_icr_write(u32 low, u32 id)
1131 {
1132         /* Warn to see if there's any stray references */
1133         WARN_ON(1);
1134 }
1135 
1136 static void lguest_apic_wait_icr_idle(void)
1137 {
1138         return;
1139 }
1140 
1141 static u32 lguest_apic_safe_wait_icr_idle(void)
1142 {
1143         return 0;
1144 }
1145 
1146 static void set_lguest_basic_apic_ops(void)
1147 {
1148         apic->read = lguest_apic_read;
1149         apic->write = lguest_apic_write;
1150         apic->icr_read = lguest_apic_icr_read;
1151         apic->icr_write = lguest_apic_icr_write;
1152         apic->wait_icr_idle = lguest_apic_wait_icr_idle;
1153         apic->safe_wait_icr_idle = lguest_apic_safe_wait_icr_idle;
1154 };
1155 #endif
1156 
1157 /* STOP!  Until an interrupt comes in. */
1158 static void lguest_safe_halt(void)
1159 {
1160         hcall(LHCALL_HALT, 0, 0, 0, 0);
1161 }
1162 
1163 /*
1164  * The SHUTDOWN hypercall takes a string to describe what's happening, and
1165  * an argument which says whether this to restart (reboot) the Guest or not.
1166  *
1167  * Note that the Host always prefers that the Guest speak in physical addresses
1168  * rather than virtual addresses, so we use __pa() here.
1169  */
1170 static void lguest_power_off(void)
1171 {
1172         hcall(LHCALL_SHUTDOWN, __pa("Power down"),
1173               LGUEST_SHUTDOWN_POWEROFF, 0, 0);
1174 }
1175 
1176 /*
1177  * Panicing.
1178  *
1179  * Don't.  But if you did, this is what happens.
1180  */
1181 static int lguest_panic(struct notifier_block *nb, unsigned long l, void *p)
1182 {
1183         hcall(LHCALL_SHUTDOWN, __pa(p), LGUEST_SHUTDOWN_POWEROFF, 0, 0);
1184         /* The hcall won't return, but to keep gcc happy, we're "done". */
1185         return NOTIFY_DONE;
1186 }
1187 
1188 static struct notifier_block paniced = {
1189         .notifier_call = lguest_panic
1190 };
1191 
1192 /* Setting up memory is fairly easy. */
1193 static __init char *lguest_memory_setup(void)
1194 {
1195         /*
1196          * The Linux bootloader header contains an "e820" memory map: the
1197          * Launcher populated the first entry with our memory limit.
1198          */
1199         e820_add_region(boot_params.e820_map[0].addr,
1200                           boot_params.e820_map[0].size,
1201                           boot_params.e820_map[0].type);
1202 
1203         /* This string is for the boot messages. */
1204         return "LGUEST";
1205 }
1206 
1207 /* Offset within PCI config space of BAR access capability. */
1208 static int console_cfg_offset = 0;
1209 static int console_access_cap;
1210 
1211 /* Set up so that we access off in bar0 (on bus 0, device 1, function 0) */
1212 static void set_cfg_window(u32 cfg_offset, u32 off)
1213 {
1214         write_pci_config_byte(0, 1, 0,
1215                               cfg_offset + offsetof(struct virtio_pci_cap, bar),
1216                               0);
1217         write_pci_config(0, 1, 0,
1218                          cfg_offset + offsetof(struct virtio_pci_cap, length),
1219                          4);
1220         write_pci_config(0, 1, 0,
1221                          cfg_offset + offsetof(struct virtio_pci_cap, offset),
1222                          off);
1223 }
1224 
1225 static void write_bar_via_cfg(u32 cfg_offset, u32 off, u32 val)
1226 {
1227         /*
1228          * We could set this up once, then leave it; nothing else in the *
1229          * kernel should touch these registers.  But if it went wrong, that
1230          * would be a horrible bug to find.
1231          */
1232         set_cfg_window(cfg_offset, off);
1233         write_pci_config(0, 1, 0,
1234                          cfg_offset + sizeof(struct virtio_pci_cap), val);
1235 }
1236 
1237 static void probe_pci_console(void)
1238 {
1239         u8 cap, common_cap = 0, device_cap = 0;
1240         /* Offset within BAR0 */
1241         u32 device_offset;
1242         u32 device_len;
1243 
1244         /* Avoid recursive printk into here. */
1245         console_cfg_offset = -1;
1246 
1247         if (!early_pci_allowed()) {
1248                 printk(KERN_ERR "lguest: early PCI access not allowed!\n");
1249                 return;
1250         }
1251 
1252         /* We expect a console PCI device at BUS0, slot 1. */
1253         if (read_pci_config(0, 1, 0, 0) != 0x10431AF4) {
1254                 printk(KERN_ERR "lguest: PCI device is %#x!\n",
1255                        read_pci_config(0, 1, 0, 0));
1256                 return;
1257         }
1258 
1259         /* Find the capabilities we need (must be in bar0) */
1260         cap = read_pci_config_byte(0, 1, 0, PCI_CAPABILITY_LIST);
1261         while (cap) {
1262                 u8 vndr = read_pci_config_byte(0, 1, 0, cap);
1263                 if (vndr == PCI_CAP_ID_VNDR) {
1264                         u8 type, bar;
1265                         u32 offset, length;
1266 
1267                         type = read_pci_config_byte(0, 1, 0,
1268                             cap + offsetof(struct virtio_pci_cap, cfg_type));
1269                         bar = read_pci_config_byte(0, 1, 0,
1270                             cap + offsetof(struct virtio_pci_cap, bar));
1271                         offset = read_pci_config(0, 1, 0,
1272                             cap + offsetof(struct virtio_pci_cap, offset));
1273                         length = read_pci_config(0, 1, 0,
1274                             cap + offsetof(struct virtio_pci_cap, length));
1275 
1276                         switch (type) {
1277                         case VIRTIO_PCI_CAP_DEVICE_CFG:
1278                                 if (bar == 0) {
1279                                         device_cap = cap;
1280                                         device_offset = offset;
1281                                         device_len = length;
1282                                 }
1283                                 break;
1284                         case VIRTIO_PCI_CAP_PCI_CFG:
1285                                 console_access_cap = cap;
1286                                 break;
1287                         }
1288                 }
1289                 cap = read_pci_config_byte(0, 1, 0, cap + PCI_CAP_LIST_NEXT);
1290         }
1291         if (!device_cap || !console_access_cap) {
1292                 printk(KERN_ERR "lguest: No caps (%u/%u/%u) in console!\n",
1293                        common_cap, device_cap, console_access_cap);
1294                 return;
1295         }
1296 
1297         /*
1298          * Note that we can't check features, until we've set the DRIVER
1299          * status bit.  We don't want to do that until we have a real driver,
1300          * so we just check that the device-specific config has room for
1301          * emerg_wr.  If it doesn't support VIRTIO_CONSOLE_F_EMERG_WRITE
1302          * it should ignore the access.
1303          */
1304         if (device_len < (offsetof(struct virtio_console_config, emerg_wr)
1305                           + sizeof(u32))) {
1306                 printk(KERN_ERR "lguest: console missing emerg_wr field\n");
1307                 return;
1308         }
1309 
1310         console_cfg_offset = device_offset;
1311         printk(KERN_INFO "lguest: Console via virtio-pci emerg_wr\n");
1312 }
1313 
1314 /*
1315  * We will eventually use the virtio console device to produce console output,
1316  * but before that is set up we use the virtio PCI console's backdoor mmio
1317  * access and the "emergency" write facility (which is legal even before the
1318  * device is configured).
1319  */
1320 static __init int early_put_chars(u32 vtermno, const char *buf, int count)
1321 {
1322         /* If we couldn't find PCI console, forget it. */
1323         if (console_cfg_offset < 0)
1324                 return count;
1325 
1326         if (unlikely(!console_cfg_offset)) {
1327                 probe_pci_console();
1328                 if (console_cfg_offset < 0)
1329                         return count;
1330         }
1331 
1332         write_bar_via_cfg(console_access_cap,
1333                           console_cfg_offset
1334                           + offsetof(struct virtio_console_config, emerg_wr),
1335                           buf[0]);
1336         return 1;
1337 }
1338 
1339 /*
1340  * Rebooting also tells the Host we're finished, but the RESTART flag tells the
1341  * Launcher to reboot us.
1342  */
1343 static void lguest_restart(char *reason)
1344 {
1345         hcall(LHCALL_SHUTDOWN, __pa(reason), LGUEST_SHUTDOWN_RESTART, 0, 0);
1346 }
1347 
1348 /*G:050
1349  * Patching (Powerfully Placating Performance Pedants)
1350  *
1351  * We have already seen that pv_ops structures let us replace simple native
1352  * instructions with calls to the appropriate back end all throughout the
1353  * kernel.  This allows the same kernel to run as a Guest and as a native
1354  * kernel, but it's slow because of all the indirect branches.
1355  *
1356  * Remember that David Wheeler quote about "Any problem in computer science can
1357  * be solved with another layer of indirection"?  The rest of that quote is
1358  * "... But that usually will create another problem."  This is the first of
1359  * those problems.
1360  *
1361  * Our current solution is to allow the paravirt back end to optionally patch
1362  * over the indirect calls to replace them with something more efficient.  We
1363  * patch two of the simplest of the most commonly called functions: disable
1364  * interrupts and save interrupts.  We usually have 6 or 10 bytes to patch
1365  * into: the Guest versions of these operations are small enough that we can
1366  * fit comfortably.
1367  *
1368  * First we need assembly templates of each of the patchable Guest operations,
1369  * and these are in i386_head.S.
1370  */
1371 
1372 /*G:060 We construct a table from the assembler templates: */
1373 static const struct lguest_insns
1374 {
1375         const char *start, *end;
1376 } lguest_insns[] = {
1377         [PARAVIRT_PATCH(pv_irq_ops.irq_disable)] = { lgstart_cli, lgend_cli },
1378         [PARAVIRT_PATCH(pv_irq_ops.save_fl)] = { lgstart_pushf, lgend_pushf },
1379 };
1380 
1381 /*
1382  * Now our patch routine is fairly simple (based on the native one in
1383  * paravirt.c).  If we have a replacement, we copy it in and return how much of
1384  * the available space we used.
1385  */
1386 static unsigned lguest_patch(u8 type, u16 clobber, void *ibuf,
1387                              unsigned long addr, unsigned len)
1388 {
1389         unsigned int insn_len;
1390 
1391         /* Don't do anything special if we don't have a replacement */
1392         if (type >= ARRAY_SIZE(lguest_insns) || !lguest_insns[type].start)
1393                 return paravirt_patch_default(type, clobber, ibuf, addr, len);
1394 
1395         insn_len = lguest_insns[type].end - lguest_insns[type].start;
1396 
1397         /* Similarly if it can't fit (doesn't happen, but let's be thorough). */
1398         if (len < insn_len)
1399                 return paravirt_patch_default(type, clobber, ibuf, addr, len);
1400 
1401         /* Copy in our instructions. */
1402         memcpy(ibuf, lguest_insns[type].start, insn_len);
1403         return insn_len;
1404 }
1405 
1406 /*G:029
1407  * Once we get to lguest_init(), we know we're a Guest.  The various
1408  * pv_ops structures in the kernel provide points for (almost) every routine we
1409  * have to override to avoid privileged instructions.
1410  */
1411 __init void lguest_init(void)
1412 {
1413         /* We're under lguest. */
1414         pv_info.name = "lguest";
1415         /* Paravirt is enabled. */
1416         pv_info.paravirt_enabled = 1;
1417         /* We're running at privilege level 1, not 0 as normal. */
1418         pv_info.kernel_rpl = 1;
1419         /* Everyone except Xen runs with this set. */
1420         pv_info.shared_kernel_pmd = 1;
1421 
1422         /*
1423          * We set up all the lguest overrides for sensitive operations.  These
1424          * are detailed with the operations themselves.
1425          */
1426 
1427         /* Interrupt-related operations */
1428         pv_irq_ops.save_fl = PV_CALLEE_SAVE(lguest_save_fl);
1429         pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(lg_restore_fl);
1430         pv_irq_ops.irq_disable = PV_CALLEE_SAVE(lguest_irq_disable);
1431         pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(lg_irq_enable);
1432         pv_irq_ops.safe_halt = lguest_safe_halt;
1433 
1434         /* Setup operations */
1435         pv_init_ops.patch = lguest_patch;
1436 
1437         /* Intercepts of various CPU instructions */
1438         pv_cpu_ops.load_gdt = lguest_load_gdt;
1439         pv_cpu_ops.cpuid = lguest_cpuid;
1440         pv_cpu_ops.load_idt = lguest_load_idt;
1441         pv_cpu_ops.iret = lguest_iret;
1442         pv_cpu_ops.load_sp0 = lguest_load_sp0;
1443         pv_cpu_ops.load_tr_desc = lguest_load_tr_desc;
1444         pv_cpu_ops.set_ldt = lguest_set_ldt;
1445         pv_cpu_ops.load_tls = lguest_load_tls;
1446         pv_cpu_ops.get_debugreg = lguest_get_debugreg;
1447         pv_cpu_ops.set_debugreg = lguest_set_debugreg;
1448         pv_cpu_ops.clts = lguest_clts;
1449         pv_cpu_ops.read_cr0 = lguest_read_cr0;
1450         pv_cpu_ops.write_cr0 = lguest_write_cr0;
1451         pv_cpu_ops.read_cr4 = lguest_read_cr4;
1452         pv_cpu_ops.write_cr4 = lguest_write_cr4;
1453         pv_cpu_ops.write_gdt_entry = lguest_write_gdt_entry;
1454         pv_cpu_ops.write_idt_entry = lguest_write_idt_entry;
1455         pv_cpu_ops.wbinvd = lguest_wbinvd;
1456         pv_cpu_ops.start_context_switch = paravirt_start_context_switch;
1457         pv_cpu_ops.end_context_switch = lguest_end_context_switch;
1458 
1459         /* Pagetable management */
1460         pv_mmu_ops.write_cr3 = lguest_write_cr3;
1461         pv_mmu_ops.flush_tlb_user = lguest_flush_tlb_user;
1462         pv_mmu_ops.flush_tlb_single = lguest_flush_tlb_single;
1463         pv_mmu_ops.flush_tlb_kernel = lguest_flush_tlb_kernel;
1464         pv_mmu_ops.set_pte = lguest_set_pte;
1465         pv_mmu_ops.set_pte_at = lguest_set_pte_at;
1466         pv_mmu_ops.set_pmd = lguest_set_pmd;
1467 #ifdef CONFIG_X86_PAE
1468         pv_mmu_ops.set_pte_atomic = lguest_set_pte_atomic;
1469         pv_mmu_ops.pte_clear = lguest_pte_clear;
1470         pv_mmu_ops.pmd_clear = lguest_pmd_clear;
1471         pv_mmu_ops.set_pud = lguest_set_pud;
1472 #endif
1473         pv_mmu_ops.read_cr2 = lguest_read_cr2;
1474         pv_mmu_ops.read_cr3 = lguest_read_cr3;
1475         pv_mmu_ops.lazy_mode.enter = paravirt_enter_lazy_mmu;
1476         pv_mmu_ops.lazy_mode.leave = lguest_leave_lazy_mmu_mode;
1477         pv_mmu_ops.lazy_mode.flush = paravirt_flush_lazy_mmu;
1478         pv_mmu_ops.pte_update = lguest_pte_update;
1479         pv_mmu_ops.pte_update_defer = lguest_pte_update;
1480 
1481 #ifdef CONFIG_X86_LOCAL_APIC
1482         /* APIC read/write intercepts */
1483         set_lguest_basic_apic_ops();
1484 #endif
1485 
1486         x86_init.resources.memory_setup = lguest_memory_setup;
1487         x86_init.irqs.intr_init = lguest_init_IRQ;
1488         x86_init.timers.timer_init = lguest_time_init;
1489         x86_platform.calibrate_tsc = lguest_tsc_khz;
1490         x86_platform.get_wallclock =  lguest_get_wallclock;
1491 
1492         /*
1493          * Now is a good time to look at the implementations of these functions
1494          * before returning to the rest of lguest_init().
1495          */
1496 
1497         /*G:070
1498          * Now we've seen all the paravirt_ops, we return to
1499          * lguest_init() where the rest of the fairly chaotic boot setup
1500          * occurs.
1501          */
1502 
1503         /*
1504          * The stack protector is a weird thing where gcc places a canary
1505          * value on the stack and then checks it on return.  This file is
1506          * compiled with -fno-stack-protector it, so we got this far without
1507          * problems.  The value of the canary is kept at offset 20 from the
1508          * %gs register, so we need to set that up before calling C functions
1509          * in other files.
1510          */
1511         setup_stack_canary_segment(0);
1512 
1513         /*
1514          * We could just call load_stack_canary_segment(), but we might as well
1515          * call switch_to_new_gdt() which loads the whole table and sets up the
1516          * per-cpu segment descriptor register %fs as well.
1517          */
1518         switch_to_new_gdt(0);
1519 
1520         /*
1521          * The Host<->Guest Switcher lives at the top of our address space, and
1522          * the Host told us how big it is when we made LGUEST_INIT hypercall:
1523          * it put the answer in lguest_data.reserve_mem
1524          */
1525         reserve_top_address(lguest_data.reserve_mem);
1526 
1527         /*
1528          * If we don't initialize the lock dependency checker now, it crashes
1529          * atomic_notifier_chain_register, then paravirt_disable_iospace.
1530          */
1531         lockdep_init();
1532 
1533         /* Hook in our special panic hypercall code. */
1534         atomic_notifier_chain_register(&panic_notifier_list, &paniced);
1535 
1536         /*
1537          * This is messy CPU setup stuff which the native boot code does before
1538          * start_kernel, so we have to do, too:
1539          */
1540         cpu_detect(&new_cpu_data);
1541         /* head.S usually sets up the first capability word, so do it here. */
1542         new_cpu_data.x86_capability[0] = cpuid_edx(1);
1543 
1544         /* Math is always hard! */
1545         set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU);
1546 
1547         /* We don't have features.  We have puppies!  Puppies! */
1548 #ifdef CONFIG_X86_MCE
1549         mca_cfg.disabled = true;
1550 #endif
1551 #ifdef CONFIG_ACPI
1552         acpi_disabled = 1;
1553 #endif
1554 
1555         /*
1556          * We set the preferred console to "hvc".  This is the "hypervisor
1557          * virtual console" driver written by the PowerPC people, which we also
1558          * adapted for lguest's use.
1559          */
1560         add_preferred_console("hvc", 0, NULL);
1561 
1562         /* Register our very early console. */
1563         virtio_cons_early_init(early_put_chars);
1564 
1565         /* Don't let ACPI try to control our PCI interrupts. */
1566         disable_acpi();
1567 
1568         /* We control them ourselves, by overriding these two hooks. */
1569         pcibios_enable_irq = lguest_enable_irq;
1570         pcibios_disable_irq = lguest_disable_irq;
1571 
1572         /*
1573          * Last of all, we set the power management poweroff hook to point to
1574          * the Guest routine to power off, and the reboot hook to our restart
1575          * routine.
1576          */
1577         pm_power_off = lguest_power_off;
1578         machine_ops.restart = lguest_restart;
1579 
1580         /*
1581          * Now we're set up, call i386_start_kernel() in head32.c and we proceed
1582          * to boot as normal.  It never returns.
1583          */
1584         i386_start_kernel();
1585 }
1586 /*
1587  * This marks the end of stage II of our journey, The Guest.
1588  *
1589  * It is now time for us to explore the layer of virtual drivers and complete
1590  * our understanding of the Guest in "make Drivers".
1591  */
1592 

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