~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

TOMOYO Linux Cross Reference
Linux/arch/xtensa/kernel/pci.c

Version: ~ [ linux-6.1-rc7 ] ~ [ linux-6.0.10 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.80 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.156 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.225 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.267 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.300 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.334 ] ~ [ linux-4.8.17 ] ~ [ linux-4.7.10 ] ~ [ linux-4.6.7 ] ~ [ linux-4.5.7 ] ~ [ linux-4.4.302 ] ~ [ linux-4.3.6 ] ~ [ linux-4.2.8 ] ~ [ linux-4.1.52 ] ~ [ linux-4.0.9 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.9 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 /*
  2  * arch/xtensa/kernel/pci.c
  3  *
  4  * PCI bios-type initialisation for PCI machines
  5  *
  6  * This program is free software; you can redistribute  it and/or modify it
  7  * under  the terms of  the GNU General  Public License as published by the
  8  * Free Software Foundation;  either version 2 of the  License, or (at your
  9  * option) any later version.
 10  *
 11  * Copyright (C) 2001-2005 Tensilica Inc.
 12  *
 13  * Based largely on work from Cort (ppc/kernel/pci.c)
 14  * IO functions copied from sparc.
 15  *
 16  * Chris Zankel <chris@zankel.net>
 17  *
 18  */
 19 
 20 #include <linux/kernel.h>
 21 #include <linux/pci.h>
 22 #include <linux/delay.h>
 23 #include <linux/string.h>
 24 #include <linux/init.h>
 25 #include <linux/sched.h>
 26 #include <linux/errno.h>
 27 #include <linux/memblock.h>
 28 
 29 #include <asm/pci-bridge.h>
 30 #include <asm/platform.h>
 31 
 32 /* PCI Controller */
 33 
 34 
 35 /*
 36  * pcibios_alloc_controller
 37  * pcibios_enable_device
 38  * pcibios_fixups
 39  * pcibios_align_resource
 40  * pcibios_fixup_bus
 41  * pci_bus_add_device
 42  */
 43 
 44 static struct pci_controller *pci_ctrl_head;
 45 static struct pci_controller **pci_ctrl_tail = &pci_ctrl_head;
 46 
 47 static int pci_bus_count;
 48 
 49 /*
 50  * We need to avoid collisions with `mirrored' VGA ports
 51  * and other strange ISA hardware, so we always want the
 52  * addresses to be allocated in the 0x000-0x0ff region
 53  * modulo 0x400.
 54  *
 55  * Why? Because some silly external IO cards only decode
 56  * the low 10 bits of the IO address. The 0x00-0xff region
 57  * is reserved for motherboard devices that decode all 16
 58  * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
 59  * but we want to try to avoid allocating at 0x2900-0x2bff
 60  * which might have be mirrored at 0x0100-0x03ff..
 61  */
 62 resource_size_t
 63 pcibios_align_resource(void *data, const struct resource *res,
 64                        resource_size_t size, resource_size_t align)
 65 {
 66         struct pci_dev *dev = data;
 67         resource_size_t start = res->start;
 68 
 69         if (res->flags & IORESOURCE_IO) {
 70                 if (size > 0x100) {
 71                         pr_err("PCI: I/O Region %s/%d too large (%u bytes)\n",
 72                                         pci_name(dev), dev->resource - res,
 73                                         size);
 74                 }
 75 
 76                 if (start & 0x300)
 77                         start = (start + 0x3ff) & ~0x3ff;
 78         }
 79 
 80         return start;
 81 }
 82 
 83 static void __init pci_controller_apertures(struct pci_controller *pci_ctrl,
 84                                             struct list_head *resources)
 85 {
 86         struct resource *res;
 87         unsigned long io_offset;
 88         int i;
 89 
 90         io_offset = (unsigned long)pci_ctrl->io_space.base;
 91         res = &pci_ctrl->io_resource;
 92         if (!res->flags) {
 93                 if (io_offset)
 94                         pr_err("I/O resource not set for host bridge %d\n",
 95                                pci_ctrl->index);
 96                 res->start = 0;
 97                 res->end = IO_SPACE_LIMIT;
 98                 res->flags = IORESOURCE_IO;
 99         }
100         res->start += io_offset;
101         res->end += io_offset;
102         pci_add_resource_offset(resources, res, io_offset);
103 
104         for (i = 0; i < 3; i++) {
105                 res = &pci_ctrl->mem_resources[i];
106                 if (!res->flags) {
107                         if (i > 0)
108                                 continue;
109                         pr_err("Memory resource not set for host bridge %d\n",
110                                pci_ctrl->index);
111                         res->start = 0;
112                         res->end = ~0U;
113                         res->flags = IORESOURCE_MEM;
114                 }
115                 pci_add_resource(resources, res);
116         }
117 }
118 
119 static int __init pcibios_init(void)
120 {
121         struct pci_controller *pci_ctrl;
122         struct list_head resources;
123         struct pci_bus *bus;
124         int next_busno = 0, ret;
125 
126         pr_info("PCI: Probing PCI hardware\n");
127 
128         /* Scan all of the recorded PCI controllers.  */
129         for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) {
130                 pci_ctrl->last_busno = 0xff;
131                 INIT_LIST_HEAD(&resources);
132                 pci_controller_apertures(pci_ctrl, &resources);
133                 bus = pci_scan_root_bus(NULL, pci_ctrl->first_busno,
134                                         pci_ctrl->ops, pci_ctrl, &resources);
135                 if (!bus)
136                         continue;
137 
138                 pci_ctrl->bus = bus;
139                 pci_ctrl->last_busno = bus->busn_res.end;
140                 if (next_busno <= pci_ctrl->last_busno)
141                         next_busno = pci_ctrl->last_busno+1;
142         }
143         pci_bus_count = next_busno;
144         ret = platform_pcibios_fixup();
145         if (ret)
146                 return ret;
147 
148         for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) {
149                 if (pci_ctrl->bus)
150                         pci_bus_add_devices(pci_ctrl->bus);
151         }
152 
153         return 0;
154 }
155 
156 subsys_initcall(pcibios_init);
157 
158 void pcibios_fixup_bus(struct pci_bus *bus)
159 {
160         if (bus->parent) {
161                 /* This is a subordinate bridge */
162                 pci_read_bridge_bases(bus);
163         }
164 }
165 
166 void pcibios_set_master(struct pci_dev *dev)
167 {
168         /* No special bus mastering setup handling */
169 }
170 
171 int pcibios_enable_device(struct pci_dev *dev, int mask)
172 {
173         u16 cmd, old_cmd;
174         int idx;
175         struct resource *r;
176 
177         pci_read_config_word(dev, PCI_COMMAND, &cmd);
178         old_cmd = cmd;
179         for (idx=0; idx<6; idx++) {
180                 r = &dev->resource[idx];
181                 if (!r->start && r->end) {
182                         pci_err(dev, "can't enable device: resource collisions\n");
183                         return -EINVAL;
184                 }
185                 if (r->flags & IORESOURCE_IO)
186                         cmd |= PCI_COMMAND_IO;
187                 if (r->flags & IORESOURCE_MEM)
188                         cmd |= PCI_COMMAND_MEMORY;
189         }
190         if (cmd != old_cmd) {
191                 pci_info(dev, "enabling device (%04x -> %04x)\n", old_cmd, cmd);
192                 pci_write_config_word(dev, PCI_COMMAND, cmd);
193         }
194 
195         return 0;
196 }
197 
198 /*
199  * Platform support for /proc/bus/pci/X/Y mmap()s.
200  *  -- paulus.
201  */
202 
203 int pci_iobar_pfn(struct pci_dev *pdev, int bar, struct vm_area_struct *vma)
204 {
205         struct pci_controller *pci_ctrl = (struct pci_controller*) pdev->sysdata;
206         resource_size_t ioaddr = pci_resource_start(pdev, bar);
207 
208         if (pci_ctrl == 0)
209                 return -EINVAL;         /* should never happen */
210 
211         /* Convert to an offset within this PCI controller */
212         ioaddr -= (unsigned long)pci_ctrl->io_space.base;
213 
214         vma->vm_pgoff += (ioaddr + pci_ctrl->io_space.start) >> PAGE_SHIFT;
215         return 0;
216 }
217 

~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

kernel.org | git.kernel.org | LWN.net | Project Home | Wiki (Japanese) | Wiki (English) | SVN repository | Mail admin

Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.

osdn.jp