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TOMOYO Linux Cross Reference
Linux/include/acpi/actbl2.h

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  1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
  2 /******************************************************************************
  3  *
  4  * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
  5  *
  6  * Copyright (C) 2000 - 2018, Intel Corp.
  7  *
  8  *****************************************************************************/
  9 
 10 #ifndef __ACTBL2_H__
 11 #define __ACTBL2_H__
 12 
 13 /*******************************************************************************
 14  *
 15  * Additional ACPI Tables (2)
 16  *
 17  * These tables are not consumed directly by the ACPICA subsystem, but are
 18  * included here to support device drivers and the AML disassembler.
 19  *
 20  ******************************************************************************/
 21 
 22 /*
 23  * Values for description table header signatures for tables defined in this
 24  * file. Useful because they make it more difficult to inadvertently type in
 25  * the wrong signature.
 26  */
 27 #define ACPI_SIG_IORT           "IORT"  /* IO Remapping Table */
 28 #define ACPI_SIG_IVRS           "IVRS"  /* I/O Virtualization Reporting Structure */
 29 #define ACPI_SIG_LPIT           "LPIT"  /* Low Power Idle Table */
 30 #define ACPI_SIG_MADT           "APIC"  /* Multiple APIC Description Table */
 31 #define ACPI_SIG_MCFG           "MCFG"  /* PCI Memory Mapped Configuration table */
 32 #define ACPI_SIG_MCHI           "MCHI"  /* Management Controller Host Interface table */
 33 #define ACPI_SIG_MPST           "MPST"  /* Memory Power State Table */
 34 #define ACPI_SIG_MSCT           "MSCT"  /* Maximum System Characteristics Table */
 35 #define ACPI_SIG_MSDM           "MSDM"  /* Microsoft Data Management Table */
 36 #define ACPI_SIG_MTMR           "MTMR"  /* MID Timer table */
 37 #define ACPI_SIG_NFIT           "NFIT"  /* NVDIMM Firmware Interface Table */
 38 #define ACPI_SIG_PCCT           "PCCT"  /* Platform Communications Channel Table */
 39 #define ACPI_SIG_PDTT           "PDTT"  /* Platform Debug Trigger Table */
 40 #define ACPI_SIG_PMTT           "PMTT"  /* Platform Memory Topology Table */
 41 #define ACPI_SIG_PPTT           "PPTT"  /* Processor Properties Topology Table */
 42 #define ACPI_SIG_RASF           "RASF"  /* RAS Feature table */
 43 #define ACPI_SIG_SBST           "SBST"  /* Smart Battery Specification Table */
 44 #define ACPI_SIG_SDEI           "SDEI"  /* Software Delegated Exception Interface Table */
 45 #define ACPI_SIG_SDEV           "SDEV"  /* Secure Devices table */
 46 
 47 /*
 48  * All tables must be byte-packed to match the ACPI specification, since
 49  * the tables are provided by the system BIOS.
 50  */
 51 #pragma pack(1)
 52 
 53 /*
 54  * Note: C bitfields are not used for this reason:
 55  *
 56  * "Bitfields are great and easy to read, but unfortunately the C language
 57  * does not specify the layout of bitfields in memory, which means they are
 58  * essentially useless for dealing with packed data in on-disk formats or
 59  * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
 60  * this decision was a design error in C. Ritchie could have picked an order
 61  * and stuck with it." Norman Ramsey.
 62  * See http://stackoverflow.com/a/1053662/41661
 63  */
 64 
 65 /*******************************************************************************
 66  *
 67  * IORT - IO Remapping Table
 68  *
 69  * Conforms to "IO Remapping Table System Software on ARM Platforms",
 70  * Document number: ARM DEN 0049D, March 2018
 71  *
 72  ******************************************************************************/
 73 
 74 struct acpi_table_iort {
 75         struct acpi_table_header header;
 76         u32 node_count;
 77         u32 node_offset;
 78         u32 reserved;
 79 };
 80 
 81 /*
 82  * IORT subtables
 83  */
 84 struct acpi_iort_node {
 85         u8 type;
 86         u16 length;
 87         u8 revision;
 88         u32 reserved;
 89         u32 mapping_count;
 90         u32 mapping_offset;
 91         char node_data[1];
 92 };
 93 
 94 /* Values for subtable Type above */
 95 
 96 enum acpi_iort_node_type {
 97         ACPI_IORT_NODE_ITS_GROUP = 0x00,
 98         ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
 99         ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
100         ACPI_IORT_NODE_SMMU = 0x03,
101         ACPI_IORT_NODE_SMMU_V3 = 0x04,
102         ACPI_IORT_NODE_PMCG = 0x05
103 };
104 
105 struct acpi_iort_id_mapping {
106         u32 input_base;         /* Lowest value in input range */
107         u32 id_count;           /* Number of IDs */
108         u32 output_base;        /* Lowest value in output range */
109         u32 output_reference;   /* A reference to the output node */
110         u32 flags;
111 };
112 
113 /* Masks for Flags field above for IORT subtable */
114 
115 #define ACPI_IORT_ID_SINGLE_MAPPING (1)
116 
117 struct acpi_iort_memory_access {
118         u32 cache_coherency;
119         u8 hints;
120         u16 reserved;
121         u8 memory_flags;
122 };
123 
124 /* Values for cache_coherency field above */
125 
126 #define ACPI_IORT_NODE_COHERENT         0x00000001      /* The device node is fully coherent */
127 #define ACPI_IORT_NODE_NOT_COHERENT     0x00000000      /* The device node is not coherent */
128 
129 /* Masks for Hints field above */
130 
131 #define ACPI_IORT_HT_TRANSIENT          (1)
132 #define ACPI_IORT_HT_WRITE              (1<<1)
133 #define ACPI_IORT_HT_READ               (1<<2)
134 #define ACPI_IORT_HT_OVERRIDE           (1<<3)
135 
136 /* Masks for memory_flags field above */
137 
138 #define ACPI_IORT_MF_COHERENCY          (1)
139 #define ACPI_IORT_MF_ATTRIBUTES         (1<<1)
140 
141 /*
142  * IORT node specific subtables
143  */
144 struct acpi_iort_its_group {
145         u32 its_count;
146         u32 identifiers[1];     /* GIC ITS identifier arrary */
147 };
148 
149 struct acpi_iort_named_component {
150         u32 node_flags;
151         u64 memory_properties;  /* Memory access properties */
152         u8 memory_address_limit;        /* Memory address size limit */
153         char device_name[1];    /* Path of namespace object */
154 };
155 
156 /* Masks for Flags field above */
157 
158 #define ACPI_IORT_NC_STALL_SUPPORTED    (1)
159 #define ACPI_IORT_NC_PASID_BITS         (31<<1)
160 
161 struct acpi_iort_root_complex {
162         u64 memory_properties;  /* Memory access properties */
163         u32 ats_attribute;
164         u32 pci_segment_number;
165         u8 memory_address_limit;        /* Memory address size limit */
166         u8 reserved[3];         /* Reserved, must be zero */
167 };
168 
169 /* Values for ats_attribute field above */
170 
171 #define ACPI_IORT_ATS_SUPPORTED         0x00000001      /* The root complex supports ATS */
172 #define ACPI_IORT_ATS_UNSUPPORTED       0x00000000      /* The root complex doesn't support ATS */
173 
174 struct acpi_iort_smmu {
175         u64 base_address;       /* SMMU base address */
176         u64 span;               /* Length of memory range */
177         u32 model;
178         u32 flags;
179         u32 global_interrupt_offset;
180         u32 context_interrupt_count;
181         u32 context_interrupt_offset;
182         u32 pmu_interrupt_count;
183         u32 pmu_interrupt_offset;
184         u64 interrupts[1];      /* Interrupt array */
185 };
186 
187 /* Values for Model field above */
188 
189 #define ACPI_IORT_SMMU_V1               0x00000000      /* Generic SMMUv1 */
190 #define ACPI_IORT_SMMU_V2               0x00000001      /* Generic SMMUv2 */
191 #define ACPI_IORT_SMMU_CORELINK_MMU400  0x00000002      /* ARM Corelink MMU-400 */
192 #define ACPI_IORT_SMMU_CORELINK_MMU500  0x00000003      /* ARM Corelink MMU-500 */
193 #define ACPI_IORT_SMMU_CORELINK_MMU401  0x00000004      /* ARM Corelink MMU-401 */
194 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX  0x00000005      /* Cavium thunder_x SMMUv2 */
195 
196 /* Masks for Flags field above */
197 
198 #define ACPI_IORT_SMMU_DVM_SUPPORTED    (1)
199 #define ACPI_IORT_SMMU_COHERENT_WALK    (1<<1)
200 
201 /* Global interrupt format */
202 
203 struct acpi_iort_smmu_gsi {
204         u32 nsg_irpt;
205         u32 nsg_irpt_flags;
206         u32 nsg_cfg_irpt;
207         u32 nsg_cfg_irpt_flags;
208 };
209 
210 struct acpi_iort_smmu_v3 {
211         u64 base_address;       /* SMMUv3 base address */
212         u32 flags;
213         u32 reserved;
214         u64 vatos_address;
215         u32 model;
216         u32 event_gsiv;
217         u32 pri_gsiv;
218         u32 gerr_gsiv;
219         u32 sync_gsiv;
220         u32 pxm;
221         u32 id_mapping_index;
222 };
223 
224 /* Values for Model field above */
225 
226 #define ACPI_IORT_SMMU_V3_GENERIC           0x00000000  /* Generic SMMUv3 */
227 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X  0x00000001  /* hi_silicon Hi161x SMMUv3 */
228 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX     0x00000002  /* Cavium CN99xx SMMUv3 */
229 
230 /* Masks for Flags field above */
231 
232 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE   (1)
233 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE     (3<<1)
234 #define ACPI_IORT_SMMU_V3_PXM_VALID         (1<<3)
235 
236 struct acpi_iort_pmcg {
237         u64 page0_base_address;
238         u32 overflow_gsiv;
239         u32 node_reference;
240         u64 page1_base_address;
241 };
242 
243 /*******************************************************************************
244  *
245  * IVRS - I/O Virtualization Reporting Structure
246  *        Version 1
247  *
248  * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
249  * Revision 1.26, February 2009.
250  *
251  ******************************************************************************/
252 
253 struct acpi_table_ivrs {
254         struct acpi_table_header header;        /* Common ACPI table header */
255         u32 info;               /* Common virtualization info */
256         u64 reserved;
257 };
258 
259 /* Values for Info field above */
260 
261 #define ACPI_IVRS_PHYSICAL_SIZE     0x00007F00  /* 7 bits, physical address size */
262 #define ACPI_IVRS_VIRTUAL_SIZE      0x003F8000  /* 7 bits, virtual address size */
263 #define ACPI_IVRS_ATS_RESERVED      0x00400000  /* ATS address translation range reserved */
264 
265 /* IVRS subtable header */
266 
267 struct acpi_ivrs_header {
268         u8 type;                /* Subtable type */
269         u8 flags;
270         u16 length;             /* Subtable length */
271         u16 device_id;          /* ID of IOMMU */
272 };
273 
274 /* Values for subtable Type above */
275 
276 enum acpi_ivrs_type {
277         ACPI_IVRS_TYPE_HARDWARE = 0x10,
278         ACPI_IVRS_TYPE_MEMORY1 = 0x20,
279         ACPI_IVRS_TYPE_MEMORY2 = 0x21,
280         ACPI_IVRS_TYPE_MEMORY3 = 0x22
281 };
282 
283 /* Masks for Flags field above for IVHD subtable */
284 
285 #define ACPI_IVHD_TT_ENABLE         (1)
286 #define ACPI_IVHD_PASS_PW           (1<<1)
287 #define ACPI_IVHD_RES_PASS_PW       (1<<2)
288 #define ACPI_IVHD_ISOC              (1<<3)
289 #define ACPI_IVHD_IOTLB             (1<<4)
290 
291 /* Masks for Flags field above for IVMD subtable */
292 
293 #define ACPI_IVMD_UNITY             (1)
294 #define ACPI_IVMD_READ              (1<<1)
295 #define ACPI_IVMD_WRITE             (1<<2)
296 #define ACPI_IVMD_EXCLUSION_RANGE   (1<<3)
297 
298 /*
299  * IVRS subtables, correspond to Type in struct acpi_ivrs_header
300  */
301 
302 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
303 
304 struct acpi_ivrs_hardware {
305         struct acpi_ivrs_header header;
306         u16 capability_offset;  /* Offset for IOMMU control fields */
307         u64 base_address;       /* IOMMU control registers */
308         u16 pci_segment_group;
309         u16 info;               /* MSI number and unit ID */
310         u32 reserved;
311 };
312 
313 /* Masks for Info field above */
314 
315 #define ACPI_IVHD_MSI_NUMBER_MASK   0x001F      /* 5 bits, MSI message number */
316 #define ACPI_IVHD_UNIT_ID_MASK      0x1F00      /* 5 bits, unit_ID */
317 
318 /*
319  * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure.
320  * Upper two bits of the Type field are the (encoded) length of the structure.
321  * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
322  * are reserved for future use but not defined.
323  */
324 struct acpi_ivrs_de_header {
325         u8 type;
326         u16 id;
327         u8 data_setting;
328 };
329 
330 /* Length of device entry is in the top two bits of Type field above */
331 
332 #define ACPI_IVHD_ENTRY_LENGTH      0xC0
333 
334 /* Values for device entry Type field above */
335 
336 enum acpi_ivrs_device_entry_type {
337         /* 4-byte device entries, all use struct acpi_ivrs_device4 */
338 
339         ACPI_IVRS_TYPE_PAD4 = 0,
340         ACPI_IVRS_TYPE_ALL = 1,
341         ACPI_IVRS_TYPE_SELECT = 2,
342         ACPI_IVRS_TYPE_START = 3,
343         ACPI_IVRS_TYPE_END = 4,
344 
345         /* 8-byte device entries */
346 
347         ACPI_IVRS_TYPE_PAD8 = 64,
348         ACPI_IVRS_TYPE_NOT_USED = 65,
349         ACPI_IVRS_TYPE_ALIAS_SELECT = 66,       /* Uses struct acpi_ivrs_device8a */
350         ACPI_IVRS_TYPE_ALIAS_START = 67,        /* Uses struct acpi_ivrs_device8a */
351         ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */
352         ACPI_IVRS_TYPE_EXT_START = 71,  /* Uses struct acpi_ivrs_device8b */
353         ACPI_IVRS_TYPE_SPECIAL = 72     /* Uses struct acpi_ivrs_device8c */
354 };
355 
356 /* Values for Data field above */
357 
358 #define ACPI_IVHD_INIT_PASS         (1)
359 #define ACPI_IVHD_EINT_PASS         (1<<1)
360 #define ACPI_IVHD_NMI_PASS          (1<<2)
361 #define ACPI_IVHD_SYSTEM_MGMT       (3<<4)
362 #define ACPI_IVHD_LINT0_PASS        (1<<6)
363 #define ACPI_IVHD_LINT1_PASS        (1<<7)
364 
365 /* Types 0-4: 4-byte device entry */
366 
367 struct acpi_ivrs_device4 {
368         struct acpi_ivrs_de_header header;
369 };
370 
371 /* Types 66-67: 8-byte device entry */
372 
373 struct acpi_ivrs_device8a {
374         struct acpi_ivrs_de_header header;
375         u8 reserved1;
376         u16 used_id;
377         u8 reserved2;
378 };
379 
380 /* Types 70-71: 8-byte device entry */
381 
382 struct acpi_ivrs_device8b {
383         struct acpi_ivrs_de_header header;
384         u32 extended_data;
385 };
386 
387 /* Values for extended_data above */
388 
389 #define ACPI_IVHD_ATS_DISABLED      (1<<31)
390 
391 /* Type 72: 8-byte device entry */
392 
393 struct acpi_ivrs_device8c {
394         struct acpi_ivrs_de_header header;
395         u8 handle;
396         u16 used_id;
397         u8 variety;
398 };
399 
400 /* Values for Variety field above */
401 
402 #define ACPI_IVHD_IOAPIC            1
403 #define ACPI_IVHD_HPET              2
404 
405 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
406 
407 struct acpi_ivrs_memory {
408         struct acpi_ivrs_header header;
409         u16 aux_data;
410         u64 reserved;
411         u64 start_address;
412         u64 memory_length;
413 };
414 
415 /*******************************************************************************
416  *
417  * LPIT - Low Power Idle Table
418  *
419  * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
420  *
421  ******************************************************************************/
422 
423 struct acpi_table_lpit {
424         struct acpi_table_header header;        /* Common ACPI table header */
425 };
426 
427 /* LPIT subtable header */
428 
429 struct acpi_lpit_header {
430         u32 type;               /* Subtable type */
431         u32 length;             /* Subtable length */
432         u16 unique_id;
433         u16 reserved;
434         u32 flags;
435 };
436 
437 /* Values for subtable Type above */
438 
439 enum acpi_lpit_type {
440         ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
441         ACPI_LPIT_TYPE_RESERVED = 0x01  /* 1 and above are reserved */
442 };
443 
444 /* Masks for Flags field above  */
445 
446 #define ACPI_LPIT_STATE_DISABLED    (1)
447 #define ACPI_LPIT_NO_COUNTER        (1<<1)
448 
449 /*
450  * LPIT subtables, correspond to Type in struct acpi_lpit_header
451  */
452 
453 /* 0x00: Native C-state instruction based LPI structure */
454 
455 struct acpi_lpit_native {
456         struct acpi_lpit_header header;
457         struct acpi_generic_address entry_trigger;
458         u32 residency;
459         u32 latency;
460         struct acpi_generic_address residency_counter;
461         u64 counter_frequency;
462 };
463 
464 /*******************************************************************************
465  *
466  * MADT - Multiple APIC Description Table
467  *        Version 3
468  *
469  ******************************************************************************/
470 
471 struct acpi_table_madt {
472         struct acpi_table_header header;        /* Common ACPI table header */
473         u32 address;            /* Physical address of local APIC */
474         u32 flags;
475 };
476 
477 /* Masks for Flags field above */
478 
479 #define ACPI_MADT_PCAT_COMPAT       (1) /* 00: System also has dual 8259s */
480 
481 /* Values for PCATCompat flag */
482 
483 #define ACPI_MADT_DUAL_PIC          1
484 #define ACPI_MADT_MULTIPLE_APIC     0
485 
486 /* Values for MADT subtable type in struct acpi_subtable_header */
487 
488 enum acpi_madt_type {
489         ACPI_MADT_TYPE_LOCAL_APIC = 0,
490         ACPI_MADT_TYPE_IO_APIC = 1,
491         ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
492         ACPI_MADT_TYPE_NMI_SOURCE = 3,
493         ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
494         ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
495         ACPI_MADT_TYPE_IO_SAPIC = 6,
496         ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
497         ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
498         ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
499         ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
500         ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
501         ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
502         ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
503         ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
504         ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
505         ACPI_MADT_TYPE_RESERVED = 16    /* 16 and greater are reserved */
506 };
507 
508 /*
509  * MADT Subtables, correspond to Type in struct acpi_subtable_header
510  */
511 
512 /* 0: Processor Local APIC */
513 
514 struct acpi_madt_local_apic {
515         struct acpi_subtable_header header;
516         u8 processor_id;        /* ACPI processor id */
517         u8 id;                  /* Processor's local APIC id */
518         u32 lapic_flags;
519 };
520 
521 /* 1: IO APIC */
522 
523 struct acpi_madt_io_apic {
524         struct acpi_subtable_header header;
525         u8 id;                  /* I/O APIC ID */
526         u8 reserved;            /* reserved - must be zero */
527         u32 address;            /* APIC physical address */
528         u32 global_irq_base;    /* Global system interrupt where INTI lines start */
529 };
530 
531 /* 2: Interrupt Override */
532 
533 struct acpi_madt_interrupt_override {
534         struct acpi_subtable_header header;
535         u8 bus;                 /* 0 - ISA */
536         u8 source_irq;          /* Interrupt source (IRQ) */
537         u32 global_irq;         /* Global system interrupt */
538         u16 inti_flags;
539 };
540 
541 /* 3: NMI Source */
542 
543 struct acpi_madt_nmi_source {
544         struct acpi_subtable_header header;
545         u16 inti_flags;
546         u32 global_irq;         /* Global system interrupt */
547 };
548 
549 /* 4: Local APIC NMI */
550 
551 struct acpi_madt_local_apic_nmi {
552         struct acpi_subtable_header header;
553         u8 processor_id;        /* ACPI processor id */
554         u16 inti_flags;
555         u8 lint;                /* LINTn to which NMI is connected */
556 };
557 
558 /* 5: Address Override */
559 
560 struct acpi_madt_local_apic_override {
561         struct acpi_subtable_header header;
562         u16 reserved;           /* Reserved, must be zero */
563         u64 address;            /* APIC physical address */
564 };
565 
566 /* 6: I/O Sapic */
567 
568 struct acpi_madt_io_sapic {
569         struct acpi_subtable_header header;
570         u8 id;                  /* I/O SAPIC ID */
571         u8 reserved;            /* Reserved, must be zero */
572         u32 global_irq_base;    /* Global interrupt for SAPIC start */
573         u64 address;            /* SAPIC physical address */
574 };
575 
576 /* 7: Local Sapic */
577 
578 struct acpi_madt_local_sapic {
579         struct acpi_subtable_header header;
580         u8 processor_id;        /* ACPI processor id */
581         u8 id;                  /* SAPIC ID */
582         u8 eid;                 /* SAPIC EID */
583         u8 reserved[3];         /* Reserved, must be zero */
584         u32 lapic_flags;
585         u32 uid;                /* Numeric UID - ACPI 3.0 */
586         char uid_string[1];     /* String UID  - ACPI 3.0 */
587 };
588 
589 /* 8: Platform Interrupt Source */
590 
591 struct acpi_madt_interrupt_source {
592         struct acpi_subtable_header header;
593         u16 inti_flags;
594         u8 type;                /* 1=PMI, 2=INIT, 3=corrected */
595         u8 id;                  /* Processor ID */
596         u8 eid;                 /* Processor EID */
597         u8 io_sapic_vector;     /* Vector value for PMI interrupts */
598         u32 global_irq;         /* Global system interrupt */
599         u32 flags;              /* Interrupt Source Flags */
600 };
601 
602 /* Masks for Flags field above */
603 
604 #define ACPI_MADT_CPEI_OVERRIDE     (1)
605 
606 /* 9: Processor Local X2APIC (ACPI 4.0) */
607 
608 struct acpi_madt_local_x2apic {
609         struct acpi_subtable_header header;
610         u16 reserved;           /* reserved - must be zero */
611         u32 local_apic_id;      /* Processor x2APIC ID  */
612         u32 lapic_flags;
613         u32 uid;                /* ACPI processor UID */
614 };
615 
616 /* 10: Local X2APIC NMI (ACPI 4.0) */
617 
618 struct acpi_madt_local_x2apic_nmi {
619         struct acpi_subtable_header header;
620         u16 inti_flags;
621         u32 uid;                /* ACPI processor UID */
622         u8 lint;                /* LINTn to which NMI is connected */
623         u8 reserved[3];         /* reserved - must be zero */
624 };
625 
626 /* 11: Generic Interrupt (ACPI 5.0 + ACPI 6.0 changes) */
627 
628 struct acpi_madt_generic_interrupt {
629         struct acpi_subtable_header header;
630         u16 reserved;           /* reserved - must be zero */
631         u32 cpu_interface_number;
632         u32 uid;
633         u32 flags;
634         u32 parking_version;
635         u32 performance_interrupt;
636         u64 parked_address;
637         u64 base_address;
638         u64 gicv_base_address;
639         u64 gich_base_address;
640         u32 vgic_interrupt;
641         u64 gicr_base_address;
642         u64 arm_mpidr;
643         u8 efficiency_class;
644         u8 reserved2[3];
645 };
646 
647 /* Masks for Flags field above */
648 
649 /* ACPI_MADT_ENABLED                    (1)      Processor is usable if set */
650 #define ACPI_MADT_PERFORMANCE_IRQ_MODE  (1<<1)  /* 01: Performance Interrupt Mode */
651 #define ACPI_MADT_VGIC_IRQ_MODE         (1<<2)  /* 02: VGIC Maintenance Interrupt mode */
652 
653 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
654 
655 struct acpi_madt_generic_distributor {
656         struct acpi_subtable_header header;
657         u16 reserved;           /* reserved - must be zero */
658         u32 gic_id;
659         u64 base_address;
660         u32 global_irq_base;
661         u8 version;
662         u8 reserved2[3];        /* reserved - must be zero */
663 };
664 
665 /* Values for Version field above */
666 
667 enum acpi_madt_gic_version {
668         ACPI_MADT_GIC_VERSION_NONE = 0,
669         ACPI_MADT_GIC_VERSION_V1 = 1,
670         ACPI_MADT_GIC_VERSION_V2 = 2,
671         ACPI_MADT_GIC_VERSION_V3 = 3,
672         ACPI_MADT_GIC_VERSION_V4 = 4,
673         ACPI_MADT_GIC_VERSION_RESERVED = 5      /* 5 and greater are reserved */
674 };
675 
676 /* 13: Generic MSI Frame (ACPI 5.1) */
677 
678 struct acpi_madt_generic_msi_frame {
679         struct acpi_subtable_header header;
680         u16 reserved;           /* reserved - must be zero */
681         u32 msi_frame_id;
682         u64 base_address;
683         u32 flags;
684         u16 spi_count;
685         u16 spi_base;
686 };
687 
688 /* Masks for Flags field above */
689 
690 #define ACPI_MADT_OVERRIDE_SPI_VALUES   (1)
691 
692 /* 14: Generic Redistributor (ACPI 5.1) */
693 
694 struct acpi_madt_generic_redistributor {
695         struct acpi_subtable_header header;
696         u16 reserved;           /* reserved - must be zero */
697         u64 base_address;
698         u32 length;
699 };
700 
701 /* 15: Generic Translator (ACPI 6.0) */
702 
703 struct acpi_madt_generic_translator {
704         struct acpi_subtable_header header;
705         u16 reserved;           /* reserved - must be zero */
706         u32 translation_id;
707         u64 base_address;
708         u32 reserved2;
709 };
710 
711 /*
712  * Common flags fields for MADT subtables
713  */
714 
715 /* MADT Local APIC flags */
716 
717 #define ACPI_MADT_ENABLED           (1) /* 00: Processor is usable if set */
718 
719 /* MADT MPS INTI flags (inti_flags) */
720 
721 #define ACPI_MADT_POLARITY_MASK     (3) /* 00-01: Polarity of APIC I/O input signals */
722 #define ACPI_MADT_TRIGGER_MASK      (3<<2)      /* 02-03: Trigger mode of APIC input signals */
723 
724 /* Values for MPS INTI flags */
725 
726 #define ACPI_MADT_POLARITY_CONFORMS       0
727 #define ACPI_MADT_POLARITY_ACTIVE_HIGH    1
728 #define ACPI_MADT_POLARITY_RESERVED       2
729 #define ACPI_MADT_POLARITY_ACTIVE_LOW     3
730 
731 #define ACPI_MADT_TRIGGER_CONFORMS        (0)
732 #define ACPI_MADT_TRIGGER_EDGE            (1<<2)
733 #define ACPI_MADT_TRIGGER_RESERVED        (2<<2)
734 #define ACPI_MADT_TRIGGER_LEVEL           (3<<2)
735 
736 /*******************************************************************************
737  *
738  * MCFG - PCI Memory Mapped Configuration table and subtable
739  *        Version 1
740  *
741  * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
742  *
743  ******************************************************************************/
744 
745 struct acpi_table_mcfg {
746         struct acpi_table_header header;        /* Common ACPI table header */
747         u8 reserved[8];
748 };
749 
750 /* Subtable */
751 
752 struct acpi_mcfg_allocation {
753         u64 address;            /* Base address, processor-relative */
754         u16 pci_segment;        /* PCI segment group number */
755         u8 start_bus_number;    /* Starting PCI Bus number */
756         u8 end_bus_number;      /* Final PCI Bus number */
757         u32 reserved;
758 };
759 
760 /*******************************************************************************
761  *
762  * MCHI - Management Controller Host Interface Table
763  *        Version 1
764  *
765  * Conforms to "Management Component Transport Protocol (MCTP) Host
766  * Interface Specification", Revision 1.0.0a, October 13, 2009
767  *
768  ******************************************************************************/
769 
770 struct acpi_table_mchi {
771         struct acpi_table_header header;        /* Common ACPI table header */
772         u8 interface_type;
773         u8 protocol;
774         u64 protocol_data;
775         u8 interrupt_type;
776         u8 gpe;
777         u8 pci_device_flag;
778         u32 global_interrupt;
779         struct acpi_generic_address control_register;
780         u8 pci_segment;
781         u8 pci_bus;
782         u8 pci_device;
783         u8 pci_function;
784 };
785 
786 /*******************************************************************************
787  *
788  * MPST - Memory Power State Table (ACPI 5.0)
789  *        Version 1
790  *
791  ******************************************************************************/
792 
793 #define ACPI_MPST_CHANNEL_INFO \
794         u8                              channel_id; \
795         u8                              reserved1[3]; \
796         u16                             power_node_count; \
797         u16                             reserved2;
798 
799 /* Main table */
800 
801 struct acpi_table_mpst {
802         struct acpi_table_header header;        /* Common ACPI table header */
803          ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
804 };
805 
806 /* Memory Platform Communication Channel Info */
807 
808 struct acpi_mpst_channel {
809         ACPI_MPST_CHANNEL_INFO  /* Platform Communication Channel */
810 };
811 
812 /* Memory Power Node Structure */
813 
814 struct acpi_mpst_power_node {
815         u8 flags;
816         u8 reserved1;
817         u16 node_id;
818         u32 length;
819         u64 range_address;
820         u64 range_length;
821         u32 num_power_states;
822         u32 num_physical_components;
823 };
824 
825 /* Values for Flags field above */
826 
827 #define ACPI_MPST_ENABLED               1
828 #define ACPI_MPST_POWER_MANAGED         2
829 #define ACPI_MPST_HOT_PLUG_CAPABLE      4
830 
831 /* Memory Power State Structure (follows POWER_NODE above) */
832 
833 struct acpi_mpst_power_state {
834         u8 power_state;
835         u8 info_index;
836 };
837 
838 /* Physical Component ID Structure (follows POWER_STATE above) */
839 
840 struct acpi_mpst_component {
841         u16 component_id;
842 };
843 
844 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
845 
846 struct acpi_mpst_data_hdr {
847         u16 characteristics_count;
848         u16 reserved;
849 };
850 
851 struct acpi_mpst_power_data {
852         u8 structure_id;
853         u8 flags;
854         u16 reserved1;
855         u32 average_power;
856         u32 power_saving;
857         u64 exit_latency;
858         u64 reserved2;
859 };
860 
861 /* Values for Flags field above */
862 
863 #define ACPI_MPST_PRESERVE              1
864 #define ACPI_MPST_AUTOENTRY             2
865 #define ACPI_MPST_AUTOEXIT              4
866 
867 /* Shared Memory Region (not part of an ACPI table) */
868 
869 struct acpi_mpst_shared {
870         u32 signature;
871         u16 pcc_command;
872         u16 pcc_status;
873         u32 command_register;
874         u32 status_register;
875         u32 power_state_id;
876         u32 power_node_id;
877         u64 energy_consumed;
878         u64 average_power;
879 };
880 
881 /*******************************************************************************
882  *
883  * MSCT - Maximum System Characteristics Table (ACPI 4.0)
884  *        Version 1
885  *
886  ******************************************************************************/
887 
888 struct acpi_table_msct {
889         struct acpi_table_header header;        /* Common ACPI table header */
890         u32 proximity_offset;   /* Location of proximity info struct(s) */
891         u32 max_proximity_domains;      /* Max number of proximity domains */
892         u32 max_clock_domains;  /* Max number of clock domains */
893         u64 max_address;        /* Max physical address in system */
894 };
895 
896 /* subtable - Maximum Proximity Domain Information. Version 1 */
897 
898 struct acpi_msct_proximity {
899         u8 revision;
900         u8 length;
901         u32 range_start;        /* Start of domain range */
902         u32 range_end;          /* End of domain range */
903         u32 processor_capacity;
904         u64 memory_capacity;    /* In bytes */
905 };
906 
907 /*******************************************************************************
908  *
909  * MSDM - Microsoft Data Management table
910  *
911  * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
912  * November 29, 2011. Copyright 2011 Microsoft
913  *
914  ******************************************************************************/
915 
916 /* Basic MSDM table is only the common ACPI header */
917 
918 struct acpi_table_msdm {
919         struct acpi_table_header header;        /* Common ACPI table header */
920 };
921 
922 /*******************************************************************************
923  *
924  * MTMR - MID Timer Table
925  *        Version 1
926  *
927  * Conforms to "Simple Firmware Interface Specification",
928  * Draft 0.8.2, Oct 19, 2010
929  * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table.
930  *
931  ******************************************************************************/
932 
933 struct acpi_table_mtmr {
934         struct acpi_table_header header;        /* Common ACPI table header */
935 };
936 
937 /* MTMR entry */
938 
939 struct acpi_mtmr_entry {
940         struct acpi_generic_address physical_address;
941         u32 frequency;
942         u32 irq;
943 };
944 
945 /*******************************************************************************
946  *
947  * NFIT - NVDIMM Interface Table (ACPI 6.0+)
948  *        Version 1
949  *
950  ******************************************************************************/
951 
952 struct acpi_table_nfit {
953         struct acpi_table_header header;        /* Common ACPI table header */
954         u32 reserved;           /* Reserved, must be zero */
955 };
956 
957 /* Subtable header for NFIT */
958 
959 struct acpi_nfit_header {
960         u16 type;
961         u16 length;
962 };
963 
964 /* Values for subtable type in struct acpi_nfit_header */
965 
966 enum acpi_nfit_type {
967         ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
968         ACPI_NFIT_TYPE_MEMORY_MAP = 1,
969         ACPI_NFIT_TYPE_INTERLEAVE = 2,
970         ACPI_NFIT_TYPE_SMBIOS = 3,
971         ACPI_NFIT_TYPE_CONTROL_REGION = 4,
972         ACPI_NFIT_TYPE_DATA_REGION = 5,
973         ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
974         ACPI_NFIT_TYPE_CAPABILITIES = 7,
975         ACPI_NFIT_TYPE_RESERVED = 8     /* 8 and greater are reserved */
976 };
977 
978 /*
979  * NFIT Subtables
980  */
981 
982 /* 0: System Physical Address Range Structure */
983 
984 struct acpi_nfit_system_address {
985         struct acpi_nfit_header header;
986         u16 range_index;
987         u16 flags;
988         u32 reserved;           /* Reserved, must be zero */
989         u32 proximity_domain;
990         u8 range_guid[16];
991         u64 address;
992         u64 length;
993         u64 memory_mapping;
994 };
995 
996 /* Flags */
997 
998 #define ACPI_NFIT_ADD_ONLINE_ONLY       (1)     /* 00: Add/Online Operation Only */
999 #define ACPI_NFIT_PROXIMITY_VALID       (1<<1)  /* 01: Proximity Domain Valid */
1000 
1001 /* Range Type GUIDs appear in the include/acuuid.h file */
1002 
1003 /* 1: Memory Device to System Address Range Map Structure */
1004 
1005 struct acpi_nfit_memory_map {
1006         struct acpi_nfit_header header;
1007         u32 device_handle;
1008         u16 physical_id;
1009         u16 region_id;
1010         u16 range_index;
1011         u16 region_index;
1012         u64 region_size;
1013         u64 region_offset;
1014         u64 address;
1015         u16 interleave_index;
1016         u16 interleave_ways;
1017         u16 flags;
1018         u16 reserved;           /* Reserved, must be zero */
1019 };
1020 
1021 /* Flags */
1022 
1023 #define ACPI_NFIT_MEM_SAVE_FAILED       (1)     /* 00: Last SAVE to Memory Device failed */
1024 #define ACPI_NFIT_MEM_RESTORE_FAILED    (1<<1)  /* 01: Last RESTORE from Memory Device failed */
1025 #define ACPI_NFIT_MEM_FLUSH_FAILED      (1<<2)  /* 02: Platform flush failed */
1026 #define ACPI_NFIT_MEM_NOT_ARMED         (1<<3)  /* 03: Memory Device is not armed */
1027 #define ACPI_NFIT_MEM_HEALTH_OBSERVED   (1<<4)  /* 04: Memory Device observed SMART/health events */
1028 #define ACPI_NFIT_MEM_HEALTH_ENABLED    (1<<5)  /* 05: SMART/health events enabled */
1029 #define ACPI_NFIT_MEM_MAP_FAILED        (1<<6)  /* 06: Mapping to SPA failed */
1030 
1031 /* 2: Interleave Structure */
1032 
1033 struct acpi_nfit_interleave {
1034         struct acpi_nfit_header header;
1035         u16 interleave_index;
1036         u16 reserved;           /* Reserved, must be zero */
1037         u32 line_count;
1038         u32 line_size;
1039         u32 line_offset[1];     /* Variable length */
1040 };
1041 
1042 /* 3: SMBIOS Management Information Structure */
1043 
1044 struct acpi_nfit_smbios {
1045         struct acpi_nfit_header header;
1046         u32 reserved;           /* Reserved, must be zero */
1047         u8 data[1];             /* Variable length */
1048 };
1049 
1050 /* 4: NVDIMM Control Region Structure */
1051 
1052 struct acpi_nfit_control_region {
1053         struct acpi_nfit_header header;
1054         u16 region_index;
1055         u16 vendor_id;
1056         u16 device_id;
1057         u16 revision_id;
1058         u16 subsystem_vendor_id;
1059         u16 subsystem_device_id;
1060         u16 subsystem_revision_id;
1061         u8 valid_fields;
1062         u8 manufacturing_location;
1063         u16 manufacturing_date;
1064         u8 reserved[2];         /* Reserved, must be zero */
1065         u32 serial_number;
1066         u16 code;
1067         u16 windows;
1068         u64 window_size;
1069         u64 command_offset;
1070         u64 command_size;
1071         u64 status_offset;
1072         u64 status_size;
1073         u16 flags;
1074         u8 reserved1[6];        /* Reserved, must be zero */
1075 };
1076 
1077 /* Flags */
1078 
1079 #define ACPI_NFIT_CONTROL_BUFFERED          (1) /* Block Data Windows implementation is buffered */
1080 
1081 /* valid_fields bits */
1082 
1083 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID    (1) /* Manufacturing fields are valid */
1084 
1085 /* 5: NVDIMM Block Data Window Region Structure */
1086 
1087 struct acpi_nfit_data_region {
1088         struct acpi_nfit_header header;
1089         u16 region_index;
1090         u16 windows;
1091         u64 offset;
1092         u64 size;
1093         u64 capacity;
1094         u64 start_address;
1095 };
1096 
1097 /* 6: Flush Hint Address Structure */
1098 
1099 struct acpi_nfit_flush_address {
1100         struct acpi_nfit_header header;
1101         u32 device_handle;
1102         u16 hint_count;
1103         u8 reserved[6];         /* Reserved, must be zero */
1104         u64 hint_address[1];    /* Variable length */
1105 };
1106 
1107 /* 7: Platform Capabilities Structure */
1108 
1109 struct acpi_nfit_capabilities {
1110         struct acpi_nfit_header header;
1111         u8 highest_capability;
1112         u8 reserved[3];         /* Reserved, must be zero */
1113         u32 capabilities;
1114         u32 reserved2;
1115 };
1116 
1117 /* Capabilities Flags */
1118 
1119 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH       (1)      /* 00: Cache Flush to NVDIMM capable */
1120 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH         (1<<1)   /* 01: Memory Flush to NVDIMM capable */
1121 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING     (1<<2)   /* 02: Memory Mirroring capable */
1122 
1123 /*
1124  * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1125  */
1126 struct nfit_device_handle {
1127         u32 handle;
1128 };
1129 
1130 /* Device handle construction and extraction macros */
1131 
1132 #define ACPI_NFIT_DIMM_NUMBER_MASK              0x0000000F
1133 #define ACPI_NFIT_CHANNEL_NUMBER_MASK           0x000000F0
1134 #define ACPI_NFIT_MEMORY_ID_MASK                0x00000F00
1135 #define ACPI_NFIT_SOCKET_ID_MASK                0x0000F000
1136 #define ACPI_NFIT_NODE_ID_MASK                  0x0FFF0000
1137 
1138 #define ACPI_NFIT_DIMM_NUMBER_OFFSET            0
1139 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET         4
1140 #define ACPI_NFIT_MEMORY_ID_OFFSET              8
1141 #define ACPI_NFIT_SOCKET_ID_OFFSET              12
1142 #define ACPI_NFIT_NODE_ID_OFFSET                16
1143 
1144 /* Macro to construct a NFIT/NVDIMM device handle */
1145 
1146 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1147         ((dimm)                                         | \
1148         ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET)  | \
1149         ((memory)  << ACPI_NFIT_MEMORY_ID_OFFSET)       | \
1150         ((socket)  << ACPI_NFIT_SOCKET_ID_OFFSET)       | \
1151         ((node)    << ACPI_NFIT_NODE_ID_OFFSET))
1152 
1153 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1154 
1155 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1156         ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1157 
1158 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1159         (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1160 
1161 #define ACPI_NFIT_GET_MEMORY_ID(handle) \
1162         (((handle) & ACPI_NFIT_MEMORY_ID_MASK)      >> ACPI_NFIT_MEMORY_ID_OFFSET)
1163 
1164 #define ACPI_NFIT_GET_SOCKET_ID(handle) \
1165         (((handle) & ACPI_NFIT_SOCKET_ID_MASK)      >> ACPI_NFIT_SOCKET_ID_OFFSET)
1166 
1167 #define ACPI_NFIT_GET_NODE_ID(handle) \
1168         (((handle) & ACPI_NFIT_NODE_ID_MASK)        >> ACPI_NFIT_NODE_ID_OFFSET)
1169 
1170 /*******************************************************************************
1171  *
1172  * PCCT - Platform Communications Channel Table (ACPI 5.0)
1173  *        Version 2 (ACPI 6.2)
1174  *
1175  ******************************************************************************/
1176 
1177 struct acpi_table_pcct {
1178         struct acpi_table_header header;        /* Common ACPI table header */
1179         u32 flags;
1180         u64 reserved;
1181 };
1182 
1183 /* Values for Flags field above */
1184 
1185 #define ACPI_PCCT_DOORBELL              1
1186 
1187 /* Values for subtable type in struct acpi_subtable_header */
1188 
1189 enum acpi_pcct_type {
1190         ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
1191         ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
1192         ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2,   /* ACPI 6.1 */
1193         ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3,     /* ACPI 6.2 */
1194         ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4,      /* ACPI 6.2 */
1195         ACPI_PCCT_TYPE_RESERVED = 5     /* 5 and greater are reserved */
1196 };
1197 
1198 /*
1199  * PCCT Subtables, correspond to Type in struct acpi_subtable_header
1200  */
1201 
1202 /* 0: Generic Communications Subspace */
1203 
1204 struct acpi_pcct_subspace {
1205         struct acpi_subtable_header header;
1206         u8 reserved[6];
1207         u64 base_address;
1208         u64 length;
1209         struct acpi_generic_address doorbell_register;
1210         u64 preserve_mask;
1211         u64 write_mask;
1212         u32 latency;
1213         u32 max_access_rate;
1214         u16 min_turnaround_time;
1215 };
1216 
1217 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */
1218 
1219 struct acpi_pcct_hw_reduced {
1220         struct acpi_subtable_header header;
1221         u32 platform_interrupt;
1222         u8 flags;
1223         u8 reserved;
1224         u64 base_address;
1225         u64 length;
1226         struct acpi_generic_address doorbell_register;
1227         u64 preserve_mask;
1228         u64 write_mask;
1229         u32 latency;
1230         u32 max_access_rate;
1231         u16 min_turnaround_time;
1232 };
1233 
1234 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
1235 
1236 struct acpi_pcct_hw_reduced_type2 {
1237         struct acpi_subtable_header header;
1238         u32 platform_interrupt;
1239         u8 flags;
1240         u8 reserved;
1241         u64 base_address;
1242         u64 length;
1243         struct acpi_generic_address doorbell_register;
1244         u64 preserve_mask;
1245         u64 write_mask;
1246         u32 latency;
1247         u32 max_access_rate;
1248         u16 min_turnaround_time;
1249         struct acpi_generic_address platform_ack_register;
1250         u64 ack_preserve_mask;
1251         u64 ack_write_mask;
1252 };
1253 
1254 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
1255 
1256 struct acpi_pcct_ext_pcc_master {
1257         struct acpi_subtable_header header;
1258         u32 platform_interrupt;
1259         u8 flags;
1260         u8 reserved1;
1261         u64 base_address;
1262         u32 length;
1263         struct acpi_generic_address doorbell_register;
1264         u64 preserve_mask;
1265         u64 write_mask;
1266         u32 latency;
1267         u32 max_access_rate;
1268         u32 min_turnaround_time;
1269         struct acpi_generic_address platform_ack_register;
1270         u64 ack_preserve_mask;
1271         u64 ack_set_mask;
1272         u64 reserved2;
1273         struct acpi_generic_address cmd_complete_register;
1274         u64 cmd_complete_mask;
1275         struct acpi_generic_address cmd_update_register;
1276         u64 cmd_update_preserve_mask;
1277         u64 cmd_update_set_mask;
1278         struct acpi_generic_address error_status_register;
1279         u64 error_status_mask;
1280 };
1281 
1282 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
1283 
1284 struct acpi_pcct_ext_pcc_slave {
1285         struct acpi_subtable_header header;
1286         u32 platform_interrupt;
1287         u8 flags;
1288         u8 reserved1;
1289         u64 base_address;
1290         u32 length;
1291         struct acpi_generic_address doorbell_register;
1292         u64 preserve_mask;
1293         u64 write_mask;
1294         u32 latency;
1295         u32 max_access_rate;
1296         u32 min_turnaround_time;
1297         struct acpi_generic_address platform_ack_register;
1298         u64 ack_preserve_mask;
1299         u64 ack_set_mask;
1300         u64 reserved2;
1301         struct acpi_generic_address cmd_complete_register;
1302         u64 cmd_complete_mask;
1303         struct acpi_generic_address cmd_update_register;
1304         u64 cmd_update_preserve_mask;
1305         u64 cmd_update_set_mask;
1306         struct acpi_generic_address error_status_register;
1307         u64 error_status_mask;
1308 };
1309 
1310 /* Values for doorbell flags above */
1311 
1312 #define ACPI_PCCT_INTERRUPT_POLARITY    (1)
1313 #define ACPI_PCCT_INTERRUPT_MODE        (1<<1)
1314 
1315 /*
1316  * PCC memory structures (not part of the ACPI table)
1317  */
1318 
1319 /* Shared Memory Region */
1320 
1321 struct acpi_pcct_shared_memory {
1322         u32 signature;
1323         u16 command;
1324         u16 status;
1325 };
1326 
1327 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
1328 
1329 struct acpi_pcct_ext_pcc_shared_memory {
1330         u32 signature;
1331         u32 flags;
1332         u32 length;
1333         u32 command;
1334 };
1335 
1336 /*******************************************************************************
1337  *
1338  * PDTT - Platform Debug Trigger Table (ACPI 6.2)
1339  *        Version 0
1340  *
1341  ******************************************************************************/
1342 
1343 struct acpi_table_pdtt {
1344         struct acpi_table_header header;        /* Common ACPI table header */
1345         u8 trigger_count;
1346         u8 reserved[3];
1347         u32 array_offset;
1348 };
1349 
1350 /*
1351  * PDTT Communication Channel Identifier Structure.
1352  * The number of these structures is defined by trigger_count above,
1353  * starting at array_offset.
1354  */
1355 struct acpi_pdtt_channel {
1356         u8 subchannel_id;
1357         u8 flags;
1358 };
1359 
1360 /* Flags for above */
1361 
1362 #define ACPI_PDTT_RUNTIME_TRIGGER           (1)
1363 #define ACPI_PDTT_WAIT_COMPLETION           (1<<1)
1364 
1365 /*******************************************************************************
1366  *
1367  * PMTT - Platform Memory Topology Table (ACPI 5.0)
1368  *        Version 1
1369  *
1370  ******************************************************************************/
1371 
1372 struct acpi_table_pmtt {
1373         struct acpi_table_header header;        /* Common ACPI table header */
1374         u32 reserved;
1375 };
1376 
1377 /* Common header for PMTT subtables that follow main table */
1378 
1379 struct acpi_pmtt_header {
1380         u8 type;
1381         u8 reserved1;
1382         u16 length;
1383         u16 flags;
1384         u16 reserved2;
1385 };
1386 
1387 /* Values for Type field above */
1388 
1389 #define ACPI_PMTT_TYPE_SOCKET           0
1390 #define ACPI_PMTT_TYPE_CONTROLLER       1
1391 #define ACPI_PMTT_TYPE_DIMM             2
1392 #define ACPI_PMTT_TYPE_RESERVED         3       /* 0x03-0xFF are reserved */
1393 
1394 /* Values for Flags field above */
1395 
1396 #define ACPI_PMTT_TOP_LEVEL             0x0001
1397 #define ACPI_PMTT_PHYSICAL              0x0002
1398 #define ACPI_PMTT_MEMORY_TYPE           0x000C
1399 
1400 /*
1401  * PMTT subtables, correspond to Type in struct acpi_pmtt_header
1402  */
1403 
1404 /* 0: Socket Structure */
1405 
1406 struct acpi_pmtt_socket {
1407         struct acpi_pmtt_header header;
1408         u16 socket_id;
1409         u16 reserved;
1410 };
1411 
1412 /* 1: Memory Controller subtable */
1413 
1414 struct acpi_pmtt_controller {
1415         struct acpi_pmtt_header header;
1416         u32 read_latency;
1417         u32 write_latency;
1418         u32 read_bandwidth;
1419         u32 write_bandwidth;
1420         u16 access_width;
1421         u16 alignment;
1422         u16 reserved;
1423         u16 domain_count;
1424 };
1425 
1426 /* 1a: Proximity Domain substructure */
1427 
1428 struct acpi_pmtt_domain {
1429         u32 proximity_domain;
1430 };
1431 
1432 /* 2: Physical Component Identifier (DIMM) */
1433 
1434 struct acpi_pmtt_physical_component {
1435         struct acpi_pmtt_header header;
1436         u16 component_id;
1437         u16 reserved;
1438         u32 memory_size;
1439         u32 bios_handle;
1440 };
1441 
1442 /*******************************************************************************
1443  *
1444  * PPTT - Processor Properties Topology Table (ACPI 6.2)
1445  *        Version 1
1446  *
1447  ******************************************************************************/
1448 
1449 struct acpi_table_pptt {
1450         struct acpi_table_header header;        /* Common ACPI table header */
1451 };
1452 
1453 /* Values for Type field above */
1454 
1455 enum acpi_pptt_type {
1456         ACPI_PPTT_TYPE_PROCESSOR = 0,
1457         ACPI_PPTT_TYPE_CACHE = 1,
1458         ACPI_PPTT_TYPE_ID = 2,
1459         ACPI_PPTT_TYPE_RESERVED = 3
1460 };
1461 
1462 /* 0: Processor Hierarchy Node Structure */
1463 
1464 struct acpi_pptt_processor {
1465         struct acpi_subtable_header header;
1466         u16 reserved;
1467         u32 flags;
1468         u32 parent;
1469         u32 acpi_processor_id;
1470         u32 number_of_priv_resources;
1471 };
1472 
1473 /* Flags */
1474 
1475 #define ACPI_PPTT_PHYSICAL_PACKAGE          (1) /* Physical package */
1476 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID   (2) /* ACPI Processor ID valid */
1477 
1478 /* 1: Cache Type Structure */
1479 
1480 struct acpi_pptt_cache {
1481         struct acpi_subtable_header header;
1482         u16 reserved;
1483         u32 flags;
1484         u32 next_level_of_cache;
1485         u32 size;
1486         u32 number_of_sets;
1487         u8 associativity;
1488         u8 attributes;
1489         u16 line_size;
1490 };
1491 
1492 /* Flags */
1493 
1494 #define ACPI_PPTT_SIZE_PROPERTY_VALID       (1) /* Physical property valid */
1495 #define ACPI_PPTT_NUMBER_OF_SETS_VALID      (1<<1)      /* Number of sets valid */
1496 #define ACPI_PPTT_ASSOCIATIVITY_VALID       (1<<2)      /* Associativity valid */
1497 #define ACPI_PPTT_ALLOCATION_TYPE_VALID     (1<<3)      /* Allocation type valid */
1498 #define ACPI_PPTT_CACHE_TYPE_VALID          (1<<4)      /* Cache type valid */
1499 #define ACPI_PPTT_WRITE_POLICY_VALID        (1<<5)      /* Write policy valid */
1500 #define ACPI_PPTT_LINE_SIZE_VALID           (1<<6)      /* Line size valid */
1501 
1502 /* Masks for Attributes */
1503 
1504 #define ACPI_PPTT_MASK_ALLOCATION_TYPE      (0x03)      /* Allocation type */
1505 #define ACPI_PPTT_MASK_CACHE_TYPE           (0x0C)      /* Cache type */
1506 #define ACPI_PPTT_MASK_WRITE_POLICY         (0x10)      /* Write policy */
1507 
1508 /* Attributes describing cache */
1509 #define ACPI_PPTT_CACHE_READ_ALLOCATE       (0x0)       /* Cache line is allocated on read */
1510 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE      (0x01)      /* Cache line is allocated on write */
1511 #define ACPI_PPTT_CACHE_RW_ALLOCATE         (0x02)      /* Cache line is allocated on read and write */
1512 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT     (0x03)      /* Alternate representation of above */
1513 
1514 #define ACPI_PPTT_CACHE_TYPE_DATA           (0x0)       /* Data cache */
1515 #define ACPI_PPTT_CACHE_TYPE_INSTR          (1<<2)      /* Instruction cache */
1516 #define ACPI_PPTT_CACHE_TYPE_UNIFIED        (2<<2)      /* Unified I & D cache */
1517 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT    (3<<2)      /* Alternate representation of above */
1518 
1519 #define ACPI_PPTT_CACHE_POLICY_WB           (0x0)       /* Cache is write back */
1520 #define ACPI_PPTT_CACHE_POLICY_WT           (1<<4)      /* Cache is write through */
1521 
1522 /* 2: ID Structure */
1523 
1524 struct acpi_pptt_id {
1525         struct acpi_subtable_header header;
1526         u16 reserved;
1527         u32 vendor_id;
1528         u64 level1_id;
1529         u64 level2_id;
1530         u16 major_rev;
1531         u16 minor_rev;
1532         u16 spin_rev;
1533 };
1534 
1535 /*******************************************************************************
1536  *
1537  * RASF - RAS Feature Table (ACPI 5.0)
1538  *        Version 1
1539  *
1540  ******************************************************************************/
1541 
1542 struct acpi_table_rasf {
1543         struct acpi_table_header header;        /* Common ACPI table header */
1544         u8 channel_id[12];
1545 };
1546 
1547 /* RASF Platform Communication Channel Shared Memory Region */
1548 
1549 struct acpi_rasf_shared_memory {
1550         u32 signature;
1551         u16 command;
1552         u16 status;
1553         u16 version;
1554         u8 capabilities[16];
1555         u8 set_capabilities[16];
1556         u16 num_parameter_blocks;
1557         u32 set_capabilities_status;
1558 };
1559 
1560 /* RASF Parameter Block Structure Header */
1561 
1562 struct acpi_rasf_parameter_block {
1563         u16 type;
1564         u16 version;
1565         u16 length;
1566 };
1567 
1568 /* RASF Parameter Block Structure for PATROL_SCRUB */
1569 
1570 struct acpi_rasf_patrol_scrub_parameter {
1571         struct acpi_rasf_parameter_block header;
1572         u16 patrol_scrub_command;
1573         u64 requested_address_range[2];
1574         u64 actual_address_range[2];
1575         u16 flags;
1576         u8 requested_speed;
1577 };
1578 
1579 /* Masks for Flags and Speed fields above */
1580 
1581 #define ACPI_RASF_SCRUBBER_RUNNING      1
1582 #define ACPI_RASF_SPEED                 (7<<1)
1583 #define ACPI_RASF_SPEED_SLOW            (0<<1)
1584 #define ACPI_RASF_SPEED_MEDIUM          (4<<1)
1585 #define ACPI_RASF_SPEED_FAST            (7<<1)
1586 
1587 /* Channel Commands */
1588 
1589 enum acpi_rasf_commands {
1590         ACPI_RASF_EXECUTE_RASF_COMMAND = 1
1591 };
1592 
1593 /* Platform RAS Capabilities */
1594 
1595 enum acpi_rasf_capabiliities {
1596         ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
1597         ACPI_SW_PATROL_SCRUB_EXPOSED = 1
1598 };
1599 
1600 /* Patrol Scrub Commands */
1601 
1602 enum acpi_rasf_patrol_scrub_commands {
1603         ACPI_RASF_GET_PATROL_PARAMETERS = 1,
1604         ACPI_RASF_START_PATROL_SCRUBBER = 2,
1605         ACPI_RASF_STOP_PATROL_SCRUBBER = 3
1606 };
1607 
1608 /* Channel Command flags */
1609 
1610 #define ACPI_RASF_GENERATE_SCI          (1<<15)
1611 
1612 /* Status values */
1613 
1614 enum acpi_rasf_status {
1615         ACPI_RASF_SUCCESS = 0,
1616         ACPI_RASF_NOT_VALID = 1,
1617         ACPI_RASF_NOT_SUPPORTED = 2,
1618         ACPI_RASF_BUSY = 3,
1619         ACPI_RASF_FAILED = 4,
1620         ACPI_RASF_ABORTED = 5,
1621         ACPI_RASF_INVALID_DATA = 6
1622 };
1623 
1624 /* Status flags */
1625 
1626 #define ACPI_RASF_COMMAND_COMPLETE      (1)
1627 #define ACPI_RASF_SCI_DOORBELL          (1<<1)
1628 #define ACPI_RASF_ERROR                 (1<<2)
1629 #define ACPI_RASF_STATUS                (0x1F<<3)
1630 
1631 /*******************************************************************************
1632  *
1633  * SBST - Smart Battery Specification Table
1634  *        Version 1
1635  *
1636  ******************************************************************************/
1637 
1638 struct acpi_table_sbst {
1639         struct acpi_table_header header;        /* Common ACPI table header */
1640         u32 warning_level;
1641         u32 low_level;
1642         u32 critical_level;
1643 };
1644 
1645 /*******************************************************************************
1646  *
1647  * SDEI - Software Delegated Exception Interface Descriptor Table
1648  *
1649  * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
1650  * May 8th, 2017. Copyright 2017 ARM Ltd.
1651  *
1652  ******************************************************************************/
1653 
1654 struct acpi_table_sdei {
1655         struct acpi_table_header header;        /* Common ACPI table header */
1656 };
1657 
1658 /*******************************************************************************
1659  *
1660  * SDEV - Secure Devices Table (ACPI 6.2)
1661  *        Version 1
1662  *
1663  ******************************************************************************/
1664 
1665 struct acpi_table_sdev {
1666         struct acpi_table_header header;        /* Common ACPI table header */
1667 };
1668 
1669 struct acpi_sdev_header {
1670         u8 type;
1671         u8 flags;
1672         u16 length;
1673 };
1674 
1675 /* Values for subtable type above */
1676 
1677 enum acpi_sdev_type {
1678         ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
1679         ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
1680         ACPI_SDEV_TYPE_RESERVED = 2     /* 2 and greater are reserved */
1681 };
1682 
1683 /* Values for flags above */
1684 
1685 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS    (1)
1686 
1687 /*
1688  * SDEV subtables
1689  */
1690 
1691 /* 0: Namespace Device Based Secure Device Structure */
1692 
1693 struct acpi_sdev_namespace {
1694         struct acpi_sdev_header header;
1695         u16 device_id_offset;
1696         u16 device_id_length;
1697         u16 vendor_data_offset;
1698         u16 vendor_data_length;
1699 };
1700 
1701 /* 1: PCIe Endpoint Device Based Device Structure */
1702 
1703 struct acpi_sdev_pcie {
1704         struct acpi_sdev_header header;
1705         u16 segment;
1706         u16 start_bus;
1707         u16 path_offset;
1708         u16 path_length;
1709         u16 vendor_data_offset;
1710         u16 vendor_data_length;
1711 };
1712 
1713 /* 1a: PCIe Endpoint path entry */
1714 
1715 struct acpi_sdev_pcie_path {
1716         u8 device;
1717         u8 function;
1718 };
1719 
1720 /* Reset to default packing */
1721 
1722 #pragma pack()
1723 
1724 #endif                          /* __ACTBL2_H__ */
1725 

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