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TOMOYO Linux Cross Reference
Linux/include/drm/drm_os_linux.h

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  1 /**
  2  * \file drm_os_linux.h
  3  * OS abstraction macros.
  4  */
  5 
  6 #include <linux/interrupt.h>    /* For task queue support */
  7 #include <linux/delay.h>
  8 
  9 #ifndef readq
 10 static inline u64 readq(void __iomem *reg)
 11 {
 12         return ((u64) readl(reg)) | (((u64) readl(reg + 4UL)) << 32);
 13 }
 14 
 15 static inline void writeq(u64 val, void __iomem *reg)
 16 {
 17         writel(val & 0xffffffff, reg);
 18         writel(val >> 32, reg + 0x4UL);
 19 }
 20 #endif
 21 
 22 /** Current process ID */
 23 #define DRM_CURRENTPID                  task_pid_nr(current)
 24 #define DRM_SUSER(p)                    capable(CAP_SYS_ADMIN)
 25 #define DRM_UDELAY(d)                   udelay(d)
 26 /** Read a byte from a MMIO region */
 27 #define DRM_READ8(map, offset)          readb(((void __iomem *)(map)->handle) + (offset))
 28 /** Read a word from a MMIO region */
 29 #define DRM_READ16(map, offset)         readw(((void __iomem *)(map)->handle) + (offset))
 30 /** Read a dword from a MMIO region */
 31 #define DRM_READ32(map, offset)         readl(((void __iomem *)(map)->handle) + (offset))
 32 /** Write a byte into a MMIO region */
 33 #define DRM_WRITE8(map, offset, val)    writeb(val, ((void __iomem *)(map)->handle) + (offset))
 34 /** Write a word into a MMIO region */
 35 #define DRM_WRITE16(map, offset, val)   writew(val, ((void __iomem *)(map)->handle) + (offset))
 36 /** Write a dword into a MMIO region */
 37 #define DRM_WRITE32(map, offset, val)   writel(val, ((void __iomem *)(map)->handle) + (offset))
 38 /** Read memory barrier */
 39 
 40 /** Read a qword from a MMIO region - be careful using these unless you really understand them */
 41 #define DRM_READ64(map, offset)         readq(((void __iomem *)(map)->handle) + (offset))
 42 /** Write a qword into a MMIO region */
 43 #define DRM_WRITE64(map, offset, val)   writeq(val, ((void __iomem *)(map)->handle) + (offset))
 44 
 45 #define DRM_READMEMORYBARRIER()         rmb()
 46 /** Write memory barrier */
 47 #define DRM_WRITEMEMORYBARRIER()        wmb()
 48 /** Read/write memory barrier */
 49 #define DRM_MEMORYBARRIER()             mb()
 50 
 51 /** IRQ handler arguments and return type and values */
 52 #define DRM_IRQ_ARGS            int irq, void *arg
 53 
 54 /** AGP types */
 55 #if __OS_HAS_AGP
 56 #define DRM_AGP_MEM             struct agp_memory
 57 #define DRM_AGP_KERN            struct agp_kern_info
 58 #else
 59 /* define some dummy types for non AGP supporting kernels */
 60 struct no_agp_kern {
 61         unsigned long aper_base;
 62         unsigned long aper_size;
 63 };
 64 #define DRM_AGP_MEM             int
 65 #define DRM_AGP_KERN            struct no_agp_kern
 66 #endif
 67 
 68 /** Other copying of data to kernel space */
 69 #define DRM_COPY_FROM_USER(arg1, arg2, arg3)            \
 70         copy_from_user(arg1, arg2, arg3)
 71 /** Other copying of data from kernel space */
 72 #define DRM_COPY_TO_USER(arg1, arg2, arg3)              \
 73         copy_to_user(arg1, arg2, arg3)
 74 
 75 #define DRM_HZ HZ
 76 
 77 #define DRM_WAIT_ON( ret, queue, timeout, condition )           \
 78 do {                                                            \
 79         DECLARE_WAITQUEUE(entry, current);                      \
 80         unsigned long end = jiffies + (timeout);                \
 81         add_wait_queue(&(queue), &entry);                       \
 82                                                                 \
 83         for (;;) {                                              \
 84                 __set_current_state(TASK_INTERRUPTIBLE);        \
 85                 if (condition)                                  \
 86                         break;                                  \
 87                 if (time_after_eq(jiffies, end)) {              \
 88                         ret = -EBUSY;                           \
 89                         break;                                  \
 90                 }                                               \
 91                 schedule_timeout((HZ/100 > 1) ? HZ/100 : 1);    \
 92                 if (signal_pending(current)) {                  \
 93                         ret = -EINTR;                           \
 94                         break;                                  \
 95                 }                                               \
 96         }                                                       \
 97         __set_current_state(TASK_RUNNING);                      \
 98         remove_wait_queue(&(queue), &entry);                    \
 99 } while (0)
100 
101 #define DRM_WAKEUP( queue ) wake_up( queue )
102 #define DRM_INIT_WAITQUEUE( queue ) init_waitqueue_head( queue )
103 

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