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TOMOYO Linux Cross Reference
Linux/include/drm/exynos_drm.h

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  1 /* exynos_drm.h
  2  *
  3  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4  * Authors:
  5  *      Inki Dae <inki.dae@samsung.com>
  6  *      Joonyoung Shim <jy0922.shim@samsung.com>
  7  *      Seung-Woo Kim <sw0312.kim@samsung.com>
  8  *
  9  * Permission is hereby granted, free of charge, to any person obtaining a
 10  * copy of this software and associated documentation files (the "Software"),
 11  * to deal in the Software without restriction, including without limitation
 12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 13  * and/or sell copies of the Software, and to permit persons to whom the
 14  * Software is furnished to do so, subject to the following conditions:
 15  *
 16  * The above copyright notice and this permission notice (including the next
 17  * paragraph) shall be included in all copies or substantial portions of the
 18  * Software.
 19  *
 20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 21  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 22  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 23  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 24  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 25  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 26  * OTHER DEALINGS IN THE SOFTWARE.
 27  */
 28 
 29 #ifndef _EXYNOS_DRM_H_
 30 #define _EXYNOS_DRM_H_
 31 
 32 #include "drm.h"
 33 
 34 /**
 35  * User-desired buffer creation information structure.
 36  *
 37  * @size: user-desired memory allocation size.
 38  *      - this size value would be page-aligned internally.
 39  * @flags: user request for setting memory type or cache attributes.
 40  * @handle: returned a handle to created gem object.
 41  *      - this handle will be set by gem module of kernel side.
 42  */
 43 struct drm_exynos_gem_create {
 44         uint64_t size;
 45         unsigned int flags;
 46         unsigned int handle;
 47 };
 48 
 49 /**
 50  * A structure for getting buffer offset.
 51  *
 52  * @handle: a pointer to gem object created.
 53  * @pad: just padding to be 64-bit aligned.
 54  * @offset: relatived offset value of the memory region allocated.
 55  *      - this value should be set by user.
 56  */
 57 struct drm_exynos_gem_map_off {
 58         unsigned int handle;
 59         unsigned int pad;
 60         uint64_t offset;
 61 };
 62 
 63 /**
 64  * A structure for mapping buffer.
 65  *
 66  * @handle: a handle to gem object created.
 67  * @pad: just padding to be 64-bit aligned.
 68  * @size: memory size to be mapped.
 69  * @mapped: having user virtual address mmaped.
 70  *      - this variable would be filled by exynos gem module
 71  *      of kernel side with user virtual address which is allocated
 72  *      by do_mmap().
 73  */
 74 struct drm_exynos_gem_mmap {
 75         unsigned int handle;
 76         unsigned int pad;
 77         uint64_t size;
 78         uint64_t mapped;
 79 };
 80 
 81 /**
 82  * A structure to gem information.
 83  *
 84  * @handle: a handle to gem object created.
 85  * @flags: flag value including memory type and cache attribute and
 86  *      this value would be set by driver.
 87  * @size: size to memory region allocated by gem and this size would
 88  *      be set by driver.
 89  */
 90 struct drm_exynos_gem_info {
 91         unsigned int handle;
 92         unsigned int flags;
 93         uint64_t size;
 94 };
 95 
 96 /**
 97  * A structure for user connection request of virtual display.
 98  *
 99  * @connection: indicate whether doing connetion or not by user.
100  * @extensions: if this value is 1 then the vidi driver would need additional
101  *      128bytes edid data.
102  * @edid: the edid data pointer from user side.
103  */
104 struct drm_exynos_vidi_connection {
105         unsigned int connection;
106         unsigned int extensions;
107         uint64_t edid;
108 };
109 
110 struct drm_exynos_plane_set_zpos {
111         __u32 plane_id;
112         __s32 zpos;
113 };
114 
115 /* memory type definitions. */
116 enum e_drm_exynos_gem_mem_type {
117         /* Physically Continuous memory and used as default. */
118         EXYNOS_BO_CONTIG        = 0 << 0,
119         /* Physically Non-Continuous memory. */
120         EXYNOS_BO_NONCONTIG     = 1 << 0,
121         /* non-cachable mapping and used as default. */
122         EXYNOS_BO_NONCACHABLE   = 0 << 1,
123         /* cachable mapping. */
124         EXYNOS_BO_CACHABLE      = 1 << 1,
125         /* write-combine mapping. */
126         EXYNOS_BO_WC            = 1 << 2,
127         EXYNOS_BO_MASK          = EXYNOS_BO_NONCONTIG | EXYNOS_BO_CACHABLE |
128                                         EXYNOS_BO_WC
129 };
130 
131 struct drm_exynos_g2d_get_ver {
132         __u32   major;
133         __u32   minor;
134 };
135 
136 struct drm_exynos_g2d_cmd {
137         __u32   offset;
138         __u32   data;
139 };
140 
141 enum drm_exynos_g2d_event_type {
142         G2D_EVENT_NOT,
143         G2D_EVENT_NONSTOP,
144         G2D_EVENT_STOP,         /* not yet */
145 };
146 
147 struct drm_exynos_g2d_set_cmdlist {
148         __u64                                   cmd;
149         __u64                                   cmd_gem;
150         __u32                                   cmd_nr;
151         __u32                                   cmd_gem_nr;
152 
153         /* for g2d event */
154         __u64                                   event_type;
155         __u64                                   user_data;
156 };
157 
158 struct drm_exynos_g2d_exec {
159         __u64                                   async;
160 };
161 
162 #define DRM_EXYNOS_GEM_CREATE           0x00
163 #define DRM_EXYNOS_GEM_MAP_OFFSET       0x01
164 #define DRM_EXYNOS_GEM_MMAP             0x02
165 /* Reserved 0x03 ~ 0x05 for exynos specific gem ioctl */
166 #define DRM_EXYNOS_GEM_GET              0x04
167 #define DRM_EXYNOS_PLANE_SET_ZPOS       0x06
168 #define DRM_EXYNOS_VIDI_CONNECTION      0x07
169 
170 /* G2D */
171 #define DRM_EXYNOS_G2D_GET_VER          0x20
172 #define DRM_EXYNOS_G2D_SET_CMDLIST      0x21
173 #define DRM_EXYNOS_G2D_EXEC             0x22
174 
175 #define DRM_IOCTL_EXYNOS_GEM_CREATE             DRM_IOWR(DRM_COMMAND_BASE + \
176                 DRM_EXYNOS_GEM_CREATE, struct drm_exynos_gem_create)
177 
178 #define DRM_IOCTL_EXYNOS_GEM_MAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + \
179                 DRM_EXYNOS_GEM_MAP_OFFSET, struct drm_exynos_gem_map_off)
180 
181 #define DRM_IOCTL_EXYNOS_GEM_MMAP       DRM_IOWR(DRM_COMMAND_BASE + \
182                 DRM_EXYNOS_GEM_MMAP, struct drm_exynos_gem_mmap)
183 
184 #define DRM_IOCTL_EXYNOS_GEM_GET        DRM_IOWR(DRM_COMMAND_BASE + \
185                 DRM_EXYNOS_GEM_GET,     struct drm_exynos_gem_info)
186 
187 #define DRM_IOCTL_EXYNOS_PLANE_SET_ZPOS DRM_IOWR(DRM_COMMAND_BASE + \
188                 DRM_EXYNOS_PLANE_SET_ZPOS, struct drm_exynos_plane_set_zpos)
189 
190 #define DRM_IOCTL_EXYNOS_VIDI_CONNECTION        DRM_IOWR(DRM_COMMAND_BASE + \
191                 DRM_EXYNOS_VIDI_CONNECTION, struct drm_exynos_vidi_connection)
192 
193 #define DRM_IOCTL_EXYNOS_G2D_GET_VER            DRM_IOWR(DRM_COMMAND_BASE + \
194                 DRM_EXYNOS_G2D_GET_VER, struct drm_exynos_g2d_get_ver)
195 #define DRM_IOCTL_EXYNOS_G2D_SET_CMDLIST        DRM_IOWR(DRM_COMMAND_BASE + \
196                 DRM_EXYNOS_G2D_SET_CMDLIST, struct drm_exynos_g2d_set_cmdlist)
197 #define DRM_IOCTL_EXYNOS_G2D_EXEC               DRM_IOWR(DRM_COMMAND_BASE + \
198                 DRM_EXYNOS_G2D_EXEC, struct drm_exynos_g2d_exec)
199 
200 /* EXYNOS specific events */
201 #define DRM_EXYNOS_G2D_EVENT            0x80000000
202 
203 struct drm_exynos_g2d_event {
204         struct drm_event        base;
205         __u64                   user_data;
206         __u32                   tv_sec;
207         __u32                   tv_usec;
208         __u32                   cmdlist_no;
209         __u32                   reserved;
210 };
211 
212 #ifdef __KERNEL__
213 
214 /**
215  * A structure for lcd panel information.
216  *
217  * @timing: default video mode for initializing
218  * @width_mm: physical size of lcd width.
219  * @height_mm: physical size of lcd height.
220  */
221 struct exynos_drm_panel_info {
222         struct fb_videomode timing;
223         u32 width_mm;
224         u32 height_mm;
225 };
226 
227 /**
228  * Platform Specific Structure for DRM based FIMD.
229  *
230  * @panel: default panel info for initializing
231  * @default_win: default window layer number to be used for UI.
232  * @bpp: default bit per pixel.
233  */
234 struct exynos_drm_fimd_pdata {
235         struct exynos_drm_panel_info panel;
236         u32                             vidcon0;
237         u32                             vidcon1;
238         unsigned int                    default_win;
239         unsigned int                    bpp;
240 };
241 
242 /**
243  * Platform Specific Structure for DRM based HDMI.
244  *
245  * @hdmi_dev: device point to specific hdmi driver.
246  * @mixer_dev: device point to specific mixer driver.
247  *
248  * this structure is used for common hdmi driver and each device object
249  * would be used to access specific device driver(hdmi or mixer driver)
250  */
251 struct exynos_drm_common_hdmi_pd {
252         struct device *hdmi_dev;
253         struct device *mixer_dev;
254 };
255 
256 /**
257  * Platform Specific Structure for DRM based HDMI core.
258  *
259  * @is_v13: set if hdmi version 13 is.
260  * @cfg_hpd: function pointer to configure hdmi hotplug detection pin
261  * @get_hpd: function pointer to get value of hdmi hotplug detection pin
262  */
263 struct exynos_drm_hdmi_pdata {
264         bool is_v13;
265         void (*cfg_hpd)(bool external);
266         int (*get_hpd)(void);
267 };
268 
269 #endif  /* __KERNEL__ */
270 #endif  /* _EXYNOS_DRM_H_ */
271 

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