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TOMOYO Linux Cross Reference
Linux/include/linux/dma-mapping.h

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  1 #ifndef _LINUX_DMA_MAPPING_H
  2 #define _LINUX_DMA_MAPPING_H
  3 
  4 #include <linux/string.h>
  5 #include <linux/device.h>
  6 #include <linux/err.h>
  7 #include <linux/dma-attrs.h>
  8 #include <linux/dma-direction.h>
  9 #include <linux/scatterlist.h>
 10 
 11 /*
 12  * A dma_addr_t can hold any valid DMA or bus address for the platform.
 13  * It can be given to a device to use as a DMA source or target.  A CPU cannot
 14  * reference a dma_addr_t directly because there may be translation between
 15  * its physical address space and the bus address space.
 16  */
 17 struct dma_map_ops {
 18         void* (*alloc)(struct device *dev, size_t size,
 19                                 dma_addr_t *dma_handle, gfp_t gfp,
 20                                 struct dma_attrs *attrs);
 21         void (*free)(struct device *dev, size_t size,
 22                               void *vaddr, dma_addr_t dma_handle,
 23                               struct dma_attrs *attrs);
 24         int (*mmap)(struct device *, struct vm_area_struct *,
 25                           void *, dma_addr_t, size_t, struct dma_attrs *attrs);
 26 
 27         int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *,
 28                            dma_addr_t, size_t, struct dma_attrs *attrs);
 29 
 30         dma_addr_t (*map_page)(struct device *dev, struct page *page,
 31                                unsigned long offset, size_t size,
 32                                enum dma_data_direction dir,
 33                                struct dma_attrs *attrs);
 34         void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
 35                            size_t size, enum dma_data_direction dir,
 36                            struct dma_attrs *attrs);
 37         int (*map_sg)(struct device *dev, struct scatterlist *sg,
 38                       int nents, enum dma_data_direction dir,
 39                       struct dma_attrs *attrs);
 40         void (*unmap_sg)(struct device *dev,
 41                          struct scatterlist *sg, int nents,
 42                          enum dma_data_direction dir,
 43                          struct dma_attrs *attrs);
 44         void (*sync_single_for_cpu)(struct device *dev,
 45                                     dma_addr_t dma_handle, size_t size,
 46                                     enum dma_data_direction dir);
 47         void (*sync_single_for_device)(struct device *dev,
 48                                        dma_addr_t dma_handle, size_t size,
 49                                        enum dma_data_direction dir);
 50         void (*sync_sg_for_cpu)(struct device *dev,
 51                                 struct scatterlist *sg, int nents,
 52                                 enum dma_data_direction dir);
 53         void (*sync_sg_for_device)(struct device *dev,
 54                                    struct scatterlist *sg, int nents,
 55                                    enum dma_data_direction dir);
 56         int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
 57         int (*dma_supported)(struct device *dev, u64 mask);
 58         int (*set_dma_mask)(struct device *dev, u64 mask);
 59 #ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK
 60         u64 (*get_required_mask)(struct device *dev);
 61 #endif
 62         int is_phys;
 63 };
 64 
 65 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
 66 
 67 #define DMA_MASK_NONE   0x0ULL
 68 
 69 static inline int valid_dma_direction(int dma_direction)
 70 {
 71         return ((dma_direction == DMA_BIDIRECTIONAL) ||
 72                 (dma_direction == DMA_TO_DEVICE) ||
 73                 (dma_direction == DMA_FROM_DEVICE));
 74 }
 75 
 76 static inline int is_device_dma_capable(struct device *dev)
 77 {
 78         return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
 79 }
 80 
 81 #ifdef CONFIG_HAS_DMA
 82 #include <asm/dma-mapping.h>
 83 #else
 84 #include <asm-generic/dma-mapping-broken.h>
 85 #endif
 86 
 87 static inline u64 dma_get_mask(struct device *dev)
 88 {
 89         if (dev && dev->dma_mask && *dev->dma_mask)
 90                 return *dev->dma_mask;
 91         return DMA_BIT_MASK(32);
 92 }
 93 
 94 #ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
 95 int dma_set_coherent_mask(struct device *dev, u64 mask);
 96 #else
 97 static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
 98 {
 99         if (!dma_supported(dev, mask))
100                 return -EIO;
101         dev->coherent_dma_mask = mask;
102         return 0;
103 }
104 #endif
105 
106 /*
107  * Set both the DMA mask and the coherent DMA mask to the same thing.
108  * Note that we don't check the return value from dma_set_coherent_mask()
109  * as the DMA API guarantees that the coherent DMA mask can be set to
110  * the same or smaller than the streaming DMA mask.
111  */
112 static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
113 {
114         int rc = dma_set_mask(dev, mask);
115         if (rc == 0)
116                 dma_set_coherent_mask(dev, mask);
117         return rc;
118 }
119 
120 /*
121  * Similar to the above, except it deals with the case where the device
122  * does not have dev->dma_mask appropriately setup.
123  */
124 static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
125 {
126         dev->dma_mask = &dev->coherent_dma_mask;
127         return dma_set_mask_and_coherent(dev, mask);
128 }
129 
130 extern u64 dma_get_required_mask(struct device *dev);
131 
132 #ifndef arch_setup_dma_ops
133 static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
134                                       u64 size, struct iommu_ops *iommu,
135                                       bool coherent) { }
136 #endif
137 
138 #ifndef arch_teardown_dma_ops
139 static inline void arch_teardown_dma_ops(struct device *dev) { }
140 #endif
141 
142 static inline unsigned int dma_get_max_seg_size(struct device *dev)
143 {
144         return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
145 }
146 
147 static inline unsigned int dma_set_max_seg_size(struct device *dev,
148                                                 unsigned int size)
149 {
150         if (dev->dma_parms) {
151                 dev->dma_parms->max_segment_size = size;
152                 return 0;
153         } else
154                 return -EIO;
155 }
156 
157 static inline unsigned long dma_get_seg_boundary(struct device *dev)
158 {
159         return dev->dma_parms ?
160                 dev->dma_parms->segment_boundary_mask : 0xffffffff;
161 }
162 
163 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
164 {
165         if (dev->dma_parms) {
166                 dev->dma_parms->segment_boundary_mask = mask;
167                 return 0;
168         } else
169                 return -EIO;
170 }
171 
172 #ifndef dma_max_pfn
173 static inline unsigned long dma_max_pfn(struct device *dev)
174 {
175         return *dev->dma_mask >> PAGE_SHIFT;
176 }
177 #endif
178 
179 static inline void *dma_zalloc_coherent(struct device *dev, size_t size,
180                                         dma_addr_t *dma_handle, gfp_t flag)
181 {
182         void *ret = dma_alloc_coherent(dev, size, dma_handle,
183                                        flag | __GFP_ZERO);
184         return ret;
185 }
186 
187 #ifdef CONFIG_HAS_DMA
188 static inline int dma_get_cache_alignment(void)
189 {
190 #ifdef ARCH_DMA_MINALIGN
191         return ARCH_DMA_MINALIGN;
192 #endif
193         return 1;
194 }
195 #endif
196 
197 /* flags for the coherent memory api */
198 #define DMA_MEMORY_MAP                  0x01
199 #define DMA_MEMORY_IO                   0x02
200 #define DMA_MEMORY_INCLUDES_CHILDREN    0x04
201 #define DMA_MEMORY_EXCLUSIVE            0x08
202 
203 #ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
204 static inline int
205 dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
206                             dma_addr_t device_addr, size_t size, int flags)
207 {
208         return 0;
209 }
210 
211 static inline void
212 dma_release_declared_memory(struct device *dev)
213 {
214 }
215 
216 static inline void *
217 dma_mark_declared_memory_occupied(struct device *dev,
218                                   dma_addr_t device_addr, size_t size)
219 {
220         return ERR_PTR(-EBUSY);
221 }
222 #endif
223 
224 /*
225  * Managed DMA API
226  */
227 extern void *dmam_alloc_coherent(struct device *dev, size_t size,
228                                  dma_addr_t *dma_handle, gfp_t gfp);
229 extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
230                                dma_addr_t dma_handle);
231 extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
232                                     dma_addr_t *dma_handle, gfp_t gfp);
233 extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
234                                   dma_addr_t dma_handle);
235 #ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
236 extern int dmam_declare_coherent_memory(struct device *dev,
237                                         phys_addr_t phys_addr,
238                                         dma_addr_t device_addr, size_t size,
239                                         int flags);
240 extern void dmam_release_declared_memory(struct device *dev);
241 #else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
242 static inline int dmam_declare_coherent_memory(struct device *dev,
243                                 phys_addr_t phys_addr, dma_addr_t device_addr,
244                                 size_t size, gfp_t gfp)
245 {
246         return 0;
247 }
248 
249 static inline void dmam_release_declared_memory(struct device *dev)
250 {
251 }
252 #endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
253 
254 #ifndef CONFIG_HAVE_DMA_ATTRS
255 struct dma_attrs;
256 
257 #define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \
258         dma_map_single(dev, cpu_addr, size, dir)
259 
260 #define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \
261         dma_unmap_single(dev, dma_addr, size, dir)
262 
263 #define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \
264         dma_map_sg(dev, sgl, nents, dir)
265 
266 #define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \
267         dma_unmap_sg(dev, sgl, nents, dir)
268 
269 #else
270 static inline void *dma_alloc_writecombine(struct device *dev, size_t size,
271                                            dma_addr_t *dma_addr, gfp_t gfp)
272 {
273         DEFINE_DMA_ATTRS(attrs);
274         dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
275         return dma_alloc_attrs(dev, size, dma_addr, gfp, &attrs);
276 }
277 
278 static inline void dma_free_writecombine(struct device *dev, size_t size,
279                                          void *cpu_addr, dma_addr_t dma_addr)
280 {
281         DEFINE_DMA_ATTRS(attrs);
282         dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
283         return dma_free_attrs(dev, size, cpu_addr, dma_addr, &attrs);
284 }
285 
286 static inline int dma_mmap_writecombine(struct device *dev,
287                                         struct vm_area_struct *vma,
288                                         void *cpu_addr, dma_addr_t dma_addr,
289                                         size_t size)
290 {
291         DEFINE_DMA_ATTRS(attrs);
292         dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
293         return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, &attrs);
294 }
295 #endif /* CONFIG_HAVE_DMA_ATTRS */
296 
297 #ifdef CONFIG_NEED_DMA_MAP_STATE
298 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)        dma_addr_t ADDR_NAME
299 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME)          __u32 LEN_NAME
300 #define dma_unmap_addr(PTR, ADDR_NAME)           ((PTR)->ADDR_NAME)
301 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL)  (((PTR)->ADDR_NAME) = (VAL))
302 #define dma_unmap_len(PTR, LEN_NAME)             ((PTR)->LEN_NAME)
303 #define dma_unmap_len_set(PTR, LEN_NAME, VAL)    (((PTR)->LEN_NAME) = (VAL))
304 #else
305 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
306 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
307 #define dma_unmap_addr(PTR, ADDR_NAME)           (0)
308 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL)  do { } while (0)
309 #define dma_unmap_len(PTR, LEN_NAME)             (0)
310 #define dma_unmap_len_set(PTR, LEN_NAME, VAL)    do { } while (0)
311 #endif
312 
313 #endif
314 

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