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TOMOYO Linux Cross Reference
Linux/include/linux/mfd/syscon/atmel-smc.h

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  1 /*
  2  * Atmel SMC (Static Memory Controller) register offsets and bit definitions.
  3  *
  4  * Copyright (C) 2014 Atmel
  5  * Copyright (C) 2014 Free Electrons
  6  *
  7  * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
  8  *
  9  * This program is free software; you can redistribute it and/or modify
 10  * it under the terms of the GNU General Public License version 2 as
 11  * published by the Free Software Foundation.
 12  */
 13 
 14 #ifndef _LINUX_MFD_SYSCON_ATMEL_SMC_H_
 15 #define _LINUX_MFD_SYSCON_ATMEL_SMC_H_
 16 
 17 #include <linux/kernel.h>
 18 #include <linux/regmap.h>
 19 
 20 #define ATMEL_SMC_SETUP(cs)                     (((cs) * 0x10))
 21 #define ATMEL_HSMC_SETUP(cs)                    (0x600 + ((cs) * 0x14))
 22 #define ATMEL_SMC_PULSE(cs)                     (((cs) * 0x10) + 0x4)
 23 #define ATMEL_HSMC_PULSE(cs)                    (0x600 + ((cs) * 0x14) + 0x4)
 24 #define ATMEL_SMC_CYCLE(cs)                     (((cs) * 0x10) + 0x8)
 25 #define ATMEL_HSMC_CYCLE(cs)                    (0x600 + ((cs) * 0x14) + 0x8)
 26 #define ATMEL_SMC_NWE_SHIFT                     0
 27 #define ATMEL_SMC_NCS_WR_SHIFT                  8
 28 #define ATMEL_SMC_NRD_SHIFT                     16
 29 #define ATMEL_SMC_NCS_RD_SHIFT                  24
 30 
 31 #define ATMEL_SMC_MODE(cs)                      (((cs) * 0x10) + 0xc)
 32 #define ATMEL_HSMC_MODE(cs)                     (0x600 + ((cs) * 0x14) + 0x10)
 33 #define ATMEL_SMC_MODE_READMODE_MASK            BIT(0)
 34 #define ATMEL_SMC_MODE_READMODE_NCS             (0 << 0)
 35 #define ATMEL_SMC_MODE_READMODE_NRD             (1 << 0)
 36 #define ATMEL_SMC_MODE_WRITEMODE_MASK           BIT(1)
 37 #define ATMEL_SMC_MODE_WRITEMODE_NCS            (0 << 1)
 38 #define ATMEL_SMC_MODE_WRITEMODE_NWE            (1 << 1)
 39 #define ATMEL_SMC_MODE_EXNWMODE_MASK            GENMASK(5, 4)
 40 #define ATMEL_SMC_MODE_EXNWMODE_DISABLE         (0 << 4)
 41 #define ATMEL_SMC_MODE_EXNWMODE_FROZEN          (2 << 4)
 42 #define ATMEL_SMC_MODE_EXNWMODE_READY           (3 << 4)
 43 #define ATMEL_SMC_MODE_BAT_MASK                 BIT(8)
 44 #define ATMEL_SMC_MODE_BAT_SELECT               (0 << 8)
 45 #define ATMEL_SMC_MODE_BAT_WRITE                (1 << 8)
 46 #define ATMEL_SMC_MODE_DBW_MASK                 GENMASK(13, 12)
 47 #define ATMEL_SMC_MODE_DBW_8                    (0 << 12)
 48 #define ATMEL_SMC_MODE_DBW_16                   (1 << 12)
 49 #define ATMEL_SMC_MODE_DBW_32                   (2 << 12)
 50 #define ATMEL_SMC_MODE_TDF_MASK                 GENMASK(19, 16)
 51 #define ATMEL_SMC_MODE_TDF(x)                   (((x) - 1) << 16)
 52 #define ATMEL_SMC_MODE_TDF_MAX                  16
 53 #define ATMEL_SMC_MODE_TDF_MIN                  1
 54 #define ATMEL_SMC_MODE_TDFMODE_OPTIMIZED        BIT(20)
 55 #define ATMEL_SMC_MODE_PMEN                     BIT(24)
 56 #define ATMEL_SMC_MODE_PS_MASK                  GENMASK(29, 28)
 57 #define ATMEL_SMC_MODE_PS_4                     (0 << 28)
 58 #define ATMEL_SMC_MODE_PS_8                     (1 << 28)
 59 #define ATMEL_SMC_MODE_PS_16                    (2 << 28)
 60 #define ATMEL_SMC_MODE_PS_32                    (3 << 28)
 61 
 62 #define ATMEL_HSMC_TIMINGS(cs)                  (0x600 + ((cs) * 0x14) + 0xc)
 63 #define ATMEL_HSMC_TIMINGS_OCMS                 BIT(12)
 64 #define ATMEL_HSMC_TIMINGS_RBNSEL(x)            ((x) << 28)
 65 #define ATMEL_HSMC_TIMINGS_NFSEL                BIT(31)
 66 #define ATMEL_HSMC_TIMINGS_TCLR_SHIFT           0
 67 #define ATMEL_HSMC_TIMINGS_TADL_SHIFT           4
 68 #define ATMEL_HSMC_TIMINGS_TAR_SHIFT            8
 69 #define ATMEL_HSMC_TIMINGS_TRR_SHIFT            16
 70 #define ATMEL_HSMC_TIMINGS_TWB_SHIFT            24
 71 
 72 /**
 73  * struct atmel_smc_cs_conf - SMC CS config as described in the datasheet.
 74  * @setup: NCS/NWE/NRD setup timings (not applicable to at91rm9200)
 75  * @pulse: NCS/NWE/NRD pulse timings (not applicable to at91rm9200)
 76  * @cycle: NWE/NRD cycle timings (not applicable to at91rm9200)
 77  * @timings: advanced NAND related timings (only applicable to HSMC)
 78  * @mode: all kind of config parameters (see the fields definition above).
 79  *        The mode fields are different on at91rm9200
 80  */
 81 struct atmel_smc_cs_conf {
 82         u32 setup;
 83         u32 pulse;
 84         u32 cycle;
 85         u32 timings;
 86         u32 mode;
 87 };
 88 
 89 void atmel_smc_cs_conf_init(struct atmel_smc_cs_conf *conf);
 90 int atmel_smc_cs_conf_set_timing(struct atmel_smc_cs_conf *conf,
 91                                  unsigned int shift,
 92                                  unsigned int ncycles);
 93 int atmel_smc_cs_conf_set_setup(struct atmel_smc_cs_conf *conf,
 94                                 unsigned int shift, unsigned int ncycles);
 95 int atmel_smc_cs_conf_set_pulse(struct atmel_smc_cs_conf *conf,
 96                                 unsigned int shift, unsigned int ncycles);
 97 int atmel_smc_cs_conf_set_cycle(struct atmel_smc_cs_conf *conf,
 98                                 unsigned int shift, unsigned int ncycles);
 99 void atmel_smc_cs_conf_apply(struct regmap *regmap, int cs,
100                              const struct atmel_smc_cs_conf *conf);
101 void atmel_hsmc_cs_conf_apply(struct regmap *regmap, int cs,
102                               const struct atmel_smc_cs_conf *conf);
103 void atmel_smc_cs_conf_get(struct regmap *regmap, int cs,
104                            struct atmel_smc_cs_conf *conf);
105 void atmel_hsmc_cs_conf_get(struct regmap *regmap, int cs,
106                             struct atmel_smc_cs_conf *conf);
107 
108 #endif /* _LINUX_MFD_SYSCON_ATMEL_SMC_H_ */
109 

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