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TOMOYO Linux Cross Reference
Linux/include/sound/ac97_codec.h

Version: ~ [ linux-5.2-rc5 ] ~ [ linux-5.1.12 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.53 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.128 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.182 ] ~ [ linux-4.8.17 ] ~ [ linux-4.7.10 ] ~ [ linux-4.6.7 ] ~ [ linux-4.5.7 ] ~ [ linux-4.4.182 ] ~ [ linux-4.3.6 ] ~ [ linux-4.2.8 ] ~ [ linux-4.1.52 ] ~ [ linux-4.0.9 ] ~ [ linux-3.19.8 ] ~ [ linux-3.18.140 ] ~ [ linux-3.17.8 ] ~ [ linux-3.16.68 ] ~ [ linux-3.15.10 ] ~ [ linux-3.14.79 ] ~ [ linux-3.13.11 ] ~ [ linux-3.12.74 ] ~ [ linux-3.11.10 ] ~ [ linux-3.10.108 ] ~ [ linux-3.9.11 ] ~ [ linux-3.8.13 ] ~ [ linux-3.7.10 ] ~ [ linux-3.6.11 ] ~ [ linux-3.5.7 ] ~ [ linux-3.4.113 ] ~ [ linux-3.3.8 ] ~ [ linux-3.2.102 ] ~ [ linux-3.1.10 ] ~ [ linux-3.0.101 ] ~ [ linux-2.6.39.4 ] ~ [ linux-2.6.38.8 ] ~ [ linux-2.6.37.6 ] ~ [ linux-2.6.36.4 ] ~ [ linux-2.6.35.14 ] ~ [ linux-2.6.34.15 ] ~ [ linux-2.6.33.20 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.5 ] ~ [ policy-sample ] ~
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  1 #ifndef __SOUND_AC97_CODEC_H
  2 #define __SOUND_AC97_CODEC_H
  3 
  4 /*
  5  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  6  *  Universal interface for Audio Codec '97
  7  *
  8  *  For more details look to AC '97 component specification revision 2.1
  9  *  by Intel Corporation (http://developer.intel.com).
 10  *
 11  *
 12  *   This program is free software; you can redistribute it and/or modify
 13  *   it under the terms of the GNU General Public License as published by
 14  *   the Free Software Foundation; either version 2 of the License, or
 15  *   (at your option) any later version.
 16  *
 17  *   This program is distributed in the hope that it will be useful,
 18  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 19  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 20  *   GNU General Public License for more details.
 21  *
 22  *   You should have received a copy of the GNU General Public License
 23  *   along with this program; if not, write to the Free Software
 24  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 25  *
 26  */
 27 
 28 #include <linux/bitops.h>
 29 #include <linux/device.h>
 30 #include <linux/workqueue.h>
 31 #include <sound/pcm.h>
 32 #include <sound/control.h>
 33 #include <sound/info.h>
 34 
 35 /* maximum number of devices on the AC97 bus */
 36 #define AC97_BUS_MAX_DEVICES    4
 37 
 38 /*
 39  *  AC'97 codec registers
 40  */
 41 
 42 #define AC97_RESET              0x00    /* Reset */
 43 #define AC97_MASTER             0x02    /* Master Volume */
 44 #define AC97_HEADPHONE          0x04    /* Headphone Volume (optional) */
 45 #define AC97_MASTER_MONO        0x06    /* Master Volume Mono (optional) */
 46 #define AC97_MASTER_TONE        0x08    /* Master Tone (Bass & Treble) (optional) */
 47 #define AC97_PC_BEEP            0x0a    /* PC Beep Volume (optinal) */
 48 #define AC97_PHONE              0x0c    /* Phone Volume (optional) */
 49 #define AC97_MIC                0x0e    /* MIC Volume */
 50 #define AC97_LINE               0x10    /* Line In Volume */
 51 #define AC97_CD                 0x12    /* CD Volume */
 52 #define AC97_VIDEO              0x14    /* Video Volume (optional) */
 53 #define AC97_AUX                0x16    /* AUX Volume (optional) */
 54 #define AC97_PCM                0x18    /* PCM Volume */
 55 #define AC97_REC_SEL            0x1a    /* Record Select */
 56 #define AC97_REC_GAIN           0x1c    /* Record Gain */
 57 #define AC97_REC_GAIN_MIC       0x1e    /* Record Gain MIC (optional) */
 58 #define AC97_GENERAL_PURPOSE    0x20    /* General Purpose (optional) */
 59 #define AC97_3D_CONTROL         0x22    /* 3D Control (optional) */
 60 #define AC97_INT_PAGING         0x24    /* Audio Interrupt & Paging (AC'97 2.3) */
 61 #define AC97_POWERDOWN          0x26    /* Powerdown control / status */
 62 /* range 0x28-0x3a - AUDIO AC'97 2.0 extensions */
 63 #define AC97_EXTENDED_ID        0x28    /* Extended Audio ID */
 64 #define AC97_EXTENDED_STATUS    0x2a    /* Extended Audio Status and Control */
 65 #define AC97_PCM_FRONT_DAC_RATE 0x2c    /* PCM Front DAC Rate */
 66 #define AC97_PCM_SURR_DAC_RATE  0x2e    /* PCM Surround DAC Rate */
 67 #define AC97_PCM_LFE_DAC_RATE   0x30    /* PCM LFE DAC Rate */
 68 #define AC97_PCM_LR_ADC_RATE    0x32    /* PCM LR ADC Rate */
 69 #define AC97_PCM_MIC_ADC_RATE   0x34    /* PCM MIC ADC Rate */
 70 #define AC97_CENTER_LFE_MASTER  0x36    /* Center + LFE Master Volume */
 71 #define AC97_SURROUND_MASTER    0x38    /* Surround (Rear) Master Volume */
 72 #define AC97_SPDIF              0x3a    /* S/PDIF control */
 73 /* range 0x3c-0x58 - MODEM */
 74 #define AC97_EXTENDED_MID       0x3c    /* Extended Modem ID */
 75 #define AC97_EXTENDED_MSTATUS   0x3e    /* Extended Modem Status and Control */
 76 #define AC97_LINE1_RATE         0x40    /* Line1 DAC/ADC Rate */
 77 #define AC97_LINE2_RATE         0x42    /* Line2 DAC/ADC Rate */
 78 #define AC97_HANDSET_RATE       0x44    /* Handset DAC/ADC Rate */
 79 #define AC97_LINE1_LEVEL        0x46    /* Line1 DAC/ADC Level */
 80 #define AC97_LINE2_LEVEL        0x48    /* Line2 DAC/ADC Level */
 81 #define AC97_HANDSET_LEVEL      0x4a    /* Handset DAC/ADC Level */
 82 #define AC97_GPIO_CFG           0x4c    /* GPIO Configuration */
 83 #define AC97_GPIO_POLARITY      0x4e    /* GPIO Pin Polarity/Type, 0=low, 1=high active */
 84 #define AC97_GPIO_STICKY        0x50    /* GPIO Pin Sticky, 0=not, 1=sticky */
 85 #define AC97_GPIO_WAKEUP        0x52    /* GPIO Pin Wakeup, 0=no int, 1=yes int */
 86 #define AC97_GPIO_STATUS        0x54    /* GPIO Pin Status, slot 12 */
 87 #define AC97_MISC_AFE           0x56    /* Miscellaneous Modem AFE Status and Control */
 88 /* range 0x5a-0x7b - Vendor Specific */
 89 #define AC97_VENDOR_ID1         0x7c    /* Vendor ID1 */
 90 #define AC97_VENDOR_ID2         0x7e    /* Vendor ID2 / revision */
 91 /* range 0x60-0x6f (page 1) - extended codec registers */
 92 #define AC97_CODEC_CLASS_REV    0x60    /* Codec Class/Revision */
 93 #define AC97_PCI_SVID           0x62    /* PCI Subsystem Vendor ID */
 94 #define AC97_PCI_SID            0x64    /* PCI Subsystem ID */
 95 #define AC97_FUNC_SELECT        0x66    /* Function Select */
 96 #define AC97_FUNC_INFO          0x68    /* Function Information */
 97 #define AC97_SENSE_INFO         0x6a    /* Sense Details */
 98 
 99 /* volume controls */
100 #define AC97_MUTE_MASK_MONO     0x8000
101 #define AC97_MUTE_MASK_STEREO   0x8080
102 
103 /* slot allocation */
104 #define AC97_SLOT_TAG           0
105 #define AC97_SLOT_CMD_ADDR      1
106 #define AC97_SLOT_CMD_DATA      2
107 #define AC97_SLOT_PCM_LEFT      3
108 #define AC97_SLOT_PCM_RIGHT     4
109 #define AC97_SLOT_MODEM_LINE1   5
110 #define AC97_SLOT_PCM_CENTER    6
111 #define AC97_SLOT_MIC           6       /* input */
112 #define AC97_SLOT_SPDIF_LEFT1   6
113 #define AC97_SLOT_PCM_SLEFT     7       /* surround left */
114 #define AC97_SLOT_PCM_LEFT_0    7       /* double rate operation */
115 #define AC97_SLOT_SPDIF_LEFT    7
116 #define AC97_SLOT_PCM_SRIGHT    8       /* surround right */
117 #define AC97_SLOT_PCM_RIGHT_0   8       /* double rate operation */
118 #define AC97_SLOT_SPDIF_RIGHT   8
119 #define AC97_SLOT_LFE           9
120 #define AC97_SLOT_SPDIF_RIGHT1  9
121 #define AC97_SLOT_MODEM_LINE2   10
122 #define AC97_SLOT_PCM_LEFT_1    10      /* double rate operation */
123 #define AC97_SLOT_SPDIF_LEFT2   10
124 #define AC97_SLOT_HANDSET       11      /* output */
125 #define AC97_SLOT_PCM_RIGHT_1   11      /* double rate operation */
126 #define AC97_SLOT_SPDIF_RIGHT2  11
127 #define AC97_SLOT_MODEM_GPIO    12      /* modem GPIO */
128 #define AC97_SLOT_PCM_CENTER_1  12      /* double rate operation */
129 
130 /* basic capabilities (reset register) */
131 #define AC97_BC_DEDICATED_MIC   0x0001  /* Dedicated Mic PCM In Channel */
132 #define AC97_BC_RESERVED1       0x0002  /* Reserved (was Modem Line Codec support) */
133 #define AC97_BC_BASS_TREBLE     0x0004  /* Bass & Treble Control */
134 #define AC97_BC_SIM_STEREO      0x0008  /* Simulated stereo */
135 #define AC97_BC_HEADPHONE       0x0010  /* Headphone Out Support */
136 #define AC97_BC_LOUDNESS        0x0020  /* Loudness (bass boost) Support */
137 #define AC97_BC_16BIT_DAC       0x0000  /* 16-bit DAC resolution */
138 #define AC97_BC_18BIT_DAC       0x0040  /* 18-bit DAC resolution */
139 #define AC97_BC_20BIT_DAC       0x0080  /* 20-bit DAC resolution */
140 #define AC97_BC_DAC_MASK        0x00c0
141 #define AC97_BC_16BIT_ADC       0x0000  /* 16-bit ADC resolution */
142 #define AC97_BC_18BIT_ADC       0x0100  /* 18-bit ADC resolution */
143 #define AC97_BC_20BIT_ADC       0x0200  /* 20-bit ADC resolution */
144 #define AC97_BC_ADC_MASK        0x0300
145 #define AC97_BC_3D_TECH_ID_MASK 0x7c00  /* Per-vendor ID of 3D enhancement */
146 
147 /* general purpose */
148 #define AC97_GP_DRSS_MASK       0x0c00  /* double rate slot select */
149 #define AC97_GP_DRSS_1011       0x0000  /* LR(C) 10+11(+12) */
150 #define AC97_GP_DRSS_78         0x0400  /* LR 7+8 */
151 
152 /* powerdown bits */
153 #define AC97_PD_ADC_STATUS      0x0001  /* ADC status (RO) */
154 #define AC97_PD_DAC_STATUS      0x0002  /* DAC status (RO) */
155 #define AC97_PD_MIXER_STATUS    0x0004  /* Analog mixer status (RO) */
156 #define AC97_PD_VREF_STATUS     0x0008  /* Vref status (RO) */
157 #define AC97_PD_PR0             0x0100  /* Power down PCM ADCs and input MUX */
158 #define AC97_PD_PR1             0x0200  /* Power down PCM front DAC */
159 #define AC97_PD_PR2             0x0400  /* Power down Mixer (Vref still on) */
160 #define AC97_PD_PR3             0x0800  /* Power down Mixer (Vref off) */
161 #define AC97_PD_PR4             0x1000  /* Power down AC-Link */
162 #define AC97_PD_PR5             0x2000  /* Disable internal clock usage */
163 #define AC97_PD_PR6             0x4000  /* Headphone amplifier */
164 #define AC97_PD_EAPD            0x8000  /* External Amplifer Power Down (EAPD) */
165 
166 /* extended audio ID bit defines */
167 #define AC97_EI_VRA             0x0001  /* Variable bit rate supported */
168 #define AC97_EI_DRA             0x0002  /* Double rate supported */
169 #define AC97_EI_SPDIF           0x0004  /* S/PDIF out supported */
170 #define AC97_EI_VRM             0x0008  /* Variable bit rate supported for MIC */
171 #define AC97_EI_DACS_SLOT_MASK  0x0030  /* DACs slot assignment */
172 #define AC97_EI_DACS_SLOT_SHIFT 4
173 #define AC97_EI_CDAC            0x0040  /* PCM Center DAC available */
174 #define AC97_EI_SDAC            0x0080  /* PCM Surround DACs available */
175 #define AC97_EI_LDAC            0x0100  /* PCM LFE DAC available */
176 #define AC97_EI_AMAP            0x0200  /* indicates optional slot/DAC mapping based on codec ID */
177 #define AC97_EI_REV_MASK        0x0c00  /* AC'97 revision mask */
178 #define AC97_EI_REV_22          0x0400  /* AC'97 revision 2.2 */
179 #define AC97_EI_REV_23          0x0800  /* AC'97 revision 2.3 */
180 #define AC97_EI_REV_SHIFT       10
181 #define AC97_EI_ADDR_MASK       0xc000  /* physical codec ID (address) */
182 #define AC97_EI_ADDR_SHIFT      14
183 
184 /* extended audio status and control bit defines */
185 #define AC97_EA_VRA             0x0001  /* Variable bit rate enable bit */
186 #define AC97_EA_DRA             0x0002  /* Double-rate audio enable bit */
187 #define AC97_EA_SPDIF           0x0004  /* S/PDIF out enable bit */
188 #define AC97_EA_VRM             0x0008  /* Variable bit rate for MIC enable bit */
189 #define AC97_EA_SPSA_SLOT_MASK  0x0030  /* Mask for slot assignment bits */
190 #define AC97_EA_SPSA_SLOT_SHIFT 4
191 #define AC97_EA_SPSA_3_4        0x0000  /* Slot assigned to 3 & 4 */
192 #define AC97_EA_SPSA_7_8        0x0010  /* Slot assigned to 7 & 8 */
193 #define AC97_EA_SPSA_6_9        0x0020  /* Slot assigned to 6 & 9 */
194 #define AC97_EA_SPSA_10_11      0x0030  /* Slot assigned to 10 & 11 */
195 #define AC97_EA_CDAC            0x0040  /* PCM Center DAC is ready (Read only) */
196 #define AC97_EA_SDAC            0x0080  /* PCM Surround DACs are ready (Read only) */
197 #define AC97_EA_LDAC            0x0100  /* PCM LFE DAC is ready (Read only) */
198 #define AC97_EA_MDAC            0x0200  /* MIC ADC is ready (Read only) */
199 #define AC97_EA_SPCV            0x0400  /* S/PDIF configuration valid (Read only) */
200 #define AC97_EA_PRI             0x0800  /* Turns the PCM Center DAC off */
201 #define AC97_EA_PRJ             0x1000  /* Turns the PCM Surround DACs off */
202 #define AC97_EA_PRK             0x2000  /* Turns the PCM LFE DAC off */
203 #define AC97_EA_PRL             0x4000  /* Turns the MIC ADC off */
204 
205 /* S/PDIF control bit defines */
206 #define AC97_SC_PRO             0x0001  /* Professional status */
207 #define AC97_SC_NAUDIO          0x0002  /* Non audio stream */
208 #define AC97_SC_COPY            0x0004  /* Copyright status */
209 #define AC97_SC_PRE             0x0008  /* Preemphasis status */
210 #define AC97_SC_CC_MASK         0x07f0  /* Category Code mask */
211 #define AC97_SC_CC_SHIFT        4
212 #define AC97_SC_L               0x0800  /* Generation Level status */
213 #define AC97_SC_SPSR_MASK       0x3000  /* S/PDIF Sample Rate bits */
214 #define AC97_SC_SPSR_SHIFT      12
215 #define AC97_SC_SPSR_44K        0x0000  /* Use 44.1kHz Sample rate */
216 #define AC97_SC_SPSR_48K        0x2000  /* Use 48kHz Sample rate */
217 #define AC97_SC_SPSR_32K        0x3000  /* Use 32kHz Sample rate */
218 #define AC97_SC_DRS             0x4000  /* Double Rate S/PDIF */
219 #define AC97_SC_V               0x8000  /* Validity status */
220 
221 /* Interrupt and Paging bit defines (AC'97 2.3) */
222 #define AC97_PAGE_MASK          0x000f  /* Page Selector */
223 #define AC97_PAGE_VENDOR        0       /* Vendor-specific registers */
224 #define AC97_PAGE_1             1       /* Extended Codec Registers page 1 */
225 #define AC97_INT_ENABLE         0x0800  /* Interrupt Enable */
226 #define AC97_INT_SENSE          0x1000  /* Sense Cycle */
227 #define AC97_INT_CAUSE_SENSE    0x2000  /* Sense Cycle Completed (RO) */
228 #define AC97_INT_CAUSE_GPIO     0x4000  /* GPIO bits changed (RO) */
229 #define AC97_INT_STATUS         0x8000  /* Interrupt Status */
230 
231 /* extended modem ID bit defines */
232 #define AC97_MEI_LINE1          0x0001  /* Line1 present */
233 #define AC97_MEI_LINE2          0x0002  /* Line2 present */
234 #define AC97_MEI_HANDSET        0x0004  /* Handset present */
235 #define AC97_MEI_CID1           0x0008  /* caller ID decode for Line1 is supported */
236 #define AC97_MEI_CID2           0x0010  /* caller ID decode for Line2 is supported */
237 #define AC97_MEI_ADDR_MASK      0xc000  /* physical codec ID (address) */
238 #define AC97_MEI_ADDR_SHIFT     14
239 
240 /* extended modem status and control bit defines */
241 #define AC97_MEA_GPIO           0x0001  /* GPIO is ready (ro) */
242 #define AC97_MEA_MREF           0x0002  /* Vref is up to nominal level (ro) */
243 #define AC97_MEA_ADC1           0x0004  /* ADC1 operational (ro) */
244 #define AC97_MEA_DAC1           0x0008  /* DAC1 operational (ro) */
245 #define AC97_MEA_ADC2           0x0010  /* ADC2 operational (ro) */
246 #define AC97_MEA_DAC2           0x0020  /* DAC2 operational (ro) */
247 #define AC97_MEA_HADC           0x0040  /* HADC operational (ro) */
248 #define AC97_MEA_HDAC           0x0080  /* HDAC operational (ro) */
249 #define AC97_MEA_PRA            0x0100  /* GPIO power down (high) */
250 #define AC97_MEA_PRB            0x0200  /* reserved */
251 #define AC97_MEA_PRC            0x0400  /* ADC1 power down (high) */
252 #define AC97_MEA_PRD            0x0800  /* DAC1 power down (high) */
253 #define AC97_MEA_PRE            0x1000  /* ADC2 power down (high) */
254 #define AC97_MEA_PRF            0x2000  /* DAC2 power down (high) */
255 #define AC97_MEA_PRG            0x4000  /* HADC power down (high) */
256 #define AC97_MEA_PRH            0x8000  /* HDAC power down (high) */
257 
258 /* modem gpio status defines */
259 #define AC97_GPIO_LINE1_OH      0x0001  /* Off Hook Line1 */
260 #define AC97_GPIO_LINE1_RI      0x0002  /* Ring Detect Line1 */
261 #define AC97_GPIO_LINE1_CID     0x0004  /* Caller ID path enable Line1 */
262 #define AC97_GPIO_LINE1_LCS     0x0008  /* Loop Current Sense Line1 */
263 #define AC97_GPIO_LINE1_PULSE   0x0010  /* Opt./ Pulse Dial Line1 (out) */
264 #define AC97_GPIO_LINE1_HL1R    0x0020  /* Opt./ Handset to Line1 relay control (out) */
265 #define AC97_GPIO_LINE1_HOHD    0x0040  /* Opt./ Handset off hook detect Line1 (in) */
266 #define AC97_GPIO_LINE12_AC     0x0080  /* Opt./ Int.bit 1 / Line1/2 AC (out) */
267 #define AC97_GPIO_LINE12_DC     0x0100  /* Opt./ Int.bit 2 / Line1/2 DC (out) */
268 #define AC97_GPIO_LINE12_RS     0x0200  /* Opt./ Int.bit 3 / Line1/2 RS (out) */
269 #define AC97_GPIO_LINE2_OH      0x0400  /* Off Hook Line2 */
270 #define AC97_GPIO_LINE2_RI      0x0800  /* Ring Detect Line2 */
271 #define AC97_GPIO_LINE2_CID     0x1000  /* Caller ID path enable Line2 */
272 #define AC97_GPIO_LINE2_LCS     0x2000  /* Loop Current Sense Line2 */
273 #define AC97_GPIO_LINE2_PULSE   0x4000  /* Opt./ Pulse Dial Line2 (out) */
274 #define AC97_GPIO_LINE2_HL1R    0x8000  /* Opt./ Handset to Line2 relay control (out) */
275 
276 /* specific - SigmaTel */
277 #define AC97_SIGMATEL_OUTSEL    0x64    /* Output Select, STAC9758 */
278 #define AC97_SIGMATEL_INSEL     0x66    /* Input Select, STAC9758 */
279 #define AC97_SIGMATEL_IOMISC    0x68    /* STAC9758 */
280 #define AC97_SIGMATEL_ANALOG    0x6c    /* Analog Special */
281 #define AC97_SIGMATEL_DAC2INVERT 0x6e
282 #define AC97_SIGMATEL_BIAS1     0x70
283 #define AC97_SIGMATEL_BIAS2     0x72
284 #define AC97_SIGMATEL_VARIOUS   0x72    /* STAC9758 */
285 #define AC97_SIGMATEL_MULTICHN  0x74    /* Multi-Channel programming */
286 #define AC97_SIGMATEL_CIC1      0x76
287 #define AC97_SIGMATEL_CIC2      0x78
288 
289 /* specific - Analog Devices */
290 #define AC97_AD_TEST            0x5a    /* test register */
291 #define AC97_AD_TEST2           0x5c    /* undocumented test register 2 */
292 #define AC97_AD_HPFD_SHIFT      12      /* High Pass Filter Disable */
293 #define AC97_AD_CODEC_CFG       0x70    /* codec configuration */
294 #define AC97_AD_JACK_SPDIF      0x72    /* Jack Sense & S/PDIF */
295 #define AC97_AD_SERIAL_CFG      0x74    /* Serial Configuration */
296 #define AC97_AD_MISC            0x76    /* Misc Control Bits */
297 #define AC97_AD_VREFD_SHIFT     2       /* V_REFOUT Disable (AD1888) */
298 
299 /* specific - Cirrus Logic */
300 #define AC97_CSR_ACMODE         0x5e    /* AC Mode Register */
301 #define AC97_CSR_MISC_CRYSTAL   0x60    /* Misc Crystal Control */
302 #define AC97_CSR_SPDIF          0x68    /* S/PDIF Register */
303 #define AC97_CSR_SERIAL         0x6a    /* Serial Port Control */
304 #define AC97_CSR_SPECF_ADDR     0x6c    /* Special Feature Address */
305 #define AC97_CSR_SPECF_DATA     0x6e    /* Special Feature Data */
306 #define AC97_CSR_BDI_STATUS     0x7a    /* BDI Status */
307 
308 /* specific - Conexant */
309 #define AC97_CXR_AUDIO_MISC     0x5c
310 #define AC97_CXR_SPDIFEN        (1<<3)
311 #define AC97_CXR_COPYRGT        (1<<2)
312 #define AC97_CXR_SPDIF_MASK     (3<<0)
313 #define AC97_CXR_SPDIF_PCM      0x0
314 #define AC97_CXR_SPDIF_AC3      0x2
315 
316 /* specific - ALC */
317 #define AC97_ALC650_SPDIF_INPUT_STATUS1 0x60
318 /* S/PDIF input status 1 bit defines */
319 #define AC97_ALC650_PRO             0x0001  /* Professional status */
320 #define AC97_ALC650_NAUDIO          0x0002  /* Non audio stream */
321 #define AC97_ALC650_COPY            0x0004  /* Copyright status */
322 #define AC97_ALC650_PRE             0x0038  /* Preemphasis status */
323 #define AC97_ALC650_PRE_SHIFT       3
324 #define AC97_ALC650_MODE            0x00C0  /* Preemphasis status */
325 #define AC97_ALC650_MODE_SHIFT      6
326 #define AC97_ALC650_CC_MASK         0x7f00  /* Category Code mask */
327 #define AC97_ALC650_CC_SHIFT        8
328 #define AC97_ALC650_L               0x8000  /* Generation Level status */
329 
330 #define AC97_ALC650_SPDIF_INPUT_STATUS2 0x62
331 /* S/PDIF input status 2 bit defines */
332 #define AC97_ALC650_SOUCE_MASK      0x000f  /* Source number */
333 #define AC97_ALC650_CHANNEL_MASK    0x00f0  /* Channel number */
334 #define AC97_ALC650_CHANNEL_SHIFT   4 
335 #define AC97_ALC650_SPSR_MASK       0x0f00  /* S/PDIF Sample Rate bits */
336 #define AC97_ALC650_SPSR_SHIFT      8
337 #define AC97_ALC650_SPSR_44K        0x0000  /* Use 44.1kHz Sample rate */
338 #define AC97_ALC650_SPSR_48K        0x0200  /* Use 48kHz Sample rate */
339 #define AC97_ALC650_SPSR_32K        0x0300  /* Use 32kHz Sample rate */
340 #define AC97_ALC650_CLOCK_ACCURACY  0x3000  /* Clock accuracy */
341 #define AC97_ALC650_CLOCK_SHIFT     12
342 #define AC97_ALC650_CLOCK_LOCK      0x4000  /* Clock locked status */
343 #define AC97_ALC650_V               0x8000  /* Validity status */
344 
345 #define AC97_ALC650_SURR_DAC_VOL        0x64
346 #define AC97_ALC650_LFE_DAC_VOL         0x66
347 #define AC97_ALC650_UNKNOWN1            0x68
348 #define AC97_ALC650_MULTICH             0x6a
349 #define AC97_ALC650_UNKNOWN2            0x6c
350 #define AC97_ALC650_REVISION            0x6e
351 #define AC97_ALC650_UNKNOWN3            0x70
352 #define AC97_ALC650_UNKNOWN4            0x72
353 #define AC97_ALC650_MISC                0x74
354 #define AC97_ALC650_GPIO_SETUP          0x76
355 #define AC97_ALC650_GPIO_STATUS         0x78
356 #define AC97_ALC650_CLOCK               0x7a
357 
358 /* specific - Yamaha YMF7x3 */
359 #define AC97_YMF7X3_DIT_CTRL    0x66    /* DIT Control (YMF743) / 2 (YMF753) */
360 #define AC97_YMF7X3_3D_MODE_SEL 0x68    /* 3D Mode Select */
361 
362 /* specific - C-Media */
363 #define AC97_CM9738_VENDOR_CTRL 0x5a
364 #define AC97_CM9739_MULTI_CHAN  0x64
365 #define AC97_CM9739_SPDIF_IN_STATUS     0x68 /* 32bit */
366 #define AC97_CM9739_SPDIF_CTRL  0x6c
367 
368 /* specific - wolfson */
369 #define AC97_WM97XX_FMIXER_VOL  0x72
370 #define AC97_WM9704_RMIXER_VOL  0x74
371 #define AC97_WM9704_TEST        0x5a
372 #define AC97_WM9704_RPCM_VOL    0x70
373 #define AC97_WM9711_OUT3VOL     0x16
374 
375 
376 /* ac97->scaps */
377 #define AC97_SCAP_AUDIO         (1<<0)  /* audio codec 97 */
378 #define AC97_SCAP_MODEM         (1<<1)  /* modem codec 97 */
379 #define AC97_SCAP_SURROUND_DAC  (1<<2)  /* surround L&R DACs are present */
380 #define AC97_SCAP_CENTER_LFE_DAC (1<<3) /* center and LFE DACs are present */
381 #define AC97_SCAP_SKIP_AUDIO    (1<<4)  /* skip audio part of codec */
382 #define AC97_SCAP_SKIP_MODEM    (1<<5)  /* skip modem part of codec */
383 #define AC97_SCAP_INDEP_SDIN    (1<<6)  /* independent SDIN */
384 #define AC97_SCAP_INV_EAPD      (1<<7)  /* inverted EAPD */
385 #define AC97_SCAP_DETECT_BY_VENDOR (1<<8) /* use vendor registers for read tests */
386 #define AC97_SCAP_NO_SPDIF      (1<<9)  /* don't build SPDIF controls */
387 #define AC97_SCAP_EAPD_LED      (1<<10) /* EAPD as mute LED */
388 #define AC97_SCAP_POWER_SAVE    (1<<11) /* capable for aggressive power-saving */
389 
390 /* ac97->flags */
391 #define AC97_HAS_PC_BEEP        (1<<0)  /* force PC Speaker usage */
392 #define AC97_AD_MULTI           (1<<1)  /* Analog Devices - multi codecs */
393 #define AC97_CS_SPDIF           (1<<2)  /* Cirrus Logic uses funky SPDIF */
394 #define AC97_CX_SPDIF           (1<<3)  /* Conexant's spdif interface */
395 #define AC97_STEREO_MUTES       (1<<4)  /* has stereo mute bits */
396 #define AC97_DOUBLE_RATE        (1<<5)  /* supports double rate playback */
397 #define AC97_HAS_NO_MASTER_VOL  (1<<6)  /* no Master volume */
398 #define AC97_HAS_NO_PCM_VOL     (1<<7)  /* no PCM volume */
399 #define AC97_DEFAULT_POWER_OFF  (1<<8)  /* no RESET write */
400 #define AC97_MODEM_PATCH        (1<<9)  /* modem patch */
401 #define AC97_HAS_NO_REC_GAIN    (1<<10) /* no Record gain */
402 #define AC97_HAS_NO_PHONE       (1<<11) /* no PHONE volume */
403 #define AC97_HAS_NO_PC_BEEP     (1<<12) /* no PC Beep volume */
404 #define AC97_HAS_NO_VIDEO       (1<<13) /* no Video volume */
405 #define AC97_HAS_NO_CD          (1<<14) /* no CD volume */
406 #define AC97_HAS_NO_MIC (1<<15) /* no MIC volume */
407 #define AC97_HAS_NO_TONE        (1<<16) /* no Tone volume */
408 #define AC97_HAS_NO_STD_PCM     (1<<17) /* no standard AC97 PCM volume and mute */
409 #define AC97_HAS_NO_AUX         (1<<18) /* no standard AC97 AUX volume and mute */
410 #define AC97_HAS_8CH            (1<<19) /* supports 8-channel output */
411 
412 /* rates indexes */
413 #define AC97_RATES_FRONT_DAC    0
414 #define AC97_RATES_SURR_DAC     1
415 #define AC97_RATES_LFE_DAC      2
416 #define AC97_RATES_ADC          3
417 #define AC97_RATES_MIC_ADC      4
418 #define AC97_RATES_SPDIF        5
419 
420 #define AC97_NUM_GPIOS          16
421 /*
422  *
423  */
424 
425 struct snd_ac97;
426 struct snd_ac97_gpio_priv;
427 struct snd_pcm_chmap;
428 
429 struct snd_ac97_build_ops {
430         int (*build_3d) (struct snd_ac97 *ac97);
431         int (*build_specific) (struct snd_ac97 *ac97);
432         int (*build_spdif) (struct snd_ac97 *ac97);
433         int (*build_post_spdif) (struct snd_ac97 *ac97);
434 #ifdef CONFIG_PM
435         void (*suspend) (struct snd_ac97 *ac97);
436         void (*resume) (struct snd_ac97 *ac97);
437 #endif
438         void (*update_jacks) (struct snd_ac97 *ac97);   /* for jack-sharing */
439 };
440 
441 struct snd_ac97_bus_ops {
442         void (*reset) (struct snd_ac97 *ac97);
443         void (*warm_reset)(struct snd_ac97 *ac97);
444         void (*write) (struct snd_ac97 *ac97, unsigned short reg, unsigned short val);
445         unsigned short (*read) (struct snd_ac97 *ac97, unsigned short reg);
446         void (*wait) (struct snd_ac97 *ac97);
447         void (*init) (struct snd_ac97 *ac97);
448 };
449 
450 struct snd_ac97_bus {
451         /* -- lowlevel (hardware) driver specific -- */
452         struct snd_ac97_bus_ops *ops;
453         void *private_data;
454         void (*private_free) (struct snd_ac97_bus *bus);
455         /* --- */
456         struct snd_card *card;
457         unsigned short num;     /* bus number */
458         unsigned short no_vra: 1, /* bridge doesn't support VRA */
459                        dra: 1,  /* bridge supports double rate */
460                        isdin: 1;/* independent SDIN */
461         unsigned int clock;     /* AC'97 base clock (usually 48000Hz) */
462         spinlock_t bus_lock;    /* used mainly for slot allocation */
463         unsigned short used_slots[2][4]; /* actually used PCM slots */
464         unsigned short pcms_count; /* count of PCMs */
465         struct ac97_pcm *pcms;
466         struct snd_ac97 *codec[4];
467         struct snd_info_entry *proc;
468 };
469 
470 /* static resolution table */
471 struct snd_ac97_res_table {
472         unsigned short reg;     /* register */
473         unsigned short bits;    /* resolution bitmask */
474 };
475 
476 struct snd_ac97_template {
477         void *private_data;
478         void (*private_free) (struct snd_ac97 *ac97);
479         struct pci_dev *pci;    /* assigned PCI device - used for quirks */
480         unsigned short num;     /* number of codec: 0 = primary, 1 = secondary */
481         unsigned short addr;    /* physical address of codec [0-3] */
482         unsigned int scaps;     /* driver capabilities */
483         const struct snd_ac97_res_table *res_table;     /* static resolution */
484 };
485 
486 struct snd_ac97 {
487         /* -- lowlevel (hardware) driver specific -- */
488         const struct snd_ac97_build_ops *build_ops;
489         void *private_data;
490         void (*private_free) (struct snd_ac97 *ac97);
491         /* --- */
492         struct snd_ac97_bus *bus;
493         struct pci_dev *pci;    /* assigned PCI device - used for quirks */
494         struct snd_info_entry *proc;
495         struct snd_info_entry *proc_regs;
496         unsigned short subsystem_vendor;
497         unsigned short subsystem_device;
498         struct mutex reg_mutex;
499         struct mutex page_mutex;        /* mutex for AD18xx multi-codecs and paging (2.3) */
500         unsigned short num;     /* number of codec: 0 = primary, 1 = secondary */
501         unsigned short addr;    /* physical address of codec [0-3] */
502         unsigned int id;        /* identification of codec */
503         unsigned short caps;    /* capabilities (register 0) */
504         unsigned short ext_id;  /* extended feature identification (register 28) */
505         unsigned short ext_mid; /* extended modem ID (register 3C) */
506         const struct snd_ac97_res_table *res_table;     /* static resolution */
507         unsigned int scaps;     /* driver capabilities */
508         unsigned int flags;     /* specific code */
509         unsigned int rates[6];  /* see AC97_RATES_* defines */
510         unsigned int spdif_status;
511         unsigned short regs[0x80]; /* register cache */
512         DECLARE_BITMAP(reg_accessed, 0x80); /* bit flags */
513         union {                 /* vendor specific code */
514                 struct {
515                         unsigned short unchained[3];    // 0 = C34, 1 = C79, 2 = C69
516                         unsigned short chained[3];      // 0 = C34, 1 = C79, 2 = C69
517                         unsigned short id[3];           // codec IDs (lower 16-bit word)
518                         unsigned short pcmreg[3];       // PCM registers
519                         unsigned short codec_cfg[3];    // CODEC_CFG bits
520                         unsigned char swap_mic_linein;  // AD1986/AD1986A only
521                         unsigned char lo_as_master;     /* LO as master */
522                 } ad18xx;
523                 unsigned int dev_flags;         /* device specific */
524         } spec;
525         /* jack-sharing info */
526         unsigned char indep_surround;
527         unsigned char channel_mode;
528 
529 #ifdef CONFIG_SND_AC97_POWER_SAVE
530         unsigned int power_up;  /* power states */
531         struct delayed_work power_work;
532 #endif
533         struct device dev;
534         struct snd_ac97_gpio_priv *gpio_priv;
535 
536         struct snd_pcm_chmap *chmaps[2]; /* channel-maps (optional) */
537 };
538 
539 #define to_ac97_t(d) container_of(d, struct snd_ac97, dev)
540 
541 /* conditions */
542 static inline int ac97_is_audio(struct snd_ac97 * ac97)
543 {
544         return (ac97->scaps & AC97_SCAP_AUDIO);
545 }
546 static inline int ac97_is_modem(struct snd_ac97 * ac97)
547 {
548         return (ac97->scaps & AC97_SCAP_MODEM);
549 }
550 static inline int ac97_is_rev22(struct snd_ac97 * ac97)
551 {
552         return (ac97->ext_id & AC97_EI_REV_MASK) >= AC97_EI_REV_22;
553 }
554 static inline int ac97_can_amap(struct snd_ac97 * ac97)
555 {
556         return (ac97->ext_id & AC97_EI_AMAP) != 0;
557 }
558 static inline int ac97_can_spdif(struct snd_ac97 * ac97)
559 {
560         return (ac97->ext_id & AC97_EI_SPDIF) != 0;
561 }
562 
563 /* functions */
564 /* create new AC97 bus */
565 int snd_ac97_bus(struct snd_card *card, int num, struct snd_ac97_bus_ops *ops,
566                  void *private_data, struct snd_ac97_bus **rbus);
567 /* create mixer controls */
568 int snd_ac97_mixer(struct snd_ac97_bus *bus, struct snd_ac97_template *template,
569                    struct snd_ac97 **rac97);
570 const char *snd_ac97_get_short_name(struct snd_ac97 *ac97);
571 
572 void snd_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short value);
573 unsigned short snd_ac97_read(struct snd_ac97 *ac97, unsigned short reg);
574 void snd_ac97_write_cache(struct snd_ac97 *ac97, unsigned short reg, unsigned short value);
575 int snd_ac97_update(struct snd_ac97 *ac97, unsigned short reg, unsigned short value);
576 int snd_ac97_update_bits(struct snd_ac97 *ac97, unsigned short reg, unsigned short mask, unsigned short value);
577 #ifdef CONFIG_SND_AC97_POWER_SAVE
578 int snd_ac97_update_power(struct snd_ac97 *ac97, int reg, int powerup);
579 #else
580 static inline int snd_ac97_update_power(struct snd_ac97 *ac97, int reg,
581                                         int powerup)
582 {
583         return 0;
584 }
585 #endif
586 #ifdef CONFIG_PM
587 void snd_ac97_suspend(struct snd_ac97 *ac97);
588 void snd_ac97_resume(struct snd_ac97 *ac97);
589 #endif
590 int snd_ac97_reset(struct snd_ac97 *ac97, bool try_warm, unsigned int id,
591         unsigned int id_mask);
592 
593 /* quirk types */
594 enum {
595         AC97_TUNE_DEFAULT = -1, /* use default from quirk list (not valid in list) */
596         AC97_TUNE_NONE = 0,     /* nothing extra to do */
597         AC97_TUNE_HP_ONLY,      /* headphone (true line-out) control as master only */
598         AC97_TUNE_SWAP_HP,      /* swap headphone and master controls */
599         AC97_TUNE_SWAP_SURROUND, /* swap master and surround controls */
600         AC97_TUNE_AD_SHARING,   /* for AD1985, turn on OMS bit and use headphone */
601         AC97_TUNE_ALC_JACK,     /* for Realtek, enable JACK detection */
602         AC97_TUNE_INV_EAPD,     /* inverted EAPD implementation */
603         AC97_TUNE_MUTE_LED,     /* EAPD bit works as mute LED */
604         AC97_TUNE_HP_MUTE_LED,  /* EAPD bit works as mute LED, use headphone control as master */
605 };
606 
607 struct ac97_quirk {
608         unsigned short subvendor; /* PCI subsystem vendor id */
609         unsigned short subdevice; /* PCI subsystem device id */
610         unsigned short mask;    /* device id bit mask, 0 = accept all */
611         unsigned int codec_id;  /* codec id (if any), 0 = accept all */
612         const char *name;       /* name shown as info */
613         int type;               /* quirk type above */
614 };
615 
616 int snd_ac97_tune_hardware(struct snd_ac97 *ac97,
617                            const struct ac97_quirk *quirk,
618                            const char *override);
619 int snd_ac97_set_rate(struct snd_ac97 *ac97, int reg, unsigned int rate);
620 
621 /*
622  * PCM allocation
623  */
624 
625 enum ac97_pcm_cfg {
626         AC97_PCM_CFG_FRONT = 2,
627         AC97_PCM_CFG_REAR = 10,         /* alias surround */
628         AC97_PCM_CFG_LFE = 11,          /* center + lfe */
629         AC97_PCM_CFG_40 = 4,            /* front + rear */
630         AC97_PCM_CFG_51 = 6,            /* front + rear + center/lfe */
631         AC97_PCM_CFG_SPDIF = 20
632 };
633 
634 struct ac97_pcm {
635         struct snd_ac97_bus *bus;
636         unsigned int stream: 1,            /* stream type: 1 = capture */
637                      exclusive: 1,         /* exclusive mode, don't override with other pcms */
638                      copy_flag: 1,         /* lowlevel driver must fill all entries */
639                      spdif: 1;             /* spdif pcm */
640         unsigned short aslots;             /* active slots */
641         unsigned short cur_dbl;            /* current double-rate state */
642         unsigned int rates;                /* available rates */
643         struct {
644                 unsigned short slots;      /* driver input: requested AC97 slot numbers */
645                 unsigned short rslots[4];  /* allocated slots per codecs */
646                 unsigned char rate_table[4];
647                 struct snd_ac97 *codec[4];         /* allocated codecs */
648         } r[2];                            /* 0 = standard rates, 1 = double rates */
649         unsigned long private_value;       /* used by the hardware driver */
650 };
651 
652 int snd_ac97_pcm_assign(struct snd_ac97_bus *ac97,
653                         unsigned short pcms_count,
654                         const struct ac97_pcm *pcms);
655 int snd_ac97_pcm_open(struct ac97_pcm *pcm, unsigned int rate,
656                       enum ac97_pcm_cfg cfg, unsigned short slots);
657 int snd_ac97_pcm_close(struct ac97_pcm *pcm);
658 int snd_ac97_pcm_double_rate_rules(struct snd_pcm_runtime *runtime);
659 
660 /* ad hoc AC97 device driver access */
661 extern struct bus_type ac97_bus_type;
662 
663 /* AC97 platform_data adding function */
664 static inline void snd_ac97_dev_add_pdata(struct snd_ac97 *ac97, void *data)
665 {
666         ac97->dev.platform_data = data;
667 }
668 
669 #endif /* __SOUND_AC97_CODEC_H */
670 

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