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Linux/include/uapi/drm/mga_drm.h

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  1 /* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*-
  2  * Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com
  3  *
  4  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  5  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  6  * All rights reserved.
  7  *
  8  * Permission is hereby granted, free of charge, to any person obtaining a
  9  * copy of this software and associated documentation files (the "Software"),
 10  * to deal in the Software without restriction, including without limitation
 11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 12  * and/or sell copies of the Software, and to permit persons to whom the
 13  * Software is furnished to do so, subject to the following conditions:
 14  *
 15  * The above copyright notice and this permission notice (including the next
 16  * paragraph) shall be included in all copies or substantial portions of the
 17  * Software.
 18  *
 19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 22  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 25  * OTHER DEALINGS IN THE SOFTWARE.
 26  *
 27  * Authors:
 28  *    Jeff Hartmann <jhartmann@valinux.com>
 29  *    Keith Whitwell <keith@tungstengraphics.com>
 30  *
 31  * Rewritten by:
 32  *    Gareth Hughes <gareth@valinux.com>
 33  */
 34 
 35 #ifndef __MGA_DRM_H__
 36 #define __MGA_DRM_H__
 37 
 38 #include "drm.h"
 39 
 40 #if defined(__cplusplus)
 41 extern "C" {
 42 #endif
 43 
 44 /* WARNING: If you change any of these defines, make sure to change the
 45  * defines in the Xserver file (mga_sarea.h)
 46  */
 47 
 48 #ifndef __MGA_SAREA_DEFINES__
 49 #define __MGA_SAREA_DEFINES__
 50 
 51 /* WARP pipe flags
 52  */
 53 #define MGA_F                   0x1     /* fog */
 54 #define MGA_A                   0x2     /* alpha */
 55 #define MGA_S                   0x4     /* specular */
 56 #define MGA_T2                  0x8     /* multitexture */
 57 
 58 #define MGA_WARP_TGZ            0
 59 #define MGA_WARP_TGZF           (MGA_F)
 60 #define MGA_WARP_TGZA           (MGA_A)
 61 #define MGA_WARP_TGZAF          (MGA_F|MGA_A)
 62 #define MGA_WARP_TGZS           (MGA_S)
 63 #define MGA_WARP_TGZSF          (MGA_S|MGA_F)
 64 #define MGA_WARP_TGZSA          (MGA_S|MGA_A)
 65 #define MGA_WARP_TGZSAF         (MGA_S|MGA_F|MGA_A)
 66 #define MGA_WARP_T2GZ           (MGA_T2)
 67 #define MGA_WARP_T2GZF          (MGA_T2|MGA_F)
 68 #define MGA_WARP_T2GZA          (MGA_T2|MGA_A)
 69 #define MGA_WARP_T2GZAF         (MGA_T2|MGA_A|MGA_F)
 70 #define MGA_WARP_T2GZS          (MGA_T2|MGA_S)
 71 #define MGA_WARP_T2GZSF         (MGA_T2|MGA_S|MGA_F)
 72 #define MGA_WARP_T2GZSA         (MGA_T2|MGA_S|MGA_A)
 73 #define MGA_WARP_T2GZSAF        (MGA_T2|MGA_S|MGA_F|MGA_A)
 74 
 75 #define MGA_MAX_G200_PIPES      8       /* no multitex */
 76 #define MGA_MAX_G400_PIPES      16
 77 #define MGA_MAX_WARP_PIPES      MGA_MAX_G400_PIPES
 78 #define MGA_WARP_UCODE_SIZE     32768   /* in bytes */
 79 
 80 #define MGA_CARD_TYPE_G200      1
 81 #define MGA_CARD_TYPE_G400      2
 82 #define MGA_CARD_TYPE_G450      3       /* not currently used */
 83 #define MGA_CARD_TYPE_G550      4
 84 
 85 #define MGA_FRONT               0x1
 86 #define MGA_BACK                0x2
 87 #define MGA_DEPTH               0x4
 88 
 89 /* What needs to be changed for the current vertex dma buffer?
 90  */
 91 #define MGA_UPLOAD_CONTEXT      0x1
 92 #define MGA_UPLOAD_TEX0         0x2
 93 #define MGA_UPLOAD_TEX1         0x4
 94 #define MGA_UPLOAD_PIPE         0x8
 95 #define MGA_UPLOAD_TEX0IMAGE    0x10    /* handled client-side */
 96 #define MGA_UPLOAD_TEX1IMAGE    0x20    /* handled client-side */
 97 #define MGA_UPLOAD_2D           0x40
 98 #define MGA_WAIT_AGE            0x80    /* handled client-side */
 99 #define MGA_UPLOAD_CLIPRECTS    0x100   /* handled client-side */
100 #if 0
101 #define MGA_DMA_FLUSH           0x200   /* set when someone gets the lock
102                                            quiescent */
103 #endif
104 
105 /* 32 buffers of 64k each, total 2 meg.
106  */
107 #define MGA_BUFFER_SIZE         (1 << 16)
108 #define MGA_NUM_BUFFERS         128
109 
110 /* Keep these small for testing.
111  */
112 #define MGA_NR_SAREA_CLIPRECTS  8
113 
114 /* 2 heaps (1 for card, 1 for agp), each divided into up to 128
115  * regions, subject to a minimum region size of (1<<16) == 64k.
116  *
117  * Clients may subdivide regions internally, but when sharing between
118  * clients, the region size is the minimum granularity.
119  */
120 
121 #define MGA_CARD_HEAP                   0
122 #define MGA_AGP_HEAP                    1
123 #define MGA_NR_TEX_HEAPS                2
124 #define MGA_NR_TEX_REGIONS              16
125 #define MGA_LOG_MIN_TEX_REGION_SIZE     16
126 
127 #define  DRM_MGA_IDLE_RETRY          2048
128 
129 #endif                          /* __MGA_SAREA_DEFINES__ */
130 
131 /* Setup registers for 3D context
132  */
133 typedef struct {
134         unsigned int dstorg;
135         unsigned int maccess;
136         unsigned int plnwt;
137         unsigned int dwgctl;
138         unsigned int alphactrl;
139         unsigned int fogcolor;
140         unsigned int wflag;
141         unsigned int tdualstage0;
142         unsigned int tdualstage1;
143         unsigned int fcol;
144         unsigned int stencil;
145         unsigned int stencilctl;
146 } drm_mga_context_regs_t;
147 
148 /* Setup registers for 2D, X server
149  */
150 typedef struct {
151         unsigned int pitch;
152 } drm_mga_server_regs_t;
153 
154 /* Setup registers for each texture unit
155  */
156 typedef struct {
157         unsigned int texctl;
158         unsigned int texctl2;
159         unsigned int texfilter;
160         unsigned int texbordercol;
161         unsigned int texorg;
162         unsigned int texwidth;
163         unsigned int texheight;
164         unsigned int texorg1;
165         unsigned int texorg2;
166         unsigned int texorg3;
167         unsigned int texorg4;
168 } drm_mga_texture_regs_t;
169 
170 /* General aging mechanism
171  */
172 typedef struct {
173         unsigned int head;      /* Position of head pointer          */
174         unsigned int wrap;      /* Primary DMA wrap count            */
175 } drm_mga_age_t;
176 
177 typedef struct _drm_mga_sarea {
178         /* The channel for communication of state information to the kernel
179          * on firing a vertex dma buffer.
180          */
181         drm_mga_context_regs_t context_state;
182         drm_mga_server_regs_t server_state;
183         drm_mga_texture_regs_t tex_state[2];
184         unsigned int warp_pipe;
185         unsigned int dirty;
186         unsigned int vertsize;
187 
188         /* The current cliprects, or a subset thereof.
189          */
190         struct drm_clip_rect boxes[MGA_NR_SAREA_CLIPRECTS];
191         unsigned int nbox;
192 
193         /* Information about the most recently used 3d drawable.  The
194          * client fills in the req_* fields, the server fills in the
195          * exported_ fields and puts the cliprects into boxes, above.
196          *
197          * The client clears the exported_drawable field before
198          * clobbering the boxes data.
199          */
200         unsigned int req_drawable;      /* the X drawable id */
201         unsigned int req_draw_buffer;   /* MGA_FRONT or MGA_BACK */
202 
203         unsigned int exported_drawable;
204         unsigned int exported_index;
205         unsigned int exported_stamp;
206         unsigned int exported_buffers;
207         unsigned int exported_nfront;
208         unsigned int exported_nback;
209         int exported_back_x, exported_front_x, exported_w;
210         int exported_back_y, exported_front_y, exported_h;
211         struct drm_clip_rect exported_boxes[MGA_NR_SAREA_CLIPRECTS];
212 
213         /* Counters for aging textures and for client-side throttling.
214          */
215         unsigned int status[4];
216         unsigned int last_wrap;
217 
218         drm_mga_age_t last_frame;
219         unsigned int last_enqueue;      /* last time a buffer was enqueued */
220         unsigned int last_dispatch;     /* age of the most recently dispatched buffer */
221         unsigned int last_quiescent;    /*  */
222 
223         /* LRU lists for texture memory in agp space and on the card.
224          */
225         struct drm_tex_region texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS + 1];
226         unsigned int texAge[MGA_NR_TEX_HEAPS];
227 
228         /* Mechanism to validate card state.
229          */
230         int ctxOwner;
231 } drm_mga_sarea_t;
232 
233 /* MGA specific ioctls
234  * The device specific ioctl range is 0x40 to 0x79.
235  */
236 #define DRM_MGA_INIT     0x00
237 #define DRM_MGA_FLUSH    0x01
238 #define DRM_MGA_RESET    0x02
239 #define DRM_MGA_SWAP     0x03
240 #define DRM_MGA_CLEAR    0x04
241 #define DRM_MGA_VERTEX   0x05
242 #define DRM_MGA_INDICES  0x06
243 #define DRM_MGA_ILOAD    0x07
244 #define DRM_MGA_BLIT     0x08
245 #define DRM_MGA_GETPARAM 0x09
246 
247 /* 3.2:
248  * ioctls for operating on fences.
249  */
250 #define DRM_MGA_SET_FENCE      0x0a
251 #define DRM_MGA_WAIT_FENCE     0x0b
252 #define DRM_MGA_DMA_BOOTSTRAP  0x0c
253 
254 #define DRM_IOCTL_MGA_INIT     DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t)
255 #define DRM_IOCTL_MGA_FLUSH    DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_FLUSH, struct drm_lock)
256 #define DRM_IOCTL_MGA_RESET    DRM_IO(  DRM_COMMAND_BASE + DRM_MGA_RESET)
257 #define DRM_IOCTL_MGA_SWAP     DRM_IO(  DRM_COMMAND_BASE + DRM_MGA_SWAP)
258 #define DRM_IOCTL_MGA_CLEAR    DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_CLEAR, drm_mga_clear_t)
259 #define DRM_IOCTL_MGA_VERTEX   DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_VERTEX, drm_mga_vertex_t)
260 #define DRM_IOCTL_MGA_INDICES  DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INDICES, drm_mga_indices_t)
261 #define DRM_IOCTL_MGA_ILOAD    DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t)
262 #define DRM_IOCTL_MGA_BLIT     DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t)
263 #define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t)
264 #define DRM_IOCTL_MGA_SET_FENCE     DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_SET_FENCE, __u32)
265 #define DRM_IOCTL_MGA_WAIT_FENCE    DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_WAIT_FENCE, __u32)
266 #define DRM_IOCTL_MGA_DMA_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_DMA_BOOTSTRAP, drm_mga_dma_bootstrap_t)
267 
268 typedef struct _drm_mga_warp_index {
269         int installed;
270         unsigned long phys_addr;
271         int size;
272 } drm_mga_warp_index_t;
273 
274 typedef struct drm_mga_init {
275         enum {
276                 MGA_INIT_DMA = 0x01,
277                 MGA_CLEANUP_DMA = 0x02
278         } func;
279 
280         unsigned long sarea_priv_offset;
281 
282         int chipset;
283         int sgram;
284 
285         unsigned int maccess;
286 
287         unsigned int fb_cpp;
288         unsigned int front_offset, front_pitch;
289         unsigned int back_offset, back_pitch;
290 
291         unsigned int depth_cpp;
292         unsigned int depth_offset, depth_pitch;
293 
294         unsigned int texture_offset[MGA_NR_TEX_HEAPS];
295         unsigned int texture_size[MGA_NR_TEX_HEAPS];
296 
297         unsigned long fb_offset;
298         unsigned long mmio_offset;
299         unsigned long status_offset;
300         unsigned long warp_offset;
301         unsigned long primary_offset;
302         unsigned long buffers_offset;
303 } drm_mga_init_t;
304 
305 typedef struct drm_mga_dma_bootstrap {
306         /**
307          * \name AGP texture region
308          *
309          * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, these fields will
310          * be filled in with the actual AGP texture settings.
311          *
312          * \warning
313          * If these fields are non-zero, but dma_mga_dma_bootstrap::agp_mode
314          * is zero, it means that PCI memory (most likely through the use of
315          * an IOMMU) is being used for "AGP" textures.
316          */
317         /*@{ */
318         unsigned long texture_handle; /**< Handle used to map AGP textures. */
319         __u32 texture_size;           /**< Size of the AGP texture region. */
320         /*@} */
321 
322         /**
323          * Requested size of the primary DMA region.
324          *
325          * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be
326          * filled in with the actual AGP mode.  If AGP was not available
327          */
328         __u32 primary_size;
329 
330         /**
331          * Requested number of secondary DMA buffers.
332          *
333          * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be
334          * filled in with the actual number of secondary DMA buffers
335          * allocated.  Particularly when PCI DMA is used, this may be
336          * (subtantially) less than the number requested.
337          */
338         __u32 secondary_bin_count;
339 
340         /**
341          * Requested size of each secondary DMA buffer.
342          *
343          * While the kernel \b is free to reduce
344          * dma_mga_dma_bootstrap::secondary_bin_count, it is \b not allowed
345          * to reduce dma_mga_dma_bootstrap::secondary_bin_size.
346          */
347         __u32 secondary_bin_size;
348 
349         /**
350          * Bit-wise mask of AGPSTAT2_* values.  Currently only \c AGPSTAT2_1X,
351          * \c AGPSTAT2_2X, and \c AGPSTAT2_4X are supported.  If this value is
352          * zero, it means that PCI DMA should be used, even if AGP is
353          * possible.
354          *
355          * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be
356          * filled in with the actual AGP mode.  If AGP was not available
357          * (i.e., PCI DMA was used), this value will be zero.
358          */
359         __u32 agp_mode;
360 
361         /**
362          * Desired AGP GART size, measured in megabytes.
363          */
364         __u8 agp_size;
365 } drm_mga_dma_bootstrap_t;
366 
367 typedef struct drm_mga_clear {
368         unsigned int flags;
369         unsigned int clear_color;
370         unsigned int clear_depth;
371         unsigned int color_mask;
372         unsigned int depth_mask;
373 } drm_mga_clear_t;
374 
375 typedef struct drm_mga_vertex {
376         int idx;                /* buffer to queue */
377         int used;               /* bytes in use */
378         int discard;            /* client finished with buffer?  */
379 } drm_mga_vertex_t;
380 
381 typedef struct drm_mga_indices {
382         int idx;                /* buffer to queue */
383         unsigned int start;
384         unsigned int end;
385         int discard;            /* client finished with buffer?  */
386 } drm_mga_indices_t;
387 
388 typedef struct drm_mga_iload {
389         int idx;
390         unsigned int dstorg;
391         unsigned int length;
392 } drm_mga_iload_t;
393 
394 typedef struct _drm_mga_blit {
395         unsigned int planemask;
396         unsigned int srcorg;
397         unsigned int dstorg;
398         int src_pitch, dst_pitch;
399         int delta_sx, delta_sy;
400         int delta_dx, delta_dy;
401         int height, ydir;       /* flip image vertically */
402         int source_pitch, dest_pitch;
403 } drm_mga_blit_t;
404 
405 /* 3.1: An ioctl to get parameters that aren't available to the 3d
406  * client any other way.
407  */
408 #define MGA_PARAM_IRQ_NR            1
409 
410 /* 3.2: Query the actual card type.  The DDX only distinguishes between
411  * G200 chips and non-G200 chips, which it calls G400.  It turns out that
412  * there are some very sublte differences between the G4x0 chips and the G550
413  * chips.  Using this parameter query, a client-side driver can detect the
414  * difference between a G4x0 and a G550.
415  */
416 #define MGA_PARAM_CARD_TYPE         2
417 
418 typedef struct drm_mga_getparam {
419         int param;
420         void __user *value;
421 } drm_mga_getparam_t;
422 
423 #if defined(__cplusplus)
424 }
425 #endif
426 
427 #endif
428 

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