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TOMOYO Linux Cross Reference
Linux/include/uapi/linux/perf_event.h

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  1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
  2 /*
  3  * Performance events:
  4  *
  5  *    Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
  6  *    Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar
  7  *    Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra
  8  *
  9  * Data type definitions, declarations, prototypes.
 10  *
 11  *    Started by: Thomas Gleixner and Ingo Molnar
 12  *
 13  * For licencing details see kernel-base/COPYING
 14  */
 15 #ifndef _UAPI_LINUX_PERF_EVENT_H
 16 #define _UAPI_LINUX_PERF_EVENT_H
 17 
 18 #include <linux/types.h>
 19 #include <linux/ioctl.h>
 20 #include <asm/byteorder.h>
 21 
 22 /*
 23  * User-space ABI bits:
 24  */
 25 
 26 /*
 27  * attr.type
 28  */
 29 enum perf_type_id {
 30         PERF_TYPE_HARDWARE                      = 0,
 31         PERF_TYPE_SOFTWARE                      = 1,
 32         PERF_TYPE_TRACEPOINT                    = 2,
 33         PERF_TYPE_HW_CACHE                      = 3,
 34         PERF_TYPE_RAW                           = 4,
 35         PERF_TYPE_BREAKPOINT                    = 5,
 36 
 37         PERF_TYPE_MAX,                          /* non-ABI */
 38 };
 39 
 40 /*
 41  * Generalized performance event event_id types, used by the
 42  * attr.event_id parameter of the sys_perf_event_open()
 43  * syscall:
 44  */
 45 enum perf_hw_id {
 46         /*
 47          * Common hardware events, generalized by the kernel:
 48          */
 49         PERF_COUNT_HW_CPU_CYCLES                = 0,
 50         PERF_COUNT_HW_INSTRUCTIONS              = 1,
 51         PERF_COUNT_HW_CACHE_REFERENCES          = 2,
 52         PERF_COUNT_HW_CACHE_MISSES              = 3,
 53         PERF_COUNT_HW_BRANCH_INSTRUCTIONS       = 4,
 54         PERF_COUNT_HW_BRANCH_MISSES             = 5,
 55         PERF_COUNT_HW_BUS_CYCLES                = 6,
 56         PERF_COUNT_HW_STALLED_CYCLES_FRONTEND   = 7,
 57         PERF_COUNT_HW_STALLED_CYCLES_BACKEND    = 8,
 58         PERF_COUNT_HW_REF_CPU_CYCLES            = 9,
 59 
 60         PERF_COUNT_HW_MAX,                      /* non-ABI */
 61 };
 62 
 63 /*
 64  * Generalized hardware cache events:
 65  *
 66  *       { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x
 67  *       { read, write, prefetch } x
 68  *       { accesses, misses }
 69  */
 70 enum perf_hw_cache_id {
 71         PERF_COUNT_HW_CACHE_L1D                 = 0,
 72         PERF_COUNT_HW_CACHE_L1I                 = 1,
 73         PERF_COUNT_HW_CACHE_LL                  = 2,
 74         PERF_COUNT_HW_CACHE_DTLB                = 3,
 75         PERF_COUNT_HW_CACHE_ITLB                = 4,
 76         PERF_COUNT_HW_CACHE_BPU                 = 5,
 77         PERF_COUNT_HW_CACHE_NODE                = 6,
 78 
 79         PERF_COUNT_HW_CACHE_MAX,                /* non-ABI */
 80 };
 81 
 82 enum perf_hw_cache_op_id {
 83         PERF_COUNT_HW_CACHE_OP_READ             = 0,
 84         PERF_COUNT_HW_CACHE_OP_WRITE            = 1,
 85         PERF_COUNT_HW_CACHE_OP_PREFETCH         = 2,
 86 
 87         PERF_COUNT_HW_CACHE_OP_MAX,             /* non-ABI */
 88 };
 89 
 90 enum perf_hw_cache_op_result_id {
 91         PERF_COUNT_HW_CACHE_RESULT_ACCESS       = 0,
 92         PERF_COUNT_HW_CACHE_RESULT_MISS         = 1,
 93 
 94         PERF_COUNT_HW_CACHE_RESULT_MAX,         /* non-ABI */
 95 };
 96 
 97 /*
 98  * Special "software" events provided by the kernel, even if the hardware
 99  * does not support performance events. These events measure various
100  * physical and sw events of the kernel (and allow the profiling of them as
101  * well):
102  */
103 enum perf_sw_ids {
104         PERF_COUNT_SW_CPU_CLOCK                 = 0,
105         PERF_COUNT_SW_TASK_CLOCK                = 1,
106         PERF_COUNT_SW_PAGE_FAULTS               = 2,
107         PERF_COUNT_SW_CONTEXT_SWITCHES          = 3,
108         PERF_COUNT_SW_CPU_MIGRATIONS            = 4,
109         PERF_COUNT_SW_PAGE_FAULTS_MIN           = 5,
110         PERF_COUNT_SW_PAGE_FAULTS_MAJ           = 6,
111         PERF_COUNT_SW_ALIGNMENT_FAULTS          = 7,
112         PERF_COUNT_SW_EMULATION_FAULTS          = 8,
113         PERF_COUNT_SW_DUMMY                     = 9,
114         PERF_COUNT_SW_BPF_OUTPUT                = 10,
115 
116         PERF_COUNT_SW_MAX,                      /* non-ABI */
117 };
118 
119 /*
120  * Bits that can be set in attr.sample_type to request information
121  * in the overflow packets.
122  */
123 enum perf_event_sample_format {
124         PERF_SAMPLE_IP                          = 1U << 0,
125         PERF_SAMPLE_TID                         = 1U << 1,
126         PERF_SAMPLE_TIME                        = 1U << 2,
127         PERF_SAMPLE_ADDR                        = 1U << 3,
128         PERF_SAMPLE_READ                        = 1U << 4,
129         PERF_SAMPLE_CALLCHAIN                   = 1U << 5,
130         PERF_SAMPLE_ID                          = 1U << 6,
131         PERF_SAMPLE_CPU                         = 1U << 7,
132         PERF_SAMPLE_PERIOD                      = 1U << 8,
133         PERF_SAMPLE_STREAM_ID                   = 1U << 9,
134         PERF_SAMPLE_RAW                         = 1U << 10,
135         PERF_SAMPLE_BRANCH_STACK                = 1U << 11,
136         PERF_SAMPLE_REGS_USER                   = 1U << 12,
137         PERF_SAMPLE_STACK_USER                  = 1U << 13,
138         PERF_SAMPLE_WEIGHT                      = 1U << 14,
139         PERF_SAMPLE_DATA_SRC                    = 1U << 15,
140         PERF_SAMPLE_IDENTIFIER                  = 1U << 16,
141         PERF_SAMPLE_TRANSACTION                 = 1U << 17,
142         PERF_SAMPLE_REGS_INTR                   = 1U << 18,
143         PERF_SAMPLE_PHYS_ADDR                   = 1U << 19,
144 
145         PERF_SAMPLE_MAX = 1U << 20,             /* non-ABI */
146 
147         __PERF_SAMPLE_CALLCHAIN_EARLY           = 1ULL << 63, /* non-ABI; internal use */
148 };
149 
150 /*
151  * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set
152  *
153  * If the user does not pass priv level information via branch_sample_type,
154  * the kernel uses the event's priv level. Branch and event priv levels do
155  * not have to match. Branch priv level is checked for permissions.
156  *
157  * The branch types can be combined, however BRANCH_ANY covers all types
158  * of branches and therefore it supersedes all the other types.
159  */
160 enum perf_branch_sample_type_shift {
161         PERF_SAMPLE_BRANCH_USER_SHIFT           = 0, /* user branches */
162         PERF_SAMPLE_BRANCH_KERNEL_SHIFT         = 1, /* kernel branches */
163         PERF_SAMPLE_BRANCH_HV_SHIFT             = 2, /* hypervisor branches */
164 
165         PERF_SAMPLE_BRANCH_ANY_SHIFT            = 3, /* any branch types */
166         PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT       = 4, /* any call branch */
167         PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT     = 5, /* any return branch */
168         PERF_SAMPLE_BRANCH_IND_CALL_SHIFT       = 6, /* indirect calls */
169         PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT       = 7, /* transaction aborts */
170         PERF_SAMPLE_BRANCH_IN_TX_SHIFT          = 8, /* in transaction */
171         PERF_SAMPLE_BRANCH_NO_TX_SHIFT          = 9, /* not in transaction */
172         PERF_SAMPLE_BRANCH_COND_SHIFT           = 10, /* conditional branches */
173 
174         PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT     = 11, /* call/ret stack */
175         PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT       = 12, /* indirect jumps */
176         PERF_SAMPLE_BRANCH_CALL_SHIFT           = 13, /* direct call */
177 
178         PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT       = 14, /* no flags */
179         PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT      = 15, /* no cycles */
180 
181         PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT      = 16, /* save branch type */
182 
183         PERF_SAMPLE_BRANCH_MAX_SHIFT            /* non-ABI */
184 };
185 
186 enum perf_branch_sample_type {
187         PERF_SAMPLE_BRANCH_USER         = 1U << PERF_SAMPLE_BRANCH_USER_SHIFT,
188         PERF_SAMPLE_BRANCH_KERNEL       = 1U << PERF_SAMPLE_BRANCH_KERNEL_SHIFT,
189         PERF_SAMPLE_BRANCH_HV           = 1U << PERF_SAMPLE_BRANCH_HV_SHIFT,
190 
191         PERF_SAMPLE_BRANCH_ANY          = 1U << PERF_SAMPLE_BRANCH_ANY_SHIFT,
192         PERF_SAMPLE_BRANCH_ANY_CALL     = 1U << PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT,
193         PERF_SAMPLE_BRANCH_ANY_RETURN   = 1U << PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT,
194         PERF_SAMPLE_BRANCH_IND_CALL     = 1U << PERF_SAMPLE_BRANCH_IND_CALL_SHIFT,
195         PERF_SAMPLE_BRANCH_ABORT_TX     = 1U << PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT,
196         PERF_SAMPLE_BRANCH_IN_TX        = 1U << PERF_SAMPLE_BRANCH_IN_TX_SHIFT,
197         PERF_SAMPLE_BRANCH_NO_TX        = 1U << PERF_SAMPLE_BRANCH_NO_TX_SHIFT,
198         PERF_SAMPLE_BRANCH_COND         = 1U << PERF_SAMPLE_BRANCH_COND_SHIFT,
199 
200         PERF_SAMPLE_BRANCH_CALL_STACK   = 1U << PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT,
201         PERF_SAMPLE_BRANCH_IND_JUMP     = 1U << PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT,
202         PERF_SAMPLE_BRANCH_CALL         = 1U << PERF_SAMPLE_BRANCH_CALL_SHIFT,
203 
204         PERF_SAMPLE_BRANCH_NO_FLAGS     = 1U << PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT,
205         PERF_SAMPLE_BRANCH_NO_CYCLES    = 1U << PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT,
206 
207         PERF_SAMPLE_BRANCH_TYPE_SAVE    =
208                 1U << PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT,
209 
210         PERF_SAMPLE_BRANCH_MAX          = 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT,
211 };
212 
213 /*
214  * Common flow change classification
215  */
216 enum {
217         PERF_BR_UNKNOWN         = 0,    /* unknown */
218         PERF_BR_COND            = 1,    /* conditional */
219         PERF_BR_UNCOND          = 2,    /* unconditional  */
220         PERF_BR_IND             = 3,    /* indirect */
221         PERF_BR_CALL            = 4,    /* function call */
222         PERF_BR_IND_CALL        = 5,    /* indirect function call */
223         PERF_BR_RET             = 6,    /* function return */
224         PERF_BR_SYSCALL         = 7,    /* syscall */
225         PERF_BR_SYSRET          = 8,    /* syscall return */
226         PERF_BR_COND_CALL       = 9,    /* conditional function call */
227         PERF_BR_COND_RET        = 10,   /* conditional function return */
228         PERF_BR_MAX,
229 };
230 
231 #define PERF_SAMPLE_BRANCH_PLM_ALL \
232         (PERF_SAMPLE_BRANCH_USER|\
233          PERF_SAMPLE_BRANCH_KERNEL|\
234          PERF_SAMPLE_BRANCH_HV)
235 
236 /*
237  * Values to determine ABI of the registers dump.
238  */
239 enum perf_sample_regs_abi {
240         PERF_SAMPLE_REGS_ABI_NONE       = 0,
241         PERF_SAMPLE_REGS_ABI_32         = 1,
242         PERF_SAMPLE_REGS_ABI_64         = 2,
243 };
244 
245 /*
246  * Values for the memory transaction event qualifier, mostly for
247  * abort events. Multiple bits can be set.
248  */
249 enum {
250         PERF_TXN_ELISION        = (1 << 0), /* From elision */
251         PERF_TXN_TRANSACTION    = (1 << 1), /* From transaction */
252         PERF_TXN_SYNC           = (1 << 2), /* Instruction is related */
253         PERF_TXN_ASYNC          = (1 << 3), /* Instruction not related */
254         PERF_TXN_RETRY          = (1 << 4), /* Retry possible */
255         PERF_TXN_CONFLICT       = (1 << 5), /* Conflict abort */
256         PERF_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */
257         PERF_TXN_CAPACITY_READ  = (1 << 7), /* Capacity read abort */
258 
259         PERF_TXN_MAX            = (1 << 8), /* non-ABI */
260 
261         /* bits 32..63 are reserved for the abort code */
262 
263         PERF_TXN_ABORT_MASK  = (0xffffffffULL << 32),
264         PERF_TXN_ABORT_SHIFT = 32,
265 };
266 
267 /*
268  * The format of the data returned by read() on a perf event fd,
269  * as specified by attr.read_format:
270  *
271  * struct read_format {
272  *      { u64           value;
273  *        { u64         time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
274  *        { u64         time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
275  *        { u64         id;           } && PERF_FORMAT_ID
276  *      } && !PERF_FORMAT_GROUP
277  *
278  *      { u64           nr;
279  *        { u64         time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
280  *        { u64         time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
281  *        { u64         value;
282  *          { u64       id;           } && PERF_FORMAT_ID
283  *        }             cntr[nr];
284  *      } && PERF_FORMAT_GROUP
285  * };
286  */
287 enum perf_event_read_format {
288         PERF_FORMAT_TOTAL_TIME_ENABLED          = 1U << 0,
289         PERF_FORMAT_TOTAL_TIME_RUNNING          = 1U << 1,
290         PERF_FORMAT_ID                          = 1U << 2,
291         PERF_FORMAT_GROUP                       = 1U << 3,
292 
293         PERF_FORMAT_MAX = 1U << 4,              /* non-ABI */
294 };
295 
296 #define PERF_ATTR_SIZE_VER0     64      /* sizeof first published struct */
297 #define PERF_ATTR_SIZE_VER1     72      /* add: config2 */
298 #define PERF_ATTR_SIZE_VER2     80      /* add: branch_sample_type */
299 #define PERF_ATTR_SIZE_VER3     96      /* add: sample_regs_user */
300                                         /* add: sample_stack_user */
301 #define PERF_ATTR_SIZE_VER4     104     /* add: sample_regs_intr */
302 #define PERF_ATTR_SIZE_VER5     112     /* add: aux_watermark */
303 
304 /*
305  * Hardware event_id to monitor via a performance monitoring event:
306  *
307  * @sample_max_stack: Max number of frame pointers in a callchain,
308  *                    should be < /proc/sys/kernel/perf_event_max_stack
309  */
310 struct perf_event_attr {
311 
312         /*
313          * Major type: hardware/software/tracepoint/etc.
314          */
315         __u32                   type;
316 
317         /*
318          * Size of the attr structure, for fwd/bwd compat.
319          */
320         __u32                   size;
321 
322         /*
323          * Type specific configuration information.
324          */
325         __u64                   config;
326 
327         union {
328                 __u64           sample_period;
329                 __u64           sample_freq;
330         };
331 
332         __u64                   sample_type;
333         __u64                   read_format;
334 
335         __u64                   disabled       :  1, /* off by default        */
336                                 inherit        :  1, /* children inherit it   */
337                                 pinned         :  1, /* must always be on PMU */
338                                 exclusive      :  1, /* only group on PMU     */
339                                 exclude_user   :  1, /* don't count user      */
340                                 exclude_kernel :  1, /* ditto kernel          */
341                                 exclude_hv     :  1, /* ditto hypervisor      */
342                                 exclude_idle   :  1, /* don't count when idle */
343                                 mmap           :  1, /* include mmap data     */
344                                 comm           :  1, /* include comm data     */
345                                 freq           :  1, /* use freq, not period  */
346                                 inherit_stat   :  1, /* per task counts       */
347                                 enable_on_exec :  1, /* next exec enables     */
348                                 task           :  1, /* trace fork/exit       */
349                                 watermark      :  1, /* wakeup_watermark      */
350                                 /*
351                                  * precise_ip:
352                                  *
353                                  *  0 - SAMPLE_IP can have arbitrary skid
354                                  *  1 - SAMPLE_IP must have constant skid
355                                  *  2 - SAMPLE_IP requested to have 0 skid
356                                  *  3 - SAMPLE_IP must have 0 skid
357                                  *
358                                  *  See also PERF_RECORD_MISC_EXACT_IP
359                                  */
360                                 precise_ip     :  2, /* skid constraint       */
361                                 mmap_data      :  1, /* non-exec mmap data    */
362                                 sample_id_all  :  1, /* sample_type all events */
363 
364                                 exclude_host   :  1, /* don't count in host   */
365                                 exclude_guest  :  1, /* don't count in guest  */
366 
367                                 exclude_callchain_kernel : 1, /* exclude kernel callchains */
368                                 exclude_callchain_user   : 1, /* exclude user callchains */
369                                 mmap2          :  1, /* include mmap with inode data     */
370                                 comm_exec      :  1, /* flag comm events that are due to an exec */
371                                 use_clockid    :  1, /* use @clockid for time fields */
372                                 context_switch :  1, /* context switch data */
373                                 write_backward :  1, /* Write ring buffer from end to beginning */
374                                 namespaces     :  1, /* include namespaces data */
375                                 __reserved_1   : 35;
376 
377         union {
378                 __u32           wakeup_events;    /* wakeup every n events */
379                 __u32           wakeup_watermark; /* bytes before wakeup   */
380         };
381 
382         __u32                   bp_type;
383         union {
384                 __u64           bp_addr;
385                 __u64           kprobe_func; /* for perf_kprobe */
386                 __u64           uprobe_path; /* for perf_uprobe */
387                 __u64           config1; /* extension of config */
388         };
389         union {
390                 __u64           bp_len;
391                 __u64           kprobe_addr; /* when kprobe_func == NULL */
392                 __u64           probe_offset; /* for perf_[k,u]probe */
393                 __u64           config2; /* extension of config1 */
394         };
395         __u64   branch_sample_type; /* enum perf_branch_sample_type */
396 
397         /*
398          * Defines set of user regs to dump on samples.
399          * See asm/perf_regs.h for details.
400          */
401         __u64   sample_regs_user;
402 
403         /*
404          * Defines size of the user stack to dump on samples.
405          */
406         __u32   sample_stack_user;
407 
408         __s32   clockid;
409         /*
410          * Defines set of regs to dump for each sample
411          * state captured on:
412          *  - precise = 0: PMU interrupt
413          *  - precise > 0: sampled instruction
414          *
415          * See asm/perf_regs.h for details.
416          */
417         __u64   sample_regs_intr;
418 
419         /*
420          * Wakeup watermark for AUX area
421          */
422         __u32   aux_watermark;
423         __u16   sample_max_stack;
424         __u16   __reserved_2;   /* align to __u64 */
425 };
426 
427 /*
428  * Structure used by below PERF_EVENT_IOC_QUERY_BPF command
429  * to query bpf programs attached to the same perf tracepoint
430  * as the given perf event.
431  */
432 struct perf_event_query_bpf {
433         /*
434          * The below ids array length
435          */
436         __u32   ids_len;
437         /*
438          * Set by the kernel to indicate the number of
439          * available programs
440          */
441         __u32   prog_cnt;
442         /*
443          * User provided buffer to store program ids
444          */
445         __u32   ids[0];
446 };
447 
448 #define perf_flags(attr)        (*(&(attr)->read_format + 1))
449 
450 /*
451  * Ioctls that can be done on a perf event fd:
452  */
453 #define PERF_EVENT_IOC_ENABLE                   _IO ('$', 0)
454 #define PERF_EVENT_IOC_DISABLE                  _IO ('$', 1)
455 #define PERF_EVENT_IOC_REFRESH                  _IO ('$', 2)
456 #define PERF_EVENT_IOC_RESET                    _IO ('$', 3)
457 #define PERF_EVENT_IOC_PERIOD                   _IOW('$', 4, __u64)
458 #define PERF_EVENT_IOC_SET_OUTPUT               _IO ('$', 5)
459 #define PERF_EVENT_IOC_SET_FILTER               _IOW('$', 6, char *)
460 #define PERF_EVENT_IOC_ID                       _IOR('$', 7, __u64 *)
461 #define PERF_EVENT_IOC_SET_BPF                  _IOW('$', 8, __u32)
462 #define PERF_EVENT_IOC_PAUSE_OUTPUT             _IOW('$', 9, __u32)
463 #define PERF_EVENT_IOC_QUERY_BPF                _IOWR('$', 10, struct perf_event_query_bpf *)
464 #define PERF_EVENT_IOC_MODIFY_ATTRIBUTES        _IOW('$', 11, struct perf_event_attr *)
465 
466 enum perf_event_ioc_flags {
467         PERF_IOC_FLAG_GROUP             = 1U << 0,
468 };
469 
470 /*
471  * Structure of the page that can be mapped via mmap
472  */
473 struct perf_event_mmap_page {
474         __u32   version;                /* version number of this structure */
475         __u32   compat_version;         /* lowest version this is compat with */
476 
477         /*
478          * Bits needed to read the hw events in user-space.
479          *
480          *   u32 seq, time_mult, time_shift, index, width;
481          *   u64 count, enabled, running;
482          *   u64 cyc, time_offset;
483          *   s64 pmc = 0;
484          *
485          *   do {
486          *     seq = pc->lock;
487          *     barrier()
488          *
489          *     enabled = pc->time_enabled;
490          *     running = pc->time_running;
491          *
492          *     if (pc->cap_usr_time && enabled != running) {
493          *       cyc = rdtsc();
494          *       time_offset = pc->time_offset;
495          *       time_mult   = pc->time_mult;
496          *       time_shift  = pc->time_shift;
497          *     }
498          *
499          *     index = pc->index;
500          *     count = pc->offset;
501          *     if (pc->cap_user_rdpmc && index) {
502          *       width = pc->pmc_width;
503          *       pmc = rdpmc(index - 1);
504          *     }
505          *
506          *     barrier();
507          *   } while (pc->lock != seq);
508          *
509          * NOTE: for obvious reason this only works on self-monitoring
510          *       processes.
511          */
512         __u32   lock;                   /* seqlock for synchronization */
513         __u32   index;                  /* hardware event identifier */
514         __s64   offset;                 /* add to hardware event value */
515         __u64   time_enabled;           /* time event active */
516         __u64   time_running;           /* time event on cpu */
517         union {
518                 __u64   capabilities;
519                 struct {
520                         __u64   cap_bit0                : 1, /* Always 0, deprecated, see commit 860f085b74e9 */
521                                 cap_bit0_is_deprecated  : 1, /* Always 1, signals that bit 0 is zero */
522 
523                                 cap_user_rdpmc          : 1, /* The RDPMC instruction can be used to read counts */
524                                 cap_user_time           : 1, /* The time_* fields are used */
525                                 cap_user_time_zero      : 1, /* The time_zero field is used */
526                                 cap_____res             : 59;
527                 };
528         };
529 
530         /*
531          * If cap_user_rdpmc this field provides the bit-width of the value
532          * read using the rdpmc() or equivalent instruction. This can be used
533          * to sign extend the result like:
534          *
535          *   pmc <<= 64 - width;
536          *   pmc >>= 64 - width; // signed shift right
537          *   count += pmc;
538          */
539         __u16   pmc_width;
540 
541         /*
542          * If cap_usr_time the below fields can be used to compute the time
543          * delta since time_enabled (in ns) using rdtsc or similar.
544          *
545          *   u64 quot, rem;
546          *   u64 delta;
547          *
548          *   quot = (cyc >> time_shift);
549          *   rem = cyc & (((u64)1 << time_shift) - 1);
550          *   delta = time_offset + quot * time_mult +
551          *              ((rem * time_mult) >> time_shift);
552          *
553          * Where time_offset,time_mult,time_shift and cyc are read in the
554          * seqcount loop described above. This delta can then be added to
555          * enabled and possible running (if index), improving the scaling:
556          *
557          *   enabled += delta;
558          *   if (index)
559          *     running += delta;
560          *
561          *   quot = count / running;
562          *   rem  = count % running;
563          *   count = quot * enabled + (rem * enabled) / running;
564          */
565         __u16   time_shift;
566         __u32   time_mult;
567         __u64   time_offset;
568         /*
569          * If cap_usr_time_zero, the hardware clock (e.g. TSC) can be calculated
570          * from sample timestamps.
571          *
572          *   time = timestamp - time_zero;
573          *   quot = time / time_mult;
574          *   rem  = time % time_mult;
575          *   cyc = (quot << time_shift) + (rem << time_shift) / time_mult;
576          *
577          * And vice versa:
578          *
579          *   quot = cyc >> time_shift;
580          *   rem  = cyc & (((u64)1 << time_shift) - 1);
581          *   timestamp = time_zero + quot * time_mult +
582          *               ((rem * time_mult) >> time_shift);
583          */
584         __u64   time_zero;
585         __u32   size;                   /* Header size up to __reserved[] fields. */
586 
587                 /*
588                  * Hole for extension of the self monitor capabilities
589                  */
590 
591         __u8    __reserved[118*8+4];    /* align to 1k. */
592 
593         /*
594          * Control data for the mmap() data buffer.
595          *
596          * User-space reading the @data_head value should issue an smp_rmb(),
597          * after reading this value.
598          *
599          * When the mapping is PROT_WRITE the @data_tail value should be
600          * written by userspace to reflect the last read data, after issueing
601          * an smp_mb() to separate the data read from the ->data_tail store.
602          * In this case the kernel will not over-write unread data.
603          *
604          * See perf_output_put_handle() for the data ordering.
605          *
606          * data_{offset,size} indicate the location and size of the perf record
607          * buffer within the mmapped area.
608          */
609         __u64   data_head;              /* head in the data section */
610         __u64   data_tail;              /* user-space written tail */
611         __u64   data_offset;            /* where the buffer starts */
612         __u64   data_size;              /* data buffer size */
613 
614         /*
615          * AUX area is defined by aux_{offset,size} fields that should be set
616          * by the userspace, so that
617          *
618          *   aux_offset >= data_offset + data_size
619          *
620          * prior to mmap()ing it. Size of the mmap()ed area should be aux_size.
621          *
622          * Ring buffer pointers aux_{head,tail} have the same semantics as
623          * data_{head,tail} and same ordering rules apply.
624          */
625         __u64   aux_head;
626         __u64   aux_tail;
627         __u64   aux_offset;
628         __u64   aux_size;
629 };
630 
631 #define PERF_RECORD_MISC_CPUMODE_MASK           (7 << 0)
632 #define PERF_RECORD_MISC_CPUMODE_UNKNOWN        (0 << 0)
633 #define PERF_RECORD_MISC_KERNEL                 (1 << 0)
634 #define PERF_RECORD_MISC_USER                   (2 << 0)
635 #define PERF_RECORD_MISC_HYPERVISOR             (3 << 0)
636 #define PERF_RECORD_MISC_GUEST_KERNEL           (4 << 0)
637 #define PERF_RECORD_MISC_GUEST_USER             (5 << 0)
638 
639 /*
640  * Indicates that /proc/PID/maps parsing are truncated by time out.
641  */
642 #define PERF_RECORD_MISC_PROC_MAP_PARSE_TIMEOUT (1 << 12)
643 /*
644  * Following PERF_RECORD_MISC_* are used on different
645  * events, so can reuse the same bit position:
646  *
647  *   PERF_RECORD_MISC_MMAP_DATA  - PERF_RECORD_MMAP* events
648  *   PERF_RECORD_MISC_COMM_EXEC  - PERF_RECORD_COMM event
649  *   PERF_RECORD_MISC_FORK_EXEC  - PERF_RECORD_FORK event (perf internal)
650  *   PERF_RECORD_MISC_SWITCH_OUT - PERF_RECORD_SWITCH* events
651  */
652 #define PERF_RECORD_MISC_MMAP_DATA              (1 << 13)
653 #define PERF_RECORD_MISC_COMM_EXEC              (1 << 13)
654 #define PERF_RECORD_MISC_FORK_EXEC              (1 << 13)
655 #define PERF_RECORD_MISC_SWITCH_OUT             (1 << 13)
656 /*
657  * These PERF_RECORD_MISC_* flags below are safely reused
658  * for the following events:
659  *
660  *   PERF_RECORD_MISC_EXACT_IP           - PERF_RECORD_SAMPLE of precise events
661  *   PERF_RECORD_MISC_SWITCH_OUT_PREEMPT - PERF_RECORD_SWITCH* events
662  *
663  *
664  * PERF_RECORD_MISC_EXACT_IP:
665  *   Indicates that the content of PERF_SAMPLE_IP points to
666  *   the actual instruction that triggered the event. See also
667  *   perf_event_attr::precise_ip.
668  *
669  * PERF_RECORD_MISC_SWITCH_OUT_PREEMPT:
670  *   Indicates that thread was preempted in TASK_RUNNING state.
671  */
672 #define PERF_RECORD_MISC_EXACT_IP               (1 << 14)
673 #define PERF_RECORD_MISC_SWITCH_OUT_PREEMPT     (1 << 14)
674 /*
675  * Reserve the last bit to indicate some extended misc field
676  */
677 #define PERF_RECORD_MISC_EXT_RESERVED           (1 << 15)
678 
679 struct perf_event_header {
680         __u32   type;
681         __u16   misc;
682         __u16   size;
683 };
684 
685 struct perf_ns_link_info {
686         __u64   dev;
687         __u64   ino;
688 };
689 
690 enum {
691         NET_NS_INDEX            = 0,
692         UTS_NS_INDEX            = 1,
693         IPC_NS_INDEX            = 2,
694         PID_NS_INDEX            = 3,
695         USER_NS_INDEX           = 4,
696         MNT_NS_INDEX            = 5,
697         CGROUP_NS_INDEX         = 6,
698 
699         NR_NAMESPACES,          /* number of available namespaces */
700 };
701 
702 enum perf_event_type {
703 
704         /*
705          * If perf_event_attr.sample_id_all is set then all event types will
706          * have the sample_type selected fields related to where/when
707          * (identity) an event took place (TID, TIME, ID, STREAM_ID, CPU,
708          * IDENTIFIER) described in PERF_RECORD_SAMPLE below, it will be stashed
709          * just after the perf_event_header and the fields already present for
710          * the existing fields, i.e. at the end of the payload. That way a newer
711          * perf.data file will be supported by older perf tools, with these new
712          * optional fields being ignored.
713          *
714          * struct sample_id {
715          *      { u32                   pid, tid; } && PERF_SAMPLE_TID
716          *      { u64                   time;     } && PERF_SAMPLE_TIME
717          *      { u64                   id;       } && PERF_SAMPLE_ID
718          *      { u64                   stream_id;} && PERF_SAMPLE_STREAM_ID
719          *      { u32                   cpu, res; } && PERF_SAMPLE_CPU
720          *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
721          * } && perf_event_attr::sample_id_all
722          *
723          * Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.  The
724          * advantage of PERF_SAMPLE_IDENTIFIER is that its position is fixed
725          * relative to header.size.
726          */
727 
728         /*
729          * The MMAP events record the PROT_EXEC mappings so that we can
730          * correlate userspace IPs to code. They have the following structure:
731          *
732          * struct {
733          *      struct perf_event_header        header;
734          *
735          *      u32                             pid, tid;
736          *      u64                             addr;
737          *      u64                             len;
738          *      u64                             pgoff;
739          *      char                            filename[];
740          *      struct sample_id                sample_id;
741          * };
742          */
743         PERF_RECORD_MMAP                        = 1,
744 
745         /*
746          * struct {
747          *      struct perf_event_header        header;
748          *      u64                             id;
749          *      u64                             lost;
750          *      struct sample_id                sample_id;
751          * };
752          */
753         PERF_RECORD_LOST                        = 2,
754 
755         /*
756          * struct {
757          *      struct perf_event_header        header;
758          *
759          *      u32                             pid, tid;
760          *      char                            comm[];
761          *      struct sample_id                sample_id;
762          * };
763          */
764         PERF_RECORD_COMM                        = 3,
765 
766         /*
767          * struct {
768          *      struct perf_event_header        header;
769          *      u32                             pid, ppid;
770          *      u32                             tid, ptid;
771          *      u64                             time;
772          *      struct sample_id                sample_id;
773          * };
774          */
775         PERF_RECORD_EXIT                        = 4,
776 
777         /*
778          * struct {
779          *      struct perf_event_header        header;
780          *      u64                             time;
781          *      u64                             id;
782          *      u64                             stream_id;
783          *      struct sample_id                sample_id;
784          * };
785          */
786         PERF_RECORD_THROTTLE                    = 5,
787         PERF_RECORD_UNTHROTTLE                  = 6,
788 
789         /*
790          * struct {
791          *      struct perf_event_header        header;
792          *      u32                             pid, ppid;
793          *      u32                             tid, ptid;
794          *      u64                             time;
795          *      struct sample_id                sample_id;
796          * };
797          */
798         PERF_RECORD_FORK                        = 7,
799 
800         /*
801          * struct {
802          *      struct perf_event_header        header;
803          *      u32                             pid, tid;
804          *
805          *      struct read_format              values;
806          *      struct sample_id                sample_id;
807          * };
808          */
809         PERF_RECORD_READ                        = 8,
810 
811         /*
812          * struct {
813          *      struct perf_event_header        header;
814          *
815          *      #
816          *      # Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.
817          *      # The advantage of PERF_SAMPLE_IDENTIFIER is that its position
818          *      # is fixed relative to header.
819          *      #
820          *
821          *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
822          *      { u64                   ip;       } && PERF_SAMPLE_IP
823          *      { u32                   pid, tid; } && PERF_SAMPLE_TID
824          *      { u64                   time;     } && PERF_SAMPLE_TIME
825          *      { u64                   addr;     } && PERF_SAMPLE_ADDR
826          *      { u64                   id;       } && PERF_SAMPLE_ID
827          *      { u64                   stream_id;} && PERF_SAMPLE_STREAM_ID
828          *      { u32                   cpu, res; } && PERF_SAMPLE_CPU
829          *      { u64                   period;   } && PERF_SAMPLE_PERIOD
830          *
831          *      { struct read_format    values;   } && PERF_SAMPLE_READ
832          *
833          *      { u64                   nr,
834          *        u64                   ips[nr];  } && PERF_SAMPLE_CALLCHAIN
835          *
836          *      #
837          *      # The RAW record below is opaque data wrt the ABI
838          *      #
839          *      # That is, the ABI doesn't make any promises wrt to
840          *      # the stability of its content, it may vary depending
841          *      # on event, hardware, kernel version and phase of
842          *      # the moon.
843          *      #
844          *      # In other words, PERF_SAMPLE_RAW contents are not an ABI.
845          *      #
846          *
847          *      { u32                   size;
848          *        char                  data[size];}&& PERF_SAMPLE_RAW
849          *
850          *      { u64                   nr;
851          *        { u64 from, to, flags } lbr[nr];} && PERF_SAMPLE_BRANCH_STACK
852          *
853          *      { u64                   abi; # enum perf_sample_regs_abi
854          *        u64                   regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER
855          *
856          *      { u64                   size;
857          *        char                  data[size];
858          *        u64                   dyn_size; } && PERF_SAMPLE_STACK_USER
859          *
860          *      { u64                   weight;   } && PERF_SAMPLE_WEIGHT
861          *      { u64                   data_src; } && PERF_SAMPLE_DATA_SRC
862          *      { u64                   transaction; } && PERF_SAMPLE_TRANSACTION
863          *      { u64                   abi; # enum perf_sample_regs_abi
864          *        u64                   regs[weight(mask)]; } && PERF_SAMPLE_REGS_INTR
865          *      { u64                   phys_addr;} && PERF_SAMPLE_PHYS_ADDR
866          * };
867          */
868         PERF_RECORD_SAMPLE                      = 9,
869 
870         /*
871          * The MMAP2 records are an augmented version of MMAP, they add
872          * maj, min, ino numbers to be used to uniquely identify each mapping
873          *
874          * struct {
875          *      struct perf_event_header        header;
876          *
877          *      u32                             pid, tid;
878          *      u64                             addr;
879          *      u64                             len;
880          *      u64                             pgoff;
881          *      u32                             maj;
882          *      u32                             min;
883          *      u64                             ino;
884          *      u64                             ino_generation;
885          *      u32                             prot, flags;
886          *      char                            filename[];
887          *      struct sample_id                sample_id;
888          * };
889          */
890         PERF_RECORD_MMAP2                       = 10,
891 
892         /*
893          * Records that new data landed in the AUX buffer part.
894          *
895          * struct {
896          *      struct perf_event_header        header;
897          *
898          *      u64                             aux_offset;
899          *      u64                             aux_size;
900          *      u64                             flags;
901          *      struct sample_id                sample_id;
902          * };
903          */
904         PERF_RECORD_AUX                         = 11,
905 
906         /*
907          * Indicates that instruction trace has started
908          *
909          * struct {
910          *      struct perf_event_header        header;
911          *      u32                             pid;
912          *      u32                             tid;
913          *      struct sample_id                sample_id;
914          * };
915          */
916         PERF_RECORD_ITRACE_START                = 12,
917 
918         /*
919          * Records the dropped/lost sample number.
920          *
921          * struct {
922          *      struct perf_event_header        header;
923          *
924          *      u64                             lost;
925          *      struct sample_id                sample_id;
926          * };
927          */
928         PERF_RECORD_LOST_SAMPLES                = 13,
929 
930         /*
931          * Records a context switch in or out (flagged by
932          * PERF_RECORD_MISC_SWITCH_OUT). See also
933          * PERF_RECORD_SWITCH_CPU_WIDE.
934          *
935          * struct {
936          *      struct perf_event_header        header;
937          *      struct sample_id                sample_id;
938          * };
939          */
940         PERF_RECORD_SWITCH                      = 14,
941 
942         /*
943          * CPU-wide version of PERF_RECORD_SWITCH with next_prev_pid and
944          * next_prev_tid that are the next (switching out) or previous
945          * (switching in) pid/tid.
946          *
947          * struct {
948          *      struct perf_event_header        header;
949          *      u32                             next_prev_pid;
950          *      u32                             next_prev_tid;
951          *      struct sample_id                sample_id;
952          * };
953          */
954         PERF_RECORD_SWITCH_CPU_WIDE             = 15,
955 
956         /*
957          * struct {
958          *      struct perf_event_header        header;
959          *      u32                             pid;
960          *      u32                             tid;
961          *      u64                             nr_namespaces;
962          *      { u64                           dev, inode; } [nr_namespaces];
963          *      struct sample_id                sample_id;
964          * };
965          */
966         PERF_RECORD_NAMESPACES                  = 16,
967 
968         PERF_RECORD_MAX,                        /* non-ABI */
969 };
970 
971 #define PERF_MAX_STACK_DEPTH            127
972 #define PERF_MAX_CONTEXTS_PER_STACK       8
973 
974 enum perf_callchain_context {
975         PERF_CONTEXT_HV                 = (__u64)-32,
976         PERF_CONTEXT_KERNEL             = (__u64)-128,
977         PERF_CONTEXT_USER               = (__u64)-512,
978 
979         PERF_CONTEXT_GUEST              = (__u64)-2048,
980         PERF_CONTEXT_GUEST_KERNEL       = (__u64)-2176,
981         PERF_CONTEXT_GUEST_USER         = (__u64)-2560,
982 
983         PERF_CONTEXT_MAX                = (__u64)-4095,
984 };
985 
986 /**
987  * PERF_RECORD_AUX::flags bits
988  */
989 #define PERF_AUX_FLAG_TRUNCATED         0x01    /* record was truncated to fit */
990 #define PERF_AUX_FLAG_OVERWRITE         0x02    /* snapshot from overwrite mode */
991 #define PERF_AUX_FLAG_PARTIAL           0x04    /* record contains gaps */
992 #define PERF_AUX_FLAG_COLLISION         0x08    /* sample collided with another */
993 
994 #define PERF_FLAG_FD_NO_GROUP           (1UL << 0)
995 #define PERF_FLAG_FD_OUTPUT             (1UL << 1)
996 #define PERF_FLAG_PID_CGROUP            (1UL << 2) /* pid=cgroup id, per-cpu mode only */
997 #define PERF_FLAG_FD_CLOEXEC            (1UL << 3) /* O_CLOEXEC */
998 
999 #if defined(__LITTLE_ENDIAN_BITFIELD)
1000 union perf_mem_data_src {
1001         __u64 val;
1002         struct {
1003                 __u64   mem_op:5,       /* type of opcode */
1004                         mem_lvl:14,     /* memory hierarchy level */
1005                         mem_snoop:5,    /* snoop mode */
1006                         mem_lock:2,     /* lock instr */
1007                         mem_dtlb:7,     /* tlb access */
1008                         mem_lvl_num:4,  /* memory hierarchy level number */
1009                         mem_remote:1,   /* remote */
1010                         mem_snoopx:2,   /* snoop mode, ext */
1011                         mem_rsvd:24;
1012         };
1013 };
1014 #elif defined(__BIG_ENDIAN_BITFIELD)
1015 union perf_mem_data_src {
1016         __u64 val;
1017         struct {
1018                 __u64   mem_rsvd:24,
1019                         mem_snoopx:2,   /* snoop mode, ext */
1020                         mem_remote:1,   /* remote */
1021                         mem_lvl_num:4,  /* memory hierarchy level number */
1022                         mem_dtlb:7,     /* tlb access */
1023                         mem_lock:2,     /* lock instr */
1024                         mem_snoop:5,    /* snoop mode */
1025                         mem_lvl:14,     /* memory hierarchy level */
1026                         mem_op:5;       /* type of opcode */
1027         };
1028 };
1029 #else
1030 #error "Unknown endianness"
1031 #endif
1032 
1033 /* type of opcode (load/store/prefetch,code) */
1034 #define PERF_MEM_OP_NA          0x01 /* not available */
1035 #define PERF_MEM_OP_LOAD        0x02 /* load instruction */
1036 #define PERF_MEM_OP_STORE       0x04 /* store instruction */
1037 #define PERF_MEM_OP_PFETCH      0x08 /* prefetch */
1038 #define PERF_MEM_OP_EXEC        0x10 /* code (execution) */
1039 #define PERF_MEM_OP_SHIFT       0
1040 
1041 /* memory hierarchy (memory level, hit or miss) */
1042 #define PERF_MEM_LVL_NA         0x01  /* not available */
1043 #define PERF_MEM_LVL_HIT        0x02  /* hit level */
1044 #define PERF_MEM_LVL_MISS       0x04  /* miss level  */
1045 #define PERF_MEM_LVL_L1         0x08  /* L1 */
1046 #define PERF_MEM_LVL_LFB        0x10  /* Line Fill Buffer */
1047 #define PERF_MEM_LVL_L2         0x20  /* L2 */
1048 #define PERF_MEM_LVL_L3         0x40  /* L3 */
1049 #define PERF_MEM_LVL_LOC_RAM    0x80  /* Local DRAM */
1050 #define PERF_MEM_LVL_REM_RAM1   0x100 /* Remote DRAM (1 hop) */
1051 #define PERF_MEM_LVL_REM_RAM2   0x200 /* Remote DRAM (2 hops) */
1052 #define PERF_MEM_LVL_REM_CCE1   0x400 /* Remote Cache (1 hop) */
1053 #define PERF_MEM_LVL_REM_CCE2   0x800 /* Remote Cache (2 hops) */
1054 #define PERF_MEM_LVL_IO         0x1000 /* I/O memory */
1055 #define PERF_MEM_LVL_UNC        0x2000 /* Uncached memory */
1056 #define PERF_MEM_LVL_SHIFT      5
1057 
1058 #define PERF_MEM_REMOTE_REMOTE  0x01  /* Remote */
1059 #define PERF_MEM_REMOTE_SHIFT   37
1060 
1061 #define PERF_MEM_LVLNUM_L1      0x01 /* L1 */
1062 #define PERF_MEM_LVLNUM_L2      0x02 /* L2 */
1063 #define PERF_MEM_LVLNUM_L3      0x03 /* L3 */
1064 #define PERF_MEM_LVLNUM_L4      0x04 /* L4 */
1065 /* 5-0xa available */
1066 #define PERF_MEM_LVLNUM_ANY_CACHE 0x0b /* Any cache */
1067 #define PERF_MEM_LVLNUM_LFB     0x0c /* LFB */
1068 #define PERF_MEM_LVLNUM_RAM     0x0d /* RAM */
1069 #define PERF_MEM_LVLNUM_PMEM    0x0e /* PMEM */
1070 #define PERF_MEM_LVLNUM_NA      0x0f /* N/A */
1071 
1072 #define PERF_MEM_LVLNUM_SHIFT   33
1073 
1074 /* snoop mode */
1075 #define PERF_MEM_SNOOP_NA       0x01 /* not available */
1076 #define PERF_MEM_SNOOP_NONE     0x02 /* no snoop */
1077 #define PERF_MEM_SNOOP_HIT      0x04 /* snoop hit */
1078 #define PERF_MEM_SNOOP_MISS     0x08 /* snoop miss */
1079 #define PERF_MEM_SNOOP_HITM     0x10 /* snoop hit modified */
1080 #define PERF_MEM_SNOOP_SHIFT    19
1081 
1082 #define PERF_MEM_SNOOPX_FWD     0x01 /* forward */
1083 /* 1 free */
1084 #define PERF_MEM_SNOOPX_SHIFT   37
1085 
1086 /* locked instruction */
1087 #define PERF_MEM_LOCK_NA        0x01 /* not available */
1088 #define PERF_MEM_LOCK_LOCKED    0x02 /* locked transaction */
1089 #define PERF_MEM_LOCK_SHIFT     24
1090 
1091 /* TLB access */
1092 #define PERF_MEM_TLB_NA         0x01 /* not available */
1093 #define PERF_MEM_TLB_HIT        0x02 /* hit level */
1094 #define PERF_MEM_TLB_MISS       0x04 /* miss level */
1095 #define PERF_MEM_TLB_L1         0x08 /* L1 */
1096 #define PERF_MEM_TLB_L2         0x10 /* L2 */
1097 #define PERF_MEM_TLB_WK         0x20 /* Hardware Walker*/
1098 #define PERF_MEM_TLB_OS         0x40 /* OS fault handler */
1099 #define PERF_MEM_TLB_SHIFT      26
1100 
1101 #define PERF_MEM_S(a, s) \
1102         (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT)
1103 
1104 /*
1105  * single taken branch record layout:
1106  *
1107  *      from: source instruction (may not always be a branch insn)
1108  *        to: branch target
1109  *   mispred: branch target was mispredicted
1110  * predicted: branch target was predicted
1111  *
1112  * support for mispred, predicted is optional. In case it
1113  * is not supported mispred = predicted = 0.
1114  *
1115  *     in_tx: running in a hardware transaction
1116  *     abort: aborting a hardware transaction
1117  *    cycles: cycles from last branch (or 0 if not supported)
1118  *      type: branch type
1119  */
1120 struct perf_branch_entry {
1121         __u64   from;
1122         __u64   to;
1123         __u64   mispred:1,  /* target mispredicted */
1124                 predicted:1,/* target predicted */
1125                 in_tx:1,    /* in transaction */
1126                 abort:1,    /* transaction abort */
1127                 cycles:16,  /* cycle count to last branch */
1128                 type:4,     /* branch type */
1129                 reserved:40;
1130 };
1131 
1132 #endif /* _UAPI_LINUX_PERF_EVENT_H */
1133 

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