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TOMOYO Linux Cross Reference
Linux/include/video/omapdss.h

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  1 /*
  2  * Copyright (C) 2008 Nokia Corporation
  3  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
  4  *
  5  * This program is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 as published by
  7  * the Free Software Foundation.
  8  *
  9  * This program is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 12  * more details.
 13  *
 14  * You should have received a copy of the GNU General Public License along with
 15  * this program.  If not, see <http://www.gnu.org/licenses/>.
 16  */
 17 
 18 #ifndef __OMAP_OMAPDSS_H
 19 #define __OMAP_OMAPDSS_H
 20 
 21 #include <linux/list.h>
 22 #include <linux/kobject.h>
 23 #include <linux/device.h>
 24 #include <linux/interrupt.h>
 25 
 26 #include <video/videomode.h>
 27 
 28 #define DISPC_IRQ_FRAMEDONE             (1 << 0)
 29 #define DISPC_IRQ_VSYNC                 (1 << 1)
 30 #define DISPC_IRQ_EVSYNC_EVEN           (1 << 2)
 31 #define DISPC_IRQ_EVSYNC_ODD            (1 << 3)
 32 #define DISPC_IRQ_ACBIAS_COUNT_STAT     (1 << 4)
 33 #define DISPC_IRQ_PROG_LINE_NUM         (1 << 5)
 34 #define DISPC_IRQ_GFX_FIFO_UNDERFLOW    (1 << 6)
 35 #define DISPC_IRQ_GFX_END_WIN           (1 << 7)
 36 #define DISPC_IRQ_PAL_GAMMA_MASK        (1 << 8)
 37 #define DISPC_IRQ_OCP_ERR               (1 << 9)
 38 #define DISPC_IRQ_VID1_FIFO_UNDERFLOW   (1 << 10)
 39 #define DISPC_IRQ_VID1_END_WIN          (1 << 11)
 40 #define DISPC_IRQ_VID2_FIFO_UNDERFLOW   (1 << 12)
 41 #define DISPC_IRQ_VID2_END_WIN          (1 << 13)
 42 #define DISPC_IRQ_SYNC_LOST             (1 << 14)
 43 #define DISPC_IRQ_SYNC_LOST_DIGIT       (1 << 15)
 44 #define DISPC_IRQ_WAKEUP                (1 << 16)
 45 #define DISPC_IRQ_SYNC_LOST2            (1 << 17)
 46 #define DISPC_IRQ_VSYNC2                (1 << 18)
 47 #define DISPC_IRQ_VID3_END_WIN          (1 << 19)
 48 #define DISPC_IRQ_VID3_FIFO_UNDERFLOW   (1 << 20)
 49 #define DISPC_IRQ_ACBIAS_COUNT_STAT2    (1 << 21)
 50 #define DISPC_IRQ_FRAMEDONE2            (1 << 22)
 51 #define DISPC_IRQ_FRAMEDONEWB           (1 << 23)
 52 #define DISPC_IRQ_FRAMEDONETV           (1 << 24)
 53 #define DISPC_IRQ_WBBUFFEROVERFLOW      (1 << 25)
 54 #define DISPC_IRQ_SYNC_LOST3            (1 << 27)
 55 #define DISPC_IRQ_VSYNC3                (1 << 28)
 56 #define DISPC_IRQ_ACBIAS_COUNT_STAT3    (1 << 29)
 57 #define DISPC_IRQ_FRAMEDONE3            (1 << 30)
 58 
 59 struct omap_dss_device;
 60 struct omap_overlay_manager;
 61 struct dss_lcd_mgr_config;
 62 struct snd_aes_iec958;
 63 struct snd_cea_861_aud_if;
 64 struct hdmi_avi_infoframe;
 65 
 66 enum omap_display_type {
 67         OMAP_DISPLAY_TYPE_NONE          = 0,
 68         OMAP_DISPLAY_TYPE_DPI           = 1 << 0,
 69         OMAP_DISPLAY_TYPE_DBI           = 1 << 1,
 70         OMAP_DISPLAY_TYPE_SDI           = 1 << 2,
 71         OMAP_DISPLAY_TYPE_DSI           = 1 << 3,
 72         OMAP_DISPLAY_TYPE_VENC          = 1 << 4,
 73         OMAP_DISPLAY_TYPE_HDMI          = 1 << 5,
 74         OMAP_DISPLAY_TYPE_DVI           = 1 << 6,
 75 };
 76 
 77 enum omap_plane {
 78         OMAP_DSS_GFX    = 0,
 79         OMAP_DSS_VIDEO1 = 1,
 80         OMAP_DSS_VIDEO2 = 2,
 81         OMAP_DSS_VIDEO3 = 3,
 82         OMAP_DSS_WB     = 4,
 83 };
 84 
 85 enum omap_channel {
 86         OMAP_DSS_CHANNEL_LCD    = 0,
 87         OMAP_DSS_CHANNEL_DIGIT  = 1,
 88         OMAP_DSS_CHANNEL_LCD2   = 2,
 89         OMAP_DSS_CHANNEL_LCD3   = 3,
 90         OMAP_DSS_CHANNEL_WB     = 4,
 91 };
 92 
 93 enum omap_color_mode {
 94         OMAP_DSS_COLOR_CLUT1    = 1 << 0,  /* BITMAP 1 */
 95         OMAP_DSS_COLOR_CLUT2    = 1 << 1,  /* BITMAP 2 */
 96         OMAP_DSS_COLOR_CLUT4    = 1 << 2,  /* BITMAP 4 */
 97         OMAP_DSS_COLOR_CLUT8    = 1 << 3,  /* BITMAP 8 */
 98         OMAP_DSS_COLOR_RGB12U   = 1 << 4,  /* RGB12, 16-bit container */
 99         OMAP_DSS_COLOR_ARGB16   = 1 << 5,  /* ARGB16 */
100         OMAP_DSS_COLOR_RGB16    = 1 << 6,  /* RGB16 */
101         OMAP_DSS_COLOR_RGB24U   = 1 << 7,  /* RGB24, 32-bit container */
102         OMAP_DSS_COLOR_RGB24P   = 1 << 8,  /* RGB24, 24-bit container */
103         OMAP_DSS_COLOR_YUV2     = 1 << 9,  /* YUV2 4:2:2 co-sited */
104         OMAP_DSS_COLOR_UYVY     = 1 << 10, /* UYVY 4:2:2 co-sited */
105         OMAP_DSS_COLOR_ARGB32   = 1 << 11, /* ARGB32 */
106         OMAP_DSS_COLOR_RGBA32   = 1 << 12, /* RGBA32 */
107         OMAP_DSS_COLOR_RGBX32   = 1 << 13, /* RGBx32 */
108         OMAP_DSS_COLOR_NV12             = 1 << 14, /* NV12 format: YUV 4:2:0 */
109         OMAP_DSS_COLOR_RGBA16           = 1 << 15, /* RGBA16 - 4444 */
110         OMAP_DSS_COLOR_RGBX16           = 1 << 16, /* RGBx16 - 4444 */
111         OMAP_DSS_COLOR_ARGB16_1555      = 1 << 17, /* ARGB16 - 1555 */
112         OMAP_DSS_COLOR_XRGB16_1555      = 1 << 18, /* xRGB16 - 1555 */
113 };
114 
115 enum omap_dss_load_mode {
116         OMAP_DSS_LOAD_CLUT_AND_FRAME    = 0,
117         OMAP_DSS_LOAD_CLUT_ONLY         = 1,
118         OMAP_DSS_LOAD_FRAME_ONLY        = 2,
119         OMAP_DSS_LOAD_CLUT_ONCE_FRAME   = 3,
120 };
121 
122 enum omap_dss_trans_key_type {
123         OMAP_DSS_COLOR_KEY_GFX_DST = 0,
124         OMAP_DSS_COLOR_KEY_VID_SRC = 1,
125 };
126 
127 enum omap_rfbi_te_mode {
128         OMAP_DSS_RFBI_TE_MODE_1 = 1,
129         OMAP_DSS_RFBI_TE_MODE_2 = 2,
130 };
131 
132 enum omap_dss_signal_level {
133         OMAPDSS_SIG_ACTIVE_LOW,
134         OMAPDSS_SIG_ACTIVE_HIGH,
135 };
136 
137 enum omap_dss_signal_edge {
138         OMAPDSS_DRIVE_SIG_FALLING_EDGE,
139         OMAPDSS_DRIVE_SIG_RISING_EDGE,
140 };
141 
142 enum omap_dss_venc_type {
143         OMAP_DSS_VENC_TYPE_COMPOSITE,
144         OMAP_DSS_VENC_TYPE_SVIDEO,
145 };
146 
147 enum omap_dss_dsi_pixel_format {
148         OMAP_DSS_DSI_FMT_RGB888,
149         OMAP_DSS_DSI_FMT_RGB666,
150         OMAP_DSS_DSI_FMT_RGB666_PACKED,
151         OMAP_DSS_DSI_FMT_RGB565,
152 };
153 
154 enum omap_dss_dsi_mode {
155         OMAP_DSS_DSI_CMD_MODE = 0,
156         OMAP_DSS_DSI_VIDEO_MODE,
157 };
158 
159 enum omap_display_caps {
160         OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE      = 1 << 0,
161         OMAP_DSS_DISPLAY_CAP_TEAR_ELIM          = 1 << 1,
162 };
163 
164 enum omap_dss_display_state {
165         OMAP_DSS_DISPLAY_DISABLED = 0,
166         OMAP_DSS_DISPLAY_ACTIVE,
167 };
168 
169 struct omap_dss_audio {
170         struct snd_aes_iec958 *iec;
171         struct snd_cea_861_aud_if *cea;
172 };
173 
174 enum omap_dss_rotation_type {
175         OMAP_DSS_ROT_DMA        = 1 << 0,
176         OMAP_DSS_ROT_VRFB       = 1 << 1,
177         OMAP_DSS_ROT_TILER      = 1 << 2,
178 };
179 
180 /* clockwise rotation angle */
181 enum omap_dss_rotation_angle {
182         OMAP_DSS_ROT_0   = 0,
183         OMAP_DSS_ROT_90  = 1,
184         OMAP_DSS_ROT_180 = 2,
185         OMAP_DSS_ROT_270 = 3,
186 };
187 
188 enum omap_overlay_caps {
189         OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
190         OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
191         OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
192         OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
193         OMAP_DSS_OVL_CAP_POS = 1 << 4,
194         OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
195 };
196 
197 enum omap_overlay_manager_caps {
198         OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
199 };
200 
201 enum omap_dss_clk_source {
202         OMAP_DSS_CLK_SRC_FCK = 0,               /* OMAP2/3: DSS1_ALWON_FCLK
203                                                  * OMAP4: DSS_FCLK */
204         OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC,   /* OMAP3: DSI1_PLL_FCLK
205                                                  * OMAP4: PLL1_CLK1 */
206         OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI,     /* OMAP3: DSI2_PLL_FCLK
207                                                  * OMAP4: PLL1_CLK2 */
208         OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC,  /* OMAP4: PLL2_CLK1 */
209         OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI,    /* OMAP4: PLL2_CLK2 */
210 };
211 
212 enum omap_hdmi_flags {
213         OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0,
214 };
215 
216 enum omap_dss_output_id {
217         OMAP_DSS_OUTPUT_DPI     = 1 << 0,
218         OMAP_DSS_OUTPUT_DBI     = 1 << 1,
219         OMAP_DSS_OUTPUT_SDI     = 1 << 2,
220         OMAP_DSS_OUTPUT_DSI1    = 1 << 3,
221         OMAP_DSS_OUTPUT_DSI2    = 1 << 4,
222         OMAP_DSS_OUTPUT_VENC    = 1 << 5,
223         OMAP_DSS_OUTPUT_HDMI    = 1 << 6,
224 };
225 
226 /* RFBI */
227 
228 struct rfbi_timings {
229         int cs_on_time;
230         int cs_off_time;
231         int we_on_time;
232         int we_off_time;
233         int re_on_time;
234         int re_off_time;
235         int we_cycle_time;
236         int re_cycle_time;
237         int cs_pulse_width;
238         int access_time;
239 
240         int clk_div;
241 
242         u32 tim[5];             /* set by rfbi_convert_timings() */
243 
244         int converted;
245 };
246 
247 /* DSI */
248 
249 enum omap_dss_dsi_trans_mode {
250         /* Sync Pulses: both sync start and end packets sent */
251         OMAP_DSS_DSI_PULSE_MODE,
252         /* Sync Events: only sync start packets sent */
253         OMAP_DSS_DSI_EVENT_MODE,
254         /* Burst: only sync start packets sent, pixels are time compressed */
255         OMAP_DSS_DSI_BURST_MODE,
256 };
257 
258 struct omap_dss_dsi_videomode_timings {
259         unsigned long hsclk;
260 
261         unsigned ndl;
262         unsigned bitspp;
263 
264         /* pixels */
265         u16 hact;
266         /* lines */
267         u16 vact;
268 
269         /* DSI video mode blanking data */
270         /* Unit: byte clock cycles */
271         u16 hss;
272         u16 hsa;
273         u16 hse;
274         u16 hfp;
275         u16 hbp;
276         /* Unit: line clocks */
277         u16 vsa;
278         u16 vfp;
279         u16 vbp;
280 
281         /* DSI blanking modes */
282         int blanking_mode;
283         int hsa_blanking_mode;
284         int hbp_blanking_mode;
285         int hfp_blanking_mode;
286 
287         enum omap_dss_dsi_trans_mode trans_mode;
288 
289         bool ddr_clk_always_on;
290         int window_sync;
291 };
292 
293 struct omap_dss_dsi_config {
294         enum omap_dss_dsi_mode mode;
295         enum omap_dss_dsi_pixel_format pixel_format;
296         const struct omap_video_timings *timings;
297 
298         unsigned long hs_clk_min, hs_clk_max;
299         unsigned long lp_clk_min, lp_clk_max;
300 
301         bool ddr_clk_always_on;
302         enum omap_dss_dsi_trans_mode trans_mode;
303 };
304 
305 enum omapdss_version {
306         OMAPDSS_VER_UNKNOWN = 0,
307         OMAPDSS_VER_OMAP24xx,
308         OMAPDSS_VER_OMAP34xx_ES1,       /* OMAP3430 ES1.0, 2.0 */
309         OMAPDSS_VER_OMAP34xx_ES3,       /* OMAP3430 ES3.0+ */
310         OMAPDSS_VER_OMAP3630,
311         OMAPDSS_VER_AM35xx,
312         OMAPDSS_VER_OMAP4430_ES1,       /* OMAP4430 ES1.0 */
313         OMAPDSS_VER_OMAP4430_ES2,       /* OMAP4430 ES2.0, 2.1, 2.2 */
314         OMAPDSS_VER_OMAP4,              /* All other OMAP4s */
315         OMAPDSS_VER_OMAP5,
316         OMAPDSS_VER_AM43xx,
317         OMAPDSS_VER_DRA7xx,
318 };
319 
320 /* Board specific data */
321 struct omap_dss_board_info {
322         int num_devices;
323         struct omap_dss_device **devices;
324         struct omap_dss_device *default_device;
325         const char *default_display_name;
326         int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
327         void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
328         int (*set_min_bus_tput)(struct device *dev, unsigned long r);
329         enum omapdss_version version;
330 };
331 
332 /* Init with the board info */
333 extern int omap_display_init(struct omap_dss_board_info *board_data);
334 /* HDMI mux init*/
335 extern int omap_hdmi_init(enum omap_hdmi_flags flags);
336 
337 struct omap_video_timings {
338         /* Unit: pixels */
339         u16 x_res;
340         /* Unit: pixels */
341         u16 y_res;
342         /* Unit: Hz */
343         u32 pixelclock;
344         /* Unit: pixel clocks */
345         u16 hsw;        /* Horizontal synchronization pulse width */
346         /* Unit: pixel clocks */
347         u16 hfp;        /* Horizontal front porch */
348         /* Unit: pixel clocks */
349         u16 hbp;        /* Horizontal back porch */
350         /* Unit: line clocks */
351         u16 vsw;        /* Vertical synchronization pulse width */
352         /* Unit: line clocks */
353         u16 vfp;        /* Vertical front porch */
354         /* Unit: line clocks */
355         u16 vbp;        /* Vertical back porch */
356 
357         /* Vsync logic level */
358         enum omap_dss_signal_level vsync_level;
359         /* Hsync logic level */
360         enum omap_dss_signal_level hsync_level;
361         /* Interlaced or Progressive timings */
362         bool interlace;
363         /* Pixel clock edge to drive LCD data */
364         enum omap_dss_signal_edge data_pclk_edge;
365         /* Data enable logic level */
366         enum omap_dss_signal_level de_level;
367         /* Pixel clock edges to drive HSYNC and VSYNC signals */
368         enum omap_dss_signal_edge sync_pclk_edge;
369 };
370 
371 /* Hardcoded timings for tv modes. Venc only uses these to
372  * identify the mode, and does not actually use the configs
373  * itself. However, the configs should be something that
374  * a normal monitor can also show */
375 extern const struct omap_video_timings omap_dss_pal_timings;
376 extern const struct omap_video_timings omap_dss_ntsc_timings;
377 
378 struct omap_dss_cpr_coefs {
379         s16 rr, rg, rb;
380         s16 gr, gg, gb;
381         s16 br, bg, bb;
382 };
383 
384 struct omap_overlay_info {
385         dma_addr_t paddr;
386         dma_addr_t p_uv_addr;  /* for NV12 format */
387         u16 screen_width;
388         u16 width;
389         u16 height;
390         enum omap_color_mode color_mode;
391         u8 rotation;
392         enum omap_dss_rotation_type rotation_type;
393         bool mirror;
394 
395         u16 pos_x;
396         u16 pos_y;
397         u16 out_width;  /* if 0, out_width == width */
398         u16 out_height; /* if 0, out_height == height */
399         u8 global_alpha;
400         u8 pre_mult_alpha;
401         u8 zorder;
402 };
403 
404 struct omap_overlay {
405         struct kobject kobj;
406         struct list_head list;
407 
408         /* static fields */
409         const char *name;
410         enum omap_plane id;
411         enum omap_color_mode supported_modes;
412         enum omap_overlay_caps caps;
413 
414         /* dynamic fields */
415         struct omap_overlay_manager *manager;
416 
417         /*
418          * The following functions do not block:
419          *
420          * is_enabled
421          * set_overlay_info
422          * get_overlay_info
423          *
424          * The rest of the functions may block and cannot be called from
425          * interrupt context
426          */
427 
428         int (*enable)(struct omap_overlay *ovl);
429         int (*disable)(struct omap_overlay *ovl);
430         bool (*is_enabled)(struct omap_overlay *ovl);
431 
432         int (*set_manager)(struct omap_overlay *ovl,
433                 struct omap_overlay_manager *mgr);
434         int (*unset_manager)(struct omap_overlay *ovl);
435 
436         int (*set_overlay_info)(struct omap_overlay *ovl,
437                         struct omap_overlay_info *info);
438         void (*get_overlay_info)(struct omap_overlay *ovl,
439                         struct omap_overlay_info *info);
440 
441         int (*wait_for_go)(struct omap_overlay *ovl);
442 
443         struct omap_dss_device *(*get_device)(struct omap_overlay *ovl);
444 };
445 
446 struct omap_overlay_manager_info {
447         u32 default_color;
448 
449         enum omap_dss_trans_key_type trans_key_type;
450         u32 trans_key;
451         bool trans_enabled;
452 
453         bool partial_alpha_enabled;
454 
455         bool cpr_enable;
456         struct omap_dss_cpr_coefs cpr_coefs;
457 };
458 
459 struct omap_overlay_manager {
460         struct kobject kobj;
461 
462         /* static fields */
463         const char *name;
464         enum omap_channel id;
465         enum omap_overlay_manager_caps caps;
466         struct list_head overlays;
467         enum omap_display_type supported_displays;
468         enum omap_dss_output_id supported_outputs;
469 
470         /* dynamic fields */
471         struct omap_dss_device *output;
472 
473         /*
474          * The following functions do not block:
475          *
476          * set_manager_info
477          * get_manager_info
478          * apply
479          *
480          * The rest of the functions may block and cannot be called from
481          * interrupt context
482          */
483 
484         int (*set_output)(struct omap_overlay_manager *mgr,
485                 struct omap_dss_device *output);
486         int (*unset_output)(struct omap_overlay_manager *mgr);
487 
488         int (*set_manager_info)(struct omap_overlay_manager *mgr,
489                         struct omap_overlay_manager_info *info);
490         void (*get_manager_info)(struct omap_overlay_manager *mgr,
491                         struct omap_overlay_manager_info *info);
492 
493         int (*apply)(struct omap_overlay_manager *mgr);
494         int (*wait_for_go)(struct omap_overlay_manager *mgr);
495         int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
496 
497         struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr);
498 };
499 
500 /* 22 pins means 1 clk lane and 10 data lanes */
501 #define OMAP_DSS_MAX_DSI_PINS 22
502 
503 struct omap_dsi_pin_config {
504         int num_pins;
505         /*
506          * pin numbers in the following order:
507          * clk+, clk-
508          * data1+, data1-
509          * data2+, data2-
510          * ...
511          */
512         int pins[OMAP_DSS_MAX_DSI_PINS];
513 };
514 
515 struct omap_dss_writeback_info {
516         u32 paddr;
517         u32 p_uv_addr;
518         u16 buf_width;
519         u16 width;
520         u16 height;
521         enum omap_color_mode color_mode;
522         u8 rotation;
523         enum omap_dss_rotation_type rotation_type;
524         bool mirror;
525         u8 pre_mult_alpha;
526 };
527 
528 struct omapdss_dpi_ops {
529         int (*connect)(struct omap_dss_device *dssdev,
530                         struct omap_dss_device *dst);
531         void (*disconnect)(struct omap_dss_device *dssdev,
532                         struct omap_dss_device *dst);
533 
534         int (*enable)(struct omap_dss_device *dssdev);
535         void (*disable)(struct omap_dss_device *dssdev);
536 
537         int (*check_timings)(struct omap_dss_device *dssdev,
538                         struct omap_video_timings *timings);
539         void (*set_timings)(struct omap_dss_device *dssdev,
540                         struct omap_video_timings *timings);
541         void (*get_timings)(struct omap_dss_device *dssdev,
542                         struct omap_video_timings *timings);
543 
544         void (*set_data_lines)(struct omap_dss_device *dssdev, int data_lines);
545 };
546 
547 struct omapdss_sdi_ops {
548         int (*connect)(struct omap_dss_device *dssdev,
549                         struct omap_dss_device *dst);
550         void (*disconnect)(struct omap_dss_device *dssdev,
551                         struct omap_dss_device *dst);
552 
553         int (*enable)(struct omap_dss_device *dssdev);
554         void (*disable)(struct omap_dss_device *dssdev);
555 
556         int (*check_timings)(struct omap_dss_device *dssdev,
557                         struct omap_video_timings *timings);
558         void (*set_timings)(struct omap_dss_device *dssdev,
559                         struct omap_video_timings *timings);
560         void (*get_timings)(struct omap_dss_device *dssdev,
561                         struct omap_video_timings *timings);
562 
563         void (*set_datapairs)(struct omap_dss_device *dssdev, int datapairs);
564 };
565 
566 struct omapdss_dvi_ops {
567         int (*connect)(struct omap_dss_device *dssdev,
568                         struct omap_dss_device *dst);
569         void (*disconnect)(struct omap_dss_device *dssdev,
570                         struct omap_dss_device *dst);
571 
572         int (*enable)(struct omap_dss_device *dssdev);
573         void (*disable)(struct omap_dss_device *dssdev);
574 
575         int (*check_timings)(struct omap_dss_device *dssdev,
576                         struct omap_video_timings *timings);
577         void (*set_timings)(struct omap_dss_device *dssdev,
578                         struct omap_video_timings *timings);
579         void (*get_timings)(struct omap_dss_device *dssdev,
580                         struct omap_video_timings *timings);
581 };
582 
583 struct omapdss_atv_ops {
584         int (*connect)(struct omap_dss_device *dssdev,
585                         struct omap_dss_device *dst);
586         void (*disconnect)(struct omap_dss_device *dssdev,
587                         struct omap_dss_device *dst);
588 
589         int (*enable)(struct omap_dss_device *dssdev);
590         void (*disable)(struct omap_dss_device *dssdev);
591 
592         int (*check_timings)(struct omap_dss_device *dssdev,
593                         struct omap_video_timings *timings);
594         void (*set_timings)(struct omap_dss_device *dssdev,
595                         struct omap_video_timings *timings);
596         void (*get_timings)(struct omap_dss_device *dssdev,
597                         struct omap_video_timings *timings);
598 
599         void (*set_type)(struct omap_dss_device *dssdev,
600                 enum omap_dss_venc_type type);
601         void (*invert_vid_out_polarity)(struct omap_dss_device *dssdev,
602                 bool invert_polarity);
603 
604         int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
605         u32 (*get_wss)(struct omap_dss_device *dssdev);
606 };
607 
608 struct omapdss_hdmi_ops {
609         int (*connect)(struct omap_dss_device *dssdev,
610                         struct omap_dss_device *dst);
611         void (*disconnect)(struct omap_dss_device *dssdev,
612                         struct omap_dss_device *dst);
613 
614         int (*enable)(struct omap_dss_device *dssdev);
615         void (*disable)(struct omap_dss_device *dssdev);
616 
617         int (*check_timings)(struct omap_dss_device *dssdev,
618                         struct omap_video_timings *timings);
619         void (*set_timings)(struct omap_dss_device *dssdev,
620                         struct omap_video_timings *timings);
621         void (*get_timings)(struct omap_dss_device *dssdev,
622                         struct omap_video_timings *timings);
623 
624         int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
625         bool (*detect)(struct omap_dss_device *dssdev);
626 
627         int (*set_hdmi_mode)(struct omap_dss_device *dssdev, bool hdmi_mode);
628         int (*set_infoframe)(struct omap_dss_device *dssdev,
629                 const struct hdmi_avi_infoframe *avi);
630 };
631 
632 struct omapdss_dsi_ops {
633         int (*connect)(struct omap_dss_device *dssdev,
634                         struct omap_dss_device *dst);
635         void (*disconnect)(struct omap_dss_device *dssdev,
636                         struct omap_dss_device *dst);
637 
638         int (*enable)(struct omap_dss_device *dssdev);
639         void (*disable)(struct omap_dss_device *dssdev, bool disconnect_lanes,
640                         bool enter_ulps);
641 
642         /* bus configuration */
643         int (*set_config)(struct omap_dss_device *dssdev,
644                         const struct omap_dss_dsi_config *cfg);
645         int (*configure_pins)(struct omap_dss_device *dssdev,
646                         const struct omap_dsi_pin_config *pin_cfg);
647 
648         void (*enable_hs)(struct omap_dss_device *dssdev, int channel,
649                         bool enable);
650         int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
651 
652         int (*update)(struct omap_dss_device *dssdev, int channel,
653                         void (*callback)(int, void *), void *data);
654 
655         void (*bus_lock)(struct omap_dss_device *dssdev);
656         void (*bus_unlock)(struct omap_dss_device *dssdev);
657 
658         int (*enable_video_output)(struct omap_dss_device *dssdev, int channel);
659         void (*disable_video_output)(struct omap_dss_device *dssdev,
660                         int channel);
661 
662         int (*request_vc)(struct omap_dss_device *dssdev, int *channel);
663         int (*set_vc_id)(struct omap_dss_device *dssdev, int channel,
664                         int vc_id);
665         void (*release_vc)(struct omap_dss_device *dssdev, int channel);
666 
667         /* data transfer */
668         int (*dcs_write)(struct omap_dss_device *dssdev, int channel,
669                         u8 *data, int len);
670         int (*dcs_write_nosync)(struct omap_dss_device *dssdev, int channel,
671                         u8 *data, int len);
672         int (*dcs_read)(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
673                         u8 *data, int len);
674 
675         int (*gen_write)(struct omap_dss_device *dssdev, int channel,
676                         u8 *data, int len);
677         int (*gen_write_nosync)(struct omap_dss_device *dssdev, int channel,
678                         u8 *data, int len);
679         int (*gen_read)(struct omap_dss_device *dssdev, int channel,
680                         u8 *reqdata, int reqlen,
681                         u8 *data, int len);
682 
683         int (*bta_sync)(struct omap_dss_device *dssdev, int channel);
684 
685         int (*set_max_rx_packet_size)(struct omap_dss_device *dssdev,
686                         int channel, u16 plen);
687 };
688 
689 struct omap_dss_device {
690         struct kobject kobj;
691         struct device *dev;
692 
693         struct module *owner;
694 
695         struct list_head panel_list;
696 
697         /* alias in the form of "display%d" */
698         char alias[16];
699 
700         enum omap_display_type type;
701         enum omap_display_type output_type;
702 
703         union {
704                 struct {
705                         u8 data_lines;
706                 } dpi;
707 
708                 struct {
709                         u8 channel;
710                         u8 data_lines;
711                 } rfbi;
712 
713                 struct {
714                         u8 datapairs;
715                 } sdi;
716 
717                 struct {
718                         int module;
719                 } dsi;
720 
721                 struct {
722                         enum omap_dss_venc_type type;
723                         bool invert_polarity;
724                 } venc;
725         } phy;
726 
727         struct {
728                 struct omap_video_timings timings;
729 
730                 enum omap_dss_dsi_pixel_format dsi_pix_fmt;
731                 enum omap_dss_dsi_mode dsi_mode;
732         } panel;
733 
734         struct {
735                 u8 pixel_size;
736                 struct rfbi_timings rfbi_timings;
737         } ctrl;
738 
739         const char *name;
740 
741         /* used to match device to driver */
742         const char *driver_name;
743 
744         void *data;
745 
746         struct omap_dss_driver *driver;
747 
748         union {
749                 const struct omapdss_dpi_ops *dpi;
750                 const struct omapdss_sdi_ops *sdi;
751                 const struct omapdss_dvi_ops *dvi;
752                 const struct omapdss_hdmi_ops *hdmi;
753                 const struct omapdss_atv_ops *atv;
754                 const struct omapdss_dsi_ops *dsi;
755         } ops;
756 
757         /* helper variable for driver suspend/resume */
758         bool activate_after_resume;
759 
760         enum omap_display_caps caps;
761 
762         struct omap_dss_device *src;
763 
764         enum omap_dss_display_state state;
765 
766         /* OMAP DSS output specific fields */
767 
768         struct list_head list;
769 
770         /* DISPC channel for this output */
771         enum omap_channel dispc_channel;
772 
773         /* output instance */
774         enum omap_dss_output_id id;
775 
776         /* the port number in the DT node */
777         int port_num;
778 
779         /* dynamic fields */
780         struct omap_overlay_manager *manager;
781 
782         struct omap_dss_device *dst;
783 };
784 
785 struct omap_dss_hdmi_data
786 {
787         int ct_cp_hpd_gpio;
788         int ls_oe_gpio;
789         int hpd_gpio;
790 };
791 
792 struct omap_dss_driver {
793         int (*probe)(struct omap_dss_device *);
794         void (*remove)(struct omap_dss_device *);
795 
796         int (*connect)(struct omap_dss_device *dssdev);
797         void (*disconnect)(struct omap_dss_device *dssdev);
798 
799         int (*enable)(struct omap_dss_device *display);
800         void (*disable)(struct omap_dss_device *display);
801         int (*run_test)(struct omap_dss_device *display, int test);
802 
803         int (*update)(struct omap_dss_device *dssdev,
804                                u16 x, u16 y, u16 w, u16 h);
805         int (*sync)(struct omap_dss_device *dssdev);
806 
807         int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
808         int (*get_te)(struct omap_dss_device *dssdev);
809 
810         u8 (*get_rotate)(struct omap_dss_device *dssdev);
811         int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
812 
813         bool (*get_mirror)(struct omap_dss_device *dssdev);
814         int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
815 
816         int (*memory_read)(struct omap_dss_device *dssdev,
817                         void *buf, size_t size,
818                         u16 x, u16 y, u16 w, u16 h);
819 
820         void (*get_resolution)(struct omap_dss_device *dssdev,
821                         u16 *xres, u16 *yres);
822         void (*get_dimensions)(struct omap_dss_device *dssdev,
823                         u32 *width, u32 *height);
824         int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
825 
826         int (*check_timings)(struct omap_dss_device *dssdev,
827                         struct omap_video_timings *timings);
828         void (*set_timings)(struct omap_dss_device *dssdev,
829                         struct omap_video_timings *timings);
830         void (*get_timings)(struct omap_dss_device *dssdev,
831                         struct omap_video_timings *timings);
832 
833         int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
834         u32 (*get_wss)(struct omap_dss_device *dssdev);
835 
836         int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
837         bool (*detect)(struct omap_dss_device *dssdev);
838 
839         int (*set_hdmi_mode)(struct omap_dss_device *dssdev, bool hdmi_mode);
840         int (*set_hdmi_infoframe)(struct omap_dss_device *dssdev,
841                 const struct hdmi_avi_infoframe *avi);
842 };
843 
844 enum omapdss_version omapdss_get_version(void);
845 bool omapdss_is_initialized(void);
846 
847 int omap_dss_register_driver(struct omap_dss_driver *);
848 void omap_dss_unregister_driver(struct omap_dss_driver *);
849 
850 int omapdss_register_display(struct omap_dss_device *dssdev);
851 void omapdss_unregister_display(struct omap_dss_device *dssdev);
852 
853 struct omap_dss_device *omap_dss_get_device(struct omap_dss_device *dssdev);
854 void omap_dss_put_device(struct omap_dss_device *dssdev);
855 #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
856 struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
857 struct omap_dss_device *omap_dss_find_device(void *data,
858                 int (*match)(struct omap_dss_device *dssdev, void *data));
859 const char *omapdss_get_default_display_name(void);
860 
861 void videomode_to_omap_video_timings(const struct videomode *vm,
862                 struct omap_video_timings *ovt);
863 void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
864                 struct videomode *vm);
865 
866 int dss_feat_get_num_mgrs(void);
867 int dss_feat_get_num_ovls(void);
868 enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
869 
870 
871 
872 int omap_dss_get_num_overlay_managers(void);
873 struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
874 
875 int omap_dss_get_num_overlays(void);
876 struct omap_overlay *omap_dss_get_overlay(int num);
877 
878 int omapdss_register_output(struct omap_dss_device *output);
879 void omapdss_unregister_output(struct omap_dss_device *output);
880 struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id);
881 struct omap_dss_device *omap_dss_find_output(const char *name);
882 struct omap_dss_device *omap_dss_find_output_by_port_node(struct device_node *port);
883 int omapdss_output_set_device(struct omap_dss_device *out,
884                 struct omap_dss_device *dssdev);
885 int omapdss_output_unset_device(struct omap_dss_device *out);
886 
887 struct omap_dss_device *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
888 struct omap_overlay_manager *omapdss_find_mgr_from_display(struct omap_dss_device *dssdev);
889 
890 void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
891                 u16 *xres, u16 *yres);
892 int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
893 void omapdss_default_get_timings(struct omap_dss_device *dssdev,
894                 struct omap_video_timings *timings);
895 
896 typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
897 int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
898 int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
899 
900 u32 dispc_read_irqstatus(void);
901 void dispc_clear_irqstatus(u32 mask);
902 u32 dispc_read_irqenable(void);
903 void dispc_write_irqenable(u32 mask);
904 
905 int dispc_request_irq(irq_handler_t handler, void *dev_id);
906 void dispc_free_irq(void *dev_id);
907 
908 int dispc_runtime_get(void);
909 void dispc_runtime_put(void);
910 
911 void dispc_mgr_enable(enum omap_channel channel, bool enable);
912 bool dispc_mgr_is_enabled(enum omap_channel channel);
913 u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
914 u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
915 u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel);
916 bool dispc_mgr_go_busy(enum omap_channel channel);
917 void dispc_mgr_go(enum omap_channel channel);
918 void dispc_mgr_set_lcd_config(enum omap_channel channel,
919                 const struct dss_lcd_mgr_config *config);
920 void dispc_mgr_set_timings(enum omap_channel channel,
921                 const struct omap_video_timings *timings);
922 void dispc_mgr_setup(enum omap_channel channel,
923                 const struct omap_overlay_manager_info *info);
924 
925 int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel,
926                 const struct omap_overlay_info *oi,
927                 const struct omap_video_timings *timings,
928                 int *x_predecim, int *y_predecim);
929 
930 int dispc_ovl_enable(enum omap_plane plane, bool enable);
931 bool dispc_ovl_enabled(enum omap_plane plane);
932 void dispc_ovl_set_channel_out(enum omap_plane plane,
933                 enum omap_channel channel);
934 int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
935                 bool replication, const struct omap_video_timings *mgr_timings,
936                 bool mem_to_mem);
937 
938 int omapdss_compat_init(void);
939 void omapdss_compat_uninit(void);
940 
941 struct dss_mgr_ops {
942         int (*connect)(struct omap_overlay_manager *mgr,
943                 struct omap_dss_device *dst);
944         void (*disconnect)(struct omap_overlay_manager *mgr,
945                 struct omap_dss_device *dst);
946 
947         void (*start_update)(struct omap_overlay_manager *mgr);
948         int (*enable)(struct omap_overlay_manager *mgr);
949         void (*disable)(struct omap_overlay_manager *mgr);
950         void (*set_timings)(struct omap_overlay_manager *mgr,
951                         const struct omap_video_timings *timings);
952         void (*set_lcd_config)(struct omap_overlay_manager *mgr,
953                         const struct dss_lcd_mgr_config *config);
954         int (*register_framedone_handler)(struct omap_overlay_manager *mgr,
955                         void (*handler)(void *), void *data);
956         void (*unregister_framedone_handler)(struct omap_overlay_manager *mgr,
957                         void (*handler)(void *), void *data);
958 };
959 
960 int dss_install_mgr_ops(const struct dss_mgr_ops *mgr_ops);
961 void dss_uninstall_mgr_ops(void);
962 
963 int dss_mgr_connect(struct omap_overlay_manager *mgr,
964                 struct omap_dss_device *dst);
965 void dss_mgr_disconnect(struct omap_overlay_manager *mgr,
966                 struct omap_dss_device *dst);
967 void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
968                 const struct omap_video_timings *timings);
969 void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
970                 const struct dss_lcd_mgr_config *config);
971 int dss_mgr_enable(struct omap_overlay_manager *mgr);
972 void dss_mgr_disable(struct omap_overlay_manager *mgr);
973 void dss_mgr_start_update(struct omap_overlay_manager *mgr);
974 int dss_mgr_register_framedone_handler(struct omap_overlay_manager *mgr,
975                 void (*handler)(void *), void *data);
976 void dss_mgr_unregister_framedone_handler(struct omap_overlay_manager *mgr,
977                 void (*handler)(void *), void *data);
978 
979 static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
980 {
981         return dssdev->src;
982 }
983 
984 static inline bool omapdss_device_is_enabled(struct omap_dss_device *dssdev)
985 {
986         return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
987 }
988 
989 struct device_node *
990 omapdss_of_get_next_port(const struct device_node *parent,
991                          struct device_node *prev);
992 
993 struct device_node *
994 omapdss_of_get_next_endpoint(const struct device_node *parent,
995                              struct device_node *prev);
996 
997 struct device_node *
998 omapdss_of_get_first_endpoint(const struct device_node *parent);
999 
1000 struct omap_dss_device *
1001 omapdss_of_find_source_for_first_ep(struct device_node *node);
1002 
1003 #endif
1004 

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