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TOMOYO Linux Cross Reference
Linux/sound/pci/atiixp.c

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  1 // SPDX-License-Identifier: GPL-2.0-or-later
  2 /*
  3  *   ALSA driver for ATI IXP 150/200/250/300 AC97 controllers
  4  *
  5  *      Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  6  */
  7 
  8 #include <linux/io.h>
  9 #include <linux/delay.h>
 10 #include <linux/interrupt.h>
 11 #include <linux/init.h>
 12 #include <linux/pci.h>
 13 #include <linux/slab.h>
 14 #include <linux/module.h>
 15 #include <linux/mutex.h>
 16 #include <sound/core.h>
 17 #include <sound/pcm.h>
 18 #include <sound/pcm_params.h>
 19 #include <sound/info.h>
 20 #include <sound/ac97_codec.h>
 21 #include <sound/initval.h>
 22 
 23 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
 24 MODULE_DESCRIPTION("ATI IXP AC97 controller");
 25 MODULE_LICENSE("GPL");
 26 MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400/600}}");
 27 
 28 static int index = SNDRV_DEFAULT_IDX1;  /* Index 0-MAX */
 29 static char *id = SNDRV_DEFAULT_STR1;   /* ID for this card */
 30 static int ac97_clock = 48000;
 31 static char *ac97_quirk;
 32 static bool spdif_aclink = 1;
 33 static int ac97_codec = -1;
 34 
 35 module_param(index, int, 0444);
 36 MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
 37 module_param(id, charp, 0444);
 38 MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
 39 module_param(ac97_clock, int, 0444);
 40 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
 41 module_param(ac97_quirk, charp, 0444);
 42 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
 43 module_param(ac97_codec, int, 0444);
 44 MODULE_PARM_DESC(ac97_codec, "Specify codec instead of probing.");
 45 module_param(spdif_aclink, bool, 0444);
 46 MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
 47 
 48 /* just for backward compatibility */
 49 static bool enable;
 50 module_param(enable, bool, 0444);
 51 
 52 
 53 /*
 54  */
 55 
 56 #define ATI_REG_ISR                     0x00    /* interrupt source */
 57 #define  ATI_REG_ISR_IN_XRUN            (1U<<0)
 58 #define  ATI_REG_ISR_IN_STATUS          (1U<<1)
 59 #define  ATI_REG_ISR_OUT_XRUN           (1U<<2)
 60 #define  ATI_REG_ISR_OUT_STATUS         (1U<<3)
 61 #define  ATI_REG_ISR_SPDF_XRUN          (1U<<4)
 62 #define  ATI_REG_ISR_SPDF_STATUS        (1U<<5)
 63 #define  ATI_REG_ISR_PHYS_INTR          (1U<<8)
 64 #define  ATI_REG_ISR_PHYS_MISMATCH      (1U<<9)
 65 #define  ATI_REG_ISR_CODEC0_NOT_READY   (1U<<10)
 66 #define  ATI_REG_ISR_CODEC1_NOT_READY   (1U<<11)
 67 #define  ATI_REG_ISR_CODEC2_NOT_READY   (1U<<12)
 68 #define  ATI_REG_ISR_NEW_FRAME          (1U<<13)
 69 
 70 #define ATI_REG_IER                     0x04    /* interrupt enable */
 71 #define  ATI_REG_IER_IN_XRUN_EN         (1U<<0)
 72 #define  ATI_REG_IER_IO_STATUS_EN       (1U<<1)
 73 #define  ATI_REG_IER_OUT_XRUN_EN        (1U<<2)
 74 #define  ATI_REG_IER_OUT_XRUN_COND      (1U<<3)
 75 #define  ATI_REG_IER_SPDF_XRUN_EN       (1U<<4)
 76 #define  ATI_REG_IER_SPDF_STATUS_EN     (1U<<5)
 77 #define  ATI_REG_IER_PHYS_INTR_EN       (1U<<8)
 78 #define  ATI_REG_IER_PHYS_MISMATCH_EN   (1U<<9)
 79 #define  ATI_REG_IER_CODEC0_INTR_EN     (1U<<10)
 80 #define  ATI_REG_IER_CODEC1_INTR_EN     (1U<<11)
 81 #define  ATI_REG_IER_CODEC2_INTR_EN     (1U<<12)
 82 #define  ATI_REG_IER_NEW_FRAME_EN       (1U<<13)        /* (RO */
 83 #define  ATI_REG_IER_SET_BUS_BUSY       (1U<<14)        /* (WO) audio is running */
 84 
 85 #define ATI_REG_CMD                     0x08    /* command */
 86 #define  ATI_REG_CMD_POWERDOWN          (1U<<0)
 87 #define  ATI_REG_CMD_RECEIVE_EN         (1U<<1)
 88 #define  ATI_REG_CMD_SEND_EN            (1U<<2)
 89 #define  ATI_REG_CMD_STATUS_MEM         (1U<<3)
 90 #define  ATI_REG_CMD_SPDF_OUT_EN        (1U<<4)
 91 #define  ATI_REG_CMD_SPDF_STATUS_MEM    (1U<<5)
 92 #define  ATI_REG_CMD_SPDF_THRESHOLD     (3U<<6)
 93 #define  ATI_REG_CMD_SPDF_THRESHOLD_SHIFT       6
 94 #define  ATI_REG_CMD_IN_DMA_EN          (1U<<8)
 95 #define  ATI_REG_CMD_OUT_DMA_EN         (1U<<9)
 96 #define  ATI_REG_CMD_SPDF_DMA_EN        (1U<<10)
 97 #define  ATI_REG_CMD_SPDF_OUT_STOPPED   (1U<<11)
 98 #define  ATI_REG_CMD_SPDF_CONFIG_MASK   (7U<<12)
 99 #define   ATI_REG_CMD_SPDF_CONFIG_34    (1U<<12)
100 #define   ATI_REG_CMD_SPDF_CONFIG_78    (2U<<12)
101 #define   ATI_REG_CMD_SPDF_CONFIG_69    (3U<<12)
102 #define   ATI_REG_CMD_SPDF_CONFIG_01    (4U<<12)
103 #define  ATI_REG_CMD_INTERLEAVE_SPDF    (1U<<16)
104 #define  ATI_REG_CMD_AUDIO_PRESENT      (1U<<20)
105 #define  ATI_REG_CMD_INTERLEAVE_IN      (1U<<21)
106 #define  ATI_REG_CMD_INTERLEAVE_OUT     (1U<<22)
107 #define  ATI_REG_CMD_LOOPBACK_EN        (1U<<23)
108 #define  ATI_REG_CMD_PACKED_DIS         (1U<<24)
109 #define  ATI_REG_CMD_BURST_EN           (1U<<25)
110 #define  ATI_REG_CMD_PANIC_EN           (1U<<26)
111 #define  ATI_REG_CMD_MODEM_PRESENT      (1U<<27)
112 #define  ATI_REG_CMD_ACLINK_ACTIVE      (1U<<28)
113 #define  ATI_REG_CMD_AC_SOFT_RESET      (1U<<29)
114 #define  ATI_REG_CMD_AC_SYNC            (1U<<30)
115 #define  ATI_REG_CMD_AC_RESET           (1U<<31)
116 
117 #define ATI_REG_PHYS_OUT_ADDR           0x0c
118 #define  ATI_REG_PHYS_OUT_CODEC_MASK    (3U<<0)
119 #define  ATI_REG_PHYS_OUT_RW            (1U<<2)
120 #define  ATI_REG_PHYS_OUT_ADDR_EN       (1U<<8)
121 #define  ATI_REG_PHYS_OUT_ADDR_SHIFT    9
122 #define  ATI_REG_PHYS_OUT_DATA_SHIFT    16
123 
124 #define ATI_REG_PHYS_IN_ADDR            0x10
125 #define  ATI_REG_PHYS_IN_READ_FLAG      (1U<<8)
126 #define  ATI_REG_PHYS_IN_ADDR_SHIFT     9
127 #define  ATI_REG_PHYS_IN_DATA_SHIFT     16
128 
129 #define ATI_REG_SLOTREQ                 0x14
130 
131 #define ATI_REG_COUNTER                 0x18
132 #define  ATI_REG_COUNTER_SLOT           (3U<<0) /* slot # */
133 #define  ATI_REG_COUNTER_BITCLOCK       (31U<<8)
134 
135 #define ATI_REG_IN_FIFO_THRESHOLD       0x1c
136 
137 #define ATI_REG_IN_DMA_LINKPTR          0x20
138 #define ATI_REG_IN_DMA_DT_START         0x24    /* RO */
139 #define ATI_REG_IN_DMA_DT_NEXT          0x28    /* RO */
140 #define ATI_REG_IN_DMA_DT_CUR           0x2c    /* RO */
141 #define ATI_REG_IN_DMA_DT_SIZE          0x30
142 
143 #define ATI_REG_OUT_DMA_SLOT            0x34
144 #define  ATI_REG_OUT_DMA_SLOT_BIT(x)    (1U << ((x) - 3))
145 #define  ATI_REG_OUT_DMA_SLOT_MASK      0x1ff
146 #define  ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
147 #define  ATI_REG_OUT_DMA_THRESHOLD_SHIFT        11
148 
149 #define ATI_REG_OUT_DMA_LINKPTR         0x38
150 #define ATI_REG_OUT_DMA_DT_START        0x3c    /* RO */
151 #define ATI_REG_OUT_DMA_DT_NEXT         0x40    /* RO */
152 #define ATI_REG_OUT_DMA_DT_CUR          0x44    /* RO */
153 #define ATI_REG_OUT_DMA_DT_SIZE         0x48
154 
155 #define ATI_REG_SPDF_CMD                0x4c
156 #define  ATI_REG_SPDF_CMD_LFSR          (1U<<4)
157 #define  ATI_REG_SPDF_CMD_SINGLE_CH     (1U<<5)
158 #define  ATI_REG_SPDF_CMD_LFSR_ACC      (0xff<<8)       /* RO */
159 
160 #define ATI_REG_SPDF_DMA_LINKPTR        0x50
161 #define ATI_REG_SPDF_DMA_DT_START       0x54    /* RO */
162 #define ATI_REG_SPDF_DMA_DT_NEXT        0x58    /* RO */
163 #define ATI_REG_SPDF_DMA_DT_CUR         0x5c    /* RO */
164 #define ATI_REG_SPDF_DMA_DT_SIZE        0x60
165 
166 #define ATI_REG_MODEM_MIRROR            0x7c
167 #define ATI_REG_AUDIO_MIRROR            0x80
168 
169 #define ATI_REG_6CH_REORDER             0x84    /* reorder slots for 6ch */
170 #define  ATI_REG_6CH_REORDER_EN         (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
171 
172 #define ATI_REG_FIFO_FLUSH              0x88
173 #define  ATI_REG_FIFO_OUT_FLUSH         (1U<<0)
174 #define  ATI_REG_FIFO_IN_FLUSH          (1U<<1)
175 
176 /* LINKPTR */
177 #define  ATI_REG_LINKPTR_EN             (1U<<0)
178 
179 /* [INT|OUT|SPDIF]_DMA_DT_SIZE */
180 #define  ATI_REG_DMA_DT_SIZE            (0xffffU<<0)
181 #define  ATI_REG_DMA_FIFO_USED          (0x1fU<<16)
182 #define  ATI_REG_DMA_FIFO_FREE          (0x1fU<<21)
183 #define  ATI_REG_DMA_STATE              (7U<<26)
184 
185 
186 #define ATI_MAX_DESCRIPTORS     256     /* max number of descriptor packets */
187 
188 
189 struct atiixp;
190 
191 /*
192  * DMA packate descriptor
193  */
194 
195 struct atiixp_dma_desc {
196         __le32 addr;    /* DMA buffer address */
197         u16 status;     /* status bits */
198         u16 size;       /* size of the packet in dwords */
199         __le32 next;    /* address of the next packet descriptor */
200 };
201 
202 /*
203  * stream enum
204  */
205 enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */
206 enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */
207 enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */
208 
209 #define NUM_ATI_CODECS  3
210 
211 
212 /*
213  * constants and callbacks for each DMA type
214  */
215 struct atiixp_dma_ops {
216         int type;                       /* ATI_DMA_XXX */
217         unsigned int llp_offset;        /* LINKPTR offset */
218         unsigned int dt_cur;            /* DT_CUR offset */
219         /* called from open callback */
220         void (*enable_dma)(struct atiixp *chip, int on);
221         /* called from trigger (START/STOP) */
222         void (*enable_transfer)(struct atiixp *chip, int on);
223         /* called from trigger (STOP only) */
224         void (*flush_dma)(struct atiixp *chip);
225 };
226 
227 /*
228  * DMA stream
229  */
230 struct atiixp_dma {
231         const struct atiixp_dma_ops *ops;
232         struct snd_dma_buffer desc_buf;
233         struct snd_pcm_substream *substream;    /* assigned PCM substream */
234         unsigned int buf_addr, buf_bytes;       /* DMA buffer address, bytes */
235         unsigned int period_bytes, periods;
236         int opened;
237         int running;
238         int suspended;
239         int pcm_open_flag;
240         int ac97_pcm_type;      /* index # of ac97_pcm to access, -1 = not used */
241         unsigned int saved_curptr;
242 };
243 
244 /*
245  * ATI IXP chip
246  */
247 struct atiixp {
248         struct snd_card *card;
249         struct pci_dev *pci;
250 
251         unsigned long addr;
252         void __iomem *remap_addr;
253         int irq;
254         
255         struct snd_ac97_bus *ac97_bus;
256         struct snd_ac97 *ac97[NUM_ATI_CODECS];
257 
258         spinlock_t reg_lock;
259 
260         struct atiixp_dma dmas[NUM_ATI_DMAS];
261         struct ac97_pcm *pcms[NUM_ATI_PCMS];
262         struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS];
263 
264         int max_channels;               /* max. channels for PCM out */
265 
266         unsigned int codec_not_ready_bits;      /* for codec detection */
267 
268         int spdif_over_aclink;          /* passed from the module option */
269         struct mutex open_mutex;        /* playback open mutex */
270 };
271 
272 
273 /*
274  */
275 static const struct pci_device_id snd_atiixp_ids[] = {
276         { PCI_VDEVICE(ATI, 0x4341), 0 }, /* SB200 */
277         { PCI_VDEVICE(ATI, 0x4361), 0 }, /* SB300 */
278         { PCI_VDEVICE(ATI, 0x4370), 0 }, /* SB400 */
279         { PCI_VDEVICE(ATI, 0x4382), 0 }, /* SB600 */
280         { 0, }
281 };
282 
283 MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
284 
285 static struct snd_pci_quirk atiixp_quirks[] = {
286         SND_PCI_QUIRK(0x105b, 0x0c81, "Foxconn RC4107MA-RS2", 0),
287         SND_PCI_QUIRK(0x15bd, 0x3100, "DFI RS482", 0),
288         { } /* terminator */
289 };
290 
291 /*
292  * lowlevel functions
293  */
294 
295 /*
296  * update the bits of the given register.
297  * return 1 if the bits changed.
298  */
299 static int snd_atiixp_update_bits(struct atiixp *chip, unsigned int reg,
300                                  unsigned int mask, unsigned int value)
301 {
302         void __iomem *addr = chip->remap_addr + reg;
303         unsigned int data, old_data;
304         old_data = data = readl(addr);
305         data &= ~mask;
306         data |= value;
307         if (old_data == data)
308                 return 0;
309         writel(data, addr);
310         return 1;
311 }
312 
313 /*
314  * macros for easy use
315  */
316 #define atiixp_write(chip,reg,value) \
317         writel(value, chip->remap_addr + ATI_REG_##reg)
318 #define atiixp_read(chip,reg) \
319         readl(chip->remap_addr + ATI_REG_##reg)
320 #define atiixp_update(chip,reg,mask,val) \
321         snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
322 
323 /*
324  * handling DMA packets
325  *
326  * we allocate a linear buffer for the DMA, and split it to  each packet.
327  * in a future version, a scatter-gather buffer should be implemented.
328  */
329 
330 #define ATI_DESC_LIST_SIZE \
331         PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc))
332 
333 /*
334  * build packets ring for the given buffer size.
335  *
336  * IXP handles the buffer descriptors, which are connected as a linked
337  * list.  although we can change the list dynamically, in this version,
338  * a static RING of buffer descriptors is used.
339  *
340  * the ring is built in this function, and is set up to the hardware. 
341  */
342 static int atiixp_build_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
343                                     struct snd_pcm_substream *substream,
344                                     unsigned int periods,
345                                     unsigned int period_bytes)
346 {
347         unsigned int i;
348         u32 addr, desc_addr;
349         unsigned long flags;
350 
351         if (periods > ATI_MAX_DESCRIPTORS)
352                 return -ENOMEM;
353 
354         if (dma->desc_buf.area == NULL) {
355                 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
356                                         snd_dma_pci_data(chip->pci),
357                                         ATI_DESC_LIST_SIZE,
358                                         &dma->desc_buf) < 0)
359                         return -ENOMEM;
360                 dma->period_bytes = dma->periods = 0; /* clear */
361         }
362 
363         if (dma->periods == periods && dma->period_bytes == period_bytes)
364                 return 0;
365 
366         /* reset DMA before changing the descriptor table */
367         spin_lock_irqsave(&chip->reg_lock, flags);
368         writel(0, chip->remap_addr + dma->ops->llp_offset);
369         dma->ops->enable_dma(chip, 0);
370         dma->ops->enable_dma(chip, 1);
371         spin_unlock_irqrestore(&chip->reg_lock, flags);
372 
373         /* fill the entries */
374         addr = (u32)substream->runtime->dma_addr;
375         desc_addr = (u32)dma->desc_buf.addr;
376         for (i = 0; i < periods; i++) {
377                 struct atiixp_dma_desc *desc;
378                 desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i];
379                 desc->addr = cpu_to_le32(addr);
380                 desc->status = 0;
381                 desc->size = period_bytes >> 2; /* in dwords */
382                 desc_addr += sizeof(struct atiixp_dma_desc);
383                 if (i == periods - 1)
384                         desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
385                 else
386                         desc->next = cpu_to_le32(desc_addr);
387                 addr += period_bytes;
388         }
389 
390         writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
391                chip->remap_addr + dma->ops->llp_offset);
392 
393         dma->period_bytes = period_bytes;
394         dma->periods = periods;
395 
396         return 0;
397 }
398 
399 /*
400  * remove the ring buffer and release it if assigned
401  */
402 static void atiixp_clear_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
403                                      struct snd_pcm_substream *substream)
404 {
405         if (dma->desc_buf.area) {
406                 writel(0, chip->remap_addr + dma->ops->llp_offset);
407                 snd_dma_free_pages(&dma->desc_buf);
408                 dma->desc_buf.area = NULL;
409         }
410 }
411 
412 /*
413  * AC97 interface
414  */
415 static int snd_atiixp_acquire_codec(struct atiixp *chip)
416 {
417         int timeout = 1000;
418 
419         while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
420                 if (! timeout--) {
421                         dev_warn(chip->card->dev, "codec acquire timeout\n");
422                         return -EBUSY;
423                 }
424                 udelay(1);
425         }
426         return 0;
427 }
428 
429 static unsigned short snd_atiixp_codec_read(struct atiixp *chip, unsigned short codec, unsigned short reg)
430 {
431         unsigned int data;
432         int timeout;
433 
434         if (snd_atiixp_acquire_codec(chip) < 0)
435                 return 0xffff;
436         data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
437                 ATI_REG_PHYS_OUT_ADDR_EN |
438                 ATI_REG_PHYS_OUT_RW |
439                 codec;
440         atiixp_write(chip, PHYS_OUT_ADDR, data);
441         if (snd_atiixp_acquire_codec(chip) < 0)
442                 return 0xffff;
443         timeout = 1000;
444         do {
445                 data = atiixp_read(chip, PHYS_IN_ADDR);
446                 if (data & ATI_REG_PHYS_IN_READ_FLAG)
447                         return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
448                 udelay(1);
449         } while (--timeout);
450         /* time out may happen during reset */
451         if (reg < 0x7c)
452                 dev_warn(chip->card->dev, "codec read timeout (reg %x)\n", reg);
453         return 0xffff;
454 }
455 
456 
457 static void snd_atiixp_codec_write(struct atiixp *chip, unsigned short codec,
458                                    unsigned short reg, unsigned short val)
459 {
460         unsigned int data;
461     
462         if (snd_atiixp_acquire_codec(chip) < 0)
463                 return;
464         data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
465                 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
466                 ATI_REG_PHYS_OUT_ADDR_EN | codec;
467         atiixp_write(chip, PHYS_OUT_ADDR, data);
468 }
469 
470 
471 static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97,
472                                            unsigned short reg)
473 {
474         struct atiixp *chip = ac97->private_data;
475         return snd_atiixp_codec_read(chip, ac97->num, reg);
476     
477 }
478 
479 static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
480                                   unsigned short val)
481 {
482         struct atiixp *chip = ac97->private_data;
483         snd_atiixp_codec_write(chip, ac97->num, reg, val);
484 }
485 
486 /*
487  * reset AC link
488  */
489 static int snd_atiixp_aclink_reset(struct atiixp *chip)
490 {
491         int timeout;
492 
493         /* reset powerdoewn */
494         if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
495                 udelay(10);
496 
497         /* perform a software reset */
498         atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
499         atiixp_read(chip, CMD);
500         udelay(10);
501         atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
502     
503         timeout = 10;
504         while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
505                 /* do a hard reset */
506                 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
507                               ATI_REG_CMD_AC_SYNC);
508                 atiixp_read(chip, CMD);
509                 mdelay(1);
510                 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
511                 if (!--timeout) {
512                         dev_err(chip->card->dev, "codec reset timeout\n");
513                         break;
514                 }
515         }
516 
517         /* deassert RESET and assert SYNC to make sure */
518         atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
519                       ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
520 
521         return 0;
522 }
523 
524 #ifdef CONFIG_PM_SLEEP
525 static int snd_atiixp_aclink_down(struct atiixp *chip)
526 {
527         // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
528         //      return -EBUSY;
529         atiixp_update(chip, CMD,
530                      ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
531                      ATI_REG_CMD_POWERDOWN);
532         return 0;
533 }
534 #endif
535 
536 /*
537  * auto-detection of codecs
538  *
539  * the IXP chip can generate interrupts for the non-existing codecs.
540  * NEW_FRAME interrupt is used to make sure that the interrupt is generated
541  * even if all three codecs are connected.
542  */
543 
544 #define ALL_CODEC_NOT_READY \
545             (ATI_REG_ISR_CODEC0_NOT_READY |\
546              ATI_REG_ISR_CODEC1_NOT_READY |\
547              ATI_REG_ISR_CODEC2_NOT_READY)
548 #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
549 
550 static int ac97_probing_bugs(struct pci_dev *pci)
551 {
552         const struct snd_pci_quirk *q;
553 
554         q = snd_pci_quirk_lookup(pci, atiixp_quirks);
555         if (q) {
556                 dev_dbg(&pci->dev, "atiixp quirk for %s.  Forcing codec %d\n",
557                         snd_pci_quirk_name(q), q->value);
558                 return q->value;
559         }
560         /* this hardware doesn't need workarounds.  Probe for codec */
561         return -1;
562 }
563 
564 static int snd_atiixp_codec_detect(struct atiixp *chip)
565 {
566         int timeout;
567 
568         chip->codec_not_ready_bits = 0;
569         if (ac97_codec == -1)
570                 ac97_codec = ac97_probing_bugs(chip->pci);
571         if (ac97_codec >= 0) {
572                 chip->codec_not_ready_bits |= 
573                         CODEC_CHECK_BITS ^ (1 << (ac97_codec + 10));
574                 return 0;
575         }
576 
577         atiixp_write(chip, IER, CODEC_CHECK_BITS);
578         /* wait for the interrupts */
579         timeout = 50;
580         while (timeout-- > 0) {
581                 mdelay(1);
582                 if (chip->codec_not_ready_bits)
583                         break;
584         }
585         atiixp_write(chip, IER, 0); /* disable irqs */
586 
587         if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
588                 dev_err(chip->card->dev, "no codec detected!\n");
589                 return -ENXIO;
590         }
591         return 0;
592 }
593 
594 
595 /*
596  * enable DMA and irqs
597  */
598 static int snd_atiixp_chip_start(struct atiixp *chip)
599 {
600         unsigned int reg;
601 
602         /* set up spdif, enable burst mode */
603         reg = atiixp_read(chip, CMD);
604         reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT;
605         reg |= ATI_REG_CMD_BURST_EN;
606         atiixp_write(chip, CMD, reg);
607 
608         reg = atiixp_read(chip, SPDF_CMD);
609         reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH);
610         atiixp_write(chip, SPDF_CMD, reg);
611 
612         /* clear all interrupt source */
613         atiixp_write(chip, ISR, 0xffffffff);
614         /* enable irqs */
615         atiixp_write(chip, IER,
616                      ATI_REG_IER_IO_STATUS_EN |
617                      ATI_REG_IER_IN_XRUN_EN |
618                      ATI_REG_IER_OUT_XRUN_EN |
619                      ATI_REG_IER_SPDF_XRUN_EN |
620                      ATI_REG_IER_SPDF_STATUS_EN);
621         return 0;
622 }
623 
624 
625 /*
626  * disable DMA and IRQs
627  */
628 static int snd_atiixp_chip_stop(struct atiixp *chip)
629 {
630         /* clear interrupt source */
631         atiixp_write(chip, ISR, atiixp_read(chip, ISR));
632         /* disable irqs */
633         atiixp_write(chip, IER, 0);
634         return 0;
635 }
636 
637 
638 /*
639  * PCM section
640  */
641 
642 /*
643  * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
644  * position.  when SG-buffer is implemented, the offset must be calculated
645  * correctly...
646  */
647 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream)
648 {
649         struct atiixp *chip = snd_pcm_substream_chip(substream);
650         struct snd_pcm_runtime *runtime = substream->runtime;
651         struct atiixp_dma *dma = runtime->private_data;
652         unsigned int curptr;
653         int timeout = 1000;
654 
655         while (timeout--) {
656                 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
657                 if (curptr < dma->buf_addr)
658                         continue;
659                 curptr -= dma->buf_addr;
660                 if (curptr >= dma->buf_bytes)
661                         continue;
662                 return bytes_to_frames(runtime, curptr);
663         }
664         dev_dbg(chip->card->dev, "invalid DMA pointer read 0x%x (buf=%x)\n",
665                    readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
666         return 0;
667 }
668 
669 /*
670  * XRUN detected, and stop the PCM substream
671  */
672 static void snd_atiixp_xrun_dma(struct atiixp *chip, struct atiixp_dma *dma)
673 {
674         if (! dma->substream || ! dma->running)
675                 return;
676         dev_dbg(chip->card->dev, "XRUN detected (DMA %d)\n", dma->ops->type);
677         snd_pcm_stop_xrun(dma->substream);
678 }
679 
680 /*
681  * the period ack.  update the substream.
682  */
683 static void snd_atiixp_update_dma(struct atiixp *chip, struct atiixp_dma *dma)
684 {
685         if (! dma->substream || ! dma->running)
686                 return;
687         snd_pcm_period_elapsed(dma->substream);
688 }
689 
690 /* set BUS_BUSY interrupt bit if any DMA is running */
691 /* call with spinlock held */
692 static void snd_atiixp_check_bus_busy(struct atiixp *chip)
693 {
694         unsigned int bus_busy;
695         if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN |
696                                       ATI_REG_CMD_RECEIVE_EN |
697                                       ATI_REG_CMD_SPDF_OUT_EN))
698                 bus_busy = ATI_REG_IER_SET_BUS_BUSY;
699         else
700                 bus_busy = 0;
701         atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy);
702 }
703 
704 /* common trigger callback
705  * calling the lowlevel callbacks in it
706  */
707 static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
708 {
709         struct atiixp *chip = snd_pcm_substream_chip(substream);
710         struct atiixp_dma *dma = substream->runtime->private_data;
711         int err = 0;
712 
713         if (snd_BUG_ON(!dma->ops->enable_transfer ||
714                        !dma->ops->flush_dma))
715                 return -EINVAL;
716 
717         spin_lock(&chip->reg_lock);
718         switch (cmd) {
719         case SNDRV_PCM_TRIGGER_START:
720         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
721         case SNDRV_PCM_TRIGGER_RESUME:
722                 if (dma->running && dma->suspended &&
723                     cmd == SNDRV_PCM_TRIGGER_RESUME)
724                         writel(dma->saved_curptr, chip->remap_addr +
725                                dma->ops->dt_cur);
726                 dma->ops->enable_transfer(chip, 1);
727                 dma->running = 1;
728                 dma->suspended = 0;
729                 break;
730         case SNDRV_PCM_TRIGGER_STOP:
731         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
732         case SNDRV_PCM_TRIGGER_SUSPEND:
733                 dma->suspended = cmd == SNDRV_PCM_TRIGGER_SUSPEND;
734                 if (dma->running && dma->suspended)
735                         dma->saved_curptr = readl(chip->remap_addr +
736                                                   dma->ops->dt_cur);
737                 dma->ops->enable_transfer(chip, 0);
738                 dma->running = 0;
739                 break;
740         default:
741                 err = -EINVAL;
742                 break;
743         }
744         if (! err) {
745                 snd_atiixp_check_bus_busy(chip);
746                 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
747                         dma->ops->flush_dma(chip);
748                         snd_atiixp_check_bus_busy(chip);
749                 }
750         }
751         spin_unlock(&chip->reg_lock);
752         return err;
753 }
754 
755 
756 /*
757  * lowlevel callbacks for each DMA type
758  *
759  * every callback is supposed to be called in chip->reg_lock spinlock
760  */
761 
762 /* flush FIFO of analog OUT DMA */
763 static void atiixp_out_flush_dma(struct atiixp *chip)
764 {
765         atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
766 }
767 
768 /* enable/disable analog OUT DMA */
769 static void atiixp_out_enable_dma(struct atiixp *chip, int on)
770 {
771         unsigned int data;
772         data = atiixp_read(chip, CMD);
773         if (on) {
774                 if (data & ATI_REG_CMD_OUT_DMA_EN)
775                         return;
776                 atiixp_out_flush_dma(chip);
777                 data |= ATI_REG_CMD_OUT_DMA_EN;
778         } else
779                 data &= ~ATI_REG_CMD_OUT_DMA_EN;
780         atiixp_write(chip, CMD, data);
781 }
782 
783 /* start/stop transfer over OUT DMA */
784 static void atiixp_out_enable_transfer(struct atiixp *chip, int on)
785 {
786         atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN,
787                       on ? ATI_REG_CMD_SEND_EN : 0);
788 }
789 
790 /* enable/disable analog IN DMA */
791 static void atiixp_in_enable_dma(struct atiixp *chip, int on)
792 {
793         atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN,
794                       on ? ATI_REG_CMD_IN_DMA_EN : 0);
795 }
796 
797 /* start/stop analog IN DMA */
798 static void atiixp_in_enable_transfer(struct atiixp *chip, int on)
799 {
800         if (on) {
801                 unsigned int data = atiixp_read(chip, CMD);
802                 if (! (data & ATI_REG_CMD_RECEIVE_EN)) {
803                         data |= ATI_REG_CMD_RECEIVE_EN;
804 #if 0 /* FIXME: this causes the endless loop */
805                         /* wait until slot 3/4 are finished */
806                         while ((atiixp_read(chip, COUNTER) &
807                                 ATI_REG_COUNTER_SLOT) != 5)
808                                 ;
809 #endif
810                         atiixp_write(chip, CMD, data);
811                 }
812         } else
813                 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0);
814 }
815 
816 /* flush FIFO of analog IN DMA */
817 static void atiixp_in_flush_dma(struct atiixp *chip)
818 {
819         atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
820 }
821 
822 /* enable/disable SPDIF OUT DMA */
823 static void atiixp_spdif_enable_dma(struct atiixp *chip, int on)
824 {
825         atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN,
826                       on ? ATI_REG_CMD_SPDF_DMA_EN : 0);
827 }
828 
829 /* start/stop SPDIF OUT DMA */
830 static void atiixp_spdif_enable_transfer(struct atiixp *chip, int on)
831 {
832         unsigned int data;
833         data = atiixp_read(chip, CMD);
834         if (on)
835                 data |= ATI_REG_CMD_SPDF_OUT_EN;
836         else
837                 data &= ~ATI_REG_CMD_SPDF_OUT_EN;
838         atiixp_write(chip, CMD, data);
839 }
840 
841 /* flush FIFO of SPDIF OUT DMA */
842 static void atiixp_spdif_flush_dma(struct atiixp *chip)
843 {
844         int timeout;
845 
846         /* DMA off, transfer on */
847         atiixp_spdif_enable_dma(chip, 0);
848         atiixp_spdif_enable_transfer(chip, 1);
849         
850         timeout = 100;
851         do {
852                 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED))
853                         break;
854                 udelay(1);
855         } while (timeout-- > 0);
856 
857         atiixp_spdif_enable_transfer(chip, 0);
858 }
859 
860 /* set up slots and formats for SPDIF OUT */
861 static int snd_atiixp_spdif_prepare(struct snd_pcm_substream *substream)
862 {
863         struct atiixp *chip = snd_pcm_substream_chip(substream);
864 
865         spin_lock_irq(&chip->reg_lock);
866         if (chip->spdif_over_aclink) {
867                 unsigned int data;
868                 /* enable slots 10/11 */
869                 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK,
870                               ATI_REG_CMD_SPDF_CONFIG_01);
871                 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
872                 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
873                         ATI_REG_OUT_DMA_SLOT_BIT(11);
874                 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
875                 atiixp_write(chip, OUT_DMA_SLOT, data);
876                 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
877                               substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
878                               ATI_REG_CMD_INTERLEAVE_OUT : 0);
879         } else {
880                 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0);
881                 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0);
882         }
883         spin_unlock_irq(&chip->reg_lock);
884         return 0;
885 }
886 
887 /* set up slots and formats for analog OUT */
888 static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream)
889 {
890         struct atiixp *chip = snd_pcm_substream_chip(substream);
891         unsigned int data;
892 
893         spin_lock_irq(&chip->reg_lock);
894         data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
895         switch (substream->runtime->channels) {
896         case 8:
897                 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
898                         ATI_REG_OUT_DMA_SLOT_BIT(11);
899                 /* fall through */
900         case 6:
901                 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
902                         ATI_REG_OUT_DMA_SLOT_BIT(8);
903                 /* fall through */
904         case 4:
905                 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
906                         ATI_REG_OUT_DMA_SLOT_BIT(9);
907                 /* fall through */
908         default:
909                 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
910                         ATI_REG_OUT_DMA_SLOT_BIT(4);
911                 break;
912         }
913 
914         /* set output threshold */
915         data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
916         atiixp_write(chip, OUT_DMA_SLOT, data);
917 
918         atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
919                       substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
920                       ATI_REG_CMD_INTERLEAVE_OUT : 0);
921 
922         /*
923          * enable 6 channel re-ordering bit if needed
924          */
925         atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN,
926                       substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0);
927     
928         spin_unlock_irq(&chip->reg_lock);
929         return 0;
930 }
931 
932 /* set up slots and formats for analog IN */
933 static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream)
934 {
935         struct atiixp *chip = snd_pcm_substream_chip(substream);
936 
937         spin_lock_irq(&chip->reg_lock);
938         atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN,
939                       substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
940                       ATI_REG_CMD_INTERLEAVE_IN : 0);
941         spin_unlock_irq(&chip->reg_lock);
942         return 0;
943 }
944 
945 /*
946  * hw_params - allocate the buffer and set up buffer descriptors
947  */
948 static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream,
949                                     struct snd_pcm_hw_params *hw_params)
950 {
951         struct atiixp *chip = snd_pcm_substream_chip(substream);
952         struct atiixp_dma *dma = substream->runtime->private_data;
953         int err;
954 
955         err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
956         if (err < 0)
957                 return err;
958         dma->buf_addr = substream->runtime->dma_addr;
959         dma->buf_bytes = params_buffer_bytes(hw_params);
960 
961         err = atiixp_build_dma_packets(chip, dma, substream,
962                                        params_periods(hw_params),
963                                        params_period_bytes(hw_params));
964         if (err < 0)
965                 return err;
966 
967         if (dma->ac97_pcm_type >= 0) {
968                 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
969                 /* PCM is bound to AC97 codec(s)
970                  * set up the AC97 codecs
971                  */
972                 if (dma->pcm_open_flag) {
973                         snd_ac97_pcm_close(pcm);
974                         dma->pcm_open_flag = 0;
975                 }
976                 err = snd_ac97_pcm_open(pcm, params_rate(hw_params),
977                                         params_channels(hw_params),
978                                         pcm->r[0].slots);
979                 if (err >= 0)
980                         dma->pcm_open_flag = 1;
981         }
982 
983         return err;
984 }
985 
986 static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream)
987 {
988         struct atiixp *chip = snd_pcm_substream_chip(substream);
989         struct atiixp_dma *dma = substream->runtime->private_data;
990 
991         if (dma->pcm_open_flag) {
992                 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
993                 snd_ac97_pcm_close(pcm);
994                 dma->pcm_open_flag = 0;
995         }
996         atiixp_clear_dma_packets(chip, dma, substream);
997         snd_pcm_lib_free_pages(substream);
998         return 0;
999 }
1000 
1001 
1002 /*
1003  * pcm hardware definition, identical for all DMA types
1004  */
1005 static const struct snd_pcm_hardware snd_atiixp_pcm_hw =
1006 {
1007         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1008                                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
1009                                  SNDRV_PCM_INFO_PAUSE |
1010                                  SNDRV_PCM_INFO_RESUME |
1011                                  SNDRV_PCM_INFO_MMAP_VALID),
1012         .formats =              SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
1013         .rates =                SNDRV_PCM_RATE_48000,
1014         .rate_min =             48000,
1015         .rate_max =             48000,
1016         .channels_min =         2,
1017         .channels_max =         2,
1018         .buffer_bytes_max =     256 * 1024,
1019         .period_bytes_min =     32,
1020         .period_bytes_max =     128 * 1024,
1021         .periods_min =          2,
1022         .periods_max =          ATI_MAX_DESCRIPTORS,
1023 };
1024 
1025 static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream,
1026                                struct atiixp_dma *dma, int pcm_type)
1027 {
1028         struct atiixp *chip = snd_pcm_substream_chip(substream);
1029         struct snd_pcm_runtime *runtime = substream->runtime;
1030         int err;
1031 
1032         if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
1033                 return -EINVAL;
1034 
1035         if (dma->opened)
1036                 return -EBUSY;
1037         dma->substream = substream;
1038         runtime->hw = snd_atiixp_pcm_hw;
1039         dma->ac97_pcm_type = pcm_type;
1040         if (pcm_type >= 0) {
1041                 runtime->hw.rates = chip->pcms[pcm_type]->rates;
1042                 snd_pcm_limit_hw_rates(runtime);
1043         } else {
1044                 /* direct SPDIF */
1045                 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE;
1046         }
1047         if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1048                 return err;
1049         runtime->private_data = dma;
1050 
1051         /* enable DMA bits */
1052         spin_lock_irq(&chip->reg_lock);
1053         dma->ops->enable_dma(chip, 1);
1054         spin_unlock_irq(&chip->reg_lock);
1055         dma->opened = 1;
1056 
1057         return 0;
1058 }
1059 
1060 static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream,
1061                                 struct atiixp_dma *dma)
1062 {
1063         struct atiixp *chip = snd_pcm_substream_chip(substream);
1064         /* disable DMA bits */
1065         if (snd_BUG_ON(!dma->ops || !dma->ops->enable_dma))
1066                 return -EINVAL;
1067         spin_lock_irq(&chip->reg_lock);
1068         dma->ops->enable_dma(chip, 0);
1069         spin_unlock_irq(&chip->reg_lock);
1070         dma->substream = NULL;
1071         dma->opened = 0;
1072         return 0;
1073 }
1074 
1075 /*
1076  */
1077 static int snd_atiixp_playback_open(struct snd_pcm_substream *substream)
1078 {
1079         struct atiixp *chip = snd_pcm_substream_chip(substream);
1080         int err;
1081 
1082         mutex_lock(&chip->open_mutex);
1083         err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
1084         mutex_unlock(&chip->open_mutex);
1085         if (err < 0)
1086                 return err;
1087         substream->runtime->hw.channels_max = chip->max_channels;
1088         if (chip->max_channels > 2)
1089                 /* channels must be even */
1090                 snd_pcm_hw_constraint_step(substream->runtime, 0,
1091                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1092         return 0;
1093 }
1094 
1095 static int snd_atiixp_playback_close(struct snd_pcm_substream *substream)
1096 {
1097         struct atiixp *chip = snd_pcm_substream_chip(substream);
1098         int err;
1099         mutex_lock(&chip->open_mutex);
1100         err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1101         mutex_unlock(&chip->open_mutex);
1102         return err;
1103 }
1104 
1105 static int snd_atiixp_capture_open(struct snd_pcm_substream *substream)
1106 {
1107         struct atiixp *chip = snd_pcm_substream_chip(substream);
1108         return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
1109 }
1110 
1111 static int snd_atiixp_capture_close(struct snd_pcm_substream *substream)
1112 {
1113         struct atiixp *chip = snd_pcm_substream_chip(substream);
1114         return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
1115 }
1116 
1117 static int snd_atiixp_spdif_open(struct snd_pcm_substream *substream)
1118 {
1119         struct atiixp *chip = snd_pcm_substream_chip(substream);
1120         int err;
1121         mutex_lock(&chip->open_mutex);
1122         if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */
1123                 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2);
1124         else
1125                 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1);
1126         mutex_unlock(&chip->open_mutex);
1127         return err;
1128 }
1129 
1130 static int snd_atiixp_spdif_close(struct snd_pcm_substream *substream)
1131 {
1132         struct atiixp *chip = snd_pcm_substream_chip(substream);
1133         int err;
1134         mutex_lock(&chip->open_mutex);
1135         if (chip->spdif_over_aclink)
1136                 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1137         else
1138                 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]);
1139         mutex_unlock(&chip->open_mutex);
1140         return err;
1141 }
1142 
1143 /* AC97 playback */
1144 static const struct snd_pcm_ops snd_atiixp_playback_ops = {
1145         .open =         snd_atiixp_playback_open,
1146         .close =        snd_atiixp_playback_close,
1147         .ioctl =        snd_pcm_lib_ioctl,
1148         .hw_params =    snd_atiixp_pcm_hw_params,
1149         .hw_free =      snd_atiixp_pcm_hw_free,
1150         .prepare =      snd_atiixp_playback_prepare,
1151         .trigger =      snd_atiixp_pcm_trigger,
1152         .pointer =      snd_atiixp_pcm_pointer,
1153 };
1154 
1155 /* AC97 capture */
1156 static const struct snd_pcm_ops snd_atiixp_capture_ops = {
1157         .open =         snd_atiixp_capture_open,
1158         .close =        snd_atiixp_capture_close,
1159         .ioctl =        snd_pcm_lib_ioctl,
1160         .hw_params =    snd_atiixp_pcm_hw_params,
1161         .hw_free =      snd_atiixp_pcm_hw_free,
1162         .prepare =      snd_atiixp_capture_prepare,
1163         .trigger =      snd_atiixp_pcm_trigger,
1164         .pointer =      snd_atiixp_pcm_pointer,
1165 };
1166 
1167 /* SPDIF playback */
1168 static const struct snd_pcm_ops snd_atiixp_spdif_ops = {
1169         .open =         snd_atiixp_spdif_open,
1170         .close =        snd_atiixp_spdif_close,
1171         .ioctl =        snd_pcm_lib_ioctl,
1172         .hw_params =    snd_atiixp_pcm_hw_params,
1173         .hw_free =      snd_atiixp_pcm_hw_free,
1174         .prepare =      snd_atiixp_spdif_prepare,
1175         .trigger =      snd_atiixp_pcm_trigger,
1176         .pointer =      snd_atiixp_pcm_pointer,
1177 };
1178 
1179 static const struct ac97_pcm atiixp_pcm_defs[] = {
1180         /* front PCM */
1181         {
1182                 .exclusive = 1,
1183                 .r = {  {
1184                                 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1185                                          (1 << AC97_SLOT_PCM_RIGHT) |
1186                                          (1 << AC97_SLOT_PCM_CENTER) |
1187                                          (1 << AC97_SLOT_PCM_SLEFT) |
1188                                          (1 << AC97_SLOT_PCM_SRIGHT) |
1189                                          (1 << AC97_SLOT_LFE)
1190                         }
1191                 }
1192         },
1193         /* PCM IN #1 */
1194         {
1195                 .stream = 1,
1196                 .exclusive = 1,
1197                 .r = {  {
1198                                 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1199                                          (1 << AC97_SLOT_PCM_RIGHT)
1200                         }
1201                 }
1202         },
1203         /* S/PDIF OUT (optional) */
1204         {
1205                 .exclusive = 1,
1206                 .spdif = 1,
1207                 .r = {  {
1208                                 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) |
1209                                          (1 << AC97_SLOT_SPDIF_RIGHT2)
1210                         }
1211                 }
1212         },
1213 };
1214 
1215 static const struct atiixp_dma_ops snd_atiixp_playback_dma_ops = {
1216         .type = ATI_DMA_PLAYBACK,
1217         .llp_offset = ATI_REG_OUT_DMA_LINKPTR,
1218         .dt_cur = ATI_REG_OUT_DMA_DT_CUR,
1219         .enable_dma = atiixp_out_enable_dma,
1220         .enable_transfer = atiixp_out_enable_transfer,
1221         .flush_dma = atiixp_out_flush_dma,
1222 };
1223         
1224 static const struct atiixp_dma_ops snd_atiixp_capture_dma_ops = {
1225         .type = ATI_DMA_CAPTURE,
1226         .llp_offset = ATI_REG_IN_DMA_LINKPTR,
1227         .dt_cur = ATI_REG_IN_DMA_DT_CUR,
1228         .enable_dma = atiixp_in_enable_dma,
1229         .enable_transfer = atiixp_in_enable_transfer,
1230         .flush_dma = atiixp_in_flush_dma,
1231 };
1232         
1233 static const struct atiixp_dma_ops snd_atiixp_spdif_dma_ops = {
1234         .type = ATI_DMA_SPDIF,
1235         .llp_offset = ATI_REG_SPDF_DMA_LINKPTR,
1236         .dt_cur = ATI_REG_SPDF_DMA_DT_CUR,
1237         .enable_dma = atiixp_spdif_enable_dma,
1238         .enable_transfer = atiixp_spdif_enable_transfer,
1239         .flush_dma = atiixp_spdif_flush_dma,
1240 };
1241         
1242 
1243 static int snd_atiixp_pcm_new(struct atiixp *chip)
1244 {
1245         struct snd_pcm *pcm;
1246         struct snd_pcm_chmap *chmap;
1247         struct snd_ac97_bus *pbus = chip->ac97_bus;
1248         int err, i, num_pcms;
1249 
1250         /* initialize constants */
1251         chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
1252         chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
1253         if (! chip->spdif_over_aclink)
1254                 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops;
1255 
1256         /* assign AC97 pcm */
1257         if (chip->spdif_over_aclink)
1258                 num_pcms = 3;
1259         else
1260                 num_pcms = 2;
1261         err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs);
1262         if (err < 0)
1263                 return err;
1264         for (i = 0; i < num_pcms; i++)
1265                 chip->pcms[i] = &pbus->pcms[i];
1266 
1267         chip->max_channels = 2;
1268         if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
1269                 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE))
1270                         chip->max_channels = 6;
1271                 else
1272                         chip->max_channels = 4;
1273         }
1274 
1275         /* PCM #0: analog I/O */
1276         err = snd_pcm_new(chip->card, "ATI IXP AC97",
1277                           ATI_PCMDEV_ANALOG, 1, 1, &pcm);
1278         if (err < 0)
1279                 return err;
1280         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
1281         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
1282         pcm->private_data = chip;
1283         strcpy(pcm->name, "ATI IXP AC97");
1284         chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
1285 
1286         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1287                                               snd_dma_pci_data(chip->pci),
1288                                               64*1024, 128*1024);
1289 
1290         err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1291                                      snd_pcm_alt_chmaps, chip->max_channels, 0,
1292                                      &chmap);
1293         if (err < 0)
1294                 return err;
1295         chmap->channel_mask = SND_PCM_CHMAP_MASK_2468;
1296         chip->ac97[0]->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap;
1297 
1298         /* no SPDIF support on codec? */
1299         if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates)
1300                 return 0;
1301                 
1302         /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */
1303         if (chip->pcms[ATI_PCM_SPDIF])
1304                 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000;
1305 
1306         /* PCM #1: spdif playback */
1307         err = snd_pcm_new(chip->card, "ATI IXP IEC958",
1308                           ATI_PCMDEV_DIGITAL, 1, 0, &pcm);
1309         if (err < 0)
1310                 return err;
1311         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops);
1312         pcm->private_data = chip;
1313         if (chip->spdif_over_aclink)
1314                 strcpy(pcm->name, "ATI IXP IEC958 (AC97)");
1315         else
1316                 strcpy(pcm->name, "ATI IXP IEC958 (Direct)");
1317         chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm;
1318 
1319         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1320                                               snd_dma_pci_data(chip->pci),
1321                                               64*1024, 128*1024);
1322 
1323         /* pre-select AC97 SPDIF slots 10/11 */
1324         for (i = 0; i < NUM_ATI_CODECS; i++) {
1325                 if (chip->ac97[i])
1326                         snd_ac97_update_bits(chip->ac97[i],
1327                                              AC97_EXTENDED_STATUS,
1328                                              0x03 << 4, 0x03 << 4);
1329         }
1330 
1331         return 0;
1332 }
1333 
1334 
1335 
1336 /*
1337  * interrupt handler
1338  */
1339 static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id)
1340 {
1341         struct atiixp *chip = dev_id;
1342         unsigned int status;
1343 
1344         status = atiixp_read(chip, ISR);
1345 
1346         if (! status)
1347                 return IRQ_NONE;
1348 
1349         /* process audio DMA */
1350         if (status & ATI_REG_ISR_OUT_XRUN)
1351                 snd_atiixp_xrun_dma(chip,  &chip->dmas[ATI_DMA_PLAYBACK]);
1352         else if (status & ATI_REG_ISR_OUT_STATUS)
1353                 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1354         if (status & ATI_REG_ISR_IN_XRUN)
1355                 snd_atiixp_xrun_dma(chip,  &chip->dmas[ATI_DMA_CAPTURE]);
1356         else if (status & ATI_REG_ISR_IN_STATUS)
1357                 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1358         if (! chip->spdif_over_aclink) {
1359                 if (status & ATI_REG_ISR_SPDF_XRUN)
1360                         snd_atiixp_xrun_dma(chip,  &chip->dmas[ATI_DMA_SPDIF]);
1361                 else if (status & ATI_REG_ISR_SPDF_STATUS)
1362                         snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1363         }
1364 
1365         /* for codec detection */
1366         if (status & CODEC_CHECK_BITS) {
1367                 unsigned int detected;
1368                 detected = status & CODEC_CHECK_BITS;
1369                 spin_lock(&chip->reg_lock);
1370                 chip->codec_not_ready_bits |= detected;
1371                 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1372                 spin_unlock(&chip->reg_lock);
1373         }
1374 
1375         /* ack */
1376         atiixp_write(chip, ISR, status);
1377 
1378         return IRQ_HANDLED;
1379 }
1380 
1381 
1382 /*
1383  * ac97 mixer section
1384  */
1385 
1386 static const struct ac97_quirk ac97_quirks[] = {
1387         {
1388                 .subvendor = 0x103c,
1389                 .subdevice = 0x006b,
1390                 .name = "HP Pavilion ZV5030US",
1391                 .type = AC97_TUNE_MUTE_LED
1392         },
1393         {
1394                 .subvendor = 0x103c,
1395                 .subdevice = 0x308b,
1396                 .name = "HP nx6125",
1397                 .type = AC97_TUNE_MUTE_LED
1398         },
1399         {
1400                 .subvendor = 0x103c,
1401                 .subdevice = 0x3091,
1402                 .name = "unknown HP",
1403                 .type = AC97_TUNE_MUTE_LED
1404         },
1405         { } /* terminator */
1406 };
1407 
1408 static int snd_atiixp_mixer_new(struct atiixp *chip, int clock,
1409                                 const char *quirk_override)
1410 {
1411         struct snd_ac97_bus *pbus;
1412         struct snd_ac97_template ac97;
1413         int i, err;
1414         int codec_count;
1415         static struct snd_ac97_bus_ops ops = {
1416                 .write = snd_atiixp_ac97_write,
1417                 .read = snd_atiixp_ac97_read,
1418         };
1419         static unsigned int codec_skip[NUM_ATI_CODECS] = {
1420                 ATI_REG_ISR_CODEC0_NOT_READY,
1421                 ATI_REG_ISR_CODEC1_NOT_READY,
1422                 ATI_REG_ISR_CODEC2_NOT_READY,
1423         };
1424 
1425         if (snd_atiixp_codec_detect(chip) < 0)
1426                 return -ENXIO;
1427 
1428         if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1429                 return err;
1430         pbus->clock = clock;
1431         chip->ac97_bus = pbus;
1432 
1433         codec_count = 0;
1434         for (i = 0; i < NUM_ATI_CODECS; i++) {
1435                 if (chip->codec_not_ready_bits & codec_skip[i])
1436                         continue;
1437                 memset(&ac97, 0, sizeof(ac97));
1438                 ac97.private_data = chip;
1439                 ac97.pci = chip->pci;
1440                 ac97.num = i;
1441                 ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE;
1442                 if (! chip->spdif_over_aclink)
1443                         ac97.scaps |= AC97_SCAP_NO_SPDIF;
1444                 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1445                         chip->ac97[i] = NULL; /* to be sure */
1446                         dev_dbg(chip->card->dev,
1447                                 "codec %d not available for audio\n", i);
1448                         continue;
1449                 }
1450                 codec_count++;
1451         }
1452 
1453         if (! codec_count) {
1454                 dev_err(chip->card->dev, "no codec available\n");
1455                 return -ENODEV;
1456         }
1457 
1458         snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override);
1459 
1460         return 0;
1461 }
1462 
1463 
1464 #ifdef CONFIG_PM_SLEEP
1465 /*
1466  * power management
1467  */
1468 static int snd_atiixp_suspend(struct device *dev)
1469 {
1470         struct snd_card *card = dev_get_drvdata(dev);
1471         struct atiixp *chip = card->private_data;
1472         int i;
1473 
1474         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1475         for (i = 0; i < NUM_ATI_CODECS; i++)
1476                 snd_ac97_suspend(chip->ac97[i]);
1477         snd_atiixp_aclink_down(chip);
1478         snd_atiixp_chip_stop(chip);
1479         return 0;
1480 }
1481 
1482 static int snd_atiixp_resume(struct device *dev)
1483 {
1484         struct snd_card *card = dev_get_drvdata(dev);
1485         struct atiixp *chip = card->private_data;
1486         int i;
1487 
1488         snd_atiixp_aclink_reset(chip);
1489         snd_atiixp_chip_start(chip);
1490 
1491         for (i = 0; i < NUM_ATI_CODECS; i++)
1492                 snd_ac97_resume(chip->ac97[i]);
1493 
1494         for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1495                 if (chip->pcmdevs[i]) {
1496                         struct atiixp_dma *dma = &chip->dmas[i];
1497                         if (dma->substream && dma->suspended) {
1498                                 dma->ops->enable_dma(chip, 1);
1499                                 dma->substream->ops->prepare(dma->substream);
1500                                 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
1501                                        chip->remap_addr + dma->ops->llp_offset);
1502                         }
1503                 }
1504 
1505         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1506         return 0;
1507 }
1508 
1509 static SIMPLE_DEV_PM_OPS(snd_atiixp_pm, snd_atiixp_suspend, snd_atiixp_resume);
1510 #define SND_ATIIXP_PM_OPS       &snd_atiixp_pm
1511 #else
1512 #define SND_ATIIXP_PM_OPS       NULL
1513 #endif /* CONFIG_PM_SLEEP */
1514 
1515 
1516 /*
1517  * proc interface for register dump
1518  */
1519 
1520 static void snd_atiixp_proc_read(struct snd_info_entry *entry,
1521                                  struct snd_info_buffer *buffer)
1522 {
1523         struct atiixp *chip = entry->private_data;
1524         int i;
1525 
1526         for (i = 0; i < 256; i += 4)
1527                 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1528 }
1529 
1530 static void snd_atiixp_proc_init(struct atiixp *chip)
1531 {
1532         snd_card_ro_proc_new(chip->card, "atiixp", chip, snd_atiixp_proc_read);
1533 }
1534 
1535 
1536 /*
1537  * destructor
1538  */
1539 
1540 static int snd_atiixp_free(struct atiixp *chip)
1541 {
1542         if (chip->irq < 0)
1543                 goto __hw_end;
1544         snd_atiixp_chip_stop(chip);
1545 
1546       __hw_end:
1547         if (chip->irq >= 0)
1548                 free_irq(chip->irq, chip);
1549         iounmap(chip->remap_addr);
1550         pci_release_regions(chip->pci);
1551         pci_disable_device(chip->pci);
1552         kfree(chip);
1553         return 0;
1554 }
1555 
1556 static int snd_atiixp_dev_free(struct snd_device *device)
1557 {
1558         struct atiixp *chip = device->device_data;
1559         return snd_atiixp_free(chip);
1560 }
1561 
1562 /*
1563  * constructor for chip instance
1564  */
1565 static int snd_atiixp_create(struct snd_card *card,
1566                              struct pci_dev *pci,
1567                              struct atiixp **r_chip)
1568 {
1569         static struct snd_device_ops ops = {
1570                 .dev_free =     snd_atiixp_dev_free,
1571         };
1572         struct atiixp *chip;
1573         int err;
1574 
1575         if ((err = pci_enable_device(pci)) < 0)
1576                 return err;
1577 
1578         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1579         if (chip == NULL) {
1580                 pci_disable_device(pci);
1581                 return -ENOMEM;
1582         }
1583 
1584         spin_lock_init(&chip->reg_lock);
1585         mutex_init(&chip->open_mutex);
1586         chip->card = card;
1587         chip->pci = pci;
1588         chip->irq = -1;
1589         if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) {
1590                 pci_disable_device(pci);
1591                 kfree(chip);
1592                 return err;
1593         }
1594         chip->addr = pci_resource_start(pci, 0);
1595         chip->remap_addr = pci_ioremap_bar(pci, 0);
1596         if (chip->remap_addr == NULL) {
1597                 dev_err(card->dev, "AC'97 space ioremap problem\n");
1598                 snd_atiixp_free(chip);
1599                 return -EIO;
1600         }
1601 
1602         if (request_irq(pci->irq, snd_atiixp_interrupt, IRQF_SHARED,
1603                         KBUILD_MODNAME, chip)) {
1604                 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1605                 snd_atiixp_free(chip);
1606                 return -EBUSY;
1607         }
1608         chip->irq = pci->irq;
1609         pci_set_master(pci);
1610         synchronize_irq(chip->irq);
1611 
1612         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1613                 snd_atiixp_free(chip);
1614                 return err;
1615         }
1616 
1617         *r_chip = chip;
1618         return 0;
1619 }
1620 
1621 
1622 static int snd_atiixp_probe(struct pci_dev *pci,
1623                             const struct pci_device_id *pci_id)
1624 {
1625         struct snd_card *card;
1626         struct atiixp *chip;
1627         int err;
1628 
1629         err = snd_card_new(&pci->dev, index, id, THIS_MODULE, 0, &card);
1630         if (err < 0)
1631                 return err;
1632 
1633         strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA");
1634         strcpy(card->shortname, "ATI IXP");
1635         if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1636                 goto __error;
1637         card->private_data = chip;
1638 
1639         if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1640                 goto __error;
1641 
1642         chip->spdif_over_aclink = spdif_aclink;
1643 
1644         if ((err = snd_atiixp_mixer_new(chip, ac97_clock, ac97_quirk)) < 0)
1645                 goto __error;
1646 
1647         if ((err = snd_atiixp_pcm_new(chip)) < 0)
1648                 goto __error;
1649         
1650         snd_atiixp_proc_init(chip);
1651 
1652         snd_atiixp_chip_start(chip);
1653 
1654         snprintf(card->longname, sizeof(card->longname),
1655                  "%s rev %x with %s at %#lx, irq %i", card->shortname,
1656                  pci->revision,
1657                  chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?",
1658                  chip->addr, chip->irq);
1659 
1660         if ((err = snd_card_register(card)) < 0)
1661                 goto __error;
1662 
1663         pci_set_drvdata(pci, card);
1664         return 0;
1665 
1666  __error:
1667         snd_card_free(card);
1668         return err;
1669 }
1670 
1671 static void snd_atiixp_remove(struct pci_dev *pci)
1672 {
1673         snd_card_free(pci_get_drvdata(pci));
1674 }
1675 
1676 static struct pci_driver atiixp_driver = {
1677         .name = KBUILD_MODNAME,
1678         .id_table = snd_atiixp_ids,
1679         .probe = snd_atiixp_probe,
1680         .remove = snd_atiixp_remove,
1681         .driver = {
1682                 .pm = SND_ATIIXP_PM_OPS,
1683         },
1684 };
1685 
1686 module_pci_driver(atiixp_driver);
1687 

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