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TOMOYO Linux Cross Reference
Linux/sound/pci/emu10k1/emu10k1_main.c

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  1 /*
  2  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  3  *                   Creative Labs, Inc.
  4  *  Routines for control of EMU10K1 chips
  5  *
  6  *  Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
  7  *      Added support for Audigy 2 Value.
  8  *      Added EMU 1010 support.
  9  *      General bug fixes and enhancements.
 10  *
 11  *
 12  *  BUGS:
 13  *    --
 14  *
 15  *  TODO:
 16  *    --
 17  *
 18  *   This program is free software; you can redistribute it and/or modify
 19  *   it under the terms of the GNU General Public License as published by
 20  *   the Free Software Foundation; either version 2 of the License, or
 21  *   (at your option) any later version.
 22  *
 23  *   This program is distributed in the hope that it will be useful,
 24  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 25  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 26  *   GNU General Public License for more details.
 27  *
 28  *   You should have received a copy of the GNU General Public License
 29  *   along with this program; if not, write to the Free Software
 30  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 31  *
 32  */
 33 
 34 #include <linux/sched.h>
 35 #include <linux/kthread.h>
 36 #include <linux/delay.h>
 37 #include <linux/init.h>
 38 #include <linux/module.h>
 39 #include <linux/interrupt.h>
 40 #include <linux/pci.h>
 41 #include <linux/slab.h>
 42 #include <linux/vmalloc.h>
 43 #include <linux/mutex.h>
 44 
 45 
 46 #include <sound/core.h>
 47 #include <sound/emu10k1.h>
 48 #include <linux/firmware.h>
 49 #include "p16v.h"
 50 #include "tina2.h"
 51 #include "p17v.h"
 52 
 53 
 54 #define HANA_FILENAME "emu/hana.fw"
 55 #define DOCK_FILENAME "emu/audio_dock.fw"
 56 #define EMU1010B_FILENAME "emu/emu1010b.fw"
 57 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
 58 #define EMU0404_FILENAME "emu/emu0404.fw"
 59 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
 60 
 61 MODULE_FIRMWARE(HANA_FILENAME);
 62 MODULE_FIRMWARE(DOCK_FILENAME);
 63 MODULE_FIRMWARE(EMU1010B_FILENAME);
 64 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
 65 MODULE_FIRMWARE(EMU0404_FILENAME);
 66 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
 67 
 68 
 69 /*************************************************************************
 70  * EMU10K1 init / done
 71  *************************************************************************/
 72 
 73 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
 74 {
 75         snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
 76         snd_emu10k1_ptr_write(emu, IP, ch, 0);
 77         snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
 78         snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
 79         snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
 80         snd_emu10k1_ptr_write(emu, CPF, ch, 0);
 81         snd_emu10k1_ptr_write(emu, CCR, ch, 0);
 82 
 83         snd_emu10k1_ptr_write(emu, PSST, ch, 0);
 84         snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
 85         snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
 86         snd_emu10k1_ptr_write(emu, Z1, ch, 0);
 87         snd_emu10k1_ptr_write(emu, Z2, ch, 0);
 88         snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
 89 
 90         snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
 91         snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
 92         snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
 93         snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
 94         snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
 95         snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24);    /* 1 Hz */
 96         snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24);    /* 1 Hz */
 97         snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
 98 
 99         /*** these are last so OFF prevents writing ***/
100         snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
101         snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
102         snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
103         snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
104         snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
105 
106         /* Audigy extra stuffs */
107         if (emu->audigy) {
108                 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
109                 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
110                 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
111                 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
112                 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
113                 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
114                 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
115         }
116 }
117 
118 static unsigned int spi_dac_init[] = {
119                 0x00ff,
120                 0x02ff,
121                 0x0400,
122                 0x0520,
123                 0x0600,
124                 0x08ff,
125                 0x0aff,
126                 0x0cff,
127                 0x0eff,
128                 0x10ff,
129                 0x1200,
130                 0x1400,
131                 0x1480,
132                 0x1800,
133                 0x1aff,
134                 0x1cff,
135                 0x1e00,
136                 0x0530,
137                 0x0602,
138                 0x0622,
139                 0x1400,
140 };
141 
142 static unsigned int i2c_adc_init[][2] = {
143         { 0x17, 0x00 }, /* Reset */
144         { 0x07, 0x00 }, /* Timeout */
145         { 0x0b, 0x22 },  /* Interface control */
146         { 0x0c, 0x22 },  /* Master mode control */
147         { 0x0d, 0x08 },  /* Powerdown control */
148         { 0x0e, 0xcf },  /* Attenuation Left  0x01 = -103dB, 0xff = 24dB */
149         { 0x0f, 0xcf },  /* Attenuation Right 0.5dB steps */
150         { 0x10, 0x7b },  /* ALC Control 1 */
151         { 0x11, 0x00 },  /* ALC Control 2 */
152         { 0x12, 0x32 },  /* ALC Control 3 */
153         { 0x13, 0x00 },  /* Noise gate control */
154         { 0x14, 0xa6 },  /* Limiter control */
155         { 0x15, ADC_MUX_2 },  /* ADC Mixer control. Mic for A2ZS Notebook */
156 };
157 
158 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
159 {
160         unsigned int silent_page;
161         int ch;
162         u32 tmp;
163 
164         /* disable audio and lock cache */
165         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
166                 HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
167 
168         /* reset recording buffers */
169         snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
170         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
171         snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
172         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
173         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
174         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
175 
176         /* disable channel interrupt */
177         outl(0, emu->port + INTE);
178         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
179         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
180         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
181         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
182 
183         if (emu->audigy) {
184                 /* set SPDIF bypass mode */
185                 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
186                 /* enable rear left + rear right AC97 slots */
187                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
188                                       AC97SLOT_REAR_LEFT);
189         }
190 
191         /* init envelope engine */
192         for (ch = 0; ch < NUM_G; ch++)
193                 snd_emu10k1_voice_init(emu, ch);
194 
195         snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
196         snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
197         snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
198 
199         if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
200                 /* Hacks for Alice3 to work independent of haP16V driver */
201                 /* Setup SRCMulti_I2S SamplingRate */
202                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
203                 tmp &= 0xfffff1ff;
204                 tmp |= (0x2<<9);
205                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
206 
207                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
208                 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
209                 /* Setup SRCMulti Input Audio Enable */
210                 /* Use 0xFFFFFFFF to enable P16V sounds. */
211                 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
212 
213                 /* Enabled Phased (8-channel) P16V playback */
214                 outl(0x0201, emu->port + HCFG2);
215                 /* Set playback routing. */
216                 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
217         }
218         if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
219                 /* Hacks for Alice3 to work independent of haP16V driver */
220                 dev_info(emu->card->dev, "Audigy2 value: Special config.\n");
221                 /* Setup SRCMulti_I2S SamplingRate */
222                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
223                 tmp &= 0xfffff1ff;
224                 tmp |= (0x2<<9);
225                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
226 
227                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
228                 outl(0x600000, emu->port + 0x20);
229                 outl(0x14, emu->port + 0x24);
230 
231                 /* Setup SRCMulti Input Audio Enable */
232                 outl(0x7b0000, emu->port + 0x20);
233                 outl(0xFF000000, emu->port + 0x24);
234 
235                 /* Setup SPDIF Out Audio Enable */
236                 /* The Audigy 2 Value has a separate SPDIF out,
237                  * so no need for a mixer switch
238                  */
239                 outl(0x7a0000, emu->port + 0x20);
240                 outl(0xFF000000, emu->port + 0x24);
241                 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
242                 outl(tmp, emu->port + A_IOCFG);
243         }
244         if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
245                 int size, n;
246 
247                 size = ARRAY_SIZE(spi_dac_init);
248                 for (n = 0; n < size; n++)
249                         snd_emu10k1_spi_write(emu, spi_dac_init[n]);
250 
251                 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
252                 /* Enable GPIOs
253                  * GPIO0: Unknown
254                  * GPIO1: Speakers-enabled.
255                  * GPIO2: Unknown
256                  * GPIO3: Unknown
257                  * GPIO4: IEC958 Output on.
258                  * GPIO5: Unknown
259                  * GPIO6: Unknown
260                  * GPIO7: Unknown
261                  */
262                 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
263         }
264         if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
265                 int size, n;
266 
267                 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
268                 tmp = inl(emu->port + A_IOCFG);
269                 outl(tmp | 0x4, emu->port + A_IOCFG);  /* Set bit 2 for mic input */
270                 tmp = inl(emu->port + A_IOCFG);
271                 size = ARRAY_SIZE(i2c_adc_init);
272                 for (n = 0; n < size; n++)
273                         snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
274                 for (n = 0; n < 4; n++) {
275                         emu->i2c_capture_volume[n][0] = 0xcf;
276                         emu->i2c_capture_volume[n][1] = 0xcf;
277                 }
278         }
279 
280 
281         snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
282         snd_emu10k1_ptr_write(emu, TCB, 0, 0);  /* taken from original driver */
283         snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
284 
285         silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0);
286         for (ch = 0; ch < NUM_G; ch++) {
287                 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
288                 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
289         }
290 
291         if (emu->card_capabilities->emu_model) {
292                 outl(HCFG_AUTOMUTE_ASYNC |
293                         HCFG_EMU32_SLAVE |
294                         HCFG_AUDIOENABLE, emu->port + HCFG);
295         /*
296          *  Hokay, setup HCFG
297          *   Mute Disable Audio = 0
298          *   Lock Tank Memory = 1
299          *   Lock Sound Memory = 0
300          *   Auto Mute = 1
301          */
302         } else if (emu->audigy) {
303                 if (emu->revision == 4) /* audigy2 */
304                         outl(HCFG_AUDIOENABLE |
305                              HCFG_AC3ENABLE_CDSPDIF |
306                              HCFG_AC3ENABLE_GPSPDIF |
307                              HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
308                 else
309                         outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
310         /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
311          * e.g. card_capabilities->joystick */
312         } else if (emu->model == 0x20 ||
313             emu->model == 0xc400 ||
314             (emu->model == 0x21 && emu->revision < 6))
315                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
316         else
317                 /* With on-chip joystick */
318                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
319 
320         if (enable_ir) {        /* enable IR for SB Live */
321                 if (emu->card_capabilities->emu_model) {
322                         ;  /* Disable all access to A_IOCFG for the emu1010 */
323                 } else if (emu->card_capabilities->i2c_adc) {
324                         ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
325                 } else if (emu->audigy) {
326                         unsigned int reg = inl(emu->port + A_IOCFG);
327                         outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
328                         udelay(500);
329                         outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
330                         udelay(100);
331                         outl(reg, emu->port + A_IOCFG);
332                 } else {
333                         unsigned int reg = inl(emu->port + HCFG);
334                         outl(reg | HCFG_GPOUT2, emu->port + HCFG);
335                         udelay(500);
336                         outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
337                         udelay(100);
338                         outl(reg, emu->port + HCFG);
339                 }
340         }
341 
342         if (emu->card_capabilities->emu_model) {
343                 ;  /* Disable all access to A_IOCFG for the emu1010 */
344         } else if (emu->card_capabilities->i2c_adc) {
345                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
346         } else if (emu->audigy) {       /* enable analog output */
347                 unsigned int reg = inl(emu->port + A_IOCFG);
348                 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
349         }
350 
351         if (emu->address_mode == 0) {
352                 /* use 16M in 4G */
353                 outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG);
354         }
355 
356         return 0;
357 }
358 
359 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
360 {
361         /*
362          *  Enable the audio bit
363          */
364         outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
365 
366         /* Enable analog/digital outs on audigy */
367         if (emu->card_capabilities->emu_model) {
368                 ;  /* Disable all access to A_IOCFG for the emu1010 */
369         } else if (emu->card_capabilities->i2c_adc) {
370                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
371         } else if (emu->audigy) {
372                 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
373 
374                 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
375                         /* Unmute Analog now.  Set GPO6 to 1 for Apollo.
376                          * This has to be done after init ALice3 I2SOut beyond 48KHz.
377                          * So, sequence is important. */
378                         outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
379                 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
380                         /* Unmute Analog now. */
381                         outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
382                 } else {
383                         /* Disable routing from AC97 line out to Front speakers */
384                         outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
385                 }
386         }
387 
388 #if 0
389         {
390         unsigned int tmp;
391         /* FIXME: the following routine disables LiveDrive-II !! */
392         /* TOSLink detection */
393         emu->tos_link = 0;
394         tmp = inl(emu->port + HCFG);
395         if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
396                 outl(tmp|0x800, emu->port + HCFG);
397                 udelay(50);
398                 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
399                         emu->tos_link = 1;
400                         outl(tmp, emu->port + HCFG);
401                 }
402         }
403         }
404 #endif
405 
406         snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
407 }
408 
409 int snd_emu10k1_done(struct snd_emu10k1 *emu)
410 {
411         int ch;
412 
413         outl(0, emu->port + INTE);
414 
415         /*
416          *  Shutdown the chip
417          */
418         for (ch = 0; ch < NUM_G; ch++)
419                 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
420         for (ch = 0; ch < NUM_G; ch++) {
421                 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
422                 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
423                 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
424                 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
425         }
426 
427         /* reset recording buffers */
428         snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
429         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
430         snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
431         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
432         snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
433         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
434         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
435         snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
436         snd_emu10k1_ptr_write(emu, TCB, 0, 0);
437         if (emu->audigy)
438                 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
439         else
440                 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
441 
442         /* disable channel interrupt */
443         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
444         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
445         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
446         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
447 
448         /* disable audio and lock cache */
449         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
450         snd_emu10k1_ptr_write(emu, PTB, 0, 0);
451 
452         return 0;
453 }
454 
455 /*************************************************************************
456  * ECARD functional implementation
457  *************************************************************************/
458 
459 /* In A1 Silicon, these bits are in the HC register */
460 #define HOOKN_BIT               (1L << 12)
461 #define HANDN_BIT               (1L << 11)
462 #define PULSEN_BIT              (1L << 10)
463 
464 #define EC_GDI1                 (1 << 13)
465 #define EC_GDI0                 (1 << 14)
466 
467 #define EC_NUM_CONTROL_BITS     20
468 
469 #define EC_AC3_DATA_SELN        0x0001L
470 #define EC_EE_DATA_SEL          0x0002L
471 #define EC_EE_CNTRL_SELN        0x0004L
472 #define EC_EECLK                0x0008L
473 #define EC_EECS                 0x0010L
474 #define EC_EESDO                0x0020L
475 #define EC_TRIM_CSN             0x0040L
476 #define EC_TRIM_SCLK            0x0080L
477 #define EC_TRIM_SDATA           0x0100L
478 #define EC_TRIM_MUTEN           0x0200L
479 #define EC_ADCCAL               0x0400L
480 #define EC_ADCRSTN              0x0800L
481 #define EC_DACCAL               0x1000L
482 #define EC_DACMUTEN             0x2000L
483 #define EC_LEDN                 0x4000L
484 
485 #define EC_SPDIF0_SEL_SHIFT     15
486 #define EC_SPDIF1_SEL_SHIFT     17
487 #define EC_SPDIF0_SEL_MASK      (0x3L << EC_SPDIF0_SEL_SHIFT)
488 #define EC_SPDIF1_SEL_MASK      (0x7L << EC_SPDIF1_SEL_SHIFT)
489 #define EC_SPDIF0_SELECT(_x)    (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
490 #define EC_SPDIF1_SELECT(_x)    (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
491 #define EC_CURRENT_PROM_VERSION 0x01    /* Self-explanatory.  This should
492                                          * be incremented any time the EEPROM's
493                                          * format is changed.  */
494 
495 #define EC_EEPROM_SIZE          0x40    /* ECARD EEPROM has 64 16-bit words */
496 
497 /* Addresses for special values stored in to EEPROM */
498 #define EC_PROM_VERSION_ADDR    0x20    /* Address of the current prom version */
499 #define EC_BOARDREV0_ADDR       0x21    /* LSW of board rev */
500 #define EC_BOARDREV1_ADDR       0x22    /* MSW of board rev */
501 
502 #define EC_LAST_PROMFILE_ADDR   0x2f
503 
504 #define EC_SERIALNUM_ADDR       0x30    /* First word of serial number.  The
505                                          * can be up to 30 characters in length
506                                          * and is stored as a NULL-terminated
507                                          * ASCII string.  Any unused bytes must be
508                                          * filled with zeros */
509 #define EC_CHECKSUM_ADDR        0x3f    /* Location at which checksum is stored */
510 
511 
512 /* Most of this stuff is pretty self-evident.  According to the hardware
513  * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
514  * offset problem.  Weird.
515  */
516 #define EC_RAW_RUN_MODE         (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
517                                  EC_TRIM_CSN)
518 
519 
520 #define EC_DEFAULT_ADC_GAIN     0xC4C4
521 #define EC_DEFAULT_SPDIF0_SEL   0x0
522 #define EC_DEFAULT_SPDIF1_SEL   0x4
523 
524 /**************************************************************************
525  * @func Clock bits into the Ecard's control latch.  The Ecard uses a
526  *  control latch will is loaded bit-serially by toggling the Modem control
527  *  lines from function 2 on the E8010.  This function hides these details
528  *  and presents the illusion that we are actually writing to a distinct
529  *  register.
530  */
531 
532 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
533 {
534         unsigned short count;
535         unsigned int data;
536         unsigned long hc_port;
537         unsigned int hc_value;
538 
539         hc_port = emu->port + HCFG;
540         hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
541         outl(hc_value, hc_port);
542 
543         for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
544 
545                 /* Set up the value */
546                 data = ((value & 0x1) ? PULSEN_BIT : 0);
547                 value >>= 1;
548 
549                 outl(hc_value | data, hc_port);
550 
551                 /* Clock the shift register */
552                 outl(hc_value | data | HANDN_BIT, hc_port);
553                 outl(hc_value | data, hc_port);
554         }
555 
556         /* Latch the bits */
557         outl(hc_value | HOOKN_BIT, hc_port);
558         outl(hc_value, hc_port);
559 }
560 
561 /**************************************************************************
562  * @func Set the gain of the ECARD's CS3310 Trim/gain controller.  The
563  * trim value consists of a 16bit value which is composed of two
564  * 8 bit gain/trim values, one for the left channel and one for the
565  * right channel.  The following table maps from the Gain/Attenuation
566  * value in decibels into the corresponding bit pattern for a single
567  * channel.
568  */
569 
570 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
571                                          unsigned short gain)
572 {
573         unsigned int bit;
574 
575         /* Enable writing to the TRIM registers */
576         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
577 
578         /* Do it again to insure that we meet hold time requirements */
579         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
580 
581         for (bit = (1 << 15); bit; bit >>= 1) {
582                 unsigned int value;
583 
584                 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
585 
586                 if (gain & bit)
587                         value |= EC_TRIM_SDATA;
588 
589                 /* Clock the bit */
590                 snd_emu10k1_ecard_write(emu, value);
591                 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
592                 snd_emu10k1_ecard_write(emu, value);
593         }
594 
595         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
596 }
597 
598 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
599 {
600         unsigned int hc_value;
601 
602         /* Set up the initial settings */
603         emu->ecard_ctrl = EC_RAW_RUN_MODE |
604                           EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
605                           EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
606 
607         /* Step 0: Set the codec type in the hardware control register
608          * and enable audio output */
609         hc_value = inl(emu->port + HCFG);
610         outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
611         inl(emu->port + HCFG);
612 
613         /* Step 1: Turn off the led and deassert TRIM_CS */
614         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
615 
616         /* Step 2: Calibrate the ADC and DAC */
617         snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
618 
619         /* Step 3: Wait for awhile;   XXX We can't get away with this
620          * under a real operating system; we'll need to block and wait that
621          * way. */
622         snd_emu10k1_wait(emu, 48000);
623 
624         /* Step 4: Switch off the DAC and ADC calibration.  Note
625          * That ADC_CAL is actually an inverted signal, so we assert
626          * it here to stop calibration.  */
627         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
628 
629         /* Step 4: Switch into run mode */
630         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
631 
632         /* Step 5: Set the analog input gain */
633         snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
634 
635         return 0;
636 }
637 
638 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
639 {
640         unsigned long special_port;
641         unsigned int value;
642 
643         /* Special initialisation routine
644          * before the rest of the IO-Ports become active.
645          */
646         special_port = emu->port + 0x38;
647         value = inl(special_port);
648         outl(0x00d00000, special_port);
649         value = inl(special_port);
650         outl(0x00d00001, special_port);
651         value = inl(special_port);
652         outl(0x00d0005f, special_port);
653         value = inl(special_port);
654         outl(0x00d0007f, special_port);
655         value = inl(special_port);
656         outl(0x0090007f, special_port);
657         value = inl(special_port);
658 
659         snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
660         /* Delay to give time for ADC chip to switch on. It needs 113ms */
661         msleep(200);
662         return 0;
663 }
664 
665 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu,
666                                      const struct firmware *fw_entry)
667 {
668         int n, i;
669         int reg;
670         int value;
671         unsigned int write_post;
672         unsigned long flags;
673 
674         if (!fw_entry)
675                 return -EIO;
676 
677         /* The FPGA is a Xilinx Spartan IIE XC2S50E */
678         /* GPIO7 -> FPGA PGMN
679          * GPIO6 -> FPGA CCLK
680          * GPIO5 -> FPGA DIN
681          * FPGA CONFIG OFF -> FPGA PGMN
682          */
683         spin_lock_irqsave(&emu->emu_lock, flags);
684         outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
685         write_post = inl(emu->port + A_IOCFG);
686         udelay(100);
687         outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
688         write_post = inl(emu->port + A_IOCFG);
689         udelay(100); /* Allow FPGA memory to clean */
690         for (n = 0; n < fw_entry->size; n++) {
691                 value = fw_entry->data[n];
692                 for (i = 0; i < 8; i++) {
693                         reg = 0x80;
694                         if (value & 0x1)
695                                 reg = reg | 0x20;
696                         value = value >> 1;
697                         outl(reg, emu->port + A_IOCFG);
698                         write_post = inl(emu->port + A_IOCFG);
699                         outl(reg | 0x40, emu->port + A_IOCFG);
700                         write_post = inl(emu->port + A_IOCFG);
701                 }
702         }
703         /* After programming, set GPIO bit 4 high again. */
704         outl(0x10, emu->port + A_IOCFG);
705         write_post = inl(emu->port + A_IOCFG);
706         spin_unlock_irqrestore(&emu->emu_lock, flags);
707 
708         return 0;
709 }
710 
711 static int emu1010_firmware_thread(void *data)
712 {
713         struct snd_emu10k1 *emu = data;
714         u32 tmp, tmp2, reg;
715         u32 last_reg = 0;
716         int err;
717 
718         for (;;) {
719                 /* Delay to allow Audio Dock to settle */
720                 msleep_interruptible(1000);
721                 if (kthread_should_stop())
722                         break;
723 #ifdef CONFIG_PM_SLEEP
724                 if (emu->suspend)
725                         continue;
726 #endif
727                 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */
728                 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg); /* OPTIONS: Which cards are attached to the EMU */
729                 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
730                         /* Audio Dock attached */
731                         /* Return to Audio Dock programming mode */
732                         dev_info(emu->card->dev,
733                                  "emu1010: Loading Audio Dock Firmware\n");
734                         snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK);
735 
736                         if (!emu->dock_fw) {
737                                 const char *filename = NULL;
738                                 switch (emu->card_capabilities->emu_model) {
739                                 case EMU_MODEL_EMU1010:
740                                         filename = DOCK_FILENAME;
741                                         break;
742                                 case EMU_MODEL_EMU1010B:
743                                         filename = MICRO_DOCK_FILENAME;
744                                         break;
745                                 case EMU_MODEL_EMU1616:
746                                         filename = MICRO_DOCK_FILENAME;
747                                         break;
748                                 }
749                                 if (filename) {
750                                         err = request_firmware(&emu->dock_fw,
751                                                                filename,
752                                                                &emu->pci->dev);
753                                         if (err)
754                                                 continue;
755                                 }
756                         }
757 
758                         if (emu->dock_fw) {
759                                 err = snd_emu1010_load_firmware(emu, emu->dock_fw);
760                                 if (err)
761                                         continue;
762                         }
763 
764                         snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
765                         snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg);
766                         dev_info(emu->card->dev,
767                                  "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n",
768                                  reg);
769                         /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
770                         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
771                         dev_info(emu->card->dev,
772                                  "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg);
773                         if ((reg & 0x1f) != 0x15) {
774                                 /* FPGA failed to be programmed */
775                                 dev_info(emu->card->dev,
776                                          "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n",
777                                          reg);
778                                 continue;
779                         }
780                         dev_info(emu->card->dev,
781                                  "emu1010: Audio Dock Firmware loaded\n");
782                         snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
783                         snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
784                         dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n",
785                                    tmp, tmp2);
786                         /* Sync clocking between 1010 and Dock */
787                         /* Allow DLL to settle */
788                         msleep(10);
789                         /* Unmute all. Default is muted after a firmware load */
790                         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
791                 } else if (!reg && last_reg) {
792                         /* Audio Dock removed */
793                         dev_info(emu->card->dev,
794                                  "emu1010: Audio Dock detached\n");
795                         /* Unmute all */
796                         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
797                 }
798 
799                 last_reg = reg;
800         }
801         dev_info(emu->card->dev, "emu1010: firmware thread stopping\n");
802         return 0;
803 }
804 
805 /*
806  * EMU-1010 - details found out from this driver, official MS Win drivers,
807  * testing the card:
808  *
809  * Audigy2 (aka Alice2):
810  * ---------------------
811  *      * communication over PCI
812  *      * conversion of 32-bit data coming over EMU32 links from HANA FPGA
813  *        to 2 x 16-bit, using internal DSP instructions
814  *      * slave mode, clock supplied by HANA
815  *      * linked to HANA using:
816  *              32 x 32-bit serial EMU32 output channels
817  *              16 x EMU32 input channels
818  *              (?) x I2S I/O channels (?)
819  *
820  * FPGA (aka HANA):
821  * ---------------
822  *      * provides all (?) physical inputs and outputs of the card
823  *              (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
824  *      * provides clock signal for the card and Alice2
825  *      * two crystals - for 44.1kHz and 48kHz multiples
826  *      * provides internal routing of signal sources to signal destinations
827  *      * inputs/outputs to Alice2 - see above
828  *
829  * Current status of the driver:
830  * ----------------------------
831  *      * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
832  *      * PCM device nb. 2:
833  *              16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
834  *              16 x 32-bit capture - snd_emu10k1_capture_efx_ops
835  */
836 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
837 {
838         unsigned int i;
839         u32 tmp, tmp2, reg;
840         int err;
841 
842         dev_info(emu->card->dev, "emu1010: Special config.\n");
843         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
844          * Lock Sound Memory Cache, Lock Tank Memory Cache,
845          * Mute all codecs.
846          */
847         outl(0x0005a00c, emu->port + HCFG);
848         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
849          * Lock Tank Memory Cache,
850          * Mute all codecs.
851          */
852         outl(0x0005a004, emu->port + HCFG);
853         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
854          * Mute all codecs.
855          */
856         outl(0x0005a000, emu->port + HCFG);
857         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
858          * Mute all codecs.
859          */
860         outl(0x0005a000, emu->port + HCFG);
861 
862         /* Disable 48Volt power to Audio Dock */
863         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
864 
865         /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
866         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
867         dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg);
868         if ((reg & 0x3f) == 0x15) {
869                 /* FPGA netlist already present so clear it */
870                 /* Return to programming mode */
871 
872                 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
873         }
874         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
875         dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg);
876         if ((reg & 0x3f) == 0x15) {
877                 /* FPGA failed to return to programming mode */
878                 dev_info(emu->card->dev,
879                          "emu1010: FPGA failed to return to programming mode\n");
880                 return -ENODEV;
881         }
882         dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg);
883 
884         if (!emu->firmware) {
885                 const char *filename;
886                 switch (emu->card_capabilities->emu_model) {
887                 case EMU_MODEL_EMU1010:
888                         filename = HANA_FILENAME;
889                         break;
890                 case EMU_MODEL_EMU1010B:
891                         filename = EMU1010B_FILENAME;
892                         break;
893                 case EMU_MODEL_EMU1616:
894                         filename = EMU1010_NOTEBOOK_FILENAME;
895                         break;
896                 case EMU_MODEL_EMU0404:
897                         filename = EMU0404_FILENAME;
898                         break;
899                 default:
900                         return -ENODEV;
901                 }
902 
903                 err = request_firmware(&emu->firmware, filename, &emu->pci->dev);
904                 if (err != 0) {
905                         dev_info(emu->card->dev,
906                                  "emu1010: firmware: %s not found. Err = %d\n",
907                                  filename, err);
908                         return err;
909                 }
910                 dev_info(emu->card->dev,
911                          "emu1010: firmware file = %s, size = 0x%zx\n",
912                            filename, emu->firmware->size);
913         }
914 
915         err = snd_emu1010_load_firmware(emu, emu->firmware);
916         if (err != 0) {
917                 dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n");
918                 return err;
919         }
920 
921         /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
922         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
923         if ((reg & 0x3f) != 0x15) {
924                 /* FPGA failed to be programmed */
925                 dev_info(emu->card->dev,
926                          "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n",
927                          reg);
928                 return -ENODEV;
929         }
930 
931         dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n");
932         snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
933         snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
934         dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2);
935         /* Enable 48Volt power to Audio Dock */
936         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
937 
938         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
939         dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
940         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
941         dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
942         snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp);
943         /* Optical -> ADAT I/O  */
944         /* 0 : SPDIF
945          * 1 : ADAT
946          */
947         emu->emu1010.optical_in = 1; /* IN_ADAT */
948         emu->emu1010.optical_out = 1; /* IN_ADAT */
949         tmp = 0;
950         tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
951                 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
952         snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
953         snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp);
954         /* Set no attenuation on Audio Dock pads. */
955         snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
956         emu->emu1010.adc_pads = 0x00;
957         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
958         /* Unmute Audio dock DACs, Headphone source DAC-4. */
959         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
960         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
961         snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp);
962         /* DAC PADs. */
963         snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
964         emu->emu1010.dac_pads = 0x0f;
965         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
966         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
967         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
968         /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
969         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
970         /* MIDI routing */
971         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
972         /* Unknown. */
973         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
974         /* IRQ Enable: All on */
975         /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
976         /* IRQ Enable: All off */
977         snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
978 
979         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
980         dev_info(emu->card->dev, "emu1010: Card options3 = 0x%x\n", reg);
981         /* Default WCLK set to 48kHz. */
982         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
983         /* Word Clock source, Internal 48kHz x1 */
984         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
985         /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
986         /* Audio Dock LEDs. */
987         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
988 
989 #if 0
990         /* For 96kHz */
991         snd_emu1010_fpga_link_dst_src_write(emu,
992                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
993         snd_emu1010_fpga_link_dst_src_write(emu,
994                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
995         snd_emu1010_fpga_link_dst_src_write(emu,
996                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
997         snd_emu1010_fpga_link_dst_src_write(emu,
998                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
999 #endif
1000 #if 0
1001         /* For 192kHz */
1002         snd_emu1010_fpga_link_dst_src_write(emu,
1003                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
1004         snd_emu1010_fpga_link_dst_src_write(emu,
1005                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
1006         snd_emu1010_fpga_link_dst_src_write(emu,
1007                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
1008         snd_emu1010_fpga_link_dst_src_write(emu,
1009                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
1010         snd_emu1010_fpga_link_dst_src_write(emu,
1011                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
1012         snd_emu1010_fpga_link_dst_src_write(emu,
1013                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
1014         snd_emu1010_fpga_link_dst_src_write(emu,
1015                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
1016         snd_emu1010_fpga_link_dst_src_write(emu,
1017                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
1018 #endif
1019 #if 1
1020         /* For 48kHz */
1021         snd_emu1010_fpga_link_dst_src_write(emu,
1022                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
1023         snd_emu1010_fpga_link_dst_src_write(emu,
1024                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
1025         snd_emu1010_fpga_link_dst_src_write(emu,
1026                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
1027         snd_emu1010_fpga_link_dst_src_write(emu,
1028                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
1029         snd_emu1010_fpga_link_dst_src_write(emu,
1030                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
1031         snd_emu1010_fpga_link_dst_src_write(emu,
1032                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
1033         snd_emu1010_fpga_link_dst_src_write(emu,
1034                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
1035         snd_emu1010_fpga_link_dst_src_write(emu,
1036                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
1037         /* Pavel Hofman - setting defaults for 8 more capture channels
1038          * Defaults only, users will set their own values anyways, let's
1039          * just copy/paste.
1040          */
1041 
1042         snd_emu1010_fpga_link_dst_src_write(emu,
1043                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
1044         snd_emu1010_fpga_link_dst_src_write(emu,
1045                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
1046         snd_emu1010_fpga_link_dst_src_write(emu,
1047                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1048         snd_emu1010_fpga_link_dst_src_write(emu,
1049                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1050         snd_emu1010_fpga_link_dst_src_write(emu,
1051                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1052         snd_emu1010_fpga_link_dst_src_write(emu,
1053                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1054         snd_emu1010_fpga_link_dst_src_write(emu,
1055                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1056         snd_emu1010_fpga_link_dst_src_write(emu,
1057                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1058 #endif
1059 #if 0
1060         /* Original */
1061         snd_emu1010_fpga_link_dst_src_write(emu,
1062                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1063         snd_emu1010_fpga_link_dst_src_write(emu,
1064                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1065         snd_emu1010_fpga_link_dst_src_write(emu,
1066                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1067         snd_emu1010_fpga_link_dst_src_write(emu,
1068                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1069         snd_emu1010_fpga_link_dst_src_write(emu,
1070                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1071         snd_emu1010_fpga_link_dst_src_write(emu,
1072                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1073         snd_emu1010_fpga_link_dst_src_write(emu,
1074                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1075         snd_emu1010_fpga_link_dst_src_write(emu,
1076                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1077         snd_emu1010_fpga_link_dst_src_write(emu,
1078                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1079         snd_emu1010_fpga_link_dst_src_write(emu,
1080                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1081         snd_emu1010_fpga_link_dst_src_write(emu,
1082                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1083         snd_emu1010_fpga_link_dst_src_write(emu,
1084                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1085 #endif
1086         for (i = 0; i < 0x20; i++) {
1087                 /* AudioDock Elink <- Silence */
1088                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE);
1089         }
1090         for (i = 0; i < 4; i++) {
1091                 /* Hana SPDIF Out <- Silence */
1092                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE);
1093         }
1094         for (i = 0; i < 7; i++) {
1095                 /* Hamoa DAC <- Silence */
1096                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE);
1097         }
1098         for (i = 0; i < 7; i++) {
1099                 /* Hana ADAT Out <- Silence */
1100                 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1101         }
1102         snd_emu1010_fpga_link_dst_src_write(emu,
1103                 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1104         snd_emu1010_fpga_link_dst_src_write(emu,
1105                 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1106         snd_emu1010_fpga_link_dst_src_write(emu,
1107                 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1108         snd_emu1010_fpga_link_dst_src_write(emu,
1109                 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1110         snd_emu1010_fpga_link_dst_src_write(emu,
1111                 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1112         snd_emu1010_fpga_link_dst_src_write(emu,
1113                 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1114         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
1115 
1116         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1117 
1118         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1119          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1120          * Mute all codecs.
1121          */
1122         outl(0x0000a000, emu->port + HCFG);
1123         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1124          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1125          * Un-Mute all codecs.
1126          */
1127         outl(0x0000a001, emu->port + HCFG);
1128 
1129         /* Initial boot complete. Now patches */
1130 
1131         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1132         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1133         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1134         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1135         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1136         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
1137         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif  (or 0x11 for aes/ebu) */
1138 
1139         /* Start Micro/Audio Dock firmware loader thread */
1140         if (!emu->emu1010.firmware_thread) {
1141                 emu->emu1010.firmware_thread =
1142                         kthread_create(emu1010_firmware_thread, emu,
1143                                        "emu1010_firmware");
1144                 if (IS_ERR(emu->emu1010.firmware_thread)) {
1145                         err = PTR_ERR(emu->emu1010.firmware_thread);
1146                         emu->emu1010.firmware_thread = NULL;
1147                         dev_info(emu->card->dev,
1148                                         "emu1010: Creating thread failed\n");
1149                         return err;
1150                 }
1151 
1152                 wake_up_process(emu->emu1010.firmware_thread);
1153         }
1154 
1155 #if 0
1156         snd_emu1010_fpga_link_dst_src_write(emu,
1157                 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1158         snd_emu1010_fpga_link_dst_src_write(emu,
1159                 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1160         snd_emu1010_fpga_link_dst_src_write(emu,
1161                 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1162         snd_emu1010_fpga_link_dst_src_write(emu,
1163                 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1164 #endif
1165         /* Default outputs */
1166         if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1167                 /* 1616(M) cardbus default outputs */
1168                 /* ALICE2 bus 0xa0 */
1169                 snd_emu1010_fpga_link_dst_src_write(emu,
1170                         EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1171                 emu->emu1010.output_source[0] = 17;
1172                 snd_emu1010_fpga_link_dst_src_write(emu,
1173                         EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1174                 emu->emu1010.output_source[1] = 18;
1175                 snd_emu1010_fpga_link_dst_src_write(emu,
1176                         EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1177                 emu->emu1010.output_source[2] = 19;
1178                 snd_emu1010_fpga_link_dst_src_write(emu,
1179                         EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1180                 emu->emu1010.output_source[3] = 20;
1181                 snd_emu1010_fpga_link_dst_src_write(emu,
1182                         EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1183                 emu->emu1010.output_source[4] = 21;
1184                 snd_emu1010_fpga_link_dst_src_write(emu,
1185                         EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1186                 emu->emu1010.output_source[5] = 22;
1187                 /* ALICE2 bus 0xa0 */
1188                 snd_emu1010_fpga_link_dst_src_write(emu,
1189                         EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1190                 emu->emu1010.output_source[16] = 17;
1191                 snd_emu1010_fpga_link_dst_src_write(emu,
1192                         EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1193                 emu->emu1010.output_source[17] = 18;
1194         } else {
1195                 /* ALICE2 bus 0xa0 */
1196                 snd_emu1010_fpga_link_dst_src_write(emu,
1197                         EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1198                 emu->emu1010.output_source[0] = 21;
1199                 snd_emu1010_fpga_link_dst_src_write(emu,
1200                         EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1201                 emu->emu1010.output_source[1] = 22;
1202                 snd_emu1010_fpga_link_dst_src_write(emu,
1203                         EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1204                 emu->emu1010.output_source[2] = 23;
1205                 snd_emu1010_fpga_link_dst_src_write(emu,
1206                         EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1207                 emu->emu1010.output_source[3] = 24;
1208                 snd_emu1010_fpga_link_dst_src_write(emu,
1209                         EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1210                 emu->emu1010.output_source[4] = 25;
1211                 snd_emu1010_fpga_link_dst_src_write(emu,
1212                         EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1213                 emu->emu1010.output_source[5] = 26;
1214                 snd_emu1010_fpga_link_dst_src_write(emu,
1215                         EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1216                 emu->emu1010.output_source[6] = 27;
1217                 snd_emu1010_fpga_link_dst_src_write(emu,
1218                         EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1219                 emu->emu1010.output_source[7] = 28;
1220                 /* ALICE2 bus 0xa0 */
1221                 snd_emu1010_fpga_link_dst_src_write(emu,
1222                         EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1223                 emu->emu1010.output_source[8] = 21;
1224                 snd_emu1010_fpga_link_dst_src_write(emu,
1225                         EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1226                 emu->emu1010.output_source[9] = 22;
1227                 /* ALICE2 bus 0xa0 */
1228                 snd_emu1010_fpga_link_dst_src_write(emu,
1229                         EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1230                 emu->emu1010.output_source[10] = 21;
1231                 snd_emu1010_fpga_link_dst_src_write(emu,
1232                         EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1233                 emu->emu1010.output_source[11] = 22;
1234                 /* ALICE2 bus 0xa0 */
1235                 snd_emu1010_fpga_link_dst_src_write(emu,
1236                         EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1237                 emu->emu1010.output_source[12] = 21;
1238                 snd_emu1010_fpga_link_dst_src_write(emu,
1239                         EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1240                 emu->emu1010.output_source[13] = 22;
1241                 /* ALICE2 bus 0xa0 */
1242                 snd_emu1010_fpga_link_dst_src_write(emu,
1243                         EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1244                 emu->emu1010.output_source[14] = 21;
1245                 snd_emu1010_fpga_link_dst_src_write(emu,
1246                         EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1247                 emu->emu1010.output_source[15] = 22;
1248                 /* ALICE2 bus 0xa0 */
1249                 snd_emu1010_fpga_link_dst_src_write(emu,
1250                         EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1251                 emu->emu1010.output_source[16] = 21;
1252                 snd_emu1010_fpga_link_dst_src_write(emu,
1253                         EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1254                 emu->emu1010.output_source[17] = 22;
1255                 snd_emu1010_fpga_link_dst_src_write(emu,
1256                         EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1257                 emu->emu1010.output_source[18] = 23;
1258                 snd_emu1010_fpga_link_dst_src_write(emu,
1259                         EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1260                 emu->emu1010.output_source[19] = 24;
1261                 snd_emu1010_fpga_link_dst_src_write(emu,
1262                         EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1263                 emu->emu1010.output_source[20] = 25;
1264                 snd_emu1010_fpga_link_dst_src_write(emu,
1265                         EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1266                 emu->emu1010.output_source[21] = 26;
1267                 snd_emu1010_fpga_link_dst_src_write(emu,
1268                         EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1269                 emu->emu1010.output_source[22] = 27;
1270                 snd_emu1010_fpga_link_dst_src_write(emu,
1271                         EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1272                 emu->emu1010.output_source[23] = 28;
1273         }
1274         /* TEMP: Select SPDIF in/out */
1275         /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
1276 
1277         /* TEMP: Select 48kHz SPDIF out */
1278         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1279         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1280         /* Word Clock source, Internal 48kHz x1 */
1281         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
1282         /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
1283         emu->emu1010.internal_clock = 1; /* 48000 */
1284         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */
1285         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1286         /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1287         /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1288         /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
1289 
1290         return 0;
1291 }
1292 /*
1293  *  Create the EMU10K1 instance
1294  */
1295 
1296 #ifdef CONFIG_PM_SLEEP
1297 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1298 static void free_pm_buffer(struct snd_emu10k1 *emu);
1299 #endif
1300 
1301 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1302 {
1303         if (emu->port) {        /* avoid access to already used hardware */
1304                 snd_emu10k1_fx8010_tram_setup(emu, 0);
1305                 snd_emu10k1_done(emu);
1306                 snd_emu10k1_free_efx(emu);
1307         }
1308         if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
1309                 /* Disable 48Volt power to Audio Dock */
1310                 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
1311         }
1312         if (emu->emu1010.firmware_thread)
1313                 kthread_stop(emu->emu1010.firmware_thread);
1314         release_firmware(emu->firmware);
1315         release_firmware(emu->dock_fw);
1316         if (emu->irq >= 0)
1317                 free_irq(emu->irq, emu);
1318         /* remove reserved page */
1319         if (emu->reserved_page) {
1320                 snd_emu10k1_synth_free(emu,
1321                         (struct snd_util_memblk *)emu->reserved_page);
1322                 emu->reserved_page = NULL;
1323         }
1324         snd_util_memhdr_free(emu->memhdr);
1325         if (emu->silent_page.area)
1326                 snd_dma_free_pages(&emu->silent_page);
1327         if (emu->ptb_pages.area)
1328                 snd_dma_free_pages(&emu->ptb_pages);
1329         vfree(emu->page_ptr_table);
1330         vfree(emu->page_addr_table);
1331 #ifdef CONFIG_PM_SLEEP
1332         free_pm_buffer(emu);
1333 #endif
1334         if (emu->port)
1335                 pci_release_regions(emu->pci);
1336         if (emu->card_capabilities->ca0151_chip) /* P16V */
1337                 snd_p16v_free(emu);
1338         pci_disable_device(emu->pci);
1339         kfree(emu);
1340         return 0;
1341 }
1342 
1343 static int snd_emu10k1_dev_free(struct snd_device *device)
1344 {
1345         struct snd_emu10k1 *emu = device->device_data;
1346         return snd_emu10k1_free(emu);
1347 }
1348 
1349 static struct snd_emu_chip_details emu_chip_details[] = {
1350         /* Audigy 5/Rx SB1550 */
1351         /* Tested by michael@gernoth.net 28 Mar 2015 */
1352         /* DSP: CA10300-IAT LF
1353          * DAC: Cirrus Logic CS4382-KQZ
1354          * ADC: Philips 1361T
1355          * AC97: Sigmatel STAC9750
1356          * CA0151: None
1357          */
1358         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102,
1359          .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]",
1360          .id = "Audigy2",
1361          .emu10k2_chip = 1,
1362          .ca0108_chip = 1,
1363          .spk71 = 1,
1364          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1365          .ac97_chip = 1},
1366         /* Audigy4 (Not PRO) SB0610 */
1367         /* Tested by James@superbug.co.uk 4th April 2006 */
1368         /* A_IOCFG bits
1369          * Output
1370          * 0: ?
1371          * 1: ?
1372          * 2: ?
1373          * 3: 0 - Digital Out, 1 - Line in
1374          * 4: ?
1375          * 5: ?
1376          * 6: ?
1377          * 7: ?
1378          * Input
1379          * 8: ?
1380          * 9: ?
1381          * A: Green jack sense (Front)
1382          * B: ?
1383          * C: Black jack sense (Rear/Side Right)
1384          * D: Yellow jack sense (Center/LFE/Side Left)
1385          * E: ?
1386          * F: ?
1387          *
1388          * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1389          * 0 - Digital Out
1390          * 1 - Line in
1391          */
1392         /* Mic input not tested.
1393          * Analog CD input not tested
1394          * Digital Out not tested.
1395          * Line in working.
1396          * Audio output 5.1 working. Side outputs not working.
1397          */
1398         /* DSP: CA10300-IAT LF
1399          * DAC: Cirrus Logic CS4382-KQZ
1400          * ADC: Philips 1361T
1401          * AC97: Sigmatel STAC9750
1402          * CA0151: None
1403          */
1404         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1405          .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1406          .id = "Audigy2",
1407          .emu10k2_chip = 1,
1408          .ca0108_chip = 1,
1409          .spk71 = 1,
1410          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1411          .ac97_chip = 1} ,
1412         /* Audigy 2 Value AC3 out does not work yet.
1413          * Need to find out how to turn off interpolators.
1414          */
1415         /* Tested by James@superbug.co.uk 3rd July 2005 */
1416         /* DSP: CA0108-IAT
1417          * DAC: CS4382-KQ
1418          * ADC: Philips 1361T
1419          * AC97: STAC9750
1420          * CA0151: None
1421          */
1422         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1423          .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1424          .id = "Audigy2",
1425          .emu10k2_chip = 1,
1426          .ca0108_chip = 1,
1427          .spk71 = 1,
1428          .ac97_chip = 1} ,
1429         /* Audigy 2 ZS Notebook Cardbus card.*/
1430         /* Tested by James@superbug.co.uk 6th November 2006 */
1431         /* Audio output 7.1/Headphones working.
1432          * Digital output working. (AC3 not checked, only PCM)
1433          * Audio Mic/Line inputs working.
1434          * Digital input not tested.
1435          */
1436         /* DSP: Tina2
1437          * DAC: Wolfson WM8768/WM8568
1438          * ADC: Wolfson WM8775
1439          * AC97: None
1440          * CA0151: None
1441          */
1442         /* Tested by James@superbug.co.uk 4th April 2006 */
1443         /* A_IOCFG bits
1444          * Output
1445          * 0: Not Used
1446          * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1447          * 2: Analog input 0 = line in, 1 = mic in
1448          * 3: Not Used
1449          * 4: Digital output 0 = off, 1 = on.
1450          * 5: Not Used
1451          * 6: Not Used
1452          * 7: Not Used
1453          * Input
1454          *      All bits 1 (0x3fxx) means nothing plugged in.
1455          * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1456          * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1457          * C-D: 2 = Front/Rear/etc, 3 = nothing.
1458          * E-F: Always 0
1459          *
1460          */
1461         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1462          .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1463          .id = "Audigy2",
1464          .emu10k2_chip = 1,
1465          .ca0108_chip = 1,
1466          .ca_cardbus_chip = 1,
1467          .spi_dac = 1,
1468          .i2c_adc = 1,
1469          .spk71 = 1} ,
1470         /* Tested by James@superbug.co.uk 4th Nov 2007. */
1471         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1472          .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1473          .id = "EMU1010",
1474          .emu10k2_chip = 1,
1475          .ca0108_chip = 1,
1476          .ca_cardbus_chip = 1,
1477          .spk71 = 1 ,
1478          .emu_model = EMU_MODEL_EMU1616},
1479         /* Tested by James@superbug.co.uk 4th Nov 2007. */
1480         /* This is MAEM8960, 0202 is MAEM 8980 */
1481         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1482          .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
1483          .id = "EMU1010",
1484          .emu10k2_chip = 1,
1485          .ca0108_chip = 1,
1486          .spk71 = 1,
1487          .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1488         /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
1489         /* This is MAEM8986, 0202 is MAEM8980 */
1490         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
1491          .driver = "Audigy2", .name = "E-mu 1010 PCIe [MAEM8986]",
1492          .id = "EMU1010",
1493          .emu10k2_chip = 1,
1494          .ca0108_chip = 1,
1495          .spk71 = 1,
1496          .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
1497         /* Tested by James@superbug.co.uk 8th July 2005. */
1498         /* This is MAEM8810, 0202 is MAEM8820 */
1499         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1500          .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
1501          .id = "EMU1010",
1502          .emu10k2_chip = 1,
1503          .ca0102_chip = 1,
1504          .spk71 = 1,
1505          .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1506         /* EMU0404b */
1507         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1508          .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
1509          .id = "EMU0404",
1510          .emu10k2_chip = 1,
1511          .ca0108_chip = 1,
1512          .spk71 = 1,
1513          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1514         /* Tested by James@superbug.co.uk 20-3-2007. */
1515         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1516          .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
1517          .id = "EMU0404",
1518          .emu10k2_chip = 1,
1519          .ca0102_chip = 1,
1520          .spk71 = 1,
1521          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1522         /* EMU0404 PCIe */
1523         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1524          .driver = "Audigy2", .name = "E-mu 0404 PCIe [MAEM8984]",
1525          .id = "EMU0404",
1526          .emu10k2_chip = 1,
1527          .ca0108_chip = 1,
1528          .spk71 = 1,
1529          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
1530         /* Note that all E-mu cards require kernel 2.6 or newer. */
1531         {.vendor = 0x1102, .device = 0x0008,
1532          .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1533          .id = "Audigy2",
1534          .emu10k2_chip = 1,
1535          .ca0108_chip = 1,
1536          .ac97_chip = 1} ,
1537         /* Tested by James@superbug.co.uk 3rd July 2005 */
1538         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1539          .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1540          .id = "Audigy2",
1541          .emu10k2_chip = 1,
1542          .ca0102_chip = 1,
1543          .ca0151_chip = 1,
1544          .spk71 = 1,
1545          .spdif_bug = 1,
1546          .ac97_chip = 1} ,
1547         /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1548         /* The 0x20061102 does have SB0350 written on it
1549          * Just like 0x20021102
1550          */
1551         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1552          .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1553          .id = "Audigy2",
1554          .emu10k2_chip = 1,
1555          .ca0102_chip = 1,
1556          .ca0151_chip = 1,
1557          .spk71 = 1,
1558          .spdif_bug = 1,
1559          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1560          .ac97_chip = 1} ,
1561         /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
1562            Creative's Windows driver */
1563         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
1564          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
1565          .id = "Audigy2",
1566          .emu10k2_chip = 1,
1567          .ca0102_chip = 1,
1568          .ca0151_chip = 1,
1569          .spk71 = 1,
1570          .spdif_bug = 1,
1571          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1572          .ac97_chip = 1} ,
1573         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1574          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1575          .id = "Audigy2",
1576          .emu10k2_chip = 1,
1577          .ca0102_chip = 1,
1578          .ca0151_chip = 1,
1579          .spk71 = 1,
1580          .spdif_bug = 1,
1581          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1582          .ac97_chip = 1} ,
1583         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1584          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1585          .id = "Audigy2",
1586          .emu10k2_chip = 1,
1587          .ca0102_chip = 1,
1588          .ca0151_chip = 1,
1589          .spk71 = 1,
1590          .spdif_bug = 1,
1591          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1592          .ac97_chip = 1} ,
1593         /* Audigy 2 */
1594         /* Tested by James@superbug.co.uk 3rd July 2005 */
1595         /* DSP: CA0102-IAT
1596          * DAC: CS4382-KQ
1597          * ADC: Philips 1361T
1598          * AC97: STAC9721
1599          * CA0151: Yes
1600          */
1601         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1602          .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1603          .id = "Audigy2",
1604          .emu10k2_chip = 1,
1605          .ca0102_chip = 1,
1606          .ca0151_chip = 1,
1607          .spk71 = 1,
1608          .spdif_bug = 1,
1609          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1610          .ac97_chip = 1} ,
1611         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1612          .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]",
1613          .id = "Audigy2",
1614          .emu10k2_chip = 1,
1615          .ca0102_chip = 1,
1616          .ca0151_chip = 1,
1617          .spk71 = 1,
1618          .spdif_bug = 1} ,
1619         /* Dell OEM/Creative Labs Audigy 2 ZS */
1620         /* See ALSA bug#1365 */
1621         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1622          .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1623          .id = "Audigy2",
1624          .emu10k2_chip = 1,
1625          .ca0102_chip = 1,
1626          .ca0151_chip = 1,
1627          .spk71 = 1,
1628          .spdif_bug = 1,
1629          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1630          .ac97_chip = 1} ,
1631         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1632          .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1633          .id = "Audigy2",
1634          .emu10k2_chip = 1,
1635          .ca0102_chip = 1,
1636          .ca0151_chip = 1,
1637          .spk71 = 1,
1638          .spdif_bug = 1,
1639          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1640          .adc_1361t = 1,  /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1641          .ac97_chip = 1} ,
1642         {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1643          .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1644          .id = "Audigy2",
1645          .emu10k2_chip = 1,
1646          .ca0102_chip = 1,
1647          .ca0151_chip = 1,
1648          .spdif_bug = 1,
1649          .ac97_chip = 1} ,
1650         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1651          .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1652          .id = "Audigy",
1653          .emu10k2_chip = 1,
1654          .ca0102_chip = 1,
1655          .ac97_chip = 1} ,
1656         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1657          .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1658          .id = "Audigy",
1659          .emu10k2_chip = 1,
1660          .ca0102_chip = 1,
1661          .spdif_bug = 1,
1662          .ac97_chip = 1} ,
1663         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1664          .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1665          .id = "Audigy",
1666          .emu10k2_chip = 1,
1667          .ca0102_chip = 1,
1668          .ac97_chip = 1} ,
1669         {.vendor = 0x1102, .device = 0x0004,
1670          .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1671          .id = "Audigy",
1672          .emu10k2_chip = 1,
1673          .ca0102_chip = 1,
1674          .ac97_chip = 1} ,
1675         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1676          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1677          .id = "Live",
1678          .emu10k1_chip = 1,
1679          .ac97_chip = 1,
1680          .sblive51 = 1} ,
1681         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1682          .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1683          .id = "Live",
1684          .emu10k1_chip = 1,
1685          .ac97_chip = 1,
1686          .sblive51 = 1} ,
1687         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1688          .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1689          .id = "Live",
1690          .emu10k1_chip = 1,
1691          .ac97_chip = 1,
1692          .sblive51 = 1} ,
1693         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1694          .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1695          .id = "Live",
1696          .emu10k1_chip = 1,
1697          .ac97_chip = 1,
1698          .sblive51 = 1} ,
1699         /* Tested by ALSA bug#1680 26th December 2005 */
1700         /* note: It really has SB0220 written on the card, */
1701         /* but it's SB0228 according to kx.inf */
1702         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1703          .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1704          .id = "Live",
1705          .emu10k1_chip = 1,
1706          .ac97_chip = 1,
1707          .sblive51 = 1} ,
1708         /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1709         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1710          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1711          .id = "Live",
1712          .emu10k1_chip = 1,
1713          .ac97_chip = 1,
1714          .sblive51 = 1} ,
1715         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1716          .driver = "EMU10K1", .name = "SB Live! 5.1",
1717          .id = "Live",
1718          .emu10k1_chip = 1,
1719          .ac97_chip = 1,
1720          .sblive51 = 1} ,
1721         /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1722         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1723          .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1724          .id = "Live",
1725          .emu10k1_chip = 1,
1726          .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1727                           * share the same IDs!
1728                           */
1729          .sblive51 = 1} ,
1730         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1731          .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1732          .id = "Live",
1733          .emu10k1_chip = 1,
1734          .ac97_chip = 1,
1735          .sblive51 = 1} ,
1736         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1737          .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1738          .id = "Live",
1739          .emu10k1_chip = 1,
1740          .ac97_chip = 1} ,
1741         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1742          .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1743          .id = "Live",
1744          .emu10k1_chip = 1,
1745          .ac97_chip = 1,
1746          .sblive51 = 1} ,
1747         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1748          .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1749          .id = "Live",
1750          .emu10k1_chip = 1,
1751          .ac97_chip = 1,
1752          .sblive51 = 1} ,
1753         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1754          .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1755          .id = "Live",
1756          .emu10k1_chip = 1,
1757          .ac97_chip = 1,
1758          .sblive51 = 1} ,
1759         /* Tested by James@superbug.co.uk 3rd July 2005 */
1760         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1761          .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1762          .id = "Live",
1763          .emu10k1_chip = 1,
1764          .ac97_chip = 1,
1765          .sblive51 = 1} ,
1766         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1767          .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1768          .id = "Live",
1769          .emu10k1_chip = 1,
1770          .ac97_chip = 1,
1771          .sblive51 = 1} ,
1772         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1773          .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1774          .id = "Live",
1775          .emu10k1_chip = 1,
1776          .ac97_chip = 1,
1777          .sblive51 = 1} ,
1778         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1779          .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1780          .id = "Live",
1781          .emu10k1_chip = 1,
1782          .ac97_chip = 1,
1783          .sblive51 = 1} ,
1784         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1785          .driver = "EMU10K1", .name = "E-mu APS [PC545]",
1786          .id = "APS",
1787          .emu10k1_chip = 1,
1788          .ecard = 1} ,
1789         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1790          .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1791          .id = "Live",
1792          .emu10k1_chip = 1,
1793          .ac97_chip = 1,
1794          .sblive51 = 1} ,
1795         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1796          .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1797          .id = "Live",
1798          .emu10k1_chip = 1,
1799          .ac97_chip = 1,
1800          .sblive51 = 1} ,
1801         {.vendor = 0x1102, .device = 0x0002,
1802          .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1803          .id = "Live",
1804          .emu10k1_chip = 1,
1805          .ac97_chip = 1,
1806          .sblive51 = 1} ,
1807         { } /* terminator */
1808 };
1809 
1810 int snd_emu10k1_create(struct snd_card *card,
1811                        struct pci_dev *pci,
1812                        unsigned short extin_mask,
1813                        unsigned short extout_mask,
1814                        long max_cache_bytes,
1815                        int enable_ir,
1816                        uint subsystem,
1817                        struct snd_emu10k1 **remu)
1818 {
1819         struct snd_emu10k1 *emu;
1820         int idx, err;
1821         int is_audigy;
1822         unsigned int silent_page;
1823         const struct snd_emu_chip_details *c;
1824         static struct snd_device_ops ops = {
1825                 .dev_free =     snd_emu10k1_dev_free,
1826         };
1827 
1828         *remu = NULL;
1829 
1830         /* enable PCI device */
1831         err = pci_enable_device(pci);
1832         if (err < 0)
1833                 return err;
1834 
1835         emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1836         if (emu == NULL) {
1837                 pci_disable_device(pci);
1838                 return -ENOMEM;
1839         }
1840         emu->card = card;
1841         spin_lock_init(&emu->reg_lock);
1842         spin_lock_init(&emu->emu_lock);
1843         spin_lock_init(&emu->spi_lock);
1844         spin_lock_init(&emu->i2c_lock);
1845         spin_lock_init(&emu->voice_lock);
1846         spin_lock_init(&emu->synth_lock);
1847         spin_lock_init(&emu->memblk_lock);
1848         mutex_init(&emu->fx8010.lock);
1849         INIT_LIST_HEAD(&emu->mapped_link_head);
1850         INIT_LIST_HEAD(&emu->mapped_order_link_head);
1851         emu->pci = pci;
1852         emu->irq = -1;
1853         emu->synth = NULL;
1854         emu->get_synth_voice = NULL;
1855         /* read revision & serial */
1856         emu->revision = pci->revision;
1857         pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1858         pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1859         dev_dbg(card->dev,
1860                 "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n",
1861                 pci->vendor, pci->device, emu->serial, emu->model);
1862 
1863         for (c = emu_chip_details; c->vendor; c++) {
1864                 if (c->vendor == pci->vendor && c->device == pci->device) {
1865                         if (subsystem) {
1866                                 if (c->subsystem && (c->subsystem == subsystem))
1867                                         break;
1868                                 else
1869                                         continue;
1870                         } else {
1871                                 if (c->subsystem && (c->subsystem != emu->serial))
1872                                         continue;
1873                                 if (c->revision && c->revision != emu->revision)
1874                                         continue;
1875                         }
1876                         break;
1877                 }
1878         }
1879         if (c->vendor == 0) {
1880                 dev_err(card->dev, "emu10k1: Card not recognised\n");
1881                 kfree(emu);
1882                 pci_disable_device(pci);
1883                 return -ENOENT;
1884         }
1885         emu->card_capabilities = c;
1886         if (c->subsystem && !subsystem)
1887                 dev_dbg(card->dev, "Sound card name = %s\n", c->name);
1888         else if (subsystem)
1889                 dev_dbg(card->dev, "Sound card name = %s, "
1890                         "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1891                         "Forced to subsystem = 0x%x\n", c->name,
1892                         pci->vendor, pci->device, emu->serial, c->subsystem);
1893         else
1894                 dev_dbg(card->dev, "Sound card name = %s, "
1895                         "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1896                         c->name, pci->vendor, pci->device,
1897                         emu->serial);
1898 
1899         if (!*card->id && c->id) {
1900                 int i, n = 0;
1901                 strlcpy(card->id, c->id, sizeof(card->id));
1902                 for (;;) {
1903                         for (i = 0; i < snd_ecards_limit; i++) {
1904                                 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1905                                         break;
1906                         }
1907                         if (i >= snd_ecards_limit)
1908                                 break;
1909                         n++;
1910                         if (n >= SNDRV_CARDS)
1911                                 break;
1912                         snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1913                 }
1914         }
1915 
1916         is_audigy = emu->audigy = c->emu10k2_chip;
1917 
1918         /* set addressing mode */
1919         emu->address_mode = is_audigy ? 0 : 1;
1920         /* set the DMA transfer mask */
1921         emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK;
1922         if (dma_set_mask(&pci->dev, emu->dma_mask) < 0 ||
1923             dma_set_coherent_mask(&pci->dev, emu->dma_mask) < 0) {
1924                 dev_err(card->dev,
1925                         "architecture does not support PCI busmaster DMA with mask 0x%lx\n",
1926                         emu->dma_mask);
1927                 kfree(emu);
1928                 pci_disable_device(pci);
1929                 return -ENXIO;
1930         }
1931         if (is_audigy)
1932                 emu->gpr_base = A_FXGPREGBASE;
1933         else
1934                 emu->gpr_base = FXGPREGBASE;
1935 
1936         err = pci_request_regions(pci, "EMU10K1");
1937         if (err < 0) {
1938                 kfree(emu);
1939                 pci_disable_device(pci);
1940                 return err;
1941         }
1942         emu->port = pci_resource_start(pci, 0);
1943 
1944         emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1945         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1946                                 (emu->address_mode ? 32 : 16) * 1024, &emu->ptb_pages) < 0) {
1947                 err = -ENOMEM;
1948                 goto error;
1949         }
1950 
1951         emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1952         emu->page_addr_table = vmalloc(emu->max_cache_pages *
1953                                        sizeof(unsigned long));
1954         if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1955                 err = -ENOMEM;
1956                 goto error;
1957         }
1958 
1959         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1960                                 EMUPAGESIZE, &emu->silent_page) < 0) {
1961                 err = -ENOMEM;
1962                 goto error;
1963         }
1964         emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1965         if (emu->memhdr == NULL) {
1966                 err = -ENOMEM;
1967                 goto error;
1968         }
1969         emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1970                 sizeof(struct snd_util_memblk);
1971 
1972         pci_set_master(pci);
1973 
1974         emu->fx8010.fxbus_mask = 0x303f;
1975         if (extin_mask == 0)
1976                 extin_mask = 0x3fcf;
1977         if (extout_mask == 0)
1978                 extout_mask = 0x7fff;
1979         emu->fx8010.extin_mask = extin_mask;
1980         emu->fx8010.extout_mask = extout_mask;
1981         emu->enable_ir = enable_ir;
1982 
1983         if (emu->card_capabilities->ca_cardbus_chip) {
1984                 err = snd_emu10k1_cardbus_init(emu);
1985                 if (err < 0)
1986                         goto error;
1987         }
1988         if (emu->card_capabilities->ecard) {
1989                 err = snd_emu10k1_ecard_init(emu);
1990                 if (err < 0)
1991                         goto error;
1992         } else if (emu->card_capabilities->emu_model) {
1993                 err = snd_emu10k1_emu1010_init(emu);
1994                 if (err < 0) {
1995                         snd_emu10k1_free(emu);
1996                         return err;
1997                 }
1998         } else {
1999                 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
2000                         does not support this, it shouldn't do any harm */
2001                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
2002                                         AC97SLOT_CNTR|AC97SLOT_LFE);
2003         }
2004 
2005         /* initialize TRAM setup */
2006         emu->fx8010.itram_size = (16 * 1024)/2;
2007         emu->fx8010.etram_pages.area = NULL;
2008         emu->fx8010.etram_pages.bytes = 0;
2009 
2010         /* irq handler must be registered after I/O ports are activated */
2011         if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
2012                         KBUILD_MODNAME, emu)) {
2013                 err = -EBUSY;
2014                 goto error;
2015         }
2016         emu->irq = pci->irq;
2017 
2018         /*
2019          *  Init to 0x02109204 :
2020          *  Clock accuracy    = 0     (1000ppm)
2021          *  Sample Rate       = 2     (48kHz)
2022          *  Audio Channel     = 1     (Left of 2)
2023          *  Source Number     = 0     (Unspecified)
2024          *  Generation Status = 1     (Original for Cat Code 12)
2025          *  Cat Code          = 12    (Digital Signal Mixer)
2026          *  Mode              = 0     (Mode 0)
2027          *  Emphasis          = 0     (None)
2028          *  CP                = 1     (Copyright unasserted)
2029          *  AN                = 0     (Audio data)
2030          *  P                 = 0     (Consumer)
2031          */
2032         emu->spdif_bits[0] = emu->spdif_bits[1] =
2033                 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
2034                 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
2035                 SPCS_GENERATIONSTATUS | 0x00001200 |
2036                 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
2037 
2038         emu->reserved_page = (struct snd_emu10k1_memblk *)
2039                 snd_emu10k1_synth_alloc(emu, 4096);
2040         if (emu->reserved_page)
2041                 emu->reserved_page->map_locked = 1;
2042 
2043         /* Clear silent pages and set up pointers */
2044         memset(emu->silent_page.area, 0, PAGE_SIZE);
2045         silent_page = emu->silent_page.addr << emu->address_mode;
2046         for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++)
2047                 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
2048 
2049         /* set up voice indices */
2050         for (idx = 0; idx < NUM_G; idx++) {
2051                 emu->voices[idx].emu = emu;
2052                 emu->voices[idx].number = idx;
2053         }
2054 
2055         err = snd_emu10k1_init(emu, enable_ir, 0);
2056         if (err < 0)
2057                 goto error;
2058 #ifdef CONFIG_PM_SLEEP
2059         err = alloc_pm_buffer(emu);
2060         if (err < 0)
2061                 goto error;
2062 #endif
2063 
2064         /*  Initialize the effect engine */
2065         err = snd_emu10k1_init_efx(emu);
2066         if (err < 0)
2067                 goto error;
2068         snd_emu10k1_audio_enable(emu);
2069 
2070         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops);
2071         if (err < 0)
2072                 goto error;
2073 
2074 #ifdef CONFIG_SND_PROC_FS
2075         snd_emu10k1_proc_init(emu);
2076 #endif
2077 
2078         *remu = emu;
2079         return 0;
2080 
2081  error:
2082         snd_emu10k1_free(emu);
2083         return err;
2084 }
2085 
2086 #ifdef CONFIG_PM_SLEEP
2087 static unsigned char saved_regs[] = {
2088         CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
2089         FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
2090         ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
2091         TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
2092         MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
2093         SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
2094         0xff /* end */
2095 };
2096 static unsigned char saved_regs_audigy[] = {
2097         A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
2098         A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
2099         0xff /* end */
2100 };
2101 
2102 static int alloc_pm_buffer(struct snd_emu10k1 *emu)
2103 {
2104         int size;
2105 
2106         size = ARRAY_SIZE(saved_regs);
2107         if (emu->audigy)
2108                 size += ARRAY_SIZE(saved_regs_audigy);
2109         emu->saved_ptr = vmalloc(4 * NUM_G * size);
2110         if (!emu->saved_ptr)
2111                 return -ENOMEM;
2112         if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
2113                 return -ENOMEM;
2114         if (emu->card_capabilities->ca0151_chip &&
2115             snd_p16v_alloc_pm_buffer(emu) < 0)
2116                 return -ENOMEM;
2117         return 0;
2118 }
2119 
2120 static void free_pm_buffer(struct snd_emu10k1 *emu)
2121 {
2122         vfree(emu->saved_ptr);
2123         snd_emu10k1_efx_free_pm_buffer(emu);
2124         if (emu->card_capabilities->ca0151_chip)
2125                 snd_p16v_free_pm_buffer(emu);
2126 }
2127 
2128 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2129 {
2130         int i;
2131         unsigned char *reg;
2132         unsigned int *val;
2133 
2134         val = emu->saved_ptr;
2135         for (reg = saved_regs; *reg != 0xff; reg++)
2136                 for (i = 0; i < NUM_G; i++, val++)
2137                         *val = snd_emu10k1_ptr_read(emu, *reg, i);
2138         if (emu->audigy) {
2139                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2140                         for (i = 0; i < NUM_G; i++, val++)
2141                                 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2142         }
2143         if (emu->audigy)
2144                 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2145         emu->saved_hcfg = inl(emu->port + HCFG);
2146 }
2147 
2148 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2149 {
2150         if (emu->card_capabilities->ca_cardbus_chip)
2151                 snd_emu10k1_cardbus_init(emu);
2152         if (emu->card_capabilities->ecard)
2153                 snd_emu10k1_ecard_init(emu);
2154         else if (emu->card_capabilities->emu_model)
2155                 snd_emu10k1_emu1010_init(emu);
2156         else
2157                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2158         snd_emu10k1_init(emu, emu->enable_ir, 1);
2159 }
2160 
2161 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2162 {
2163         int i;
2164         unsigned char *reg;
2165         unsigned int *val;
2166 
2167         snd_emu10k1_audio_enable(emu);
2168 
2169         /* resore for spdif */
2170         if (emu->audigy)
2171                 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2172         outl(emu->saved_hcfg, emu->port + HCFG);
2173 
2174         val = emu->saved_ptr;
2175         for (reg = saved_regs; *reg != 0xff; reg++)
2176                 for (i = 0; i < NUM_G; i++, val++)
2177                         snd_emu10k1_ptr_write(emu, *reg, i, *val);
2178         if (emu->audigy) {
2179                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2180                         for (i = 0; i < NUM_G; i++, val++)
2181                                 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2182         }
2183 }
2184 #endif
2185 

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