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TOMOYO Linux Cross Reference
Linux/sound/pci/hda/patch_hdmi.c

Version: ~ [ linux-5.5 ] ~ [ linux-5.4.15 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.98 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.167 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.211 ] ~ [ linux-4.8.17 ] ~ [ linux-4.7.10 ] ~ [ linux-4.6.7 ] ~ [ linux-4.5.7 ] ~ [ linux-4.4.211 ] ~ [ linux-4.3.6 ] ~ [ linux-4.2.8 ] ~ [ linux-4.1.52 ] ~ [ linux-4.0.9 ] ~ [ linux-3.19.8 ] ~ [ linux-3.18.140 ] ~ [ linux-3.17.8 ] ~ [ linux-3.16.81 ] ~ [ linux-3.15.10 ] ~ [ linux-3.14.79 ] ~ [ linux-3.13.11 ] ~ [ linux-3.12.74 ] ~ [ linux-3.11.10 ] ~ [ linux-3.10.108 ] ~ [ linux-3.9.11 ] ~ [ linux-3.8.13 ] ~ [ linux-3.7.10 ] ~ [ linux-3.6.11 ] ~ [ linux-3.5.7 ] ~ [ linux-3.4.113 ] ~ [ linux-3.3.8 ] ~ [ linux-3.2.102 ] ~ [ linux-3.1.10 ] ~ [ linux-3.0.101 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.5 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 /*
  2  *
  3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
  4  *
  5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
  6  *  Copyright (c) 2006 ATI Technologies Inc.
  7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
  8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  9  *
 10  *  Authors:
 11  *                      Wu Fengguang <wfg@linux.intel.com>
 12  *
 13  *  Maintained by:
 14  *                      Wu Fengguang <wfg@linux.intel.com>
 15  *
 16  *  This program is free software; you can redistribute it and/or modify it
 17  *  under the terms of the GNU General Public License as published by the Free
 18  *  Software Foundation; either version 2 of the License, or (at your option)
 19  *  any later version.
 20  *
 21  *  This program is distributed in the hope that it will be useful, but
 22  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
 23  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 24  *  for more details.
 25  *
 26  *  You should have received a copy of the GNU General Public License
 27  *  along with this program; if not, write to the Free Software Foundation,
 28  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 29  */
 30 
 31 #include <linux/init.h>
 32 #include <linux/delay.h>
 33 #include <linux/slab.h>
 34 #include <linux/module.h>
 35 #include <sound/core.h>
 36 #include <sound/jack.h>
 37 #include <sound/asoundef.h>
 38 #include <sound/tlv.h>
 39 #include "hda_codec.h"
 40 #include "hda_local.h"
 41 #include "hda_jack.h"
 42 
 43 static bool static_hdmi_pcm;
 44 module_param(static_hdmi_pcm, bool, 0644);
 45 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
 46 
 47 #define is_haswell(codec)  ((codec)->vendor_id == 0x80862807)
 48 #define is_broadwell(codec)    ((codec)->vendor_id == 0x80862808)
 49 #define is_skylake(codec) ((codec)->vendor_id == 0x80862809)
 50 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
 51                                         || is_skylake(codec))
 52 
 53 #define is_valleyview(codec) ((codec)->vendor_id == 0x80862882)
 54 
 55 struct hdmi_spec_per_cvt {
 56         hda_nid_t cvt_nid;
 57         int assigned;
 58         unsigned int channels_min;
 59         unsigned int channels_max;
 60         u32 rates;
 61         u64 formats;
 62         unsigned int maxbps;
 63 };
 64 
 65 /* max. connections to a widget */
 66 #define HDA_MAX_CONNECTIONS     32
 67 
 68 struct hdmi_spec_per_pin {
 69         hda_nid_t pin_nid;
 70         int num_mux_nids;
 71         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
 72         int mux_idx;
 73         hda_nid_t cvt_nid;
 74 
 75         struct hda_codec *codec;
 76         struct hdmi_eld sink_eld;
 77         struct mutex lock;
 78         struct delayed_work work;
 79         struct snd_kcontrol *eld_ctl;
 80         int repoll_count;
 81         bool setup; /* the stream has been set up by prepare callback */
 82         int channels; /* current number of channels */
 83         bool non_pcm;
 84         bool chmap_set;         /* channel-map override by ALSA API? */
 85         unsigned char chmap[8]; /* ALSA API channel-map */
 86         char pcm_name[8];       /* filled in build_pcm callbacks */
 87 #ifdef CONFIG_PROC_FS
 88         struct snd_info_entry *proc_entry;
 89 #endif
 90 };
 91 
 92 struct hdmi_spec {
 93         int num_cvts;
 94         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 95         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 96 
 97         int num_pins;
 98         struct snd_array pins; /* struct hdmi_spec_per_pin */
 99         struct snd_array pcm_rec; /* struct hda_pcm */
100         unsigned int channels_max; /* max over all cvts */
101 
102         struct hdmi_eld temp_eld;
103 
104         bool dyn_pin_out;
105 
106         /*
107          * Non-generic ATI/NVIDIA specific
108          */
109         struct hda_multi_out multiout;
110         struct hda_pcm_stream pcm_playback;
111 };
112 
113 
114 struct hdmi_audio_infoframe {
115         u8 type; /* 0x84 */
116         u8 ver;  /* 0x01 */
117         u8 len;  /* 0x0a */
118 
119         u8 checksum;
120 
121         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
122         u8 SS01_SF24;
123         u8 CXT04;
124         u8 CA;
125         u8 LFEPBL01_LSV36_DM_INH7;
126 };
127 
128 struct dp_audio_infoframe {
129         u8 type; /* 0x84 */
130         u8 len;  /* 0x1b */
131         u8 ver;  /* 0x11 << 2 */
132 
133         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
134         u8 SS01_SF24;
135         u8 CXT04;
136         u8 CA;
137         u8 LFEPBL01_LSV36_DM_INH7;
138 };
139 
140 union audio_infoframe {
141         struct hdmi_audio_infoframe hdmi;
142         struct dp_audio_infoframe dp;
143         u8 bytes[0];
144 };
145 
146 /*
147  * CEA speaker placement:
148  *
149  *        FLH       FCH        FRH
150  *  FLW    FL  FLC   FC   FRC   FR   FRW
151  *
152  *                                  LFE
153  *                     TC
154  *
155  *          RL  RLC   RC   RRC   RR
156  *
157  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
158  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
159  */
160 enum cea_speaker_placement {
161         FL  = (1 <<  0),        /* Front Left           */
162         FC  = (1 <<  1),        /* Front Center         */
163         FR  = (1 <<  2),        /* Front Right          */
164         FLC = (1 <<  3),        /* Front Left Center    */
165         FRC = (1 <<  4),        /* Front Right Center   */
166         RL  = (1 <<  5),        /* Rear Left            */
167         RC  = (1 <<  6),        /* Rear Center          */
168         RR  = (1 <<  7),        /* Rear Right           */
169         RLC = (1 <<  8),        /* Rear Left Center     */
170         RRC = (1 <<  9),        /* Rear Right Center    */
171         LFE = (1 << 10),        /* Low Frequency Effect */
172         FLW = (1 << 11),        /* Front Left Wide      */
173         FRW = (1 << 12),        /* Front Right Wide     */
174         FLH = (1 << 13),        /* Front Left High      */
175         FCH = (1 << 14),        /* Front Center High    */
176         FRH = (1 << 15),        /* Front Right High     */
177         TC  = (1 << 16),        /* Top Center           */
178 };
179 
180 /*
181  * ELD SA bits in the CEA Speaker Allocation data block
182  */
183 static int eld_speaker_allocation_bits[] = {
184         [0] = FL | FR,
185         [1] = LFE,
186         [2] = FC,
187         [3] = RL | RR,
188         [4] = RC,
189         [5] = FLC | FRC,
190         [6] = RLC | RRC,
191         /* the following are not defined in ELD yet */
192         [7] = FLW | FRW,
193         [8] = FLH | FRH,
194         [9] = TC,
195         [10] = FCH,
196 };
197 
198 struct cea_channel_speaker_allocation {
199         int ca_index;
200         int speakers[8];
201 
202         /* derived values, just for convenience */
203         int channels;
204         int spk_mask;
205 };
206 
207 /*
208  * ALSA sequence is:
209  *
210  *       surround40   surround41   surround50   surround51   surround71
211  * ch0   front left   =            =            =            =
212  * ch1   front right  =            =            =            =
213  * ch2   rear left    =            =            =            =
214  * ch3   rear right   =            =            =            =
215  * ch4                LFE          center       center       center
216  * ch5                                          LFE          LFE
217  * ch6                                                       side left
218  * ch7                                                       side right
219  *
220  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
221  */
222 static int hdmi_channel_mapping[0x32][8] = {
223         /* stereo */
224         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
225         /* 2.1 */
226         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
227         /* Dolby Surround */
228         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
229         /* surround40 */
230         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
231         /* 4ch */
232         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
233         /* surround41 */
234         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
235         /* surround50 */
236         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
237         /* surround51 */
238         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
239         /* 7.1 */
240         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
241 };
242 
243 /*
244  * This is an ordered list!
245  *
246  * The preceding ones have better chances to be selected by
247  * hdmi_channel_allocation().
248  */
249 static struct cea_channel_speaker_allocation channel_allocations[] = {
250 /*                        channel:   7     6    5    4    3     2    1    0  */
251 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
252                                  /* 2.1 */
253 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
254                                  /* Dolby Surround */
255 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
256                                  /* surround40 */
257 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
258                                  /* surround41 */
259 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
260                                  /* surround50 */
261 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
262                                  /* surround51 */
263 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
264                                  /* 6.1 */
265 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
266                                  /* surround71 */
267 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
268 
269 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
270 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
271 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
272 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
273 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
274 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
275 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
276 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
277 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
278 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
279 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
280 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
281 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
282 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
283 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
284 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
285 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
286 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
287 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
288 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
289 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
290 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
291 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
292 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
293 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
294 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
295 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
296 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
297 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
298 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
299 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
300 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
301 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
302 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
303 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
304 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
305 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
306 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
307 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
308 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
309 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
310 };
311 
312 
313 /*
314  * HDMI routines
315  */
316 
317 #define get_pin(spec, idx) \
318         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
319 #define get_cvt(spec, idx) \
320         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
321 #define get_pcm_rec(spec, idx) \
322         ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
323 
324 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
325 {
326         int pin_idx;
327 
328         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
329                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
330                         return pin_idx;
331 
332         snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
333         return -EINVAL;
334 }
335 
336 static int hinfo_to_pin_index(struct hdmi_spec *spec,
337                               struct hda_pcm_stream *hinfo)
338 {
339         int pin_idx;
340 
341         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
342                 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
343                         return pin_idx;
344 
345         snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
346         return -EINVAL;
347 }
348 
349 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
350 {
351         int cvt_idx;
352 
353         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
354                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
355                         return cvt_idx;
356 
357         snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
358         return -EINVAL;
359 }
360 
361 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
362                         struct snd_ctl_elem_info *uinfo)
363 {
364         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
365         struct hdmi_spec *spec = codec->spec;
366         struct hdmi_spec_per_pin *per_pin;
367         struct hdmi_eld *eld;
368         int pin_idx;
369 
370         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
371 
372         pin_idx = kcontrol->private_value;
373         per_pin = get_pin(spec, pin_idx);
374         eld = &per_pin->sink_eld;
375 
376         mutex_lock(&per_pin->lock);
377         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
378         mutex_unlock(&per_pin->lock);
379 
380         return 0;
381 }
382 
383 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
384                         struct snd_ctl_elem_value *ucontrol)
385 {
386         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
387         struct hdmi_spec *spec = codec->spec;
388         struct hdmi_spec_per_pin *per_pin;
389         struct hdmi_eld *eld;
390         int pin_idx;
391 
392         pin_idx = kcontrol->private_value;
393         per_pin = get_pin(spec, pin_idx);
394         eld = &per_pin->sink_eld;
395 
396         mutex_lock(&per_pin->lock);
397         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
398             eld->eld_size > ELD_MAX_SIZE) {
399                 mutex_unlock(&per_pin->lock);
400                 snd_BUG();
401                 return -EINVAL;
402         }
403 
404         memset(ucontrol->value.bytes.data, 0,
405                ARRAY_SIZE(ucontrol->value.bytes.data));
406         if (eld->eld_valid)
407                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
408                        eld->eld_size);
409         mutex_unlock(&per_pin->lock);
410 
411         return 0;
412 }
413 
414 static struct snd_kcontrol_new eld_bytes_ctl = {
415         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
416         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
417         .name = "ELD",
418         .info = hdmi_eld_ctl_info,
419         .get = hdmi_eld_ctl_get,
420 };
421 
422 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
423                         int device)
424 {
425         struct snd_kcontrol *kctl;
426         struct hdmi_spec *spec = codec->spec;
427         int err;
428 
429         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
430         if (!kctl)
431                 return -ENOMEM;
432         kctl->private_value = pin_idx;
433         kctl->id.device = device;
434 
435         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
436         if (err < 0)
437                 return err;
438 
439         get_pin(spec, pin_idx)->eld_ctl = kctl;
440         return 0;
441 }
442 
443 #ifdef BE_PARANOID
444 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
445                                 int *packet_index, int *byte_index)
446 {
447         int val;
448 
449         val = snd_hda_codec_read(codec, pin_nid, 0,
450                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
451 
452         *packet_index = val >> 5;
453         *byte_index = val & 0x1f;
454 }
455 #endif
456 
457 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
458                                 int packet_index, int byte_index)
459 {
460         int val;
461 
462         val = (packet_index << 5) | (byte_index & 0x1f);
463 
464         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
465 }
466 
467 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
468                                 unsigned char val)
469 {
470         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
471 }
472 
473 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
474 {
475         struct hdmi_spec *spec = codec->spec;
476         int pin_out;
477 
478         /* Unmute */
479         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
480                 snd_hda_codec_write(codec, pin_nid, 0,
481                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
482 
483         if (spec->dyn_pin_out)
484                 /* Disable pin out until stream is active */
485                 pin_out = 0;
486         else
487                 /* Enable pin out: some machines with GM965 gets broken output
488                  * when the pin is disabled or changed while using with HDMI
489                  */
490                 pin_out = PIN_OUT;
491 
492         snd_hda_codec_write(codec, pin_nid, 0,
493                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
494 }
495 
496 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
497 {
498         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
499                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
500 }
501 
502 static void hdmi_set_channel_count(struct hda_codec *codec,
503                                    hda_nid_t cvt_nid, int chs)
504 {
505         if (chs != hdmi_get_channel_count(codec, cvt_nid))
506                 snd_hda_codec_write(codec, cvt_nid, 0,
507                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
508 }
509 
510 /*
511  * ELD proc files
512  */
513 
514 #ifdef CONFIG_PROC_FS
515 static void print_eld_info(struct snd_info_entry *entry,
516                            struct snd_info_buffer *buffer)
517 {
518         struct hdmi_spec_per_pin *per_pin = entry->private_data;
519 
520         mutex_lock(&per_pin->lock);
521         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
522         mutex_unlock(&per_pin->lock);
523 }
524 
525 static void write_eld_info(struct snd_info_entry *entry,
526                            struct snd_info_buffer *buffer)
527 {
528         struct hdmi_spec_per_pin *per_pin = entry->private_data;
529 
530         mutex_lock(&per_pin->lock);
531         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
532         mutex_unlock(&per_pin->lock);
533 }
534 
535 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
536 {
537         char name[32];
538         struct hda_codec *codec = per_pin->codec;
539         struct snd_info_entry *entry;
540         int err;
541 
542         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
543         err = snd_card_proc_new(codec->bus->card, name, &entry);
544         if (err < 0)
545                 return err;
546 
547         snd_info_set_text_ops(entry, per_pin, print_eld_info);
548         entry->c.text.write = write_eld_info;
549         entry->mode |= S_IWUSR;
550         per_pin->proc_entry = entry;
551 
552         return 0;
553 }
554 
555 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
556 {
557         if (!per_pin->codec->bus->shutdown && per_pin->proc_entry) {
558                 snd_device_free(per_pin->codec->bus->card, per_pin->proc_entry);
559                 per_pin->proc_entry = NULL;
560         }
561 }
562 #else
563 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
564                                int index)
565 {
566         return 0;
567 }
568 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
569 {
570 }
571 #endif
572 
573 /*
574  * Channel mapping routines
575  */
576 
577 /*
578  * Compute derived values in channel_allocations[].
579  */
580 static void init_channel_allocations(void)
581 {
582         int i, j;
583         struct cea_channel_speaker_allocation *p;
584 
585         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
586                 p = channel_allocations + i;
587                 p->channels = 0;
588                 p->spk_mask = 0;
589                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
590                         if (p->speakers[j]) {
591                                 p->channels++;
592                                 p->spk_mask |= p->speakers[j];
593                         }
594         }
595 }
596 
597 static int get_channel_allocation_order(int ca)
598 {
599         int i;
600 
601         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
602                 if (channel_allocations[i].ca_index == ca)
603                         break;
604         }
605         return i;
606 }
607 
608 /*
609  * The transformation takes two steps:
610  *
611  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
612  *            spk_mask => (channel_allocations[])         => ai->CA
613  *
614  * TODO: it could select the wrong CA from multiple candidates.
615 */
616 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
617 {
618         int i;
619         int ca = 0;
620         int spk_mask = 0;
621         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
622 
623         /*
624          * CA defaults to 0 for basic stereo audio
625          */
626         if (channels <= 2)
627                 return 0;
628 
629         /*
630          * expand ELD's speaker allocation mask
631          *
632          * ELD tells the speaker mask in a compact(paired) form,
633          * expand ELD's notions to match the ones used by Audio InfoFrame.
634          */
635         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
636                 if (eld->info.spk_alloc & (1 << i))
637                         spk_mask |= eld_speaker_allocation_bits[i];
638         }
639 
640         /* search for the first working match in the CA table */
641         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
642                 if (channels == channel_allocations[i].channels &&
643                     (spk_mask & channel_allocations[i].spk_mask) ==
644                                 channel_allocations[i].spk_mask) {
645                         ca = channel_allocations[i].ca_index;
646                         break;
647                 }
648         }
649 
650         if (!ca) {
651                 /* if there was no match, select the regular ALSA channel
652                  * allocation with the matching number of channels */
653                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
654                         if (channels == channel_allocations[i].channels) {
655                                 ca = channel_allocations[i].ca_index;
656                                 break;
657                         }
658                 }
659         }
660 
661         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
662         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
663                     ca, channels, buf);
664 
665         return ca;
666 }
667 
668 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
669                                        hda_nid_t pin_nid)
670 {
671 #ifdef CONFIG_SND_DEBUG_VERBOSE
672         int i;
673         int slot;
674 
675         for (i = 0; i < 8; i++) {
676                 slot = snd_hda_codec_read(codec, pin_nid, 0,
677                                                 AC_VERB_GET_HDMI_CHAN_SLOT, i);
678                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
679                                                 slot >> 4, slot & 0xf);
680         }
681 #endif
682 }
683 
684 
685 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
686                                        hda_nid_t pin_nid,
687                                        bool non_pcm,
688                                        int ca)
689 {
690         struct cea_channel_speaker_allocation *ch_alloc;
691         int i;
692         int err;
693         int order;
694         int non_pcm_mapping[8];
695 
696         order = get_channel_allocation_order(ca);
697         ch_alloc = &channel_allocations[order];
698 
699         if (hdmi_channel_mapping[ca][1] == 0) {
700                 int hdmi_slot = 0;
701                 /* fill actual channel mappings in ALSA channel (i) order */
702                 for (i = 0; i < ch_alloc->channels; i++) {
703                         while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
704                                 hdmi_slot++; /* skip zero slots */
705 
706                         hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
707                 }
708                 /* fill the rest of the slots with ALSA channel 0xf */
709                 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
710                         if (!ch_alloc->speakers[7 - hdmi_slot])
711                                 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
712         }
713 
714         if (non_pcm) {
715                 for (i = 0; i < ch_alloc->channels; i++)
716                         non_pcm_mapping[i] = (i << 4) | i;
717                 for (; i < 8; i++)
718                         non_pcm_mapping[i] = (0xf << 4) | i;
719         }
720 
721         for (i = 0; i < 8; i++) {
722                 err = snd_hda_codec_write(codec, pin_nid, 0,
723                                           AC_VERB_SET_HDMI_CHAN_SLOT,
724                                           non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
725                 if (err) {
726                         snd_printdd(KERN_NOTICE
727                                     "HDMI: channel mapping failed\n");
728                         break;
729                 }
730         }
731 }
732 
733 struct channel_map_table {
734         unsigned char map;              /* ALSA API channel map position */
735         int spk_mask;                   /* speaker position bit mask */
736 };
737 
738 static struct channel_map_table map_tables[] = {
739         { SNDRV_CHMAP_FL,       FL },
740         { SNDRV_CHMAP_FR,       FR },
741         { SNDRV_CHMAP_RL,       RL },
742         { SNDRV_CHMAP_RR,       RR },
743         { SNDRV_CHMAP_LFE,      LFE },
744         { SNDRV_CHMAP_FC,       FC },
745         { SNDRV_CHMAP_RLC,      RLC },
746         { SNDRV_CHMAP_RRC,      RRC },
747         { SNDRV_CHMAP_RC,       RC },
748         { SNDRV_CHMAP_FLC,      FLC },
749         { SNDRV_CHMAP_FRC,      FRC },
750         { SNDRV_CHMAP_TFL,      FLH },
751         { SNDRV_CHMAP_TFR,      FRH },
752         { SNDRV_CHMAP_FLW,      FLW },
753         { SNDRV_CHMAP_FRW,      FRW },
754         { SNDRV_CHMAP_TC,       TC },
755         { SNDRV_CHMAP_TFC,      FCH },
756         {} /* terminator */
757 };
758 
759 /* from ALSA API channel position to speaker bit mask */
760 static int to_spk_mask(unsigned char c)
761 {
762         struct channel_map_table *t = map_tables;
763         for (; t->map; t++) {
764                 if (t->map == c)
765                         return t->spk_mask;
766         }
767         return 0;
768 }
769 
770 /* from ALSA API channel position to CEA slot */
771 static int to_cea_slot(int ordered_ca, unsigned char pos)
772 {
773         int mask = to_spk_mask(pos);
774         int i;
775 
776         if (mask) {
777                 for (i = 0; i < 8; i++) {
778                         if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
779                                 return i;
780                 }
781         }
782 
783         return -1;
784 }
785 
786 /* from speaker bit mask to ALSA API channel position */
787 static int spk_to_chmap(int spk)
788 {
789         struct channel_map_table *t = map_tables;
790         for (; t->map; t++) {
791                 if (t->spk_mask == spk)
792                         return t->map;
793         }
794         return 0;
795 }
796 
797 /* from CEA slot to ALSA API channel position */
798 static int from_cea_slot(int ordered_ca, unsigned char slot)
799 {
800         int mask = channel_allocations[ordered_ca].speakers[7 - slot];
801 
802         return spk_to_chmap(mask);
803 }
804 
805 /* get the CA index corresponding to the given ALSA API channel map */
806 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
807 {
808         int i, spks = 0, spk_mask = 0;
809 
810         for (i = 0; i < chs; i++) {
811                 int mask = to_spk_mask(map[i]);
812                 if (mask) {
813                         spk_mask |= mask;
814                         spks++;
815                 }
816         }
817 
818         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
819                 if ((chs == channel_allocations[i].channels ||
820                      spks == channel_allocations[i].channels) &&
821                     (spk_mask & channel_allocations[i].spk_mask) ==
822                                 channel_allocations[i].spk_mask)
823                         return channel_allocations[i].ca_index;
824         }
825         return -1;
826 }
827 
828 /* set up the channel slots for the given ALSA API channel map */
829 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
830                                              hda_nid_t pin_nid,
831                                              int chs, unsigned char *map,
832                                              int ca)
833 {
834         int ordered_ca = get_channel_allocation_order(ca);
835         int alsa_pos, hdmi_slot;
836         int assignments[8] = {[0 ... 7] = 0xf};
837 
838         for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
839 
840                 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
841 
842                 if (hdmi_slot < 0)
843                         continue; /* unassigned channel */
844 
845                 assignments[hdmi_slot] = alsa_pos;
846         }
847 
848         for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
849                 int val, err;
850 
851                 val = (assignments[hdmi_slot] << 4) | hdmi_slot;
852                 err = snd_hda_codec_write(codec, pin_nid, 0,
853                                           AC_VERB_SET_HDMI_CHAN_SLOT, val);
854                 if (err)
855                         return -EINVAL;
856         }
857         return 0;
858 }
859 
860 /* store ALSA API channel map from the current default map */
861 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
862 {
863         int i;
864         int ordered_ca = get_channel_allocation_order(ca);
865         for (i = 0; i < 8; i++) {
866                 if (i < channel_allocations[ordered_ca].channels)
867                         map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
868                 else
869                         map[i] = 0;
870         }
871 }
872 
873 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
874                                        hda_nid_t pin_nid, bool non_pcm, int ca,
875                                        int channels, unsigned char *map,
876                                        bool chmap_set)
877 {
878         if (!non_pcm && chmap_set) {
879                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
880                                                   channels, map, ca);
881         } else {
882                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
883                 hdmi_setup_fake_chmap(map, ca);
884         }
885 
886         hdmi_debug_channel_mapping(codec, pin_nid);
887 }
888 
889 /*
890  * Audio InfoFrame routines
891  */
892 
893 /*
894  * Enable Audio InfoFrame Transmission
895  */
896 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
897                                        hda_nid_t pin_nid)
898 {
899         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
900         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
901                                                 AC_DIPXMIT_BEST);
902 }
903 
904 /*
905  * Disable Audio InfoFrame Transmission
906  */
907 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
908                                       hda_nid_t pin_nid)
909 {
910         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
911         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
912                                                 AC_DIPXMIT_DISABLE);
913 }
914 
915 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
916 {
917 #ifdef CONFIG_SND_DEBUG_VERBOSE
918         int i;
919         int size;
920 
921         size = snd_hdmi_get_eld_size(codec, pin_nid);
922         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
923 
924         for (i = 0; i < 8; i++) {
925                 size = snd_hda_codec_read(codec, pin_nid, 0,
926                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
927                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
928         }
929 #endif
930 }
931 
932 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
933 {
934 #ifdef BE_PARANOID
935         int i, j;
936         int size;
937         int pi, bi;
938         for (i = 0; i < 8; i++) {
939                 size = snd_hda_codec_read(codec, pin_nid, 0,
940                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
941                 if (size == 0)
942                         continue;
943 
944                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
945                 for (j = 1; j < 1000; j++) {
946                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
947                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
948                         if (pi != i)
949                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
950                                                 bi, pi, i);
951                         if (bi == 0) /* byte index wrapped around */
952                                 break;
953                 }
954                 snd_printd(KERN_INFO
955                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
956                         i, size, j);
957         }
958 #endif
959 }
960 
961 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
962 {
963         u8 *bytes = (u8 *)hdmi_ai;
964         u8 sum = 0;
965         int i;
966 
967         hdmi_ai->checksum = 0;
968 
969         for (i = 0; i < sizeof(*hdmi_ai); i++)
970                 sum += bytes[i];
971 
972         hdmi_ai->checksum = -sum;
973 }
974 
975 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
976                                       hda_nid_t pin_nid,
977                                       u8 *dip, int size)
978 {
979         int i;
980 
981         hdmi_debug_dip_size(codec, pin_nid);
982         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
983 
984         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
985         for (i = 0; i < size; i++)
986                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
987 }
988 
989 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
990                                     u8 *dip, int size)
991 {
992         u8 val;
993         int i;
994 
995         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
996                                                             != AC_DIPXMIT_BEST)
997                 return false;
998 
999         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1000         for (i = 0; i < size; i++) {
1001                 val = snd_hda_codec_read(codec, pin_nid, 0,
1002                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
1003                 if (val != dip[i])
1004                         return false;
1005         }
1006 
1007         return true;
1008 }
1009 
1010 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1011                                        struct hdmi_spec_per_pin *per_pin,
1012                                        bool non_pcm)
1013 {
1014         hda_nid_t pin_nid = per_pin->pin_nid;
1015         int channels = per_pin->channels;
1016         int active_channels;
1017         struct hdmi_eld *eld;
1018         int ca, ordered_ca;
1019         union audio_infoframe ai;
1020 
1021         if (!channels)
1022                 return;
1023 
1024         if (is_haswell_plus(codec))
1025                 snd_hda_codec_write(codec, pin_nid, 0,
1026                                             AC_VERB_SET_AMP_GAIN_MUTE,
1027                                             AMP_OUT_UNMUTE);
1028 
1029         eld = &per_pin->sink_eld;
1030         if (!eld->monitor_present) {
1031                 hdmi_set_channel_count(codec, per_pin->cvt_nid, channels);
1032                 return;
1033         }
1034 
1035         if (!non_pcm && per_pin->chmap_set)
1036                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1037         else
1038                 ca = hdmi_channel_allocation(eld, channels);
1039         if (ca < 0)
1040                 ca = 0;
1041 
1042         ordered_ca = get_channel_allocation_order(ca);
1043         active_channels = channel_allocations[ordered_ca].channels;
1044 
1045         hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1046 
1047         memset(&ai, 0, sizeof(ai));
1048         if (eld->info.conn_type == 0) { /* HDMI */
1049                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1050 
1051                 hdmi_ai->type           = 0x84;
1052                 hdmi_ai->ver            = 0x01;
1053                 hdmi_ai->len            = 0x0a;
1054                 hdmi_ai->CC02_CT47      = active_channels - 1;
1055                 hdmi_ai->CA             = ca;
1056                 hdmi_checksum_audio_infoframe(hdmi_ai);
1057         } else if (eld->info.conn_type == 1) { /* DisplayPort */
1058                 struct dp_audio_infoframe *dp_ai = &ai.dp;
1059 
1060                 dp_ai->type             = 0x84;
1061                 dp_ai->len              = 0x1b;
1062                 dp_ai->ver              = 0x11 << 2;
1063                 dp_ai->CC02_CT47        = active_channels - 1;
1064                 dp_ai->CA               = ca;
1065         } else {
1066                 snd_printd("HDMI: unknown connection type at pin %d\n",
1067                             pin_nid);
1068                 return;
1069         }
1070 
1071         /*
1072          * always configure channel mapping, it may have been changed by the
1073          * user in the meantime
1074          */
1075         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1076                                    channels, per_pin->chmap,
1077                                    per_pin->chmap_set);
1078 
1079         /*
1080          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1081          * sizeof(*dp_ai) to avoid partial match/update problems when
1082          * the user switches between HDMI/DP monitors.
1083          */
1084         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1085                                         sizeof(ai))) {
1086                 snd_printdd("hdmi_setup_audio_infoframe: "
1087                             "pin=%d channels=%d ca=0x%02x\n",
1088                             pin_nid,
1089                             active_channels, ca);
1090                 hdmi_stop_infoframe_trans(codec, pin_nid);
1091                 hdmi_fill_audio_infoframe(codec, pin_nid,
1092                                             ai.bytes, sizeof(ai));
1093                 hdmi_start_infoframe_trans(codec, pin_nid);
1094         }
1095 
1096         per_pin->non_pcm = non_pcm;
1097 }
1098 
1099 
1100 /*
1101  * Unsolicited events
1102  */
1103 
1104 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1105 
1106 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1107 {
1108         struct hdmi_spec *spec = codec->spec;
1109         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1110         int pin_nid;
1111         int pin_idx;
1112         struct hda_jack_tbl *jack;
1113         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1114 
1115         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1116         if (!jack)
1117                 return;
1118         pin_nid = jack->nid;
1119         jack->jack_dirty = 1;
1120 
1121         _snd_printd(SND_PR_VERBOSE,
1122                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1123                 codec->addr, pin_nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1124                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1125 
1126         pin_idx = pin_nid_to_pin_index(spec, pin_nid);
1127         if (pin_idx < 0)
1128                 return;
1129 
1130         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1131                 snd_hda_jack_report_sync(codec);
1132 }
1133 
1134 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1135 {
1136         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1137         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1138         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1139         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1140 
1141         printk(KERN_INFO
1142                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1143                 codec->addr,
1144                 tag,
1145                 subtag,
1146                 cp_state,
1147                 cp_ready);
1148 
1149         /* TODO */
1150         if (cp_state)
1151                 ;
1152         if (cp_ready)
1153                 ;
1154 }
1155 
1156 
1157 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1158 {
1159         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1160         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1161 
1162         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1163                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1164                 return;
1165         }
1166 
1167         if (subtag == 0)
1168                 hdmi_intrinsic_event(codec, res);
1169         else
1170                 hdmi_non_intrinsic_event(codec, res);
1171 }
1172 
1173 static void haswell_verify_D0(struct hda_codec *codec,
1174                 hda_nid_t cvt_nid, hda_nid_t nid)
1175 {
1176         int pwr;
1177 
1178         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1179          * thus pins could only choose converter 0 for use. Make sure the
1180          * converters are in correct power state */
1181         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1182                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1183 
1184         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1185                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1186                                     AC_PWRST_D0);
1187                 msleep(40);
1188                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1189                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1190                 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1191         }
1192 }
1193 
1194 /*
1195  * Callbacks
1196  */
1197 
1198 /* HBR should be Non-PCM, 8 channels */
1199 #define is_hbr_format(format) \
1200         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1201 
1202 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1203                               hda_nid_t pin_nid, u32 stream_tag, int format)
1204 {
1205         int pinctl;
1206         int new_pinctl = 0;
1207 
1208         if (is_haswell_plus(codec))
1209                 haswell_verify_D0(codec, cvt_nid, pin_nid);
1210 
1211         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1212                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1213                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1214 
1215                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1216                 if (is_hbr_format(format))
1217                         new_pinctl |= AC_PINCTL_EPT_HBR;
1218                 else
1219                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1220 
1221                 snd_printdd("hdmi_setup_stream: "
1222                             "NID=0x%x, %spinctl=0x%x\n",
1223                             pin_nid,
1224                             pinctl == new_pinctl ? "" : "new-",
1225                             new_pinctl);
1226 
1227                 if (pinctl != new_pinctl)
1228                         snd_hda_codec_write(codec, pin_nid, 0,
1229                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1230                                             new_pinctl);
1231 
1232         }
1233         if (is_hbr_format(format) && !new_pinctl) {
1234                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1235                 return -EINVAL;
1236         }
1237 
1238         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1239         return 0;
1240 }
1241 
1242 static int hdmi_choose_cvt(struct hda_codec *codec,
1243                         int pin_idx, int *cvt_id, int *mux_id)
1244 {
1245         struct hdmi_spec *spec = codec->spec;
1246         struct hdmi_spec_per_pin *per_pin;
1247         struct hdmi_spec_per_cvt *per_cvt = NULL;
1248         int cvt_idx, mux_idx = 0;
1249 
1250         per_pin = get_pin(spec, pin_idx);
1251 
1252         /* Dynamically assign converter to stream */
1253         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1254                 per_cvt = get_cvt(spec, cvt_idx);
1255 
1256                 /* Must not already be assigned */
1257                 if (per_cvt->assigned)
1258                         continue;
1259                 /* Must be in pin's mux's list of converters */
1260                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1261                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1262                                 break;
1263                 /* Not in mux list */
1264                 if (mux_idx == per_pin->num_mux_nids)
1265                         continue;
1266                 break;
1267         }
1268 
1269         /* No free converters */
1270         if (cvt_idx == spec->num_cvts)
1271                 return -ENODEV;
1272 
1273         per_pin->mux_idx = mux_idx;
1274 
1275         if (cvt_id)
1276                 *cvt_id = cvt_idx;
1277         if (mux_id)
1278                 *mux_id = mux_idx;
1279 
1280         return 0;
1281 }
1282 
1283 /* Assure the pin select the right convetor */
1284 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1285                         struct hdmi_spec_per_pin *per_pin)
1286 {
1287         hda_nid_t pin_nid = per_pin->pin_nid;
1288         int mux_idx, curr;
1289 
1290         mux_idx = per_pin->mux_idx;
1291         curr = snd_hda_codec_read(codec, pin_nid, 0,
1292                                           AC_VERB_GET_CONNECT_SEL, 0);
1293         if (curr != mux_idx)
1294                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1295                                             AC_VERB_SET_CONNECT_SEL,
1296                                             mux_idx);
1297 }
1298 
1299 /* Intel HDMI workaround to fix audio routing issue:
1300  * For some Intel display codecs, pins share the same connection list.
1301  * So a conveter can be selected by multiple pins and playback on any of these
1302  * pins will generate sound on the external display, because audio flows from
1303  * the same converter to the display pipeline. Also muting one pin may make
1304  * other pins have no sound output.
1305  * So this function assures that an assigned converter for a pin is not selected
1306  * by any other pins.
1307  */
1308 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1309                         hda_nid_t pin_nid, int mux_idx)
1310 {
1311         struct hdmi_spec *spec = codec->spec;
1312         hda_nid_t nid, end_nid;
1313         int cvt_idx, curr;
1314         struct hdmi_spec_per_cvt *per_cvt;
1315 
1316         /* configure all pins, including "no physical connection" ones */
1317         end_nid = codec->start_nid + codec->num_nodes;
1318         for (nid = codec->start_nid; nid < end_nid; nid++) {
1319                 unsigned int wid_caps = get_wcaps(codec, nid);
1320                 unsigned int wid_type = get_wcaps_type(wid_caps);
1321 
1322                 if (wid_type != AC_WID_PIN)
1323                         continue;
1324 
1325                 if (nid == pin_nid)
1326                         continue;
1327 
1328                 curr = snd_hda_codec_read(codec, nid, 0,
1329                                           AC_VERB_GET_CONNECT_SEL, 0);
1330                 if (curr != mux_idx)
1331                         continue;
1332 
1333                 /* choose an unassigned converter. The conveters in the
1334                  * connection list are in the same order as in the codec.
1335                  */
1336                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1337                         per_cvt = get_cvt(spec, cvt_idx);
1338                         if (!per_cvt->assigned) {
1339                                 snd_printdd("choose cvt %d for pin nid %d\n",
1340                                         cvt_idx, nid);
1341                                 snd_hda_codec_write_cache(codec, nid, 0,
1342                                             AC_VERB_SET_CONNECT_SEL,
1343                                             cvt_idx);
1344                                 break;
1345                         }
1346                 }
1347         }
1348 }
1349 
1350 /*
1351  * HDA PCM callbacks
1352  */
1353 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1354                          struct hda_codec *codec,
1355                          struct snd_pcm_substream *substream)
1356 {
1357         struct hdmi_spec *spec = codec->spec;
1358         struct snd_pcm_runtime *runtime = substream->runtime;
1359         int pin_idx, cvt_idx, mux_idx = 0;
1360         struct hdmi_spec_per_pin *per_pin;
1361         struct hdmi_eld *eld;
1362         struct hdmi_spec_per_cvt *per_cvt = NULL;
1363         int err;
1364 
1365         /* Validate hinfo */
1366         pin_idx = hinfo_to_pin_index(spec, hinfo);
1367         if (snd_BUG_ON(pin_idx < 0))
1368                 return -EINVAL;
1369         per_pin = get_pin(spec, pin_idx);
1370         eld = &per_pin->sink_eld;
1371 
1372         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1373         if (err < 0)
1374                 return err;
1375 
1376         per_cvt = get_cvt(spec, cvt_idx);
1377         /* Claim converter */
1378         per_cvt->assigned = 1;
1379         per_pin->cvt_nid = per_cvt->cvt_nid;
1380         hinfo->nid = per_cvt->cvt_nid;
1381 
1382         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1383                             AC_VERB_SET_CONNECT_SEL,
1384                             mux_idx);
1385 
1386         /* configure unused pins to choose other converters */
1387         if (is_haswell_plus(codec) || is_valleyview(codec))
1388                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1389 
1390         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1391 
1392         /* Initially set the converter's capabilities */
1393         hinfo->channels_min = per_cvt->channels_min;
1394         hinfo->channels_max = per_cvt->channels_max;
1395         hinfo->rates = per_cvt->rates;
1396         hinfo->formats = per_cvt->formats;
1397         hinfo->maxbps = per_cvt->maxbps;
1398 
1399         /* Restrict capabilities by ELD if this isn't disabled */
1400         if (!static_hdmi_pcm && eld->eld_valid) {
1401                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1402                 if (hinfo->channels_min > hinfo->channels_max ||
1403                     !hinfo->rates || !hinfo->formats) {
1404                         per_cvt->assigned = 0;
1405                         hinfo->nid = 0;
1406                         snd_hda_spdif_ctls_unassign(codec, pin_idx);
1407                         return -ENODEV;
1408                 }
1409         }
1410 
1411         /* Store the updated parameters */
1412         runtime->hw.channels_min = hinfo->channels_min;
1413         runtime->hw.channels_max = hinfo->channels_max;
1414         runtime->hw.formats = hinfo->formats;
1415         runtime->hw.rates = hinfo->rates;
1416 
1417         snd_pcm_hw_constraint_step(substream->runtime, 0,
1418                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1419         return 0;
1420 }
1421 
1422 /*
1423  * HDA/HDMI auto parsing
1424  */
1425 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1426 {
1427         struct hdmi_spec *spec = codec->spec;
1428         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1429         hda_nid_t pin_nid = per_pin->pin_nid;
1430 
1431         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1432                 snd_printk(KERN_WARNING
1433                            "HDMI: pin %d wcaps %#x "
1434                            "does not support connection list\n",
1435                            pin_nid, get_wcaps(codec, pin_nid));
1436                 return -EINVAL;
1437         }
1438 
1439         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1440                                                         per_pin->mux_nids,
1441                                                         HDA_MAX_CONNECTIONS);
1442 
1443         return 0;
1444 }
1445 
1446 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1447 {
1448         struct hda_codec *codec = per_pin->codec;
1449         struct hdmi_spec *spec = codec->spec;
1450         struct hdmi_eld *eld = &spec->temp_eld;
1451         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1452         hda_nid_t pin_nid = per_pin->pin_nid;
1453         /*
1454          * Always execute a GetPinSense verb here, even when called from
1455          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1456          * response's PD bit is not the real PD value, but indicates that
1457          * the real PD value changed. An older version of the HD-audio
1458          * specification worked this way. Hence, we just ignore the data in
1459          * the unsolicited response to avoid custom WARs.
1460          */
1461         int present;
1462         bool update_eld = false;
1463         bool eld_changed = false;
1464         bool ret;
1465 
1466         snd_hda_power_up(codec);
1467         present = snd_hda_pin_sense(codec, pin_nid);
1468 
1469         mutex_lock(&per_pin->lock);
1470         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1471         if (pin_eld->monitor_present)
1472                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1473         else
1474                 eld->eld_valid = false;
1475 
1476         _snd_printd(SND_PR_VERBOSE,
1477                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1478                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1479 
1480         if (eld->eld_valid) {
1481                 if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
1482                                                      &eld->eld_size) < 0)
1483                         eld->eld_valid = false;
1484                 else {
1485                         memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1486                         if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1487                                                     eld->eld_size) < 0)
1488                                 eld->eld_valid = false;
1489                 }
1490 
1491                 if (eld->eld_valid) {
1492                         snd_hdmi_show_eld(&eld->info);
1493                         update_eld = true;
1494                 }
1495                 else if (repoll) {
1496                         queue_delayed_work(codec->bus->workq,
1497                                            &per_pin->work,
1498                                            msecs_to_jiffies(300));
1499                         goto unlock;
1500                 }
1501         }
1502 
1503         if (pin_eld->eld_valid != eld->eld_valid)
1504                 eld_changed = true;
1505 
1506         if (pin_eld->eld_valid && !eld->eld_valid)
1507                 update_eld = true;
1508 
1509         if (update_eld) {
1510                 bool old_eld_valid = pin_eld->eld_valid;
1511                 pin_eld->eld_valid = eld->eld_valid;
1512                 if (pin_eld->eld_size != eld->eld_size ||
1513                               memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1514                                      eld->eld_size) != 0) {
1515                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1516                                eld->eld_size);
1517                         eld_changed = true;
1518                 }
1519                 pin_eld->eld_size = eld->eld_size;
1520                 pin_eld->info = eld->info;
1521 
1522                 /* Haswell-specific workaround: re-setup when the transcoder is
1523                  * changed during the stream playback
1524                  */
1525                 if (is_haswell(codec) &&
1526                     eld->eld_valid && !old_eld_valid && per_pin->setup)
1527                         hdmi_setup_audio_infoframe(codec, per_pin,
1528                                                    per_pin->non_pcm);
1529         }
1530 
1531         if (eld_changed)
1532                 snd_ctl_notify(codec->bus->card,
1533                                SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1534                                &per_pin->eld_ctl->id);
1535  unlock:
1536         if ((codec->vendor_id & 0xffff0000) == 0x10020000)
1537                 ret = true; /* AMD codecs create ELD by itself */
1538         else
1539                 ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1540         mutex_unlock(&per_pin->lock);
1541         snd_hda_power_down(codec);
1542         return ret;
1543 }
1544 
1545 static void hdmi_repoll_eld(struct work_struct *work)
1546 {
1547         struct hdmi_spec_per_pin *per_pin =
1548         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1549 
1550         if (per_pin->repoll_count++ > 6)
1551                 per_pin->repoll_count = 0;
1552 
1553         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1554                 snd_hda_jack_report_sync(per_pin->codec);
1555 }
1556 
1557 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1558                                              hda_nid_t nid);
1559 
1560 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1561 {
1562         struct hdmi_spec *spec = codec->spec;
1563         unsigned int caps, config;
1564         int pin_idx;
1565         struct hdmi_spec_per_pin *per_pin;
1566         int err;
1567 
1568         caps = snd_hda_query_pin_caps(codec, pin_nid);
1569         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1570                 return 0;
1571 
1572         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1573         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1574                 return 0;
1575 
1576         if (is_haswell_plus(codec))
1577                 intel_haswell_fixup_connect_list(codec, pin_nid);
1578 
1579         pin_idx = spec->num_pins;
1580         per_pin = snd_array_new(&spec->pins);
1581         if (!per_pin)
1582                 return -ENOMEM;
1583 
1584         per_pin->pin_nid = pin_nid;
1585         per_pin->non_pcm = false;
1586 
1587         err = hdmi_read_pin_conn(codec, pin_idx);
1588         if (err < 0)
1589                 return err;
1590 
1591         spec->num_pins++;
1592 
1593         return 0;
1594 }
1595 
1596 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1597 {
1598         struct hdmi_spec *spec = codec->spec;
1599         struct hdmi_spec_per_cvt *per_cvt;
1600         unsigned int chans;
1601         int err;
1602 
1603         chans = get_wcaps(codec, cvt_nid);
1604         chans = get_wcaps_channels(chans);
1605 
1606         per_cvt = snd_array_new(&spec->cvts);
1607         if (!per_cvt)
1608                 return -ENOMEM;
1609 
1610         per_cvt->cvt_nid = cvt_nid;
1611         per_cvt->channels_min = 2;
1612         if (chans <= 16) {
1613                 per_cvt->channels_max = chans;
1614                 if (chans > spec->channels_max)
1615                         spec->channels_max = chans;
1616         }
1617 
1618         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1619                                           &per_cvt->rates,
1620                                           &per_cvt->formats,
1621                                           &per_cvt->maxbps);
1622         if (err < 0)
1623                 return err;
1624 
1625         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1626                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1627         spec->num_cvts++;
1628 
1629         return 0;
1630 }
1631 
1632 static int hdmi_parse_codec(struct hda_codec *codec)
1633 {
1634         hda_nid_t nid;
1635         int i, nodes;
1636 
1637         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1638         if (!nid || nodes < 0) {
1639                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1640                 return -EINVAL;
1641         }
1642 
1643         for (i = 0; i < nodes; i++, nid++) {
1644                 unsigned int caps;
1645                 unsigned int type;
1646 
1647                 caps = get_wcaps(codec, nid);
1648                 type = get_wcaps_type(caps);
1649 
1650                 if (!(caps & AC_WCAP_DIGITAL))
1651                         continue;
1652 
1653                 switch (type) {
1654                 case AC_WID_AUD_OUT:
1655                         hdmi_add_cvt(codec, nid);
1656                         break;
1657                 case AC_WID_PIN:
1658                         hdmi_add_pin(codec, nid);
1659                         break;
1660                 }
1661         }
1662 
1663 #ifdef CONFIG_PM
1664         /* We're seeing some problems with unsolicited hot plug events on
1665          * PantherPoint after S3, if this is not enabled */
1666         if (codec->vendor_id == 0x80862806)
1667                 codec->bus->power_keep_link_on = 1;
1668         /*
1669          * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1670          * can be lost and presence sense verb will become inaccurate if the
1671          * HDA link is powered off at hot plug or hw initialization time.
1672          */
1673         else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1674               AC_PWRST_EPSS))
1675                 codec->bus->power_keep_link_on = 1;
1676 #endif
1677 
1678         return 0;
1679 }
1680 
1681 /*
1682  */
1683 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1684 {
1685         struct hda_spdif_out *spdif;
1686         bool non_pcm;
1687 
1688         mutex_lock(&codec->spdif_mutex);
1689         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1690         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1691         mutex_unlock(&codec->spdif_mutex);
1692         return non_pcm;
1693 }
1694 
1695 
1696 /*
1697  * HDMI callbacks
1698  */
1699 
1700 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1701                                            struct hda_codec *codec,
1702                                            unsigned int stream_tag,
1703                                            unsigned int format,
1704                                            struct snd_pcm_substream *substream)
1705 {
1706         hda_nid_t cvt_nid = hinfo->nid;
1707         struct hdmi_spec *spec = codec->spec;
1708         int pin_idx = hinfo_to_pin_index(spec, hinfo);
1709         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1710         hda_nid_t pin_nid = per_pin->pin_nid;
1711         bool non_pcm;
1712         int pinctl;
1713 
1714         if (is_haswell_plus(codec) || is_valleyview(codec)) {
1715                 /* Verify pin:cvt selections to avoid silent audio after S3.
1716                  * After S3, the audio driver restores pin:cvt selections
1717                  * but this can happen before gfx is ready and such selection
1718                  * is overlooked by HW. Thus multiple pins can share a same
1719                  * default convertor and mute control will affect each other,
1720                  * which can cause a resumed audio playback become silent
1721                  * after S3.
1722                  */
1723                 intel_verify_pin_cvt_connect(codec, per_pin);
1724                 intel_not_share_assigned_cvt(codec, pin_nid, per_pin->mux_idx);
1725         }
1726 
1727         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1728         mutex_lock(&per_pin->lock);
1729         per_pin->channels = substream->runtime->channels;
1730         per_pin->setup = true;
1731 
1732         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1733         mutex_unlock(&per_pin->lock);
1734 
1735         if (spec->dyn_pin_out) {
1736                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1737                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1738                 snd_hda_codec_write(codec, pin_nid, 0,
1739                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1740                                     pinctl | PIN_OUT);
1741         }
1742 
1743         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1744 }
1745 
1746 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1747                                              struct hda_codec *codec,
1748                                              struct snd_pcm_substream *substream)
1749 {
1750         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1751         return 0;
1752 }
1753 
1754 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1755                           struct hda_codec *codec,
1756                           struct snd_pcm_substream *substream)
1757 {
1758         struct hdmi_spec *spec = codec->spec;
1759         int cvt_idx, pin_idx;
1760         struct hdmi_spec_per_cvt *per_cvt;
1761         struct hdmi_spec_per_pin *per_pin;
1762         int pinctl;
1763 
1764         if (hinfo->nid) {
1765                 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1766                 if (snd_BUG_ON(cvt_idx < 0))
1767                         return -EINVAL;
1768                 per_cvt = get_cvt(spec, cvt_idx);
1769 
1770                 snd_BUG_ON(!per_cvt->assigned);
1771                 per_cvt->assigned = 0;
1772                 hinfo->nid = 0;
1773 
1774                 pin_idx = hinfo_to_pin_index(spec, hinfo);
1775                 if (snd_BUG_ON(pin_idx < 0))
1776                         return -EINVAL;
1777                 per_pin = get_pin(spec, pin_idx);
1778 
1779                 if (spec->dyn_pin_out) {
1780                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1781                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1782                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1783                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1784                                             pinctl & ~PIN_OUT);
1785                 }
1786 
1787                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1788 
1789                 mutex_lock(&per_pin->lock);
1790                 per_pin->chmap_set = false;
1791                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1792 
1793                 per_pin->setup = false;
1794                 per_pin->channels = 0;
1795                 mutex_unlock(&per_pin->lock);
1796         }
1797 
1798         return 0;
1799 }
1800 
1801 static const struct hda_pcm_ops generic_ops = {
1802         .open = hdmi_pcm_open,
1803         .close = hdmi_pcm_close,
1804         .prepare = generic_hdmi_playback_pcm_prepare,
1805         .cleanup = generic_hdmi_playback_pcm_cleanup,
1806 };
1807 
1808 /*
1809  * ALSA API channel-map control callbacks
1810  */
1811 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1812                                struct snd_ctl_elem_info *uinfo)
1813 {
1814         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1815         struct hda_codec *codec = info->private_data;
1816         struct hdmi_spec *spec = codec->spec;
1817         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1818         uinfo->count = spec->channels_max;
1819         uinfo->value.integer.min = 0;
1820         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1821         return 0;
1822 }
1823 
1824 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1825                               unsigned int size, unsigned int __user *tlv)
1826 {
1827         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1828         struct hda_codec *codec = info->private_data;
1829         struct hdmi_spec *spec = codec->spec;
1830         unsigned int __user *dst;
1831         int chs, count = 0;
1832 
1833         if (size < 8)
1834                 return -ENOMEM;
1835         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1836                 return -EFAULT;
1837         size -= 8;
1838         dst = tlv + 2;
1839         for (chs = 2; chs <= spec->channels_max; chs++) {
1840                 int i, c;
1841                 struct cea_channel_speaker_allocation *cap;
1842                 cap = channel_allocations;
1843                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1844                         int chs_bytes = chs * 4;
1845                         if (cap->channels != chs)
1846                                 continue;
1847                         if (size < 8)
1848                                 return -ENOMEM;
1849                         if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
1850                             put_user(chs_bytes, dst + 1))
1851                                 return -EFAULT;
1852                         dst += 2;
1853                         size -= 8;
1854                         count += 8;
1855                         if (size < chs_bytes)
1856                                 return -ENOMEM;
1857                         size -= chs_bytes;
1858                         count += chs_bytes;
1859                         for (c = 7; c >= 0; c--) {
1860                                 int spk = cap->speakers[c];
1861                                 if (!spk)
1862                                         continue;
1863                                 if (put_user(spk_to_chmap(spk), dst))
1864                                         return -EFAULT;
1865                                 dst++;
1866                         }
1867                 }
1868         }
1869         if (put_user(count, tlv + 1))
1870                 return -EFAULT;
1871         return 0;
1872 }
1873 
1874 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1875                               struct snd_ctl_elem_value *ucontrol)
1876 {
1877         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1878         struct hda_codec *codec = info->private_data;
1879         struct hdmi_spec *spec = codec->spec;
1880         int pin_idx = kcontrol->private_value;
1881         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1882         int i;
1883 
1884         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1885                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1886         return 0;
1887 }
1888 
1889 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1890                               struct snd_ctl_elem_value *ucontrol)
1891 {
1892         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1893         struct hda_codec *codec = info->private_data;
1894         struct hdmi_spec *spec = codec->spec;
1895         int pin_idx = kcontrol->private_value;
1896         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1897         unsigned int ctl_idx;
1898         struct snd_pcm_substream *substream;
1899         unsigned char chmap[8];
1900         int i, ca, prepared = 0;
1901 
1902         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1903         substream = snd_pcm_chmap_substream(info, ctl_idx);
1904         if (!substream || !substream->runtime)
1905                 return 0; /* just for avoiding error from alsactl restore */
1906         switch (substream->runtime->status->state) {
1907         case SNDRV_PCM_STATE_OPEN:
1908         case SNDRV_PCM_STATE_SETUP:
1909                 break;
1910         case SNDRV_PCM_STATE_PREPARED:
1911                 prepared = 1;
1912                 break;
1913         default:
1914                 return -EBUSY;
1915         }
1916         memset(chmap, 0, sizeof(chmap));
1917         for (i = 0; i < ARRAY_SIZE(chmap); i++)
1918                 chmap[i] = ucontrol->value.integer.value[i];
1919         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1920                 return 0;
1921         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1922         if (ca < 0)
1923                 return -EINVAL;
1924         mutex_lock(&per_pin->lock);
1925         per_pin->chmap_set = true;
1926         memcpy(per_pin->chmap, chmap, sizeof(chmap));
1927         if (prepared)
1928                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1929         mutex_unlock(&per_pin->lock);
1930 
1931         return 0;
1932 }
1933 
1934 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1935 {
1936         struct hdmi_spec *spec = codec->spec;
1937         int pin_idx;
1938 
1939         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1940                 struct hda_pcm *info;
1941                 struct hda_pcm_stream *pstr;
1942                 struct hdmi_spec_per_pin *per_pin;
1943 
1944                 per_pin = get_pin(spec, pin_idx);
1945                 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
1946                 info = snd_array_new(&spec->pcm_rec);
1947                 if (!info)
1948                         return -ENOMEM;
1949                 info->name = per_pin->pcm_name;
1950                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1951                 info->own_chmap = true;
1952 
1953                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1954                 pstr->substreams = 1;
1955                 pstr->ops = generic_ops;
1956                 /* other pstr fields are set in open */
1957         }
1958 
1959         codec->num_pcms = spec->num_pins;
1960         codec->pcm_info = spec->pcm_rec.list;
1961 
1962         return 0;
1963 }
1964 
1965 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1966 {
1967         char hdmi_str[32] = "HDMI/DP";
1968         struct hdmi_spec *spec = codec->spec;
1969         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1970         int pcmdev = get_pcm_rec(spec, pin_idx)->device;
1971 
1972         if (pcmdev > 0)
1973                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1974         if (!is_jack_detectable(codec, per_pin->pin_nid))
1975                 strncat(hdmi_str, " Phantom",
1976                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
1977 
1978         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1979 }
1980 
1981 static int generic_hdmi_build_controls(struct hda_codec *codec)
1982 {
1983         struct hdmi_spec *spec = codec->spec;
1984         int err;
1985         int pin_idx;
1986 
1987         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1988                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1989 
1990                 err = generic_hdmi_build_jack(codec, pin_idx);
1991                 if (err < 0)
1992                         return err;
1993 
1994                 err = snd_hda_create_dig_out_ctls(codec,
1995                                                   per_pin->pin_nid,
1996                                                   per_pin->mux_nids[0],
1997                                                   HDA_PCM_TYPE_HDMI);
1998                 if (err < 0)
1999                         return err;
2000                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
2001 
2002                 /* add control for ELD Bytes */
2003                 err = hdmi_create_eld_ctl(codec, pin_idx,
2004                                           get_pcm_rec(spec, pin_idx)->device);
2005 
2006                 if (err < 0)
2007                         return err;
2008 
2009                 hdmi_present_sense(per_pin, 0);
2010         }
2011 
2012         /* add channel maps */
2013         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2014                 struct snd_pcm_chmap *chmap;
2015                 struct snd_kcontrol *kctl;
2016                 int i;
2017 
2018                 if (!codec->pcm_info[pin_idx].pcm)
2019                         break;
2020                 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
2021                                              SNDRV_PCM_STREAM_PLAYBACK,
2022                                              NULL, 0, pin_idx, &chmap);
2023                 if (err < 0)
2024                         return err;
2025                 /* override handlers */
2026                 chmap->private_data = codec;
2027                 kctl = chmap->kctl;
2028                 for (i = 0; i < kctl->count; i++)
2029                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2030                 kctl->info = hdmi_chmap_ctl_info;
2031                 kctl->get = hdmi_chmap_ctl_get;
2032                 kctl->put = hdmi_chmap_ctl_put;
2033                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2034         }
2035 
2036         return 0;
2037 }
2038 
2039 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2040 {
2041         struct hdmi_spec *spec = codec->spec;
2042         int pin_idx;
2043 
2044         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2045                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2046 
2047                 per_pin->codec = codec;
2048                 mutex_init(&per_pin->lock);
2049                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2050                 eld_proc_new(per_pin, pin_idx);
2051         }
2052         return 0;
2053 }
2054 
2055 static int generic_hdmi_init(struct hda_codec *codec)
2056 {
2057         struct hdmi_spec *spec = codec->spec;
2058         int pin_idx;
2059 
2060         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2061                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2062                 hda_nid_t pin_nid = per_pin->pin_nid;
2063 
2064                 hdmi_init_pin(codec, pin_nid);
2065                 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
2066         }
2067         return 0;
2068 }
2069 
2070 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2071 {
2072         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2073         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2074         snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
2075 }
2076 
2077 static void hdmi_array_free(struct hdmi_spec *spec)
2078 {
2079         snd_array_free(&spec->pins);
2080         snd_array_free(&spec->cvts);
2081         snd_array_free(&spec->pcm_rec);
2082 }
2083 
2084 static void generic_hdmi_free(struct hda_codec *codec)
2085 {
2086         struct hdmi_spec *spec = codec->spec;
2087         int pin_idx;
2088 
2089         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2090                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2091 
2092                 cancel_delayed_work(&per_pin->work);
2093                 eld_proc_free(per_pin);
2094         }
2095 
2096         flush_workqueue(codec->bus->workq);
2097         hdmi_array_free(spec);
2098         kfree(spec);
2099 }
2100 
2101 #ifdef CONFIG_PM
2102 static int generic_hdmi_resume(struct hda_codec *codec)
2103 {
2104         struct hdmi_spec *spec = codec->spec;
2105         int pin_idx;
2106 
2107         generic_hdmi_init(codec);
2108         snd_hda_codec_resume_amp(codec);
2109         snd_hda_codec_resume_cache(codec);
2110 
2111         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2112                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2113                 hdmi_present_sense(per_pin, 1);
2114         }
2115         return 0;
2116 }
2117 #endif
2118 
2119 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2120         .init                   = generic_hdmi_init,
2121         .free                   = generic_hdmi_free,
2122         .build_pcms             = generic_hdmi_build_pcms,
2123         .build_controls         = generic_hdmi_build_controls,
2124         .unsol_event            = hdmi_unsol_event,
2125 #ifdef CONFIG_PM
2126         .resume                 = generic_hdmi_resume,
2127 #endif
2128 };
2129 
2130 
2131 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2132                                              hda_nid_t nid)
2133 {
2134         struct hdmi_spec *spec = codec->spec;
2135         hda_nid_t conns[4];
2136         int nconns;
2137 
2138         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2139         if (nconns == spec->num_cvts &&
2140             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2141                 return;
2142 
2143         /* override pins connection list */
2144         snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
2145         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2146 }
2147 
2148 #define INTEL_VENDOR_NID 0x08
2149 #define INTEL_GET_VENDOR_VERB 0xf81
2150 #define INTEL_SET_VENDOR_VERB 0x781
2151 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2152 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2153 
2154 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2155                                           bool update_tree)
2156 {
2157         unsigned int vendor_param;
2158 
2159         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2160                                 INTEL_GET_VENDOR_VERB, 0);
2161         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2162                 return;
2163 
2164         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2165         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2166                                 INTEL_SET_VENDOR_VERB, vendor_param);
2167         if (vendor_param == -1)
2168                 return;
2169 
2170         if (update_tree)
2171                 snd_hda_codec_update_widgets(codec);
2172 }
2173 
2174 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2175 {
2176         unsigned int vendor_param;
2177 
2178         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2179                                 INTEL_GET_VENDOR_VERB, 0);
2180         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2181                 return;
2182 
2183         /* enable DP1.2 mode */
2184         vendor_param |= INTEL_EN_DP12;
2185         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2186                                 INTEL_SET_VENDOR_VERB, vendor_param);
2187 }
2188 
2189 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2190  * Otherwise you may get severe h/w communication errors.
2191  */
2192 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2193                                 unsigned int power_state)
2194 {
2195         if (power_state == AC_PWRST_D0) {
2196                 intel_haswell_enable_all_pins(codec, false);
2197                 intel_haswell_fixup_enable_dp12(codec);
2198         }
2199 
2200         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2201         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2202 }
2203 
2204 static int patch_generic_hdmi(struct hda_codec *codec)
2205 {
2206         struct hdmi_spec *spec;
2207 
2208         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2209         if (spec == NULL)
2210                 return -ENOMEM;
2211 
2212         codec->spec = spec;
2213         hdmi_array_init(spec, 4);
2214 
2215         if (is_haswell_plus(codec)) {
2216                 intel_haswell_enable_all_pins(codec, true);
2217                 intel_haswell_fixup_enable_dp12(codec);
2218         }
2219 
2220         if (hdmi_parse_codec(codec) < 0) {
2221                 codec->spec = NULL;
2222                 kfree(spec);
2223                 return -EINVAL;
2224         }
2225         codec->patch_ops = generic_hdmi_patch_ops;
2226         if (is_haswell_plus(codec)) {
2227                 codec->patch_ops.set_power_state = haswell_set_power_state;
2228                 codec->dp_mst = true;
2229         }
2230 
2231         generic_hdmi_init_per_pins(codec);
2232 
2233         init_channel_allocations();
2234 
2235         return 0;
2236 }
2237 
2238 /*
2239  * Shared non-generic implementations
2240  */
2241 
2242 static int simple_playback_build_pcms(struct hda_codec *codec)
2243 {
2244         struct hdmi_spec *spec = codec->spec;
2245         struct hda_pcm *info;
2246         unsigned int chans;
2247         struct hda_pcm_stream *pstr;
2248         struct hdmi_spec_per_cvt *per_cvt;
2249 
2250         per_cvt = get_cvt(spec, 0);
2251         chans = get_wcaps(codec, per_cvt->cvt_nid);
2252         chans = get_wcaps_channels(chans);
2253 
2254         info = snd_array_new(&spec->pcm_rec);
2255         if (!info)
2256                 return -ENOMEM;
2257         info->name = get_pin(spec, 0)->pcm_name;
2258         sprintf(info->name, "HDMI 0");
2259         info->pcm_type = HDA_PCM_TYPE_HDMI;
2260         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2261         *pstr = spec->pcm_playback;
2262         pstr->nid = per_cvt->cvt_nid;
2263         if (pstr->channels_max <= 2 && chans && chans <= 16)
2264                 pstr->channels_max = chans;
2265 
2266         codec->num_pcms = 1;
2267         codec->pcm_info = info;
2268 
2269         return 0;
2270 }
2271 
2272 /* unsolicited event for jack sensing */
2273 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2274                                     unsigned int res)
2275 {
2276         snd_hda_jack_set_dirty_all(codec);
2277         snd_hda_jack_report_sync(codec);
2278 }
2279 
2280 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2281  * as long as spec->pins[] is set correctly
2282  */
2283 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2284 
2285 static int simple_playback_build_controls(struct hda_codec *codec)
2286 {
2287         struct hdmi_spec *spec = codec->spec;
2288         struct hdmi_spec_per_cvt *per_cvt;
2289         int err;
2290 
2291         per_cvt = get_cvt(spec, 0);
2292         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2293                                           per_cvt->cvt_nid,
2294                                           HDA_PCM_TYPE_HDMI);
2295         if (err < 0)
2296                 return err;
2297         return simple_hdmi_build_jack(codec, 0);
2298 }
2299 
2300 static int simple_playback_init(struct hda_codec *codec)
2301 {
2302         struct hdmi_spec *spec = codec->spec;
2303         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2304         hda_nid_t pin = per_pin->pin_nid;
2305 
2306         snd_hda_codec_write(codec, pin, 0,
2307                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2308         /* some codecs require to unmute the pin */
2309         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2310                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2311                                     AMP_OUT_UNMUTE);
2312         snd_hda_jack_detect_enable(codec, pin, pin);
2313         return 0;
2314 }
2315 
2316 static void simple_playback_free(struct hda_codec *codec)
2317 {
2318         struct hdmi_spec *spec = codec->spec;
2319 
2320         hdmi_array_free(spec);
2321         kfree(spec);
2322 }
2323 
2324 /*
2325  * Nvidia specific implementations
2326  */
2327 
2328 #define Nv_VERB_SET_Channel_Allocation          0xF79
2329 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2330 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2331 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2332 
2333 #define nvhdmi_master_con_nid_7x        0x04
2334 #define nvhdmi_master_pin_nid_7x        0x05
2335 
2336 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2337         /*front, rear, clfe, rear_surr */
2338         0x6, 0x8, 0xa, 0xc,
2339 };
2340 
2341 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2342         /* set audio protect on */
2343         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2344         /* enable digital output on pin widget */
2345         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2346         {} /* terminator */
2347 };
2348 
2349 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2350         /* set audio protect on */
2351         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2352         /* enable digital output on pin widget */
2353         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2354         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2355         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2356         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2357         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2358         {} /* terminator */
2359 };
2360 
2361 #ifdef LIMITED_RATE_FMT_SUPPORT
2362 /* support only the safe format and rate */
2363 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2364 #define SUPPORTED_MAXBPS        16
2365 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2366 #else
2367 /* support all rates and formats */
2368 #define SUPPORTED_RATES \
2369         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2370         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2371          SNDRV_PCM_RATE_192000)
2372 #define SUPPORTED_MAXBPS        24
2373 #define SUPPORTED_FORMATS \
2374         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2375 #endif
2376 
2377 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2378 {
2379         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2380         return 0;
2381 }
2382 
2383 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2384 {
2385         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2386         return 0;
2387 }
2388 
2389 static unsigned int channels_2_6_8[] = {
2390         2, 6, 8
2391 };
2392 
2393 static unsigned int channels_2_8[] = {
2394         2, 8
2395 };
2396 
2397 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2398         .count = ARRAY_SIZE(channels_2_6_8),
2399         .list = channels_2_6_8,
2400         .mask = 0,
2401 };
2402 
2403 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2404         .count = ARRAY_SIZE(channels_2_8),
2405         .list = channels_2_8,
2406         .mask = 0,
2407 };
2408 
2409 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2410                                     struct hda_codec *codec,
2411                                     struct snd_pcm_substream *substream)
2412 {
2413         struct hdmi_spec *spec = codec->spec;
2414         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2415 
2416         switch (codec->preset->id) {
2417         case 0x10de0002:
2418         case 0x10de0003:
2419         case 0x10de0005:
2420         case 0x10de0006:
2421                 hw_constraints_channels = &hw_constraints_2_8_channels;
2422                 break;
2423         case 0x10de0007:
2424                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2425                 break;
2426         default:
2427                 break;
2428         }
2429 
2430         if (hw_constraints_channels != NULL) {
2431                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2432                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2433                                 hw_constraints_channels);
2434         } else {
2435                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2436                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2437         }
2438 
2439         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2440 }
2441 
2442 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2443                                      struct hda_codec *codec,
2444                                      struct snd_pcm_substream *substream)
2445 {
2446         struct hdmi_spec *spec = codec->spec;
2447         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2448 }
2449 
2450 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2451                                        struct hda_codec *codec,
2452                                        unsigned int stream_tag,
2453                                        unsigned int format,
2454                                        struct snd_pcm_substream *substream)
2455 {
2456         struct hdmi_spec *spec = codec->spec;
2457         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2458                                              stream_tag, format, substream);
2459 }
2460 
2461 static const struct hda_pcm_stream simple_pcm_playback = {
2462         .substreams = 1,
2463         .channels_min = 2,
2464         .channels_max = 2,
2465         .ops = {
2466                 .open = simple_playback_pcm_open,
2467                 .close = simple_playback_pcm_close,
2468                 .prepare = simple_playback_pcm_prepare
2469         },
2470 };
2471 
2472 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2473         .build_controls = simple_playback_build_controls,
2474         .build_pcms = simple_playback_build_pcms,
2475         .init = simple_playback_init,
2476         .free = simple_playback_free,
2477         .unsol_event = simple_hdmi_unsol_event,
2478 };
2479 
2480 static int patch_simple_hdmi(struct hda_codec *codec,
2481                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2482 {
2483         struct hdmi_spec *spec;
2484         struct hdmi_spec_per_cvt *per_cvt;
2485         struct hdmi_spec_per_pin *per_pin;
2486 
2487         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2488         if (!spec)
2489                 return -ENOMEM;
2490 
2491         codec->spec = spec;
2492         hdmi_array_init(spec, 1);
2493 
2494         spec->multiout.num_dacs = 0;  /* no analog */
2495         spec->multiout.max_channels = 2;
2496         spec->multiout.dig_out_nid = cvt_nid;
2497         spec->num_cvts = 1;
2498         spec->num_pins = 1;
2499         per_pin = snd_array_new(&spec->pins);
2500         per_cvt = snd_array_new(&spec->cvts);
2501         if (!per_pin || !per_cvt) {
2502                 simple_playback_free(codec);
2503                 return -ENOMEM;
2504         }
2505         per_cvt->cvt_nid = cvt_nid;
2506         per_pin->pin_nid = pin_nid;
2507         spec->pcm_playback = simple_pcm_playback;
2508 
2509         codec->patch_ops = simple_hdmi_patch_ops;
2510 
2511         return 0;
2512 }
2513 
2514 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2515                                                     int channels)
2516 {
2517         unsigned int chanmask;
2518         int chan = channels ? (channels - 1) : 1;
2519 
2520         switch (channels) {
2521         default:
2522         case 0:
2523         case 2:
2524                 chanmask = 0x00;
2525                 break;
2526         case 4:
2527                 chanmask = 0x08;
2528                 break;
2529         case 6:
2530                 chanmask = 0x0b;
2531                 break;
2532         case 8:
2533                 chanmask = 0x13;
2534                 break;
2535         }
2536 
2537         /* Set the audio infoframe channel allocation and checksum fields.  The
2538          * channel count is computed implicitly by the hardware. */
2539         snd_hda_codec_write(codec, 0x1, 0,
2540                         Nv_VERB_SET_Channel_Allocation, chanmask);
2541 
2542         snd_hda_codec_write(codec, 0x1, 0,
2543                         Nv_VERB_SET_Info_Frame_Checksum,
2544                         (0x71 - chan - chanmask));
2545 }
2546 
2547 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2548                                    struct hda_codec *codec,
2549                                    struct snd_pcm_substream *substream)
2550 {
2551         struct hdmi_spec *spec = codec->spec;
2552         int i;
2553 
2554         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2555                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2556         for (i = 0; i < 4; i++) {
2557                 /* set the stream id */
2558                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2559                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2560                 /* set the stream format */
2561                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2562                                 AC_VERB_SET_STREAM_FORMAT, 0);
2563         }
2564 
2565         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2566          * streams are disabled. */
2567         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2568 
2569         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2570 }
2571 
2572 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2573                                      struct hda_codec *codec,
2574                                      unsigned int stream_tag,
2575                                      unsigned int format,
2576                                      struct snd_pcm_substream *substream)
2577 {
2578         int chs;
2579         unsigned int dataDCC2, channel_id;
2580         int i;
2581         struct hdmi_spec *spec = codec->spec;
2582         struct hda_spdif_out *spdif;
2583         struct hdmi_spec_per_cvt *per_cvt;
2584 
2585         mutex_lock(&codec->spdif_mutex);
2586         per_cvt = get_cvt(spec, 0);
2587         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2588 
2589         chs = substream->runtime->channels;
2590 
2591         dataDCC2 = 0x2;
2592 
2593         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2594         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2595                 snd_hda_codec_write(codec,
2596                                 nvhdmi_master_con_nid_7x,
2597                                 0,
2598                                 AC_VERB_SET_DIGI_CONVERT_1,
2599                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2600 
2601         /* set the stream id */
2602         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2603                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2604 
2605         /* set the stream format */
2606         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2607                         AC_VERB_SET_STREAM_FORMAT, format);
2608 
2609         /* turn on again (if needed) */
2610         /* enable and set the channel status audio/data flag */
2611         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2612                 snd_hda_codec_write(codec,
2613                                 nvhdmi_master_con_nid_7x,
2614                                 0,
2615                                 AC_VERB_SET_DIGI_CONVERT_1,
2616                                 spdif->ctls & 0xff);
2617                 snd_hda_codec_write(codec,
2618                                 nvhdmi_master_con_nid_7x,
2619                                 0,
2620                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2621         }
2622 
2623         for (i = 0; i < 4; i++) {
2624                 if (chs == 2)
2625                         channel_id = 0;
2626                 else
2627                         channel_id = i * 2;
2628 
2629                 /* turn off SPDIF once;
2630                  *otherwise the IEC958 bits won't be updated
2631                  */
2632                 if (codec->spdif_status_reset &&
2633                 (spdif->ctls & AC_DIG1_ENABLE))
2634                         snd_hda_codec_write(codec,
2635                                 nvhdmi_con_nids_7x[i],
2636                                 0,
2637                                 AC_VERB_SET_DIGI_CONVERT_1,
2638                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2639                 /* set the stream id */
2640                 snd_hda_codec_write(codec,
2641                                 nvhdmi_con_nids_7x[i],
2642                                 0,
2643                                 AC_VERB_SET_CHANNEL_STREAMID,
2644                                 (stream_tag << 4) | channel_id);
2645                 /* set the stream format */
2646                 snd_hda_codec_write(codec,
2647                                 nvhdmi_con_nids_7x[i],
2648                                 0,
2649                                 AC_VERB_SET_STREAM_FORMAT,
2650                                 format);
2651                 /* turn on again (if needed) */
2652                 /* enable and set the channel status audio/data flag */
2653                 if (codec->spdif_status_reset &&
2654                 (spdif->ctls & AC_DIG1_ENABLE)) {
2655                         snd_hda_codec_write(codec,
2656                                         nvhdmi_con_nids_7x[i],
2657                                         0,
2658                                         AC_VERB_SET_DIGI_CONVERT_1,
2659                                         spdif->ctls & 0xff);
2660                         snd_hda_codec_write(codec,
2661                                         nvhdmi_con_nids_7x[i],
2662                                         0,
2663                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2664                 }
2665         }
2666 
2667         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2668 
2669         mutex_unlock(&codec->spdif_mutex);
2670         return 0;
2671 }
2672 
2673 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2674         .substreams = 1,
2675         .channels_min = 2,
2676         .channels_max = 8,
2677         .nid = nvhdmi_master_con_nid_7x,
2678         .rates = SUPPORTED_RATES,
2679         .maxbps = SUPPORTED_MAXBPS,
2680         .formats = SUPPORTED_FORMATS,
2681         .ops = {
2682                 .open = simple_playback_pcm_open,
2683                 .close = nvhdmi_8ch_7x_pcm_close,
2684                 .prepare = nvhdmi_8ch_7x_pcm_prepare
2685         },
2686 };
2687 
2688 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2689 {
2690         struct hdmi_spec *spec;
2691         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2692                                     nvhdmi_master_pin_nid_7x);
2693         if (err < 0)
2694                 return err;
2695 
2696         codec->patch_ops.init = nvhdmi_7x_init_2ch;
2697         /* override the PCM rates, etc, as the codec doesn't give full list */
2698         spec = codec->spec;
2699         spec->pcm_playback.rates = SUPPORTED_RATES;
2700         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2701         spec->pcm_playback.formats = SUPPORTED_FORMATS;
2702         return 0;
2703 }
2704 
2705 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2706 {
2707         struct hdmi_spec *spec = codec->spec;
2708         int err = simple_playback_build_pcms(codec);
2709         if (!err) {
2710                 struct hda_pcm *info = get_pcm_rec(spec, 0);
2711                 info->own_chmap = true;
2712         }
2713         return err;
2714 }
2715 
2716 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2717 {
2718         struct hdmi_spec *spec = codec->spec;
2719         struct hda_pcm *info;
2720         struct snd_pcm_chmap *chmap;
2721         int err;
2722 
2723         err = simple_playback_build_controls(codec);
2724         if (err < 0)
2725                 return err;
2726 
2727         /* add channel maps */
2728         info = get_pcm_rec(spec, 0);
2729         err = snd_pcm_add_chmap_ctls(info->pcm,
2730                                      SNDRV_PCM_STREAM_PLAYBACK,
2731                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
2732         if (err < 0)
2733                 return err;
2734         switch (codec->preset->id) {
2735         case 0x10de0002:
2736         case 0x10de0003:
2737         case 0x10de0005:
2738         case 0x10de0006:
2739                 chmap->channel_mask = (1U << 2) | (1U << 8);
2740                 break;
2741         case 0x10de0007:
2742                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2743         }
2744         return 0;
2745 }
2746 
2747 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2748 {
2749         struct hdmi_spec *spec;
2750         int err = patch_nvhdmi_2ch(codec);
2751         if (err < 0)
2752                 return err;
2753         spec = codec->spec;
2754         spec->multiout.max_channels = 8;
2755         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2756         codec->patch_ops.init = nvhdmi_7x_init_8ch;
2757         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2758         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2759 
2760         /* Initialize the audio infoframe channel mask and checksum to something
2761          * valid */
2762         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2763 
2764         return 0;
2765 }
2766 
2767 static int patch_nvhdmi(struct hda_codec *codec)
2768 {
2769         struct hdmi_spec *spec;
2770         int err;
2771 
2772         err = patch_generic_hdmi(codec);
2773         if (err)
2774                 return err;
2775 
2776         spec = codec->spec;
2777         spec->dyn_pin_out = true;
2778 
2779         return 0;
2780 }
2781 
2782 /*
2783  * ATI-specific implementations
2784  *
2785  * FIXME: we may omit the whole this and use the generic code once after
2786  * it's confirmed to work.
2787  */
2788 
2789 #define ATIHDMI_CVT_NID         0x02    /* audio converter */
2790 #define ATIHDMI_PIN_NID         0x03    /* HDMI output pin */
2791 
2792 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2793                                         struct hda_codec *codec,
2794                                         unsigned int stream_tag,
2795                                         unsigned int format,
2796                                         struct snd_pcm_substream *substream)
2797 {
2798         struct hdmi_spec *spec = codec->spec;
2799         struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0);
2800         int chans = substream->runtime->channels;
2801         int i, err;
2802 
2803         err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
2804                                           substream);
2805         if (err < 0)
2806                 return err;
2807         snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2808                             AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
2809         /* FIXME: XXX */
2810         for (i = 0; i < chans; i++) {
2811                 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2812                                     AC_VERB_SET_HDMI_CHAN_SLOT,
2813                                     (i << 4) | i);
2814         }
2815         return 0;
2816 }
2817 
2818 static int patch_atihdmi(struct hda_codec *codec)
2819 {
2820         struct hdmi_spec *spec;
2821         int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
2822         if (err < 0)
2823                 return err;
2824         spec = codec->spec;
2825         spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
2826         return 0;
2827 }
2828 
2829 /* VIA HDMI Implementation */
2830 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
2831 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
2832 
2833 static int patch_via_hdmi(struct hda_codec *codec)
2834 {
2835         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
2836 }
2837 
2838 /*
2839  * patch entries
2840  */
2841 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
2842 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
2843 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
2844 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
2845 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_generic_hdmi },
2846 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
2847 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
2848 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
2849 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
2850 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
2851 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
2852 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
2853 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
2854 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_nvhdmi },
2855 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_nvhdmi },
2856 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_nvhdmi },
2857 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_nvhdmi },
2858 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_nvhdmi },
2859 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_nvhdmi },
2860 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_nvhdmi },
2861 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_nvhdmi },
2862 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_nvhdmi },
2863 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_nvhdmi },
2864 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_nvhdmi },
2865 /* 17 is known to be absent */
2866 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_nvhdmi },
2867 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_nvhdmi },
2868 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_nvhdmi },
2869 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_nvhdmi },
2870 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_nvhdmi },
2871 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_nvhdmi },
2872 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_nvhdmi },
2873 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_nvhdmi },
2874 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_nvhdmi },
2875 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_nvhdmi },
2876 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP",   .patch = patch_nvhdmi },
2877 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP",   .patch = patch_nvhdmi },
2878 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
2879 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
2880 { .id = 0x11069f80, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
2881 { .id = 0x11069f81, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
2882 { .id = 0x11069f84, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
2883 { .id = 0x11069f85, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
2884 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
2885 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
2886 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
2887 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
2888 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
2889 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
2890 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
2891 { .id = 0x80862807, .name = "Haswell HDMI",     .patch = patch_generic_hdmi },
2892 { .id = 0x80862808, .name = "Broadwell HDMI",   .patch = patch_generic_hdmi },
2893 { .id = 0x80862809, .name = "Skylake HDMI",     .patch = patch_generic_hdmi },
2894 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
2895 { .id = 0x80862882, .name = "Valleyview2 HDMI", .patch = patch_generic_hdmi },
2896 { .id = 0x80862883, .name = "Braswell HDMI",    .patch = patch_generic_hdmi },
2897 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
2898 {} /* terminator */
2899 };
2900 
2901 MODULE_ALIAS("snd-hda-codec-id:1002793c");
2902 MODULE_ALIAS("snd-hda-codec-id:10027919");
2903 MODULE_ALIAS("snd-hda-codec-id:1002791a");
2904 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2905 MODULE_ALIAS("snd-hda-codec-id:10951390");
2906 MODULE_ALIAS("snd-hda-codec-id:10951392");
2907 MODULE_ALIAS("snd-hda-codec-id:10de0002");
2908 MODULE_ALIAS("snd-hda-codec-id:10de0003");
2909 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2910 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2911 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2912 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2913 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2914 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2915 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2916 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2917 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2918 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2919 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2920 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2921 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2922 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2923 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2924 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2925 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2926 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2927 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2928 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2929 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2930 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2931 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2932 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2933 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2934 MODULE_ALIAS("snd-hda-codec-id:10de0060");
2935 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2936 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2937 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2938 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2939 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2940 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2941 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2942 MODULE_ALIAS("snd-hda-codec-id:80860054");
2943 MODULE_ALIAS("snd-hda-codec-id:80862801");
2944 MODULE_ALIAS("snd-hda-codec-id:80862802");
2945 MODULE_ALIAS("snd-hda-codec-id:80862803");
2946 MODULE_ALIAS("snd-hda-codec-id:80862804");
2947 MODULE_ALIAS("snd-hda-codec-id:80862805");
2948 MODULE_ALIAS("snd-hda-codec-id:80862806");
2949 MODULE_ALIAS("snd-hda-codec-id:80862807");
2950 MODULE_ALIAS("snd-hda-codec-id:80862808");
2951 MODULE_ALIAS("snd-hda-codec-id:80862809");
2952 MODULE_ALIAS("snd-hda-codec-id:80862880");
2953 MODULE_ALIAS("snd-hda-codec-id:80862882");
2954 MODULE_ALIAS("snd-hda-codec-id:80862883");
2955 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2956 
2957 MODULE_LICENSE("GPL");
2958 MODULE_DESCRIPTION("HDMI HD-audio codec");
2959 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2960 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2961 MODULE_ALIAS("snd-hda-codec-atihdmi");
2962 
2963 static struct hda_codec_preset_list intel_list = {
2964         .preset = snd_hda_preset_hdmi,
2965         .owner = THIS_MODULE,
2966 };
2967 
2968 static int __init patch_hdmi_init(void)
2969 {
2970         return snd_hda_add_codec_preset(&intel_list);
2971 }
2972 
2973 static void __exit patch_hdmi_exit(void)
2974 {
2975         snd_hda_delete_codec_preset(&intel_list);
2976 }
2977 
2978 module_init(patch_hdmi_init)
2979 module_exit(patch_hdmi_exit)
2980 

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