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TOMOYO Linux Cross Reference
Linux/sound/pci/hda/patch_hdmi.c

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  1 /*
  2  *
  3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
  4  *
  5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
  6  *  Copyright (c) 2006 ATI Technologies Inc.
  7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
  8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
 10  *
 11  *  Authors:
 12  *                      Wu Fengguang <wfg@linux.intel.com>
 13  *
 14  *  Maintained by:
 15  *                      Wu Fengguang <wfg@linux.intel.com>
 16  *
 17  *  This program is free software; you can redistribute it and/or modify it
 18  *  under the terms of the GNU General Public License as published by the Free
 19  *  Software Foundation; either version 2 of the License, or (at your option)
 20  *  any later version.
 21  *
 22  *  This program is distributed in the hope that it will be useful, but
 23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
 24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 25  *  for more details.
 26  *
 27  *  You should have received a copy of the GNU General Public License
 28  *  along with this program; if not, write to the Free Software Foundation,
 29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 30  */
 31 
 32 #include <linux/init.h>
 33 #include <linux/delay.h>
 34 #include <linux/slab.h>
 35 #include <linux/module.h>
 36 #include <sound/core.h>
 37 #include <sound/jack.h>
 38 #include <sound/asoundef.h>
 39 #include <sound/tlv.h>
 40 #include <sound/hdaudio.h>
 41 #include <sound/hda_i915.h>
 42 #include "hda_codec.h"
 43 #include "hda_local.h"
 44 #include "hda_jack.h"
 45 
 46 static bool static_hdmi_pcm;
 47 module_param(static_hdmi_pcm, bool, 0644);
 48 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
 49 
 50 #define is_haswell(codec)  ((codec)->core.vendor_id == 0x80862807)
 51 #define is_broadwell(codec)    ((codec)->core.vendor_id == 0x80862808)
 52 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
 53 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
 54 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
 55 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
 56                                 || is_skylake(codec) || is_broxton(codec) \
 57                                 || is_kabylake(codec))
 58 
 59 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
 60 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
 61 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
 62 
 63 struct hdmi_spec_per_cvt {
 64         hda_nid_t cvt_nid;
 65         int assigned;
 66         unsigned int channels_min;
 67         unsigned int channels_max;
 68         u32 rates;
 69         u64 formats;
 70         unsigned int maxbps;
 71 };
 72 
 73 /* max. connections to a widget */
 74 #define HDA_MAX_CONNECTIONS     32
 75 
 76 struct hdmi_spec_per_pin {
 77         hda_nid_t pin_nid;
 78         int num_mux_nids;
 79         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
 80         int mux_idx;
 81         hda_nid_t cvt_nid;
 82 
 83         struct hda_codec *codec;
 84         struct hdmi_eld sink_eld;
 85         struct mutex lock;
 86         struct delayed_work work;
 87         struct snd_kcontrol *eld_ctl;
 88         struct snd_jack *acomp_jack; /* jack via audio component */
 89         int repoll_count;
 90         bool setup; /* the stream has been set up by prepare callback */
 91         int channels; /* current number of channels */
 92         bool non_pcm;
 93         bool chmap_set;         /* channel-map override by ALSA API? */
 94         unsigned char chmap[8]; /* ALSA API channel-map */
 95 #ifdef CONFIG_SND_PROC_FS
 96         struct snd_info_entry *proc_entry;
 97 #endif
 98 };
 99 
100 struct cea_channel_speaker_allocation;
101 
102 /* operations used by generic code that can be overridden by patches */
103 struct hdmi_ops {
104         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
105                            unsigned char *buf, int *eld_size);
106 
107         /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
108         int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
109                                     int asp_slot);
110         int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
111                                     int asp_slot, int channel);
112 
113         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
114                                     int ca, int active_channels, int conn_type);
115 
116         /* enable/disable HBR (HD passthrough) */
117         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
118 
119         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
120                             hda_nid_t pin_nid, u32 stream_tag, int format);
121 
122         /* Helpers for producing the channel map TLVs. These can be overridden
123          * for devices that have non-standard mapping requirements. */
124         int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
125                                                  int channels);
126         void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
127                                        unsigned int *chmap, int channels);
128 
129         /* check that the user-given chmap is supported */
130         int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
131 };
132 
133 struct hdmi_spec {
134         int num_cvts;
135         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
136         hda_nid_t cvt_nids[4]; /* only for haswell fix */
137 
138         int num_pins;
139         struct snd_array pins; /* struct hdmi_spec_per_pin */
140         struct hda_pcm *pcm_rec[16];
141         unsigned int channels_max; /* max over all cvts */
142 
143         struct hdmi_eld temp_eld;
144         struct hdmi_ops ops;
145 
146         bool dyn_pin_out;
147 
148         /*
149          * Non-generic VIA/NVIDIA specific
150          */
151         struct hda_multi_out multiout;
152         struct hda_pcm_stream pcm_playback;
153 
154         /* i915/powerwell (Haswell+/Valleyview+) specific */
155         bool use_acomp_notifier; /* use i915 eld_notify callback for hotplug */
156         struct i915_audio_component_audio_ops i915_audio_ops;
157         bool i915_bound; /* was i915 bound in this driver? */
158 };
159 
160 #ifdef CONFIG_SND_HDA_I915
161 static inline bool codec_has_acomp(struct hda_codec *codec)
162 {
163         struct hdmi_spec *spec = codec->spec;
164         return spec->use_acomp_notifier;
165 }
166 #else
167 #define codec_has_acomp(codec)  false
168 #endif
169 
170 struct hdmi_audio_infoframe {
171         u8 type; /* 0x84 */
172         u8 ver;  /* 0x01 */
173         u8 len;  /* 0x0a */
174 
175         u8 checksum;
176 
177         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
178         u8 SS01_SF24;
179         u8 CXT04;
180         u8 CA;
181         u8 LFEPBL01_LSV36_DM_INH7;
182 };
183 
184 struct dp_audio_infoframe {
185         u8 type; /* 0x84 */
186         u8 len;  /* 0x1b */
187         u8 ver;  /* 0x11 << 2 */
188 
189         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
190         u8 SS01_SF24;
191         u8 CXT04;
192         u8 CA;
193         u8 LFEPBL01_LSV36_DM_INH7;
194 };
195 
196 union audio_infoframe {
197         struct hdmi_audio_infoframe hdmi;
198         struct dp_audio_infoframe dp;
199         u8 bytes[0];
200 };
201 
202 /*
203  * CEA speaker placement:
204  *
205  *        FLH       FCH        FRH
206  *  FLW    FL  FLC   FC   FRC   FR   FRW
207  *
208  *                                  LFE
209  *                     TC
210  *
211  *          RL  RLC   RC   RRC   RR
212  *
213  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
214  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
215  */
216 enum cea_speaker_placement {
217         FL  = (1 <<  0),        /* Front Left           */
218         FC  = (1 <<  1),        /* Front Center         */
219         FR  = (1 <<  2),        /* Front Right          */
220         FLC = (1 <<  3),        /* Front Left Center    */
221         FRC = (1 <<  4),        /* Front Right Center   */
222         RL  = (1 <<  5),        /* Rear Left            */
223         RC  = (1 <<  6),        /* Rear Center          */
224         RR  = (1 <<  7),        /* Rear Right           */
225         RLC = (1 <<  8),        /* Rear Left Center     */
226         RRC = (1 <<  9),        /* Rear Right Center    */
227         LFE = (1 << 10),        /* Low Frequency Effect */
228         FLW = (1 << 11),        /* Front Left Wide      */
229         FRW = (1 << 12),        /* Front Right Wide     */
230         FLH = (1 << 13),        /* Front Left High      */
231         FCH = (1 << 14),        /* Front Center High    */
232         FRH = (1 << 15),        /* Front Right High     */
233         TC  = (1 << 16),        /* Top Center           */
234 };
235 
236 /*
237  * ELD SA bits in the CEA Speaker Allocation data block
238  */
239 static int eld_speaker_allocation_bits[] = {
240         [0] = FL | FR,
241         [1] = LFE,
242         [2] = FC,
243         [3] = RL | RR,
244         [4] = RC,
245         [5] = FLC | FRC,
246         [6] = RLC | RRC,
247         /* the following are not defined in ELD yet */
248         [7] = FLW | FRW,
249         [8] = FLH | FRH,
250         [9] = TC,
251         [10] = FCH,
252 };
253 
254 struct cea_channel_speaker_allocation {
255         int ca_index;
256         int speakers[8];
257 
258         /* derived values, just for convenience */
259         int channels;
260         int spk_mask;
261 };
262 
263 /*
264  * ALSA sequence is:
265  *
266  *       surround40   surround41   surround50   surround51   surround71
267  * ch0   front left   =            =            =            =
268  * ch1   front right  =            =            =            =
269  * ch2   rear left    =            =            =            =
270  * ch3   rear right   =            =            =            =
271  * ch4                LFE          center       center       center
272  * ch5                                          LFE          LFE
273  * ch6                                                       side left
274  * ch7                                                       side right
275  *
276  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
277  */
278 static int hdmi_channel_mapping[0x32][8] = {
279         /* stereo */
280         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
281         /* 2.1 */
282         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
283         /* Dolby Surround */
284         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
285         /* surround40 */
286         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
287         /* 4ch */
288         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
289         /* surround41 */
290         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
291         /* surround50 */
292         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
293         /* surround51 */
294         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
295         /* 7.1 */
296         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
297 };
298 
299 /*
300  * This is an ordered list!
301  *
302  * The preceding ones have better chances to be selected by
303  * hdmi_channel_allocation().
304  */
305 static struct cea_channel_speaker_allocation channel_allocations[] = {
306 /*                        channel:   7     6    5    4    3     2    1    0  */
307 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
308                                  /* 2.1 */
309 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
310                                  /* Dolby Surround */
311 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
312                                  /* surround40 */
313 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
314                                  /* surround41 */
315 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
316                                  /* surround50 */
317 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
318                                  /* surround51 */
319 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
320                                  /* 6.1 */
321 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
322                                  /* surround71 */
323 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
324 
325 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
326 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
327 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
328 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
329 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
330 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
331 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
332 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
333 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
334 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
335 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
336 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
337 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
338 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
339 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
340 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
341 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
342 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
343 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
344 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
345 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
346 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
347 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
348 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
349 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
350 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
351 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
352 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
353 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
354 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
355 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
356 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
357 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
358 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
359 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
360 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
361 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
362 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
363 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
364 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
365 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
366 };
367 
368 
369 /*
370  * HDMI routines
371  */
372 
373 #define get_pin(spec, idx) \
374         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
375 #define get_cvt(spec, idx) \
376         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
377 #define get_pcm_rec(spec, idx)  ((spec)->pcm_rec[idx])
378 
379 static int pin_nid_to_pin_index(struct hda_codec *codec, hda_nid_t pin_nid)
380 {
381         struct hdmi_spec *spec = codec->spec;
382         int pin_idx;
383 
384         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
385                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
386                         return pin_idx;
387 
388         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
389         return -EINVAL;
390 }
391 
392 static int hinfo_to_pin_index(struct hda_codec *codec,
393                               struct hda_pcm_stream *hinfo)
394 {
395         struct hdmi_spec *spec = codec->spec;
396         int pin_idx;
397 
398         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
399                 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
400                         return pin_idx;
401 
402         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
403         return -EINVAL;
404 }
405 
406 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
407 {
408         struct hdmi_spec *spec = codec->spec;
409         int cvt_idx;
410 
411         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
412                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
413                         return cvt_idx;
414 
415         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
416         return -EINVAL;
417 }
418 
419 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
420                         struct snd_ctl_elem_info *uinfo)
421 {
422         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
423         struct hdmi_spec *spec = codec->spec;
424         struct hdmi_spec_per_pin *per_pin;
425         struct hdmi_eld *eld;
426         int pin_idx;
427 
428         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
429 
430         pin_idx = kcontrol->private_value;
431         per_pin = get_pin(spec, pin_idx);
432         eld = &per_pin->sink_eld;
433 
434         mutex_lock(&per_pin->lock);
435         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
436         mutex_unlock(&per_pin->lock);
437 
438         return 0;
439 }
440 
441 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
442                         struct snd_ctl_elem_value *ucontrol)
443 {
444         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
445         struct hdmi_spec *spec = codec->spec;
446         struct hdmi_spec_per_pin *per_pin;
447         struct hdmi_eld *eld;
448         int pin_idx;
449 
450         pin_idx = kcontrol->private_value;
451         per_pin = get_pin(spec, pin_idx);
452         eld = &per_pin->sink_eld;
453 
454         mutex_lock(&per_pin->lock);
455         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
456             eld->eld_size > ELD_MAX_SIZE) {
457                 mutex_unlock(&per_pin->lock);
458                 snd_BUG();
459                 return -EINVAL;
460         }
461 
462         memset(ucontrol->value.bytes.data, 0,
463                ARRAY_SIZE(ucontrol->value.bytes.data));
464         if (eld->eld_valid)
465                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
466                        eld->eld_size);
467         mutex_unlock(&per_pin->lock);
468 
469         return 0;
470 }
471 
472 static struct snd_kcontrol_new eld_bytes_ctl = {
473         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
474         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
475         .name = "ELD",
476         .info = hdmi_eld_ctl_info,
477         .get = hdmi_eld_ctl_get,
478 };
479 
480 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
481                         int device)
482 {
483         struct snd_kcontrol *kctl;
484         struct hdmi_spec *spec = codec->spec;
485         int err;
486 
487         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
488         if (!kctl)
489                 return -ENOMEM;
490         kctl->private_value = pin_idx;
491         kctl->id.device = device;
492 
493         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
494         if (err < 0)
495                 return err;
496 
497         get_pin(spec, pin_idx)->eld_ctl = kctl;
498         return 0;
499 }
500 
501 #ifdef BE_PARANOID
502 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
503                                 int *packet_index, int *byte_index)
504 {
505         int val;
506 
507         val = snd_hda_codec_read(codec, pin_nid, 0,
508                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
509 
510         *packet_index = val >> 5;
511         *byte_index = val & 0x1f;
512 }
513 #endif
514 
515 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
516                                 int packet_index, int byte_index)
517 {
518         int val;
519 
520         val = (packet_index << 5) | (byte_index & 0x1f);
521 
522         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
523 }
524 
525 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
526                                 unsigned char val)
527 {
528         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
529 }
530 
531 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
532 {
533         struct hdmi_spec *spec = codec->spec;
534         int pin_out;
535 
536         /* Unmute */
537         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
538                 snd_hda_codec_write(codec, pin_nid, 0,
539                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
540 
541         if (spec->dyn_pin_out)
542                 /* Disable pin out until stream is active */
543                 pin_out = 0;
544         else
545                 /* Enable pin out: some machines with GM965 gets broken output
546                  * when the pin is disabled or changed while using with HDMI
547                  */
548                 pin_out = PIN_OUT;
549 
550         snd_hda_codec_write(codec, pin_nid, 0,
551                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
552 }
553 
554 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
555 {
556         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
557                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
558 }
559 
560 static void hdmi_set_channel_count(struct hda_codec *codec,
561                                    hda_nid_t cvt_nid, int chs)
562 {
563         if (chs != hdmi_get_channel_count(codec, cvt_nid))
564                 snd_hda_codec_write(codec, cvt_nid, 0,
565                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
566 }
567 
568 /*
569  * ELD proc files
570  */
571 
572 #ifdef CONFIG_SND_PROC_FS
573 static void print_eld_info(struct snd_info_entry *entry,
574                            struct snd_info_buffer *buffer)
575 {
576         struct hdmi_spec_per_pin *per_pin = entry->private_data;
577 
578         mutex_lock(&per_pin->lock);
579         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
580         mutex_unlock(&per_pin->lock);
581 }
582 
583 static void write_eld_info(struct snd_info_entry *entry,
584                            struct snd_info_buffer *buffer)
585 {
586         struct hdmi_spec_per_pin *per_pin = entry->private_data;
587 
588         mutex_lock(&per_pin->lock);
589         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
590         mutex_unlock(&per_pin->lock);
591 }
592 
593 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
594 {
595         char name[32];
596         struct hda_codec *codec = per_pin->codec;
597         struct snd_info_entry *entry;
598         int err;
599 
600         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
601         err = snd_card_proc_new(codec->card, name, &entry);
602         if (err < 0)
603                 return err;
604 
605         snd_info_set_text_ops(entry, per_pin, print_eld_info);
606         entry->c.text.write = write_eld_info;
607         entry->mode |= S_IWUSR;
608         per_pin->proc_entry = entry;
609 
610         return 0;
611 }
612 
613 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
614 {
615         if (!per_pin->codec->bus->shutdown) {
616                 snd_info_free_entry(per_pin->proc_entry);
617                 per_pin->proc_entry = NULL;
618         }
619 }
620 #else
621 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
622                                int index)
623 {
624         return 0;
625 }
626 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
627 {
628 }
629 #endif
630 
631 /*
632  * Channel mapping routines
633  */
634 
635 /*
636  * Compute derived values in channel_allocations[].
637  */
638 static void init_channel_allocations(void)
639 {
640         int i, j;
641         struct cea_channel_speaker_allocation *p;
642 
643         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
644                 p = channel_allocations + i;
645                 p->channels = 0;
646                 p->spk_mask = 0;
647                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
648                         if (p->speakers[j]) {
649                                 p->channels++;
650                                 p->spk_mask |= p->speakers[j];
651                         }
652         }
653 }
654 
655 static int get_channel_allocation_order(int ca)
656 {
657         int i;
658 
659         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
660                 if (channel_allocations[i].ca_index == ca)
661                         break;
662         }
663         return i;
664 }
665 
666 /*
667  * The transformation takes two steps:
668  *
669  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
670  *            spk_mask => (channel_allocations[])         => ai->CA
671  *
672  * TODO: it could select the wrong CA from multiple candidates.
673 */
674 static int hdmi_channel_allocation(struct hda_codec *codec,
675                                    struct hdmi_eld *eld, int channels)
676 {
677         int i;
678         int ca = 0;
679         int spk_mask = 0;
680         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
681 
682         /*
683          * CA defaults to 0 for basic stereo audio
684          */
685         if (channels <= 2)
686                 return 0;
687 
688         /*
689          * expand ELD's speaker allocation mask
690          *
691          * ELD tells the speaker mask in a compact(paired) form,
692          * expand ELD's notions to match the ones used by Audio InfoFrame.
693          */
694         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
695                 if (eld->info.spk_alloc & (1 << i))
696                         spk_mask |= eld_speaker_allocation_bits[i];
697         }
698 
699         /* search for the first working match in the CA table */
700         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
701                 if (channels == channel_allocations[i].channels &&
702                     (spk_mask & channel_allocations[i].spk_mask) ==
703                                 channel_allocations[i].spk_mask) {
704                         ca = channel_allocations[i].ca_index;
705                         break;
706                 }
707         }
708 
709         if (!ca) {
710                 /* if there was no match, select the regular ALSA channel
711                  * allocation with the matching number of channels */
712                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
713                         if (channels == channel_allocations[i].channels) {
714                                 ca = channel_allocations[i].ca_index;
715                                 break;
716                         }
717                 }
718         }
719 
720         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
721         codec_dbg(codec, "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
722                     ca, channels, buf);
723 
724         return ca;
725 }
726 
727 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
728                                        hda_nid_t pin_nid)
729 {
730 #ifdef CONFIG_SND_DEBUG_VERBOSE
731         struct hdmi_spec *spec = codec->spec;
732         int i;
733         int channel;
734 
735         for (i = 0; i < 8; i++) {
736                 channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
737                 codec_dbg(codec, "HDMI: ASP channel %d => slot %d\n",
738                                                 channel, i);
739         }
740 #endif
741 }
742 
743 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
744                                        hda_nid_t pin_nid,
745                                        bool non_pcm,
746                                        int ca)
747 {
748         struct hdmi_spec *spec = codec->spec;
749         struct cea_channel_speaker_allocation *ch_alloc;
750         int i;
751         int err;
752         int order;
753         int non_pcm_mapping[8];
754 
755         order = get_channel_allocation_order(ca);
756         ch_alloc = &channel_allocations[order];
757 
758         if (hdmi_channel_mapping[ca][1] == 0) {
759                 int hdmi_slot = 0;
760                 /* fill actual channel mappings in ALSA channel (i) order */
761                 for (i = 0; i < ch_alloc->channels; i++) {
762                         while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
763                                 hdmi_slot++; /* skip zero slots */
764 
765                         hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
766                 }
767                 /* fill the rest of the slots with ALSA channel 0xf */
768                 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
769                         if (!ch_alloc->speakers[7 - hdmi_slot])
770                                 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
771         }
772 
773         if (non_pcm) {
774                 for (i = 0; i < ch_alloc->channels; i++)
775                         non_pcm_mapping[i] = (i << 4) | i;
776                 for (; i < 8; i++)
777                         non_pcm_mapping[i] = (0xf << 4) | i;
778         }
779 
780         for (i = 0; i < 8; i++) {
781                 int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
782                 int hdmi_slot = slotsetup & 0x0f;
783                 int channel = (slotsetup & 0xf0) >> 4;
784                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
785                 if (err) {
786                         codec_dbg(codec, "HDMI: channel mapping failed\n");
787                         break;
788                 }
789         }
790 }
791 
792 struct channel_map_table {
793         unsigned char map;              /* ALSA API channel map position */
794         int spk_mask;                   /* speaker position bit mask */
795 };
796 
797 static struct channel_map_table map_tables[] = {
798         { SNDRV_CHMAP_FL,       FL },
799         { SNDRV_CHMAP_FR,       FR },
800         { SNDRV_CHMAP_RL,       RL },
801         { SNDRV_CHMAP_RR,       RR },
802         { SNDRV_CHMAP_LFE,      LFE },
803         { SNDRV_CHMAP_FC,       FC },
804         { SNDRV_CHMAP_RLC,      RLC },
805         { SNDRV_CHMAP_RRC,      RRC },
806         { SNDRV_CHMAP_RC,       RC },
807         { SNDRV_CHMAP_FLC,      FLC },
808         { SNDRV_CHMAP_FRC,      FRC },
809         { SNDRV_CHMAP_TFL,      FLH },
810         { SNDRV_CHMAP_TFR,      FRH },
811         { SNDRV_CHMAP_FLW,      FLW },
812         { SNDRV_CHMAP_FRW,      FRW },
813         { SNDRV_CHMAP_TC,       TC },
814         { SNDRV_CHMAP_TFC,      FCH },
815         {} /* terminator */
816 };
817 
818 /* from ALSA API channel position to speaker bit mask */
819 static int to_spk_mask(unsigned char c)
820 {
821         struct channel_map_table *t = map_tables;
822         for (; t->map; t++) {
823                 if (t->map == c)
824                         return t->spk_mask;
825         }
826         return 0;
827 }
828 
829 /* from ALSA API channel position to CEA slot */
830 static int to_cea_slot(int ordered_ca, unsigned char pos)
831 {
832         int mask = to_spk_mask(pos);
833         int i;
834 
835         if (mask) {
836                 for (i = 0; i < 8; i++) {
837                         if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
838                                 return i;
839                 }
840         }
841 
842         return -1;
843 }
844 
845 /* from speaker bit mask to ALSA API channel position */
846 static int spk_to_chmap(int spk)
847 {
848         struct channel_map_table *t = map_tables;
849         for (; t->map; t++) {
850                 if (t->spk_mask == spk)
851                         return t->map;
852         }
853         return 0;
854 }
855 
856 /* from CEA slot to ALSA API channel position */
857 static int from_cea_slot(int ordered_ca, unsigned char slot)
858 {
859         int mask = channel_allocations[ordered_ca].speakers[7 - slot];
860 
861         return spk_to_chmap(mask);
862 }
863 
864 /* get the CA index corresponding to the given ALSA API channel map */
865 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
866 {
867         int i, spks = 0, spk_mask = 0;
868 
869         for (i = 0; i < chs; i++) {
870                 int mask = to_spk_mask(map[i]);
871                 if (mask) {
872                         spk_mask |= mask;
873                         spks++;
874                 }
875         }
876 
877         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
878                 if ((chs == channel_allocations[i].channels ||
879                      spks == channel_allocations[i].channels) &&
880                     (spk_mask & channel_allocations[i].spk_mask) ==
881                                 channel_allocations[i].spk_mask)
882                         return channel_allocations[i].ca_index;
883         }
884         return -1;
885 }
886 
887 /* set up the channel slots for the given ALSA API channel map */
888 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
889                                              hda_nid_t pin_nid,
890                                              int chs, unsigned char *map,
891                                              int ca)
892 {
893         struct hdmi_spec *spec = codec->spec;
894         int ordered_ca = get_channel_allocation_order(ca);
895         int alsa_pos, hdmi_slot;
896         int assignments[8] = {[0 ... 7] = 0xf};
897 
898         for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
899 
900                 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
901 
902                 if (hdmi_slot < 0)
903                         continue; /* unassigned channel */
904 
905                 assignments[hdmi_slot] = alsa_pos;
906         }
907 
908         for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
909                 int err;
910 
911                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
912                                                      assignments[hdmi_slot]);
913                 if (err)
914                         return -EINVAL;
915         }
916         return 0;
917 }
918 
919 /* store ALSA API channel map from the current default map */
920 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
921 {
922         int i;
923         int ordered_ca = get_channel_allocation_order(ca);
924         for (i = 0; i < 8; i++) {
925                 if (i < channel_allocations[ordered_ca].channels)
926                         map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
927                 else
928                         map[i] = 0;
929         }
930 }
931 
932 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
933                                        hda_nid_t pin_nid, bool non_pcm, int ca,
934                                        int channels, unsigned char *map,
935                                        bool chmap_set)
936 {
937         if (!non_pcm && chmap_set) {
938                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
939                                                   channels, map, ca);
940         } else {
941                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
942                 hdmi_setup_fake_chmap(map, ca);
943         }
944 
945         hdmi_debug_channel_mapping(codec, pin_nid);
946 }
947 
948 static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
949                                      int asp_slot, int channel)
950 {
951         return snd_hda_codec_write(codec, pin_nid, 0,
952                                    AC_VERB_SET_HDMI_CHAN_SLOT,
953                                    (channel << 4) | asp_slot);
954 }
955 
956 static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
957                                      int asp_slot)
958 {
959         return (snd_hda_codec_read(codec, pin_nid, 0,
960                                    AC_VERB_GET_HDMI_CHAN_SLOT,
961                                    asp_slot) & 0xf0) >> 4;
962 }
963 
964 /*
965  * Audio InfoFrame routines
966  */
967 
968 /*
969  * Enable Audio InfoFrame Transmission
970  */
971 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
972                                        hda_nid_t pin_nid)
973 {
974         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
975         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
976                                                 AC_DIPXMIT_BEST);
977 }
978 
979 /*
980  * Disable Audio InfoFrame Transmission
981  */
982 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
983                                       hda_nid_t pin_nid)
984 {
985         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
986         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
987                                                 AC_DIPXMIT_DISABLE);
988 }
989 
990 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
991 {
992 #ifdef CONFIG_SND_DEBUG_VERBOSE
993         int i;
994         int size;
995 
996         size = snd_hdmi_get_eld_size(codec, pin_nid);
997         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
998 
999         for (i = 0; i < 8; i++) {
1000                 size = snd_hda_codec_read(codec, pin_nid, 0,
1001                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
1002                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
1003         }
1004 #endif
1005 }
1006 
1007 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
1008 {
1009 #ifdef BE_PARANOID
1010         int i, j;
1011         int size;
1012         int pi, bi;
1013         for (i = 0; i < 8; i++) {
1014                 size = snd_hda_codec_read(codec, pin_nid, 0,
1015                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
1016                 if (size == 0)
1017                         continue;
1018 
1019                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
1020                 for (j = 1; j < 1000; j++) {
1021                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
1022                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
1023                         if (pi != i)
1024                                 codec_dbg(codec, "dip index %d: %d != %d\n",
1025                                                 bi, pi, i);
1026                         if (bi == 0) /* byte index wrapped around */
1027                                 break;
1028                 }
1029                 codec_dbg(codec,
1030                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
1031                         i, size, j);
1032         }
1033 #endif
1034 }
1035 
1036 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
1037 {
1038         u8 *bytes = (u8 *)hdmi_ai;
1039         u8 sum = 0;
1040         int i;
1041 
1042         hdmi_ai->checksum = 0;
1043 
1044         for (i = 0; i < sizeof(*hdmi_ai); i++)
1045                 sum += bytes[i];
1046 
1047         hdmi_ai->checksum = -sum;
1048 }
1049 
1050 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1051                                       hda_nid_t pin_nid,
1052                                       u8 *dip, int size)
1053 {
1054         int i;
1055 
1056         hdmi_debug_dip_size(codec, pin_nid);
1057         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1058 
1059         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1060         for (i = 0; i < size; i++)
1061                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1062 }
1063 
1064 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1065                                     u8 *dip, int size)
1066 {
1067         u8 val;
1068         int i;
1069 
1070         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1071                                                             != AC_DIPXMIT_BEST)
1072                 return false;
1073 
1074         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1075         for (i = 0; i < size; i++) {
1076                 val = snd_hda_codec_read(codec, pin_nid, 0,
1077                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
1078                 if (val != dip[i])
1079                         return false;
1080         }
1081 
1082         return true;
1083 }
1084 
1085 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1086                                      hda_nid_t pin_nid,
1087                                      int ca, int active_channels,
1088                                      int conn_type)
1089 {
1090         union audio_infoframe ai;
1091 
1092         memset(&ai, 0, sizeof(ai));
1093         if (conn_type == 0) { /* HDMI */
1094                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1095 
1096                 hdmi_ai->type           = 0x84;
1097                 hdmi_ai->ver            = 0x01;
1098                 hdmi_ai->len            = 0x0a;
1099                 hdmi_ai->CC02_CT47      = active_channels - 1;
1100                 hdmi_ai->CA             = ca;
1101                 hdmi_checksum_audio_infoframe(hdmi_ai);
1102         } else if (conn_type == 1) { /* DisplayPort */
1103                 struct dp_audio_infoframe *dp_ai = &ai.dp;
1104 
1105                 dp_ai->type             = 0x84;
1106                 dp_ai->len              = 0x1b;
1107                 dp_ai->ver              = 0x11 << 2;
1108                 dp_ai->CC02_CT47        = active_channels - 1;
1109                 dp_ai->CA               = ca;
1110         } else {
1111                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
1112                             pin_nid);
1113                 return;
1114         }
1115 
1116         /*
1117          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1118          * sizeof(*dp_ai) to avoid partial match/update problems when
1119          * the user switches between HDMI/DP monitors.
1120          */
1121         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1122                                         sizeof(ai))) {
1123                 codec_dbg(codec,
1124                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
1125                             pin_nid,
1126                             active_channels, ca);
1127                 hdmi_stop_infoframe_trans(codec, pin_nid);
1128                 hdmi_fill_audio_infoframe(codec, pin_nid,
1129                                             ai.bytes, sizeof(ai));
1130                 hdmi_start_infoframe_trans(codec, pin_nid);
1131         }
1132 }
1133 
1134 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1135                                        struct hdmi_spec_per_pin *per_pin,
1136                                        bool non_pcm)
1137 {
1138         struct hdmi_spec *spec = codec->spec;
1139         hda_nid_t pin_nid = per_pin->pin_nid;
1140         int channels = per_pin->channels;
1141         int active_channels;
1142         struct hdmi_eld *eld;
1143         int ca, ordered_ca;
1144 
1145         if (!channels)
1146                 return;
1147 
1148         if (is_haswell_plus(codec))
1149                 snd_hda_codec_write(codec, pin_nid, 0,
1150                                             AC_VERB_SET_AMP_GAIN_MUTE,
1151                                             AMP_OUT_UNMUTE);
1152 
1153         eld = &per_pin->sink_eld;
1154 
1155         if (!non_pcm && per_pin->chmap_set)
1156                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1157         else
1158                 ca = hdmi_channel_allocation(codec, eld, channels);
1159         if (ca < 0)
1160                 ca = 0;
1161 
1162         ordered_ca = get_channel_allocation_order(ca);
1163         active_channels = channel_allocations[ordered_ca].channels;
1164 
1165         hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1166 
1167         /*
1168          * always configure channel mapping, it may have been changed by the
1169          * user in the meantime
1170          */
1171         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1172                                    channels, per_pin->chmap,
1173                                    per_pin->chmap_set);
1174 
1175         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1176                                       eld->info.conn_type);
1177 
1178         per_pin->non_pcm = non_pcm;
1179 }
1180 
1181 /*
1182  * Unsolicited events
1183  */
1184 
1185 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1186 
1187 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid)
1188 {
1189         struct hdmi_spec *spec = codec->spec;
1190         int pin_idx = pin_nid_to_pin_index(codec, nid);
1191 
1192         if (pin_idx < 0)
1193                 return;
1194         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1195                 snd_hda_jack_report_sync(codec);
1196 }
1197 
1198 static void jack_callback(struct hda_codec *codec,
1199                           struct hda_jack_callback *jack)
1200 {
1201         check_presence_and_report(codec, jack->nid);
1202 }
1203 
1204 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1205 {
1206         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1207         struct hda_jack_tbl *jack;
1208         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1209 
1210         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1211         if (!jack)
1212                 return;
1213         jack->jack_dirty = 1;
1214 
1215         codec_dbg(codec,
1216                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1217                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1218                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1219 
1220         check_presence_and_report(codec, jack->nid);
1221 }
1222 
1223 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1224 {
1225         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1226         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1227         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1228         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1229 
1230         codec_info(codec,
1231                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1232                 codec->addr,
1233                 tag,
1234                 subtag,
1235                 cp_state,
1236                 cp_ready);
1237 
1238         /* TODO */
1239         if (cp_state)
1240                 ;
1241         if (cp_ready)
1242                 ;
1243 }
1244 
1245 
1246 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1247 {
1248         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1249         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1250 
1251         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1252                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
1253                 return;
1254         }
1255 
1256         if (subtag == 0)
1257                 hdmi_intrinsic_event(codec, res);
1258         else
1259                 hdmi_non_intrinsic_event(codec, res);
1260 }
1261 
1262 static void haswell_verify_D0(struct hda_codec *codec,
1263                 hda_nid_t cvt_nid, hda_nid_t nid)
1264 {
1265         int pwr;
1266 
1267         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1268          * thus pins could only choose converter 0 for use. Make sure the
1269          * converters are in correct power state */
1270         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1271                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1272 
1273         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1274                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1275                                     AC_PWRST_D0);
1276                 msleep(40);
1277                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1278                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1279                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1280         }
1281 }
1282 
1283 /*
1284  * Callbacks
1285  */
1286 
1287 /* HBR should be Non-PCM, 8 channels */
1288 #define is_hbr_format(format) \
1289         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1290 
1291 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1292                               bool hbr)
1293 {
1294         int pinctl, new_pinctl;
1295 
1296         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1297                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1298                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1299 
1300                 if (pinctl < 0)
1301                         return hbr ? -EINVAL : 0;
1302 
1303                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1304                 if (hbr)
1305                         new_pinctl |= AC_PINCTL_EPT_HBR;
1306                 else
1307                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1308 
1309                 codec_dbg(codec,
1310                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
1311                             pin_nid,
1312                             pinctl == new_pinctl ? "" : "new-",
1313                             new_pinctl);
1314 
1315                 if (pinctl != new_pinctl)
1316                         snd_hda_codec_write(codec, pin_nid, 0,
1317                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1318                                             new_pinctl);
1319         } else if (hbr)
1320                 return -EINVAL;
1321 
1322         return 0;
1323 }
1324 
1325 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1326                               hda_nid_t pin_nid, u32 stream_tag, int format)
1327 {
1328         struct hdmi_spec *spec = codec->spec;
1329         int err;
1330 
1331         if (is_haswell_plus(codec))
1332                 haswell_verify_D0(codec, cvt_nid, pin_nid);
1333 
1334         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1335 
1336         if (err) {
1337                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
1338                 return err;
1339         }
1340 
1341         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1342         return 0;
1343 }
1344 
1345 static int hdmi_choose_cvt(struct hda_codec *codec,
1346                         int pin_idx, int *cvt_id, int *mux_id)
1347 {
1348         struct hdmi_spec *spec = codec->spec;
1349         struct hdmi_spec_per_pin *per_pin;
1350         struct hdmi_spec_per_cvt *per_cvt = NULL;
1351         int cvt_idx, mux_idx = 0;
1352 
1353         per_pin = get_pin(spec, pin_idx);
1354 
1355         /* Dynamically assign converter to stream */
1356         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1357                 per_cvt = get_cvt(spec, cvt_idx);
1358 
1359                 /* Must not already be assigned */
1360                 if (per_cvt->assigned)
1361                         continue;
1362                 /* Must be in pin's mux's list of converters */
1363                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1364                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1365                                 break;
1366                 /* Not in mux list */
1367                 if (mux_idx == per_pin->num_mux_nids)
1368                         continue;
1369                 break;
1370         }
1371 
1372         /* No free converters */
1373         if (cvt_idx == spec->num_cvts)
1374                 return -ENODEV;
1375 
1376         per_pin->mux_idx = mux_idx;
1377 
1378         if (cvt_id)
1379                 *cvt_id = cvt_idx;
1380         if (mux_id)
1381                 *mux_id = mux_idx;
1382 
1383         return 0;
1384 }
1385 
1386 /* Assure the pin select the right convetor */
1387 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1388                         struct hdmi_spec_per_pin *per_pin)
1389 {
1390         hda_nid_t pin_nid = per_pin->pin_nid;
1391         int mux_idx, curr;
1392 
1393         mux_idx = per_pin->mux_idx;
1394         curr = snd_hda_codec_read(codec, pin_nid, 0,
1395                                           AC_VERB_GET_CONNECT_SEL, 0);
1396         if (curr != mux_idx)
1397                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1398                                             AC_VERB_SET_CONNECT_SEL,
1399                                             mux_idx);
1400 }
1401 
1402 /* Intel HDMI workaround to fix audio routing issue:
1403  * For some Intel display codecs, pins share the same connection list.
1404  * So a conveter can be selected by multiple pins and playback on any of these
1405  * pins will generate sound on the external display, because audio flows from
1406  * the same converter to the display pipeline. Also muting one pin may make
1407  * other pins have no sound output.
1408  * So this function assures that an assigned converter for a pin is not selected
1409  * by any other pins.
1410  */
1411 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1412                         hda_nid_t pin_nid, int mux_idx)
1413 {
1414         struct hdmi_spec *spec = codec->spec;
1415         hda_nid_t nid;
1416         int cvt_idx, curr;
1417         struct hdmi_spec_per_cvt *per_cvt;
1418 
1419         /* configure all pins, including "no physical connection" ones */
1420         for_each_hda_codec_node(nid, codec) {
1421                 unsigned int wid_caps = get_wcaps(codec, nid);
1422                 unsigned int wid_type = get_wcaps_type(wid_caps);
1423 
1424                 if (wid_type != AC_WID_PIN)
1425                         continue;
1426 
1427                 if (nid == pin_nid)
1428                         continue;
1429 
1430                 curr = snd_hda_codec_read(codec, nid, 0,
1431                                           AC_VERB_GET_CONNECT_SEL, 0);
1432                 if (curr != mux_idx)
1433                         continue;
1434 
1435                 /* choose an unassigned converter. The conveters in the
1436                  * connection list are in the same order as in the codec.
1437                  */
1438                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1439                         per_cvt = get_cvt(spec, cvt_idx);
1440                         if (!per_cvt->assigned) {
1441                                 codec_dbg(codec,
1442                                           "choose cvt %d for pin nid %d\n",
1443                                         cvt_idx, nid);
1444                                 snd_hda_codec_write_cache(codec, nid, 0,
1445                                             AC_VERB_SET_CONNECT_SEL,
1446                                             cvt_idx);
1447                                 break;
1448                         }
1449                 }
1450         }
1451 }
1452 
1453 /*
1454  * HDA PCM callbacks
1455  */
1456 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1457                          struct hda_codec *codec,
1458                          struct snd_pcm_substream *substream)
1459 {
1460         struct hdmi_spec *spec = codec->spec;
1461         struct snd_pcm_runtime *runtime = substream->runtime;
1462         int pin_idx, cvt_idx, mux_idx = 0;
1463         struct hdmi_spec_per_pin *per_pin;
1464         struct hdmi_eld *eld;
1465         struct hdmi_spec_per_cvt *per_cvt = NULL;
1466         int err;
1467 
1468         /* Validate hinfo */
1469         pin_idx = hinfo_to_pin_index(codec, hinfo);
1470         if (snd_BUG_ON(pin_idx < 0))
1471                 return -EINVAL;
1472         per_pin = get_pin(spec, pin_idx);
1473         eld = &per_pin->sink_eld;
1474 
1475         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1476         if (err < 0)
1477                 return err;
1478 
1479         per_cvt = get_cvt(spec, cvt_idx);
1480         /* Claim converter */
1481         per_cvt->assigned = 1;
1482         per_pin->cvt_nid = per_cvt->cvt_nid;
1483         hinfo->nid = per_cvt->cvt_nid;
1484 
1485         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1486                             AC_VERB_SET_CONNECT_SEL,
1487                             mux_idx);
1488 
1489         /* configure unused pins to choose other converters */
1490         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
1491                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1492 
1493         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1494 
1495         /* Initially set the converter's capabilities */
1496         hinfo->channels_min = per_cvt->channels_min;
1497         hinfo->channels_max = per_cvt->channels_max;
1498         hinfo->rates = per_cvt->rates;
1499         hinfo->formats = per_cvt->formats;
1500         hinfo->maxbps = per_cvt->maxbps;
1501 
1502         /* Restrict capabilities by ELD if this isn't disabled */
1503         if (!static_hdmi_pcm && eld->eld_valid) {
1504                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1505                 if (hinfo->channels_min > hinfo->channels_max ||
1506                     !hinfo->rates || !hinfo->formats) {
1507                         per_cvt->assigned = 0;
1508                         hinfo->nid = 0;
1509                         snd_hda_spdif_ctls_unassign(codec, pin_idx);
1510                         return -ENODEV;
1511                 }
1512         }
1513 
1514         /* Store the updated parameters */
1515         runtime->hw.channels_min = hinfo->channels_min;
1516         runtime->hw.channels_max = hinfo->channels_max;
1517         runtime->hw.formats = hinfo->formats;
1518         runtime->hw.rates = hinfo->rates;
1519 
1520         snd_pcm_hw_constraint_step(substream->runtime, 0,
1521                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1522         return 0;
1523 }
1524 
1525 /*
1526  * HDA/HDMI auto parsing
1527  */
1528 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1529 {
1530         struct hdmi_spec *spec = codec->spec;
1531         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1532         hda_nid_t pin_nid = per_pin->pin_nid;
1533 
1534         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1535                 codec_warn(codec,
1536                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1537                            pin_nid, get_wcaps(codec, pin_nid));
1538                 return -EINVAL;
1539         }
1540 
1541         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1542                                                         per_pin->mux_nids,
1543                                                         HDA_MAX_CONNECTIONS);
1544 
1545         return 0;
1546 }
1547 
1548 /* update per_pin ELD from the given new ELD;
1549  * setup info frame and notification accordingly
1550  */
1551 static void update_eld(struct hda_codec *codec,
1552                        struct hdmi_spec_per_pin *per_pin,
1553                        struct hdmi_eld *eld)
1554 {
1555         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1556         bool old_eld_valid = pin_eld->eld_valid;
1557         bool eld_changed;
1558 
1559         if (eld->eld_valid)
1560                 snd_hdmi_show_eld(codec, &eld->info);
1561 
1562         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1563         if (eld->eld_valid && pin_eld->eld_valid)
1564                 if (pin_eld->eld_size != eld->eld_size ||
1565                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1566                            eld->eld_size) != 0)
1567                         eld_changed = true;
1568 
1569         pin_eld->monitor_present = eld->monitor_present;
1570         pin_eld->eld_valid = eld->eld_valid;
1571         pin_eld->eld_size = eld->eld_size;
1572         if (eld->eld_valid)
1573                 memcpy(pin_eld->eld_buffer, eld->eld_buffer, eld->eld_size);
1574         pin_eld->info = eld->info;
1575 
1576         /*
1577          * Re-setup pin and infoframe. This is needed e.g. when
1578          * - sink is first plugged-in
1579          * - transcoder can change during stream playback on Haswell
1580          *   and this can make HW reset converter selection on a pin.
1581          */
1582         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1583                 if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1584                         intel_verify_pin_cvt_connect(codec, per_pin);
1585                         intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
1586                                                      per_pin->mux_idx);
1587                 }
1588 
1589                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1590         }
1591 
1592         if (eld_changed)
1593                 snd_ctl_notify(codec->card,
1594                                SNDRV_CTL_EVENT_MASK_VALUE |
1595                                SNDRV_CTL_EVENT_MASK_INFO,
1596                                &per_pin->eld_ctl->id);
1597 }
1598 
1599 /* update ELD and jack state via HD-audio verbs */
1600 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1601                                          int repoll)
1602 {
1603         struct hda_jack_tbl *jack;
1604         struct hda_codec *codec = per_pin->codec;
1605         struct hdmi_spec *spec = codec->spec;
1606         struct hdmi_eld *eld = &spec->temp_eld;
1607         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1608         hda_nid_t pin_nid = per_pin->pin_nid;
1609         /*
1610          * Always execute a GetPinSense verb here, even when called from
1611          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1612          * response's PD bit is not the real PD value, but indicates that
1613          * the real PD value changed. An older version of the HD-audio
1614          * specification worked this way. Hence, we just ignore the data in
1615          * the unsolicited response to avoid custom WARs.
1616          */
1617         int present;
1618         bool ret;
1619         bool do_repoll = false;
1620 
1621         snd_hda_power_up_pm(codec);
1622         present = snd_hda_pin_sense(codec, pin_nid);
1623 
1624         mutex_lock(&per_pin->lock);
1625         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1626         eld->monitor_present = pin_eld->monitor_present;
1627 
1628         if (pin_eld->monitor_present)
1629                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1630         else
1631                 eld->eld_valid = false;
1632 
1633         codec_dbg(codec,
1634                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1635                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1636 
1637         if (eld->eld_valid) {
1638                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1639                                                      &eld->eld_size) < 0)
1640                         eld->eld_valid = false;
1641                 else {
1642                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1643                                                     eld->eld_size) < 0)
1644                                 eld->eld_valid = false;
1645                 }
1646                 if (!eld->eld_valid && repoll)
1647                         do_repoll = true;
1648         }
1649 
1650         if (do_repoll)
1651                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1652         else
1653                 update_eld(codec, per_pin, eld);
1654 
1655         ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1656 
1657         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1658         if (jack)
1659                 jack->block_report = !ret;
1660 
1661         mutex_unlock(&per_pin->lock);
1662         snd_hda_power_down_pm(codec);
1663         return ret;
1664 }
1665 
1666 /* update ELD and jack state via audio component */
1667 static void sync_eld_via_acomp(struct hda_codec *codec,
1668                                struct hdmi_spec_per_pin *per_pin)
1669 {
1670         struct hdmi_spec *spec = codec->spec;
1671         struct hdmi_eld *eld = &spec->temp_eld;
1672         int size;
1673 
1674         mutex_lock(&per_pin->lock);
1675         eld->monitor_present = false;
1676         size = snd_hdac_acomp_get_eld(&codec->bus->core, per_pin->pin_nid,
1677                                       &eld->monitor_present, eld->eld_buffer,
1678                                       ELD_MAX_SIZE);
1679         if (size > 0) {
1680                 size = min(size, ELD_MAX_SIZE);
1681                 if (snd_hdmi_parse_eld(codec, &eld->info,
1682                                        eld->eld_buffer, size) < 0)
1683                         size = -EINVAL;
1684         }
1685 
1686         if (size > 0) {
1687                 eld->eld_valid = true;
1688                 eld->eld_size = size;
1689         } else {
1690                 eld->eld_valid = false;
1691                 eld->eld_size = 0;
1692         }
1693 
1694         update_eld(codec, per_pin, eld);
1695         snd_jack_report(per_pin->acomp_jack,
1696                         eld->monitor_present ? SND_JACK_AVOUT : 0);
1697  unlock:
1698         mutex_unlock(&per_pin->lock);
1699 }
1700 
1701 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1702 {
1703         struct hda_codec *codec = per_pin->codec;
1704 
1705         if (codec_has_acomp(codec)) {
1706                 sync_eld_via_acomp(codec, per_pin);
1707                 return false; /* don't call snd_hda_jack_report_sync() */
1708         } else {
1709                 return hdmi_present_sense_via_verbs(per_pin, repoll);
1710         }
1711 }
1712 
1713 static void hdmi_repoll_eld(struct work_struct *work)
1714 {
1715         struct hdmi_spec_per_pin *per_pin =
1716         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1717 
1718         if (per_pin->repoll_count++ > 6)
1719                 per_pin->repoll_count = 0;
1720 
1721         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1722                 snd_hda_jack_report_sync(per_pin->codec);
1723 }
1724 
1725 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1726                                              hda_nid_t nid);
1727 
1728 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1729 {
1730         struct hdmi_spec *spec = codec->spec;
1731         unsigned int caps, config;
1732         int pin_idx;
1733         struct hdmi_spec_per_pin *per_pin;
1734         int err;
1735 
1736         caps = snd_hda_query_pin_caps(codec, pin_nid);
1737         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1738                 return 0;
1739 
1740         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1741         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1742                 return 0;
1743 
1744         if (is_haswell_plus(codec))
1745                 intel_haswell_fixup_connect_list(codec, pin_nid);
1746 
1747         pin_idx = spec->num_pins;
1748         per_pin = snd_array_new(&spec->pins);
1749         if (!per_pin)
1750                 return -ENOMEM;
1751 
1752         per_pin->pin_nid = pin_nid;
1753         per_pin->non_pcm = false;
1754 
1755         err = hdmi_read_pin_conn(codec, pin_idx);
1756         if (err < 0)
1757                 return err;
1758 
1759         spec->num_pins++;
1760 
1761         return 0;
1762 }
1763 
1764 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1765 {
1766         struct hdmi_spec *spec = codec->spec;
1767         struct hdmi_spec_per_cvt *per_cvt;
1768         unsigned int chans;
1769         int err;
1770 
1771         chans = get_wcaps(codec, cvt_nid);
1772         chans = get_wcaps_channels(chans);
1773 
1774         per_cvt = snd_array_new(&spec->cvts);
1775         if (!per_cvt)
1776                 return -ENOMEM;
1777 
1778         per_cvt->cvt_nid = cvt_nid;
1779         per_cvt->channels_min = 2;
1780         if (chans <= 16) {
1781                 per_cvt->channels_max = chans;
1782                 if (chans > spec->channels_max)
1783                         spec->channels_max = chans;
1784         }
1785 
1786         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1787                                           &per_cvt->rates,
1788                                           &per_cvt->formats,
1789                                           &per_cvt->maxbps);
1790         if (err < 0)
1791                 return err;
1792 
1793         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1794                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1795         spec->num_cvts++;
1796 
1797         return 0;
1798 }
1799 
1800 static int hdmi_parse_codec(struct hda_codec *codec)
1801 {
1802         hda_nid_t nid;
1803         int i, nodes;
1804 
1805         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
1806         if (!nid || nodes < 0) {
1807                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1808                 return -EINVAL;
1809         }
1810 
1811         for (i = 0; i < nodes; i++, nid++) {
1812                 unsigned int caps;
1813                 unsigned int type;
1814 
1815                 caps = get_wcaps(codec, nid);
1816                 type = get_wcaps_type(caps);
1817 
1818                 if (!(caps & AC_WCAP_DIGITAL))
1819                         continue;
1820 
1821                 switch (type) {
1822                 case AC_WID_AUD_OUT:
1823                         hdmi_add_cvt(codec, nid);
1824                         break;
1825                 case AC_WID_PIN:
1826                         hdmi_add_pin(codec, nid);
1827                         break;
1828                 }
1829         }
1830 
1831         return 0;
1832 }
1833 
1834 /*
1835  */
1836 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1837 {
1838         struct hda_spdif_out *spdif;
1839         bool non_pcm;
1840 
1841         mutex_lock(&codec->spdif_mutex);
1842         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1843         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1844         mutex_unlock(&codec->spdif_mutex);
1845         return non_pcm;
1846 }
1847 
1848 /*
1849  * HDMI callbacks
1850  */
1851 
1852 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1853                                            struct hda_codec *codec,
1854                                            unsigned int stream_tag,
1855                                            unsigned int format,
1856                                            struct snd_pcm_substream *substream)
1857 {
1858         hda_nid_t cvt_nid = hinfo->nid;
1859         struct hdmi_spec *spec = codec->spec;
1860         int pin_idx = hinfo_to_pin_index(codec, hinfo);
1861         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1862         hda_nid_t pin_nid = per_pin->pin_nid;
1863         struct snd_pcm_runtime *runtime = substream->runtime;
1864         bool non_pcm;
1865         int pinctl;
1866 
1867         if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1868                 /* Verify pin:cvt selections to avoid silent audio after S3.
1869                  * After S3, the audio driver restores pin:cvt selections
1870                  * but this can happen before gfx is ready and such selection
1871                  * is overlooked by HW. Thus multiple pins can share a same
1872                  * default convertor and mute control will affect each other,
1873                  * which can cause a resumed audio playback become silent
1874                  * after S3.
1875                  */
1876                 intel_verify_pin_cvt_connect(codec, per_pin);
1877                 intel_not_share_assigned_cvt(codec, pin_nid, per_pin->mux_idx);
1878         }
1879 
1880         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1881         /* Todo: add DP1.2 MST audio support later */
1882         if (codec_has_acomp(codec))
1883                 snd_hdac_sync_audio_rate(&codec->bus->core, pin_nid, runtime->rate);
1884 
1885         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1886         mutex_lock(&per_pin->lock);
1887         per_pin->channels = substream->runtime->channels;
1888         per_pin->setup = true;
1889 
1890         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1891         mutex_unlock(&per_pin->lock);
1892 
1893         if (spec->dyn_pin_out) {
1894                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1895                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1896                 snd_hda_codec_write(codec, pin_nid, 0,
1897                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1898                                     pinctl | PIN_OUT);
1899         }
1900 
1901         return spec->ops.setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1902 }
1903 
1904 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1905                                              struct hda_codec *codec,
1906                                              struct snd_pcm_substream *substream)
1907 {
1908         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1909         return 0;
1910 }
1911 
1912 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1913                           struct hda_codec *codec,
1914                           struct snd_pcm_substream *substream)
1915 {
1916         struct hdmi_spec *spec = codec->spec;
1917         int cvt_idx, pin_idx;
1918         struct hdmi_spec_per_cvt *per_cvt;
1919         struct hdmi_spec_per_pin *per_pin;
1920         int pinctl;
1921 
1922         if (hinfo->nid) {
1923                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1924                 if (snd_BUG_ON(cvt_idx < 0))
1925                         return -EINVAL;
1926                 per_cvt = get_cvt(spec, cvt_idx);
1927 
1928                 snd_BUG_ON(!per_cvt->assigned);
1929                 per_cvt->assigned = 0;
1930                 hinfo->nid = 0;
1931 
1932                 pin_idx = hinfo_to_pin_index(codec, hinfo);
1933                 if (snd_BUG_ON(pin_idx < 0))
1934                         return -EINVAL;
1935                 per_pin = get_pin(spec, pin_idx);
1936 
1937                 if (spec->dyn_pin_out) {
1938                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1939                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1940                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1941                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1942                                             pinctl & ~PIN_OUT);
1943                 }
1944 
1945                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1946 
1947                 mutex_lock(&per_pin->lock);
1948                 per_pin->chmap_set = false;
1949                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1950 
1951                 per_pin->setup = false;
1952                 per_pin->channels = 0;
1953                 mutex_unlock(&per_pin->lock);
1954         }
1955 
1956         return 0;
1957 }
1958 
1959 static const struct hda_pcm_ops generic_ops = {
1960         .open = hdmi_pcm_open,
1961         .close = hdmi_pcm_close,
1962         .prepare = generic_hdmi_playback_pcm_prepare,
1963         .cleanup = generic_hdmi_playback_pcm_cleanup,
1964 };
1965 
1966 /*
1967  * ALSA API channel-map control callbacks
1968  */
1969 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1970                                struct snd_ctl_elem_info *uinfo)
1971 {
1972         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1973         struct hda_codec *codec = info->private_data;
1974         struct hdmi_spec *spec = codec->spec;
1975         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1976         uinfo->count = spec->channels_max;
1977         uinfo->value.integer.min = 0;
1978         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1979         return 0;
1980 }
1981 
1982 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
1983                                                   int channels)
1984 {
1985         /* If the speaker allocation matches the channel count, it is OK.*/
1986         if (cap->channels != channels)
1987                 return -1;
1988 
1989         /* all channels are remappable freely */
1990         return SNDRV_CTL_TLVT_CHMAP_VAR;
1991 }
1992 
1993 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
1994                                         unsigned int *chmap, int channels)
1995 {
1996         int count = 0;
1997         int c;
1998 
1999         for (c = 7; c >= 0; c--) {
2000                 int spk = cap->speakers[c];
2001                 if (!spk)
2002                         continue;
2003 
2004                 chmap[count++] = spk_to_chmap(spk);
2005         }
2006 
2007         WARN_ON(count != channels);
2008 }
2009 
2010 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
2011                               unsigned int size, unsigned int __user *tlv)
2012 {
2013         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2014         struct hda_codec *codec = info->private_data;
2015         struct hdmi_spec *spec = codec->spec;
2016         unsigned int __user *dst;
2017         int chs, count = 0;
2018 
2019         if (size < 8)
2020                 return -ENOMEM;
2021         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
2022                 return -EFAULT;
2023         size -= 8;
2024         dst = tlv + 2;
2025         for (chs = 2; chs <= spec->channels_max; chs++) {
2026                 int i;
2027                 struct cea_channel_speaker_allocation *cap;
2028                 cap = channel_allocations;
2029                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
2030                         int chs_bytes = chs * 4;
2031                         int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
2032                         unsigned int tlv_chmap[8];
2033 
2034                         if (type < 0)
2035                                 continue;
2036                         if (size < 8)
2037                                 return -ENOMEM;
2038                         if (put_user(type, dst) ||
2039                             put_user(chs_bytes, dst + 1))
2040                                 return -EFAULT;
2041                         dst += 2;
2042                         size -= 8;
2043                         count += 8;
2044                         if (size < chs_bytes)
2045                                 return -ENOMEM;
2046                         size -= chs_bytes;
2047                         count += chs_bytes;
2048                         spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
2049                         if (copy_to_user(dst, tlv_chmap, chs_bytes))
2050                                 return -EFAULT;
2051                         dst += chs;
2052                 }
2053         }
2054         if (put_user(count, tlv + 1))
2055                 return -EFAULT;
2056         return 0;
2057 }
2058 
2059 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
2060                               struct snd_ctl_elem_value *ucontrol)
2061 {
2062         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2063         struct hda_codec *codec = info->private_data;
2064         struct hdmi_spec *spec = codec->spec;
2065         int pin_idx = kcontrol->private_value;
2066         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2067         int i;
2068 
2069         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
2070                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
2071         return 0;
2072 }
2073 
2074 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
2075                               struct snd_ctl_elem_value *ucontrol)
2076 {
2077         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
2078         struct hda_codec *codec = info->private_data;
2079         struct hdmi_spec *spec = codec->spec;
2080         int pin_idx = kcontrol->private_value;
2081         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2082         unsigned int ctl_idx;
2083         struct snd_pcm_substream *substream;
2084         unsigned char chmap[8];
2085         int i, err, ca, prepared = 0;
2086 
2087         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2088         substream = snd_pcm_chmap_substream(info, ctl_idx);
2089         if (!substream || !substream->runtime)
2090                 return 0; /* just for avoiding error from alsactl restore */
2091         switch (substream->runtime->status->state) {
2092         case SNDRV_PCM_STATE_OPEN:
2093         case SNDRV_PCM_STATE_SETUP:
2094                 break;
2095         case SNDRV_PCM_STATE_PREPARED:
2096                 prepared = 1;
2097                 break;
2098         default:
2099                 return -EBUSY;
2100         }
2101         memset(chmap, 0, sizeof(chmap));
2102         for (i = 0; i < ARRAY_SIZE(chmap); i++)
2103                 chmap[i] = ucontrol->value.integer.value[i];
2104         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
2105                 return 0;
2106         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
2107         if (ca < 0)
2108                 return -EINVAL;
2109         if (spec->ops.chmap_validate) {
2110                 err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
2111                 if (err)
2112                         return err;
2113         }
2114         mutex_lock(&per_pin->lock);
2115         per_pin->chmap_set = true;
2116         memcpy(per_pin->chmap, chmap, sizeof(chmap));
2117         if (prepared)
2118                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2119         mutex_unlock(&per_pin->lock);
2120 
2121         return 0;
2122 }
2123 
2124 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2125 {
2126         struct hdmi_spec *spec = codec->spec;
2127         int pin_idx;
2128 
2129         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2130                 struct hda_pcm *info;
2131                 struct hda_pcm_stream *pstr;
2132 
2133                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", pin_idx);
2134                 if (!info)
2135                         return -ENOMEM;
2136                 spec->pcm_rec[pin_idx] = info;
2137                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2138                 info->own_chmap = true;
2139 
2140                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2141                 pstr->substreams = 1;
2142                 pstr->ops = generic_ops;
2143                 /* other pstr fields are set in open */
2144         }
2145 
2146         return 0;
2147 }
2148 
2149 static void free_acomp_jack_priv(struct snd_jack *jack)
2150 {
2151         struct hdmi_spec_per_pin *per_pin = jack->private_data;
2152 
2153         per_pin->acomp_jack = NULL;
2154 }
2155 
2156 static int add_acomp_jack_kctl(struct hda_codec *codec,
2157                                struct hdmi_spec_per_pin *per_pin,
2158                                const char *name)
2159 {
2160         struct snd_jack *jack;
2161         int err;
2162 
2163         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
2164                            true, false);
2165         if (err < 0)
2166                 return err;
2167         per_pin->acomp_jack = jack;
2168         jack->private_data = per_pin;
2169         jack->private_free = free_acomp_jack_priv;
2170         return 0;
2171 }
2172 
2173 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
2174 {
2175         char hdmi_str[32] = "HDMI/DP";
2176         struct hdmi_spec *spec = codec->spec;
2177         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2178         int pcmdev = get_pcm_rec(spec, pin_idx)->device;
2179         bool phantom_jack;
2180 
2181         if (pcmdev > 0)
2182                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2183         if (codec_has_acomp(codec))
2184                 return add_acomp_jack_kctl(codec, per_pin, hdmi_str);
2185         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
2186         if (phantom_jack)
2187                 strncat(hdmi_str, " Phantom",
2188                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2189 
2190         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
2191                                      phantom_jack);
2192 }
2193 
2194 static int generic_hdmi_build_controls(struct hda_codec *codec)
2195 {
2196         struct hdmi_spec *spec = codec->spec;
2197         int err;
2198         int pin_idx;
2199 
2200         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2201                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2202 
2203                 err = generic_hdmi_build_jack(codec, pin_idx);
2204                 if (err < 0)
2205                         return err;
2206 
2207                 err = snd_hda_create_dig_out_ctls(codec,
2208                                                   per_pin->pin_nid,
2209                                                   per_pin->mux_nids[0],
2210                                                   HDA_PCM_TYPE_HDMI);
2211                 if (err < 0)
2212                         return err;
2213                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
2214 
2215                 /* add control for ELD Bytes */
2216                 err = hdmi_create_eld_ctl(codec, pin_idx,
2217                                           get_pcm_rec(spec, pin_idx)->device);
2218 
2219                 if (err < 0)
2220                         return err;
2221 
2222                 hdmi_present_sense(per_pin, 0);
2223         }
2224 
2225         /* add channel maps */
2226         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2227                 struct hda_pcm *pcm;
2228                 struct snd_pcm_chmap *chmap;
2229                 struct snd_kcontrol *kctl;
2230                 int i;
2231 
2232                 pcm = spec->pcm_rec[pin_idx];
2233                 if (!pcm || !pcm->pcm)
2234                         break;
2235                 err = snd_pcm_add_chmap_ctls(pcm->pcm,
2236                                              SNDRV_PCM_STREAM_PLAYBACK,
2237                                              NULL, 0, pin_idx, &chmap);
2238                 if (err < 0)
2239                         return err;
2240                 /* override handlers */
2241                 chmap->private_data = codec;
2242                 kctl = chmap->kctl;
2243                 for (i = 0; i < kctl->count; i++)
2244                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2245                 kctl->info = hdmi_chmap_ctl_info;
2246                 kctl->get = hdmi_chmap_ctl_get;
2247                 kctl->put = hdmi_chmap_ctl_put;
2248                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2249         }
2250 
2251         return 0;
2252 }
2253 
2254 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2255 {
2256         struct hdmi_spec *spec = codec->spec;
2257         int pin_idx;
2258 
2259         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2260                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2261 
2262                 per_pin->codec = codec;
2263                 mutex_init(&per_pin->lock);
2264                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2265                 eld_proc_new(per_pin, pin_idx);
2266         }
2267         return 0;
2268 }
2269 
2270 static int generic_hdmi_init(struct hda_codec *codec)
2271 {
2272         struct hdmi_spec *spec = codec->spec;
2273         int pin_idx;
2274 
2275         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2276                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2277                 hda_nid_t pin_nid = per_pin->pin_nid;
2278 
2279                 hdmi_init_pin(codec, pin_nid);
2280                 if (!codec_has_acomp(codec))
2281                         snd_hda_jack_detect_enable_callback(codec, pin_nid,
2282                                 codec->jackpoll_interval > 0 ?
2283                                 jack_callback : NULL);
2284         }
2285         return 0;
2286 }
2287 
2288 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2289 {
2290         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2291         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2292 }
2293 
2294 static void hdmi_array_free(struct hdmi_spec *spec)
2295 {
2296         snd_array_free(&spec->pins);
2297         snd_array_free(&spec->cvts);
2298 }
2299 
2300 static void generic_hdmi_free(struct hda_codec *codec)
2301 {
2302         struct hdmi_spec *spec = codec->spec;
2303         int pin_idx;
2304 
2305         if (codec_has_acomp(codec))
2306                 snd_hdac_i915_register_notifier(NULL);
2307 
2308         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2309                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2310 
2311                 cancel_delayed_work_sync(&per_pin->work);
2312                 eld_proc_free(per_pin);
2313                 if (per_pin->acomp_jack)
2314                         snd_device_free(codec->card, per_pin->acomp_jack);
2315         }
2316 
2317         if (spec->i915_bound)
2318                 snd_hdac_i915_exit(&codec->bus->core);
2319         hdmi_array_free(spec);
2320         kfree(spec);
2321 }
2322 
2323 #ifdef CONFIG_PM
2324 static int generic_hdmi_resume(struct hda_codec *codec)
2325 {
2326         struct hdmi_spec *spec = codec->spec;
2327         int pin_idx;
2328 
2329         codec->patch_ops.init(codec);
2330         regcache_sync(codec->core.regmap);
2331 
2332         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2333                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2334                 hdmi_present_sense(per_pin, 1);
2335         }
2336         return 0;
2337 }
2338 #endif
2339 
2340 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2341         .init                   = generic_hdmi_init,
2342         .free                   = generic_hdmi_free,
2343         .build_pcms             = generic_hdmi_build_pcms,
2344         .build_controls         = generic_hdmi_build_controls,
2345         .unsol_event            = hdmi_unsol_event,
2346 #ifdef CONFIG_PM
2347         .resume                 = generic_hdmi_resume,
2348 #endif
2349 };
2350 
2351 static const struct hdmi_ops generic_standard_hdmi_ops = {
2352         .pin_get_eld                            = snd_hdmi_get_eld,
2353         .pin_get_slot_channel                   = hdmi_pin_get_slot_channel,
2354         .pin_set_slot_channel                   = hdmi_pin_set_slot_channel,
2355         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2356         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2357         .setup_stream                           = hdmi_setup_stream,
2358         .chmap_cea_alloc_validate_get_type      = hdmi_chmap_cea_alloc_validate_get_type,
2359         .cea_alloc_to_tlv_chmap                 = hdmi_cea_alloc_to_tlv_chmap,
2360 };
2361 
2362 
2363 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2364                                              hda_nid_t nid)
2365 {
2366         struct hdmi_spec *spec = codec->spec;
2367         hda_nid_t conns[4];
2368         int nconns;
2369 
2370         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2371         if (nconns == spec->num_cvts &&
2372             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2373                 return;
2374 
2375         /* override pins connection list */
2376         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2377         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2378 }
2379 
2380 #define INTEL_VENDOR_NID 0x08
2381 #define INTEL_GET_VENDOR_VERB 0xf81
2382 #define INTEL_SET_VENDOR_VERB 0x781
2383 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2384 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2385 
2386 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2387                                           bool update_tree)
2388 {
2389         unsigned int vendor_param;
2390 
2391         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2392                                 INTEL_GET_VENDOR_VERB, 0);
2393         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2394                 return;
2395 
2396         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2397         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2398                                 INTEL_SET_VENDOR_VERB, vendor_param);
2399         if (vendor_param == -1)
2400                 return;
2401 
2402         if (update_tree)
2403                 snd_hda_codec_update_widgets(codec);
2404 }
2405 
2406 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2407 {
2408         unsigned int vendor_param;
2409 
2410         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2411                                 INTEL_GET_VENDOR_VERB, 0);
2412         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2413                 return;
2414 
2415         /* enable DP1.2 mode */
2416         vendor_param |= INTEL_EN_DP12;
2417         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2418         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2419                                 INTEL_SET_VENDOR_VERB, vendor_param);
2420 }
2421 
2422 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2423  * Otherwise you may get severe h/w communication errors.
2424  */
2425 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2426                                 unsigned int power_state)
2427 {
2428         if (power_state == AC_PWRST_D0) {
2429                 intel_haswell_enable_all_pins(codec, false);
2430                 intel_haswell_fixup_enable_dp12(codec);
2431         }
2432 
2433         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2434         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2435 }
2436 
2437 static void intel_pin_eld_notify(void *audio_ptr, int port)
2438 {
2439         struct hda_codec *codec = audio_ptr;
2440         int pin_nid = port + 0x04;
2441 
2442         /* we assume only from port-B to port-D */
2443         if (port < 1 || port > 3)
2444                 return;
2445 
2446         /* skip notification during system suspend (but not in runtime PM);
2447          * the state will be updated at resume
2448          */
2449         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2450                 return;
2451         /* ditto during suspend/resume process itself */
2452         if (atomic_read(&(codec)->core.in_pm))
2453                 return;
2454 
2455         snd_hdac_i915_set_bclk(&codec->bus->core);
2456         check_presence_and_report(codec, pin_nid);
2457 }
2458 
2459 static int patch_generic_hdmi(struct hda_codec *codec)
2460 {
2461         struct hdmi_spec *spec;
2462 
2463         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2464         if (spec == NULL)
2465                 return -ENOMEM;
2466 
2467         spec->ops = generic_standard_hdmi_ops;
2468         codec->spec = spec;
2469         hdmi_array_init(spec, 4);
2470 
2471 #ifdef CONFIG_SND_HDA_I915
2472         /* Try to bind with i915 for Intel HSW+ codecs (if not done yet) */
2473         if ((codec->core.vendor_id >> 16) == 0x8086 &&
2474             is_haswell_plus(codec)) {
2475 #if 0
2476                 /* on-demand binding leads to an unbalanced refcount when
2477                  * both i915 and hda drivers are probed concurrently;
2478                  * disabled temporarily for now
2479                  */
2480                 if (!codec->bus->core.audio_component)
2481                         if (!snd_hdac_i915_init(&codec->bus->core))
2482                                 spec->i915_bound = true;
2483 #endif
2484                 /* use i915 audio component notifier for hotplug */
2485                 if (codec->bus->core.audio_component)
2486                         spec->use_acomp_notifier = true;
2487         }
2488 #endif
2489 
2490         if (is_haswell_plus(codec)) {
2491                 intel_haswell_enable_all_pins(codec, true);
2492                 intel_haswell_fixup_enable_dp12(codec);
2493         }
2494 
2495         /* For Valleyview/Cherryview, only the display codec is in the display
2496          * power well and can use link_power ops to request/release the power.
2497          * For Haswell/Broadwell, the controller is also in the power well and
2498          * can cover the codec power request, and so need not set this flag.
2499          * For previous platforms, there is no such power well feature.
2500          */
2501         if (is_valleyview_plus(codec) || is_skylake(codec) ||
2502                         is_broxton(codec))
2503                 codec->core.link_power_control = 1;
2504 
2505         if (hdmi_parse_codec(codec) < 0) {
2506                 if (spec->i915_bound)
2507                         snd_hdac_i915_exit(&codec->bus->core);
2508                 codec->spec = NULL;
2509                 kfree(spec);
2510                 return -EINVAL;
2511         }
2512         codec->patch_ops = generic_hdmi_patch_ops;
2513         if (is_haswell_plus(codec)) {
2514                 codec->patch_ops.set_power_state = haswell_set_power_state;
2515                 codec->dp_mst = true;
2516         }
2517 
2518         /* Enable runtime pm for HDMI audio codec of HSW/BDW/SKL/BYT/BSW */
2519         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
2520                 codec->auto_runtime_pm = 1;
2521 
2522         generic_hdmi_init_per_pins(codec);
2523 
2524         init_channel_allocations();
2525 
2526         if (codec_has_acomp(codec)) {
2527                 codec->depop_delay = 0;
2528                 spec->i915_audio_ops.audio_ptr = codec;
2529                 /* intel_audio_codec_enable() or intel_audio_codec_disable()
2530                  * will call pin_eld_notify with using audio_ptr pointer
2531                  * We need make sure audio_ptr is really setup
2532                  */
2533                 wmb();
2534                 spec->i915_audio_ops.pin_eld_notify = intel_pin_eld_notify;
2535                 snd_hdac_i915_register_notifier(&spec->i915_audio_ops);
2536         }
2537 
2538         return 0;
2539 }
2540 
2541 /*
2542  * Shared non-generic implementations
2543  */
2544 
2545 static int simple_playback_build_pcms(struct hda_codec *codec)
2546 {
2547         struct hdmi_spec *spec = codec->spec;
2548         struct hda_pcm *info;
2549         unsigned int chans;
2550         struct hda_pcm_stream *pstr;
2551         struct hdmi_spec_per_cvt *per_cvt;
2552 
2553         per_cvt = get_cvt(spec, 0);
2554         chans = get_wcaps(codec, per_cvt->cvt_nid);
2555         chans = get_wcaps_channels(chans);
2556 
2557         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2558         if (!info)
2559                 return -ENOMEM;
2560         spec->pcm_rec[0] = info;
2561         info->pcm_type = HDA_PCM_TYPE_HDMI;
2562         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2563         *pstr = spec->pcm_playback;
2564         pstr->nid = per_cvt->cvt_nid;
2565         if (pstr->channels_max <= 2 && chans && chans <= 16)
2566                 pstr->channels_max = chans;
2567 
2568         return 0;
2569 }
2570 
2571 /* unsolicited event for jack sensing */
2572 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2573                                     unsigned int res)
2574 {
2575         snd_hda_jack_set_dirty_all(codec);
2576         snd_hda_jack_report_sync(codec);
2577 }
2578 
2579 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2580  * as long as spec->pins[] is set correctly
2581  */
2582 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2583 
2584 static int simple_playback_build_controls(struct hda_codec *codec)
2585 {
2586         struct hdmi_spec *spec = codec->spec;
2587         struct hdmi_spec_per_cvt *per_cvt;
2588         int err;
2589 
2590         per_cvt = get_cvt(spec, 0);
2591         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2592                                           per_cvt->cvt_nid,
2593                                           HDA_PCM_TYPE_HDMI);
2594         if (err < 0)
2595                 return err;
2596         return simple_hdmi_build_jack(codec, 0);
2597 }
2598 
2599 static int simple_playback_init(struct hda_codec *codec)
2600 {
2601         struct hdmi_spec *spec = codec->spec;
2602         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2603         hda_nid_t pin = per_pin->pin_nid;
2604 
2605         snd_hda_codec_write(codec, pin, 0,
2606                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2607         /* some codecs require to unmute the pin */
2608         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2609                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2610                                     AMP_OUT_UNMUTE);
2611         snd_hda_jack_detect_enable(codec, pin);
2612         return 0;
2613 }
2614 
2615 static void simple_playback_free(struct hda_codec *codec)
2616 {
2617         struct hdmi_spec *spec = codec->spec;
2618 
2619         hdmi_array_free(spec);
2620         kfree(spec);
2621 }
2622 
2623 /*
2624  * Nvidia specific implementations
2625  */
2626 
2627 #define Nv_VERB_SET_Channel_Allocation          0xF79
2628 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2629 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2630 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2631 
2632 #define nvhdmi_master_con_nid_7x        0x04
2633 #define nvhdmi_master_pin_nid_7x        0x05
2634 
2635 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2636         /*front, rear, clfe, rear_surr */
2637         0x6, 0x8, 0xa, 0xc,
2638 };
2639 
2640 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2641         /* set audio protect on */
2642         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2643         /* enable digital output on pin widget */
2644         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2645         {} /* terminator */
2646 };
2647 
2648 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2649         /* set audio protect on */
2650         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2651         /* enable digital output on pin widget */
2652         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2653         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2654         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2655         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2656         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2657         {} /* terminator */
2658 };
2659 
2660 #ifdef LIMITED_RATE_FMT_SUPPORT
2661 /* support only the safe format and rate */
2662 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2663 #define SUPPORTED_MAXBPS        16
2664 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2665 #else
2666 /* support all rates and formats */
2667 #define SUPPORTED_RATES \
2668         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2669         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2670          SNDRV_PCM_RATE_192000)
2671 #define SUPPORTED_MAXBPS        24
2672 #define SUPPORTED_FORMATS \
2673         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2674 #endif
2675 
2676 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2677 {
2678         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2679         return 0;
2680 }
2681 
2682 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2683 {
2684         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2685         return 0;
2686 }
2687 
2688 static unsigned int channels_2_6_8[] = {
2689         2, 6, 8
2690 };
2691 
2692 static unsigned int channels_2_8[] = {
2693         2, 8
2694 };
2695 
2696 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2697         .count = ARRAY_SIZE(channels_2_6_8),
2698         .list = channels_2_6_8,
2699         .mask = 0,
2700 };
2701 
2702 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2703         .count = ARRAY_SIZE(channels_2_8),
2704         .list = channels_2_8,
2705         .mask = 0,
2706 };
2707 
2708 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2709                                     struct hda_codec *codec,
2710                                     struct snd_pcm_substream *substream)
2711 {
2712         struct hdmi_spec *spec = codec->spec;
2713         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2714 
2715         switch (codec->preset->vendor_id) {
2716         case 0x10de0002:
2717         case 0x10de0003:
2718         case 0x10de0005:
2719         case 0x10de0006:
2720                 hw_constraints_channels = &hw_constraints_2_8_channels;
2721                 break;
2722         case 0x10de0007:
2723                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2724                 break;
2725         default:
2726                 break;
2727         }
2728 
2729         if (hw_constraints_channels != NULL) {
2730                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2731                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2732                                 hw_constraints_channels);
2733         } else {
2734                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2735                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2736         }
2737 
2738         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2739 }
2740 
2741 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2742                                      struct hda_codec *codec,
2743                                      struct snd_pcm_substream *substream)
2744 {
2745         struct hdmi_spec *spec = codec->spec;
2746         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2747 }
2748 
2749 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2750                                        struct hda_codec *codec,
2751                                        unsigned int stream_tag,
2752                                        unsigned int format,
2753                                        struct snd_pcm_substream *substream)
2754 {
2755         struct hdmi_spec *spec = codec->spec;
2756         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2757                                              stream_tag, format, substream);
2758 }
2759 
2760 static const struct hda_pcm_stream simple_pcm_playback = {
2761         .substreams = 1,
2762         .channels_min = 2,
2763         .channels_max = 2,
2764         .ops = {
2765                 .open = simple_playback_pcm_open,
2766                 .close = simple_playback_pcm_close,
2767                 .prepare = simple_playback_pcm_prepare
2768         },
2769 };
2770 
2771 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2772         .build_controls = simple_playback_build_controls,
2773         .build_pcms = simple_playback_build_pcms,
2774         .init = simple_playback_init,
2775         .free = simple_playback_free,
2776         .unsol_event = simple_hdmi_unsol_event,
2777 };
2778 
2779 static int patch_simple_hdmi(struct hda_codec *codec,
2780                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2781 {
2782         struct hdmi_spec *spec;
2783         struct hdmi_spec_per_cvt *per_cvt;
2784         struct hdmi_spec_per_pin *per_pin;
2785 
2786         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2787         if (!spec)
2788                 return -ENOMEM;
2789 
2790         codec->spec = spec;
2791         hdmi_array_init(spec, 1);
2792 
2793         spec->multiout.num_dacs = 0;  /* no analog */
2794         spec->multiout.max_channels = 2;
2795         spec->multiout.dig_out_nid = cvt_nid;
2796         spec->num_cvts = 1;
2797         spec->num_pins = 1;
2798         per_pin = snd_array_new(&spec->pins);
2799         per_cvt = snd_array_new(&spec->cvts);
2800         if (!per_pin || !per_cvt) {
2801                 simple_playback_free(codec);
2802                 return -ENOMEM;
2803         }
2804         per_cvt->cvt_nid = cvt_nid;
2805         per_pin->pin_nid = pin_nid;
2806         spec->pcm_playback = simple_pcm_playback;
2807 
2808         codec->patch_ops = simple_hdmi_patch_ops;
2809 
2810         return 0;
2811 }
2812 
2813 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2814                                                     int channels)
2815 {
2816         unsigned int chanmask;
2817         int chan = channels ? (channels - 1) : 1;
2818 
2819         switch (channels) {
2820         default:
2821         case 0:
2822         case 2:
2823                 chanmask = 0x00;
2824                 break;
2825         case 4:
2826                 chanmask = 0x08;
2827                 break;
2828         case 6:
2829                 chanmask = 0x0b;
2830                 break;
2831         case 8:
2832                 chanmask = 0x13;
2833                 break;
2834         }
2835 
2836         /* Set the audio infoframe channel allocation and checksum fields.  The
2837          * channel count is computed implicitly by the hardware. */
2838         snd_hda_codec_write(codec, 0x1, 0,
2839                         Nv_VERB_SET_Channel_Allocation, chanmask);
2840 
2841         snd_hda_codec_write(codec, 0x1, 0,
2842                         Nv_VERB_SET_Info_Frame_Checksum,
2843                         (0x71 - chan - chanmask));
2844 }
2845 
2846 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2847                                    struct hda_codec *codec,
2848                                    struct snd_pcm_substream *substream)
2849 {
2850         struct hdmi_spec *spec = codec->spec;
2851         int i;
2852 
2853         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2854                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2855         for (i = 0; i < 4; i++) {
2856                 /* set the stream id */
2857                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2858                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2859                 /* set the stream format */
2860                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2861                                 AC_VERB_SET_STREAM_FORMAT, 0);
2862         }
2863 
2864         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2865          * streams are disabled. */
2866         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2867 
2868         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2869 }
2870 
2871 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2872                                      struct hda_codec *codec,
2873                                      unsigned int stream_tag,
2874                                      unsigned int format,
2875                                      struct snd_pcm_substream *substream)
2876 {
2877         int chs;
2878         unsigned int dataDCC2, channel_id;
2879         int i;
2880         struct hdmi_spec *spec = codec->spec;
2881         struct hda_spdif_out *spdif;
2882         struct hdmi_spec_per_cvt *per_cvt;
2883 
2884         mutex_lock(&codec->spdif_mutex);
2885         per_cvt = get_cvt(spec, 0);
2886         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2887 
2888         chs = substream->runtime->channels;
2889 
2890         dataDCC2 = 0x2;
2891 
2892         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2893         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2894                 snd_hda_codec_write(codec,
2895                                 nvhdmi_master_con_nid_7x,
2896                                 0,
2897                                 AC_VERB_SET_DIGI_CONVERT_1,
2898                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2899 
2900         /* set the stream id */
2901         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2902                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2903 
2904         /* set the stream format */
2905         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2906                         AC_VERB_SET_STREAM_FORMAT, format);
2907 
2908         /* turn on again (if needed) */
2909         /* enable and set the channel status audio/data flag */
2910         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2911                 snd_hda_codec_write(codec,
2912                                 nvhdmi_master_con_nid_7x,
2913                                 0,
2914                                 AC_VERB_SET_DIGI_CONVERT_1,
2915                                 spdif->ctls & 0xff);
2916                 snd_hda_codec_write(codec,
2917                                 nvhdmi_master_con_nid_7x,
2918                                 0,
2919                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2920         }
2921 
2922         for (i = 0; i < 4; i++) {
2923                 if (chs == 2)
2924                         channel_id = 0;
2925                 else
2926                         channel_id = i * 2;
2927 
2928                 /* turn off SPDIF once;
2929                  *otherwise the IEC958 bits won't be updated
2930                  */
2931                 if (codec->spdif_status_reset &&
2932                 (spdif->ctls & AC_DIG1_ENABLE))
2933                         snd_hda_codec_write(codec,
2934                                 nvhdmi_con_nids_7x[i],
2935                                 0,
2936                                 AC_VERB_SET_DIGI_CONVERT_1,
2937                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2938                 /* set the stream id */
2939                 snd_hda_codec_write(codec,
2940                                 nvhdmi_con_nids_7x[i],
2941                                 0,
2942                                 AC_VERB_SET_CHANNEL_STREAMID,
2943                                 (stream_tag << 4) | channel_id);
2944                 /* set the stream format */
2945                 snd_hda_codec_write(codec,
2946                                 nvhdmi_con_nids_7x[i],
2947                                 0,
2948                                 AC_VERB_SET_STREAM_FORMAT,
2949                                 format);
2950                 /* turn on again (if needed) */
2951                 /* enable and set the channel status audio/data flag */
2952                 if (codec->spdif_status_reset &&
2953                 (spdif->ctls & AC_DIG1_ENABLE)) {
2954                         snd_hda_codec_write(codec,
2955                                         nvhdmi_con_nids_7x[i],
2956                                         0,
2957                                         AC_VERB_SET_DIGI_CONVERT_1,
2958                                         spdif->ctls & 0xff);
2959                         snd_hda_codec_write(codec,
2960                                         nvhdmi_con_nids_7x[i],
2961                                         0,
2962                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2963                 }
2964         }
2965 
2966         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2967 
2968         mutex_unlock(&codec->spdif_mutex);
2969         return 0;
2970 }
2971 
2972 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2973         .substreams = 1,
2974         .channels_min = 2,
2975         .channels_max = 8,
2976         .nid = nvhdmi_master_con_nid_7x,
2977         .rates = SUPPORTED_RATES,
2978         .maxbps = SUPPORTED_MAXBPS,
2979         .formats = SUPPORTED_FORMATS,
2980         .ops = {
2981                 .open = simple_playback_pcm_open,
2982                 .close = nvhdmi_8ch_7x_pcm_close,
2983                 .prepare = nvhdmi_8ch_7x_pcm_prepare
2984         },
2985 };
2986 
2987 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2988 {
2989         struct hdmi_spec *spec;
2990         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2991                                     nvhdmi_master_pin_nid_7x);
2992         if (err < 0)
2993                 return err;
2994 
2995         codec->patch_ops.init = nvhdmi_7x_init_2ch;
2996         /* override the PCM rates, etc, as the codec doesn't give full list */
2997         spec = codec->spec;
2998         spec->pcm_playback.rates = SUPPORTED_RATES;
2999         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3000         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3001         return 0;
3002 }
3003 
3004 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3005 {
3006         struct hdmi_spec *spec = codec->spec;
3007         int err = simple_playback_build_pcms(codec);
3008         if (!err) {
3009                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3010                 info->own_chmap = true;
3011         }
3012         return err;
3013 }
3014 
3015 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3016 {
3017         struct hdmi_spec *spec = codec->spec;
3018         struct hda_pcm *info;
3019         struct snd_pcm_chmap *chmap;
3020         int err;
3021 
3022         err = simple_playback_build_controls(codec);
3023         if (err < 0)
3024                 return err;
3025 
3026         /* add channel maps */
3027         info = get_pcm_rec(spec, 0);
3028         err = snd_pcm_add_chmap_ctls(info->pcm,
3029                                      SNDRV_PCM_STREAM_PLAYBACK,
3030                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3031         if (err < 0)
3032                 return err;
3033         switch (codec->preset->vendor_id) {
3034         case 0x10de0002:
3035         case 0x10de0003:
3036         case 0x10de0005:
3037         case 0x10de0006:
3038                 chmap->channel_mask = (1U << 2) | (1U << 8);
3039                 break;
3040         case 0x10de0007:
3041                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3042         }
3043         return 0;
3044 }
3045 
3046 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3047 {
3048         struct hdmi_spec *spec;
3049         int err = patch_nvhdmi_2ch(codec);
3050         if (err < 0)
3051                 return err;
3052         spec = codec->spec;
3053         spec->multiout.max_channels = 8;
3054         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3055         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3056         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3057         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3058 
3059         /* Initialize the audio infoframe channel mask and checksum to something
3060          * valid */
3061         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3062 
3063         return 0;
3064 }
3065 
3066 /*
3067  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3068  * - 0x10de0015
3069  * - 0x10de0040
3070  */
3071 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3072                                                     int channels)
3073 {
3074         if (cap->ca_index == 0x00 && channels == 2)
3075                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3076 
3077         return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
3078 }
3079 
3080 static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
3081 {
3082         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3083                 return -EINVAL;
3084 
3085         return 0;
3086 }
3087 
3088 static int patch_nvhdmi(struct hda_codec *codec)
3089 {
3090         struct hdmi_spec *spec;
3091         int err;
3092 
3093         err = patch_generic_hdmi(codec);
3094         if (err)
3095                 return err;
3096 
3097         spec = codec->spec;
3098         spec->dyn_pin_out = true;
3099 
3100         spec->ops.chmap_cea_alloc_validate_get_type =
3101                 nvhdmi_chmap_cea_alloc_validate_get_type;
3102         spec->ops.chmap_validate = nvhdmi_chmap_validate;
3103 
3104         return 0;
3105 }
3106 
3107 /*
3108  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3109  * accessed using vendor-defined verbs. These registers can be used for
3110  * interoperability between the HDA and HDMI drivers.
3111  */
3112 
3113 /* Audio Function Group node */
3114 #define NVIDIA_AFG_NID 0x01
3115 
3116 /*
3117  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3118  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3119  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3120  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3121  * additional bit (at position 30) to signal the validity of the format.
3122  *
3123  * | 31      | 30    | 29  16 | 15   0 |
3124  * +---------+-------+--------+--------+
3125  * | TRIGGER | VALID | UNUSED | FORMAT |
3126  * +-----------------------------------|
3127  *
3128  * Note that for the trigger bit to take effect it needs to change value
3129  * (i.e. it needs to be toggled).
3130  */
3131 #define NVIDIA_GET_SCRATCH0             0xfa6
3132 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3133 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3134 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3135 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3136 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3137 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3138 
3139 #define NVIDIA_GET_SCRATCH1             0xfab
3140 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3141 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3142 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3143 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3144 
3145 /*
3146  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3147  * the format is invalidated so that the HDMI codec can be disabled.
3148  */
3149 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3150 {
3151         unsigned int value;
3152 
3153         /* bits [31:30] contain the trigger and valid bits */
3154         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3155                                    NVIDIA_GET_SCRATCH0, 0);
3156         value = (value >> 24) & 0xff;
3157 
3158         /* bits [15:0] are used to store the HDA format */
3159         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3160                             NVIDIA_SET_SCRATCH0_BYTE0,
3161                             (format >> 0) & 0xff);
3162         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3163                             NVIDIA_SET_SCRATCH0_BYTE1,
3164                             (format >> 8) & 0xff);
3165 
3166         /* bits [16:24] are unused */
3167         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3168                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3169 
3170         /*
3171          * Bit 30 signals that the data is valid and hence that HDMI audio can
3172          * be enabled.
3173          */
3174         if (format == 0)
3175                 value &= ~NVIDIA_SCRATCH_VALID;
3176         else
3177                 value |= NVIDIA_SCRATCH_VALID;
3178 
3179         /*
3180          * Whenever the trigger bit is toggled, an interrupt is raised in the
3181          * HDMI codec. The HDMI driver will use that as trigger to update its
3182          * configuration.
3183          */
3184         value ^= NVIDIA_SCRATCH_TRIGGER;
3185 
3186         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3187                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3188 }
3189 
3190 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3191                                   struct hda_codec *codec,
3192                                   unsigned int stream_tag,
3193                                   unsigned int format,
3194                                   struct snd_pcm_substream *substream)
3195 {
3196         int err;
3197 
3198         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3199                                                 format, substream);
3200         if (err < 0)
3201                 return err;
3202 
3203         /* notify the HDMI codec of the format change */
3204         tegra_hdmi_set_format(codec, format);
3205 
3206         return 0;
3207 }
3208 
3209 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3210                                   struct hda_codec *codec,
3211                                   struct snd_pcm_substream *substream)
3212 {
3213         /* invalidate the format in the HDMI codec */
3214         tegra_hdmi_set_format(codec, 0);
3215 
3216         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3217 }
3218 
3219 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3220 {
3221         struct hdmi_spec *spec = codec->spec;
3222         unsigned int i;
3223 
3224         for (i = 0; i < spec->num_pins; i++) {
3225                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3226 
3227                 if (pcm->pcm_type == type)
3228                         return pcm;
3229         }
3230 
3231         return NULL;
3232 }
3233 
3234 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3235 {
3236         struct hda_pcm_stream *stream;
3237         struct hda_pcm *pcm;
3238         int err;
3239 
3240         err = generic_hdmi_build_pcms(codec);
3241         if (err < 0)
3242                 return err;
3243 
3244         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3245         if (!pcm)
3246                 return -ENODEV;
3247 
3248         /*
3249          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3250          * codec about format changes.
3251          */
3252         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3253         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3254         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3255 
3256         return 0;
3257 }
3258 
3259 static int patch_tegra_hdmi(struct hda_codec *codec)
3260 {
3261         int err;
3262 
3263         err = patch_generic_hdmi(codec);
3264         if (err)
3265                 return err;
3266 
3267         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3268 
3269         return 0;
3270 }
3271 
3272 /*
3273  * ATI/AMD-specific implementations
3274  */
3275 
3276 #define is_amdhdmi_rev3_or_later(codec) \
3277         ((codec)->core.vendor_id == 0x1002aa01 && \
3278          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3279 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3280 
3281 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3282 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3283 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3284 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3285 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3286 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3287 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3288 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3289 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3290 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3291 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3292 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3293 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3294 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3295 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3296 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3297 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3298 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3299 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3300 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3301 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3302 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3303 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3304 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3305 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3306 
3307 /* AMD specific HDA cvt verbs */
3308 #define ATI_VERB_SET_RAMP_RATE          0x770
3309 #define ATI_VERB_GET_RAMP_RATE          0xf70
3310 
3311 #define ATI_OUT_ENABLE 0x1
3312 
3313 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3314 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3315 
3316 #define ATI_HBR_CAPABLE 0x01
3317 #define ATI_HBR_ENABLE 0x10
3318 
3319 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3320                            unsigned char *buf, int *eld_size)
3321 {
3322         /* call hda_eld.c ATI/AMD-specific function */
3323         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3324                                     is_amdhdmi_rev3_or_later(codec));
3325 }
3326 
3327 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3328                                         int active_channels, int conn_type)
3329 {
3330         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3331 }
3332 
3333 static int atihdmi_paired_swap_fc_lfe(int pos)
3334 {
3335         /*
3336          * ATI/AMD have automatic FC/LFE swap built-in
3337          * when in pairwise mapping mode.
3338          */
3339 
3340         switch (pos) {
3341                 /* see channel_allocations[].speakers[] */
3342                 case 2: return 3;
3343                 case 3: return 2;
3344                 default: break;
3345         }
3346 
3347         return pos;
3348 }
3349 
3350 static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
3351 {
3352         struct cea_channel_speaker_allocation *cap;
3353         int i, j;
3354 
3355         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3356 
3357         cap = &channel_allocations[get_channel_allocation_order(ca)];
3358         for (i = 0; i < chs; ++i) {
3359                 int mask = to_spk_mask(map[i]);
3360                 bool ok = false;
3361                 bool companion_ok = false;
3362 
3363                 if (!mask)
3364                         continue;
3365 
3366                 for (j = 0 + i % 2; j < 8; j += 2) {
3367                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3368                         if (cap->speakers[chan_idx] == mask) {
3369                                 /* channel is in a supported position */
3370                                 ok = true;
3371 
3372                                 if (i % 2 == 0 && i + 1 < chs) {
3373                                         /* even channel, check the odd companion */
3374                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3375                                         int comp_mask_req = to_spk_mask(map[i+1]);
3376                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3377 
3378                                         if (comp_mask_req == comp_mask_act)
3379                                                 companion_ok = true;
3380                                         else
3381                                                 return -EINVAL;
3382                                 }
3383                                 break;
3384                         }
3385                 }
3386 
3387                 if (!ok)
3388                         return -EINVAL;
3389 
3390                 if (companion_ok)
3391                         i++; /* companion channel already checked */
3392         }
3393 
3394         return 0;
3395 }
3396 
3397 static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3398                                         int hdmi_slot, int stream_channel)
3399 {
3400         int verb;
3401         int ati_channel_setup = 0;
3402 
3403         if (hdmi_slot > 7)
3404                 return -EINVAL;
3405 
3406         if (!has_amd_full_remap_support(codec)) {
3407                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3408 
3409                 /* In case this is an odd slot but without stream channel, do not
3410                  * disable the slot since the corresponding even slot could have a
3411                  * channel. In case neither have a channel, the slot pair will be
3412                  * disabled when this function is called for the even slot. */
3413                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3414                         return 0;
3415 
3416                 hdmi_slot -= hdmi_slot % 2;
3417 
3418                 if (stream_channel != 0xf)
3419                         stream_channel -= stream_channel % 2;
3420         }
3421 
3422         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3423 
3424         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3425 
3426         if (stream_channel != 0xf)
3427                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3428 
3429         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3430 }
3431 
3432 static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3433                                         int asp_slot)
3434 {
3435         bool was_odd = false;
3436         int ati_asp_slot = asp_slot;
3437         int verb;
3438         int ati_channel_setup;
3439 
3440         if (asp_slot > 7)
3441                 return -EINVAL;
3442 
3443         if (!has_amd_full_remap_support(codec)) {
3444                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3445                 if (ati_asp_slot % 2 != 0) {
3446                         ati_asp_slot -= 1;
3447                         was_odd = true;
3448                 }
3449         }
3450 
3451         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3452 
3453         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3454 
3455         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3456                 return 0xf;
3457 
3458         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3459 }
3460 
3461 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3462                                                             int channels)
3463 {
3464         int c;
3465 
3466         /*
3467          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3468          * we need to take that into account (a single channel may take 2
3469          * channel slots if we need to carry a silent channel next to it).
3470          * On Rev3+ AMD codecs this function is not used.
3471          */
3472         int chanpairs = 0;
3473 
3474         /* We only produce even-numbered channel count TLVs */
3475         if ((channels % 2) != 0)
3476                 return -1;
3477 
3478         for (c = 0; c < 7; c += 2) {
3479                 if (cap->speakers[c] || cap->speakers[c+1])
3480                         chanpairs++;
3481         }
3482 
3483         if (chanpairs * 2 != channels)
3484                 return -1;
3485 
3486         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3487 }
3488 
3489 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3490                                                   unsigned int *chmap, int channels)
3491 {
3492         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3493         int count = 0;
3494         int c;
3495 
3496         for (c = 7; c >= 0; c--) {
3497                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3498                 int spk = cap->speakers[chan];
3499                 if (!spk) {
3500                         /* add N/A channel if the companion channel is occupied */
3501                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3502                                 chmap[count++] = SNDRV_CHMAP_NA;
3503 
3504                         continue;
3505                 }
3506 
3507                 chmap[count++] = spk_to_chmap(spk);
3508         }
3509 
3510         WARN_ON(count != channels);
3511 }
3512 
3513 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3514                                  bool hbr)
3515 {
3516         int hbr_ctl, hbr_ctl_new;
3517 
3518         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3519         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3520                 if (hbr)
3521                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3522                 else
3523                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3524 
3525                 codec_dbg(codec,
3526                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3527                                 pin_nid,
3528                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3529                                 hbr_ctl_new);
3530 
3531                 if (hbr_ctl != hbr_ctl_new)
3532                         snd_hda_codec_write(codec, pin_nid, 0,
3533                                                 ATI_VERB_SET_HBR_CONTROL,
3534                                                 hbr_ctl_new);
3535 
3536         } else if (hbr)
3537                 return -EINVAL;
3538 
3539         return 0;
3540 }
3541 
3542 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3543                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3544 {
3545 
3546         if (is_amdhdmi_rev3_or_later(codec)) {
3547                 int ramp_rate = 180; /* default as per AMD spec */
3548                 /* disable ramp-up/down for non-pcm as per AMD spec */
3549                 if (format & AC_FMT_TYPE_NON_PCM)
3550                         ramp_rate = 0;
3551 
3552                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3553         }
3554 
3555         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3556 }
3557 
3558 
3559 static int atihdmi_init(struct hda_codec *codec)
3560 {
3561         struct hdmi_spec *spec = codec->spec;
3562         int pin_idx, err;
3563 
3564         err = generic_hdmi_init(codec);
3565 
3566         if (err)
3567                 return err;
3568 
3569         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3570                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3571 
3572                 /* make sure downmix information in infoframe is zero */
3573                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3574 
3575                 /* enable channel-wise remap mode if supported */
3576                 if (has_amd_full_remap_support(codec))
3577                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3578                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3579                                             ATI_MULTICHANNEL_MODE_SINGLE);
3580         }
3581 
3582         return 0;
3583 }
3584 
3585 static int patch_atihdmi(struct hda_codec *codec)
3586 {
3587         struct hdmi_spec *spec;
3588         struct hdmi_spec_per_cvt *per_cvt;
3589         int err, cvt_idx;
3590 
3591         err = patch_generic_hdmi(codec);
3592 
3593         if (err)
3594                 return err;
3595 
3596         codec->patch_ops.init = atihdmi_init;
3597 
3598         spec = codec->spec;
3599 
3600         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3601         spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3602         spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3603         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3604         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3605         spec->ops.setup_stream = atihdmi_setup_stream;
3606 
3607         if (!has_amd_full_remap_support(codec)) {
3608                 /* override to ATI/AMD-specific versions with pairwise mapping */
3609                 spec->ops.chmap_cea_alloc_validate_get_type =
3610                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3611                 spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
3612                 spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
3613         }
3614 
3615         /* ATI/AMD converters do not advertise all of their capabilities */
3616         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3617                 per_cvt = get_cvt(spec, cvt_idx);
3618                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3619                 per_cvt->rates |= SUPPORTED_RATES;
3620                 per_cvt->formats |= SUPPORTED_FORMATS;
3621                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3622         }
3623 
3624         spec->channels_max = max(spec->channels_max, 8u);
3625 
3626         return 0;
3627 }
3628 
3629 /* VIA HDMI Implementation */
3630 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3631 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3632 
3633 static int patch_via_hdmi(struct hda_codec *codec)
3634 {
3635         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3636 }
3637 
3638 /*
3639  * patch entries
3640  */
3641 static const struct hda_device_id snd_hda_id_hdmi[] = {
3642 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
3643 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
3644 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
3645 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
3646 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
3647 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
3648 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
3649 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3650 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3651 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3652 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3653 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
3654 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
3655 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
3656 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
3657 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
3658 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
3659 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
3660 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
3661 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
3662 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
3663 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
3664 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
3665 /* 17 is known to be absent */
3666 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
3667 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
3668 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
3669 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
3670 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
3671 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
3672 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
3673 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
3674 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
3675 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
3676 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
3677 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
3678 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
3679 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
3680 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
3681 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
3682 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
3683 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
3684 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
3685 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
3686 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
3687 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
3688 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
3689 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
3690 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
3691 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
3692 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
3693 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
3694 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_generic_hdmi),
3695 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
3696 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
3697 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
3698 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_generic_hdmi),
3699 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_generic_hdmi),
3700 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_generic_hdmi),
3701 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_generic_hdmi),
3702 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_generic_hdmi),
3703 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_generic_hdmi),
3704 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_generic_hdmi),
3705 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_generic_hdmi),
3706 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
3707 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_generic_hdmi),
3708 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_generic_hdmi),
3709 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
3710 /* special ID for generic HDMI */
3711 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
3712 {} /* terminator */
3713 };
3714 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
3715 
3716 MODULE_LICENSE("GPL");
3717 MODULE_DESCRIPTION("HDMI HD-audio codec");
3718 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3719 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3720 MODULE_ALIAS("snd-hda-codec-atihdmi");
3721 
3722 static struct hda_codec_driver hdmi_driver = {
3723         .id = snd_hda_id_hdmi,
3724 };
3725 
3726 module_hda_codec_driver(hdmi_driver);
3727 

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