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Linux/sound/pci/hda/patch_hdmi.c

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  1 // SPDX-License-Identifier: GPL-2.0-or-later
  2 /*
  3  *
  4  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
  5  *
  6  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
  7  *  Copyright (c) 2006 ATI Technologies Inc.
  8  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
  9  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
 10  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
 11  *
 12  *  Authors:
 13  *                      Wu Fengguang <wfg@linux.intel.com>
 14  *
 15  *  Maintained by:
 16  *                      Wu Fengguang <wfg@linux.intel.com>
 17  */
 18 
 19 #include <linux/init.h>
 20 #include <linux/delay.h>
 21 #include <linux/slab.h>
 22 #include <linux/module.h>
 23 #include <linux/pm_runtime.h>
 24 #include <sound/core.h>
 25 #include <sound/jack.h>
 26 #include <sound/asoundef.h>
 27 #include <sound/tlv.h>
 28 #include <sound/hdaudio.h>
 29 #include <sound/hda_i915.h>
 30 #include <sound/hda_chmap.h>
 31 #include <sound/hda_codec.h>
 32 #include "hda_local.h"
 33 #include "hda_jack.h"
 34 #include "hda_controller.h"
 35 
 36 static bool static_hdmi_pcm;
 37 module_param(static_hdmi_pcm, bool, 0644);
 38 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
 39 
 40 #define is_haswell(codec)  ((codec)->core.vendor_id == 0x80862807)
 41 #define is_broadwell(codec)    ((codec)->core.vendor_id == 0x80862808)
 42 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
 43 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
 44 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
 45 #define is_geminilake(codec) (((codec)->core.vendor_id == 0x8086280d) || \
 46                                 ((codec)->core.vendor_id == 0x80862800))
 47 #define is_cannonlake(codec) ((codec)->core.vendor_id == 0x8086280c)
 48 #define is_icelake(codec) ((codec)->core.vendor_id == 0x8086280f)
 49 #define is_tigerlake(codec) ((codec)->core.vendor_id == 0x80862812)
 50 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
 51                                 || is_skylake(codec) || is_broxton(codec) \
 52                                 || is_kabylake(codec) || is_geminilake(codec) \
 53                                 || is_cannonlake(codec) || is_icelake(codec) \
 54                                 || is_tigerlake(codec))
 55 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
 56 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
 57 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
 58 
 59 struct hdmi_spec_per_cvt {
 60         hda_nid_t cvt_nid;
 61         int assigned;
 62         unsigned int channels_min;
 63         unsigned int channels_max;
 64         u32 rates;
 65         u64 formats;
 66         unsigned int maxbps;
 67 };
 68 
 69 /* max. connections to a widget */
 70 #define HDA_MAX_CONNECTIONS     32
 71 
 72 struct hdmi_spec_per_pin {
 73         hda_nid_t pin_nid;
 74         int dev_id;
 75         /* pin idx, different device entries on the same pin use the same idx */
 76         int pin_nid_idx;
 77         int num_mux_nids;
 78         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
 79         int mux_idx;
 80         hda_nid_t cvt_nid;
 81 
 82         struct hda_codec *codec;
 83         struct hdmi_eld sink_eld;
 84         struct mutex lock;
 85         struct delayed_work work;
 86         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
 87         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
 88         int repoll_count;
 89         bool setup; /* the stream has been set up by prepare callback */
 90         int channels; /* current number of channels */
 91         bool non_pcm;
 92         bool chmap_set;         /* channel-map override by ALSA API? */
 93         unsigned char chmap[8]; /* ALSA API channel-map */
 94 #ifdef CONFIG_SND_PROC_FS
 95         struct snd_info_entry *proc_entry;
 96 #endif
 97 };
 98 
 99 /* operations used by generic code that can be overridden by patches */
100 struct hdmi_ops {
101         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
102                            unsigned char *buf, int *eld_size);
103 
104         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
105                                     int ca, int active_channels, int conn_type);
106 
107         /* enable/disable HBR (HD passthrough) */
108         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
109 
110         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
111                             hda_nid_t pin_nid, u32 stream_tag, int format);
112 
113         void (*pin_cvt_fixup)(struct hda_codec *codec,
114                               struct hdmi_spec_per_pin *per_pin,
115                               hda_nid_t cvt_nid);
116 };
117 
118 struct hdmi_pcm {
119         struct hda_pcm *pcm;
120         struct snd_jack *jack;
121         struct snd_kcontrol *eld_ctl;
122 };
123 
124 struct hdmi_spec {
125         int num_cvts;
126         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
127         hda_nid_t cvt_nids[4]; /* only for haswell fix */
128 
129         /*
130          * num_pins is the number of virtual pins
131          * for example, there are 3 pins, and each pin
132          * has 4 device entries, then the num_pins is 12
133          */
134         int num_pins;
135         /*
136          * num_nids is the number of real pins
137          * In the above example, num_nids is 3
138          */
139         int num_nids;
140         /*
141          * dev_num is the number of device entries
142          * on each pin.
143          * In the above example, dev_num is 4
144          */
145         int dev_num;
146         struct snd_array pins; /* struct hdmi_spec_per_pin */
147         struct hdmi_pcm pcm_rec[16];
148         struct mutex pcm_lock;
149         /* pcm_bitmap means which pcms have been assigned to pins*/
150         unsigned long pcm_bitmap;
151         int pcm_used;   /* counter of pcm_rec[] */
152         /* bitmap shows whether the pcm is opened in user space
153          * bit 0 means the first playback PCM (PCM3);
154          * bit 1 means the second playback PCM, and so on.
155          */
156         unsigned long pcm_in_use;
157 
158         struct hdmi_eld temp_eld;
159         struct hdmi_ops ops;
160 
161         bool dyn_pin_out;
162         bool dyn_pcm_assign;
163         /*
164          * Non-generic VIA/NVIDIA specific
165          */
166         struct hda_multi_out multiout;
167         struct hda_pcm_stream pcm_playback;
168 
169         /* i915/powerwell (Haswell+/Valleyview+) specific */
170         bool use_acomp_notifier; /* use i915 eld_notify callback for hotplug */
171         struct drm_audio_component_audio_ops drm_audio_ops;
172 
173         struct hdac_chmap chmap;
174         hda_nid_t vendor_nid;
175         const int *port_map;
176         int port_num;
177 };
178 
179 #ifdef CONFIG_SND_HDA_COMPONENT
180 static inline bool codec_has_acomp(struct hda_codec *codec)
181 {
182         struct hdmi_spec *spec = codec->spec;
183         return spec->use_acomp_notifier;
184 }
185 #else
186 #define codec_has_acomp(codec)  false
187 #endif
188 
189 struct hdmi_audio_infoframe {
190         u8 type; /* 0x84 */
191         u8 ver;  /* 0x01 */
192         u8 len;  /* 0x0a */
193 
194         u8 checksum;
195 
196         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
197         u8 SS01_SF24;
198         u8 CXT04;
199         u8 CA;
200         u8 LFEPBL01_LSV36_DM_INH7;
201 };
202 
203 struct dp_audio_infoframe {
204         u8 type; /* 0x84 */
205         u8 len;  /* 0x1b */
206         u8 ver;  /* 0x11 << 2 */
207 
208         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
209         u8 SS01_SF24;
210         u8 CXT04;
211         u8 CA;
212         u8 LFEPBL01_LSV36_DM_INH7;
213 };
214 
215 union audio_infoframe {
216         struct hdmi_audio_infoframe hdmi;
217         struct dp_audio_infoframe dp;
218         u8 bytes[0];
219 };
220 
221 /*
222  * HDMI routines
223  */
224 
225 #define get_pin(spec, idx) \
226         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
227 #define get_cvt(spec, idx) \
228         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
229 /* obtain hdmi_pcm object assigned to idx */
230 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
231 /* obtain hda_pcm object assigned to idx */
232 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
233 
234 static int pin_id_to_pin_index(struct hda_codec *codec,
235                                hda_nid_t pin_nid, int dev_id)
236 {
237         struct hdmi_spec *spec = codec->spec;
238         int pin_idx;
239         struct hdmi_spec_per_pin *per_pin;
240 
241         /*
242          * (dev_id == -1) means it is NON-MST pin
243          * return the first virtual pin on this port
244          */
245         if (dev_id == -1)
246                 dev_id = 0;
247 
248         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
249                 per_pin = get_pin(spec, pin_idx);
250                 if ((per_pin->pin_nid == pin_nid) &&
251                         (per_pin->dev_id == dev_id))
252                         return pin_idx;
253         }
254 
255         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
256         return -EINVAL;
257 }
258 
259 static int hinfo_to_pcm_index(struct hda_codec *codec,
260                         struct hda_pcm_stream *hinfo)
261 {
262         struct hdmi_spec *spec = codec->spec;
263         int pcm_idx;
264 
265         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
266                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
267                         return pcm_idx;
268 
269         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
270         return -EINVAL;
271 }
272 
273 static int hinfo_to_pin_index(struct hda_codec *codec,
274                               struct hda_pcm_stream *hinfo)
275 {
276         struct hdmi_spec *spec = codec->spec;
277         struct hdmi_spec_per_pin *per_pin;
278         int pin_idx;
279 
280         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
281                 per_pin = get_pin(spec, pin_idx);
282                 if (per_pin->pcm &&
283                         per_pin->pcm->pcm->stream == hinfo)
284                         return pin_idx;
285         }
286 
287         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
288         return -EINVAL;
289 }
290 
291 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
292                                                 int pcm_idx)
293 {
294         int i;
295         struct hdmi_spec_per_pin *per_pin;
296 
297         for (i = 0; i < spec->num_pins; i++) {
298                 per_pin = get_pin(spec, i);
299                 if (per_pin->pcm_idx == pcm_idx)
300                         return per_pin;
301         }
302         return NULL;
303 }
304 
305 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
306 {
307         struct hdmi_spec *spec = codec->spec;
308         int cvt_idx;
309 
310         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
311                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
312                         return cvt_idx;
313 
314         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
315         return -EINVAL;
316 }
317 
318 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
319                         struct snd_ctl_elem_info *uinfo)
320 {
321         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
322         struct hdmi_spec *spec = codec->spec;
323         struct hdmi_spec_per_pin *per_pin;
324         struct hdmi_eld *eld;
325         int pcm_idx;
326 
327         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
328 
329         pcm_idx = kcontrol->private_value;
330         mutex_lock(&spec->pcm_lock);
331         per_pin = pcm_idx_to_pin(spec, pcm_idx);
332         if (!per_pin) {
333                 /* no pin is bound to the pcm */
334                 uinfo->count = 0;
335                 goto unlock;
336         }
337         eld = &per_pin->sink_eld;
338         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
339 
340  unlock:
341         mutex_unlock(&spec->pcm_lock);
342         return 0;
343 }
344 
345 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
346                         struct snd_ctl_elem_value *ucontrol)
347 {
348         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
349         struct hdmi_spec *spec = codec->spec;
350         struct hdmi_spec_per_pin *per_pin;
351         struct hdmi_eld *eld;
352         int pcm_idx;
353         int err = 0;
354 
355         pcm_idx = kcontrol->private_value;
356         mutex_lock(&spec->pcm_lock);
357         per_pin = pcm_idx_to_pin(spec, pcm_idx);
358         if (!per_pin) {
359                 /* no pin is bound to the pcm */
360                 memset(ucontrol->value.bytes.data, 0,
361                        ARRAY_SIZE(ucontrol->value.bytes.data));
362                 goto unlock;
363         }
364 
365         eld = &per_pin->sink_eld;
366         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
367             eld->eld_size > ELD_MAX_SIZE) {
368                 snd_BUG();
369                 err = -EINVAL;
370                 goto unlock;
371         }
372 
373         memset(ucontrol->value.bytes.data, 0,
374                ARRAY_SIZE(ucontrol->value.bytes.data));
375         if (eld->eld_valid)
376                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
377                        eld->eld_size);
378 
379  unlock:
380         mutex_unlock(&spec->pcm_lock);
381         return err;
382 }
383 
384 static const struct snd_kcontrol_new eld_bytes_ctl = {
385         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
386         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
387         .name = "ELD",
388         .info = hdmi_eld_ctl_info,
389         .get = hdmi_eld_ctl_get,
390 };
391 
392 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
393                         int device)
394 {
395         struct snd_kcontrol *kctl;
396         struct hdmi_spec *spec = codec->spec;
397         int err;
398 
399         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
400         if (!kctl)
401                 return -ENOMEM;
402         kctl->private_value = pcm_idx;
403         kctl->id.device = device;
404 
405         /* no pin nid is associated with the kctl now
406          * tbd: associate pin nid to eld ctl later
407          */
408         err = snd_hda_ctl_add(codec, 0, kctl);
409         if (err < 0)
410                 return err;
411 
412         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
413         return 0;
414 }
415 
416 #ifdef BE_PARANOID
417 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
418                                 int *packet_index, int *byte_index)
419 {
420         int val;
421 
422         val = snd_hda_codec_read(codec, pin_nid, 0,
423                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
424 
425         *packet_index = val >> 5;
426         *byte_index = val & 0x1f;
427 }
428 #endif
429 
430 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
431                                 int packet_index, int byte_index)
432 {
433         int val;
434 
435         val = (packet_index << 5) | (byte_index & 0x1f);
436 
437         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
438 }
439 
440 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
441                                 unsigned char val)
442 {
443         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
444 }
445 
446 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
447 {
448         struct hdmi_spec *spec = codec->spec;
449         int pin_out;
450 
451         /* Unmute */
452         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
453                 snd_hda_codec_write(codec, pin_nid, 0,
454                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
455 
456         if (spec->dyn_pin_out)
457                 /* Disable pin out until stream is active */
458                 pin_out = 0;
459         else
460                 /* Enable pin out: some machines with GM965 gets broken output
461                  * when the pin is disabled or changed while using with HDMI
462                  */
463                 pin_out = PIN_OUT;
464 
465         snd_hda_codec_write(codec, pin_nid, 0,
466                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
467 }
468 
469 /*
470  * ELD proc files
471  */
472 
473 #ifdef CONFIG_SND_PROC_FS
474 static void print_eld_info(struct snd_info_entry *entry,
475                            struct snd_info_buffer *buffer)
476 {
477         struct hdmi_spec_per_pin *per_pin = entry->private_data;
478 
479         mutex_lock(&per_pin->lock);
480         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
481         mutex_unlock(&per_pin->lock);
482 }
483 
484 static void write_eld_info(struct snd_info_entry *entry,
485                            struct snd_info_buffer *buffer)
486 {
487         struct hdmi_spec_per_pin *per_pin = entry->private_data;
488 
489         mutex_lock(&per_pin->lock);
490         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
491         mutex_unlock(&per_pin->lock);
492 }
493 
494 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
495 {
496         char name[32];
497         struct hda_codec *codec = per_pin->codec;
498         struct snd_info_entry *entry;
499         int err;
500 
501         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
502         err = snd_card_proc_new(codec->card, name, &entry);
503         if (err < 0)
504                 return err;
505 
506         snd_info_set_text_ops(entry, per_pin, print_eld_info);
507         entry->c.text.write = write_eld_info;
508         entry->mode |= 0200;
509         per_pin->proc_entry = entry;
510 
511         return 0;
512 }
513 
514 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
515 {
516         if (!per_pin->codec->bus->shutdown) {
517                 snd_info_free_entry(per_pin->proc_entry);
518                 per_pin->proc_entry = NULL;
519         }
520 }
521 #else
522 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
523                                int index)
524 {
525         return 0;
526 }
527 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
528 {
529 }
530 #endif
531 
532 /*
533  * Audio InfoFrame routines
534  */
535 
536 /*
537  * Enable Audio InfoFrame Transmission
538  */
539 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
540                                        hda_nid_t pin_nid)
541 {
542         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
543         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
544                                                 AC_DIPXMIT_BEST);
545 }
546 
547 /*
548  * Disable Audio InfoFrame Transmission
549  */
550 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
551                                       hda_nid_t pin_nid)
552 {
553         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
554         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
555                                                 AC_DIPXMIT_DISABLE);
556 }
557 
558 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
559 {
560 #ifdef CONFIG_SND_DEBUG_VERBOSE
561         int i;
562         int size;
563 
564         size = snd_hdmi_get_eld_size(codec, pin_nid);
565         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
566 
567         for (i = 0; i < 8; i++) {
568                 size = snd_hda_codec_read(codec, pin_nid, 0,
569                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
570                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
571         }
572 #endif
573 }
574 
575 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
576 {
577 #ifdef BE_PARANOID
578         int i, j;
579         int size;
580         int pi, bi;
581         for (i = 0; i < 8; i++) {
582                 size = snd_hda_codec_read(codec, pin_nid, 0,
583                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
584                 if (size == 0)
585                         continue;
586 
587                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
588                 for (j = 1; j < 1000; j++) {
589                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
590                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
591                         if (pi != i)
592                                 codec_dbg(codec, "dip index %d: %d != %d\n",
593                                                 bi, pi, i);
594                         if (bi == 0) /* byte index wrapped around */
595                                 break;
596                 }
597                 codec_dbg(codec,
598                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
599                         i, size, j);
600         }
601 #endif
602 }
603 
604 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
605 {
606         u8 *bytes = (u8 *)hdmi_ai;
607         u8 sum = 0;
608         int i;
609 
610         hdmi_ai->checksum = 0;
611 
612         for (i = 0; i < sizeof(*hdmi_ai); i++)
613                 sum += bytes[i];
614 
615         hdmi_ai->checksum = -sum;
616 }
617 
618 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
619                                       hda_nid_t pin_nid,
620                                       u8 *dip, int size)
621 {
622         int i;
623 
624         hdmi_debug_dip_size(codec, pin_nid);
625         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
626 
627         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
628         for (i = 0; i < size; i++)
629                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
630 }
631 
632 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
633                                     u8 *dip, int size)
634 {
635         u8 val;
636         int i;
637 
638         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
639                                                             != AC_DIPXMIT_BEST)
640                 return false;
641 
642         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
643         for (i = 0; i < size; i++) {
644                 val = snd_hda_codec_read(codec, pin_nid, 0,
645                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
646                 if (val != dip[i])
647                         return false;
648         }
649 
650         return true;
651 }
652 
653 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
654                                      hda_nid_t pin_nid,
655                                      int ca, int active_channels,
656                                      int conn_type)
657 {
658         union audio_infoframe ai;
659 
660         memset(&ai, 0, sizeof(ai));
661         if (conn_type == 0) { /* HDMI */
662                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
663 
664                 hdmi_ai->type           = 0x84;
665                 hdmi_ai->ver            = 0x01;
666                 hdmi_ai->len            = 0x0a;
667                 hdmi_ai->CC02_CT47      = active_channels - 1;
668                 hdmi_ai->CA             = ca;
669                 hdmi_checksum_audio_infoframe(hdmi_ai);
670         } else if (conn_type == 1) { /* DisplayPort */
671                 struct dp_audio_infoframe *dp_ai = &ai.dp;
672 
673                 dp_ai->type             = 0x84;
674                 dp_ai->len              = 0x1b;
675                 dp_ai->ver              = 0x11 << 2;
676                 dp_ai->CC02_CT47        = active_channels - 1;
677                 dp_ai->CA               = ca;
678         } else {
679                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
680                             pin_nid);
681                 return;
682         }
683 
684         /*
685          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
686          * sizeof(*dp_ai) to avoid partial match/update problems when
687          * the user switches between HDMI/DP monitors.
688          */
689         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
690                                         sizeof(ai))) {
691                 codec_dbg(codec,
692                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
693                             pin_nid,
694                             active_channels, ca);
695                 hdmi_stop_infoframe_trans(codec, pin_nid);
696                 hdmi_fill_audio_infoframe(codec, pin_nid,
697                                             ai.bytes, sizeof(ai));
698                 hdmi_start_infoframe_trans(codec, pin_nid);
699         }
700 }
701 
702 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
703                                        struct hdmi_spec_per_pin *per_pin,
704                                        bool non_pcm)
705 {
706         struct hdmi_spec *spec = codec->spec;
707         struct hdac_chmap *chmap = &spec->chmap;
708         hda_nid_t pin_nid = per_pin->pin_nid;
709         int channels = per_pin->channels;
710         int active_channels;
711         struct hdmi_eld *eld;
712         int ca;
713 
714         if (!channels)
715                 return;
716 
717         /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
718         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
719                 snd_hda_codec_write(codec, pin_nid, 0,
720                                             AC_VERB_SET_AMP_GAIN_MUTE,
721                                             AMP_OUT_UNMUTE);
722 
723         eld = &per_pin->sink_eld;
724 
725         ca = snd_hdac_channel_allocation(&codec->core,
726                         eld->info.spk_alloc, channels,
727                         per_pin->chmap_set, non_pcm, per_pin->chmap);
728 
729         active_channels = snd_hdac_get_active_channels(ca);
730 
731         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
732                                                 active_channels);
733 
734         /*
735          * always configure channel mapping, it may have been changed by the
736          * user in the meantime
737          */
738         snd_hdac_setup_channel_mapping(&spec->chmap,
739                                 pin_nid, non_pcm, ca, channels,
740                                 per_pin->chmap, per_pin->chmap_set);
741 
742         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
743                                       eld->info.conn_type);
744 
745         per_pin->non_pcm = non_pcm;
746 }
747 
748 /*
749  * Unsolicited events
750  */
751 
752 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
753 
754 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
755                                       int dev_id)
756 {
757         struct hdmi_spec *spec = codec->spec;
758         int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
759 
760         if (pin_idx < 0)
761                 return;
762         mutex_lock(&spec->pcm_lock);
763         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
764                 snd_hda_jack_report_sync(codec);
765         mutex_unlock(&spec->pcm_lock);
766 }
767 
768 static void jack_callback(struct hda_codec *codec,
769                           struct hda_jack_callback *jack)
770 {
771         /* hda_jack don't support DP MST */
772         check_presence_and_report(codec, jack->nid, 0);
773 }
774 
775 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
776 {
777         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
778         struct hda_jack_tbl *jack;
779         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
780 
781         /*
782          * assume DP MST uses dyn_pcm_assign and acomp and
783          * never comes here
784          * if DP MST supports unsol event, below code need
785          * consider dev_entry
786          */
787         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
788         if (!jack)
789                 return;
790         jack->jack_dirty = 1;
791 
792         codec_dbg(codec,
793                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
794                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
795                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
796 
797         /* hda_jack don't support DP MST */
798         check_presence_and_report(codec, jack->nid, 0);
799 }
800 
801 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
802 {
803         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
804         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
805         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
806         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
807 
808         codec_info(codec,
809                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
810                 codec->addr,
811                 tag,
812                 subtag,
813                 cp_state,
814                 cp_ready);
815 
816         /* TODO */
817         if (cp_state)
818                 ;
819         if (cp_ready)
820                 ;
821 }
822 
823 
824 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
825 {
826         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
827         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
828 
829         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
830                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
831                 return;
832         }
833 
834         if (subtag == 0)
835                 hdmi_intrinsic_event(codec, res);
836         else
837                 hdmi_non_intrinsic_event(codec, res);
838 }
839 
840 static void haswell_verify_D0(struct hda_codec *codec,
841                 hda_nid_t cvt_nid, hda_nid_t nid)
842 {
843         int pwr;
844 
845         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
846          * thus pins could only choose converter 0 for use. Make sure the
847          * converters are in correct power state */
848         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
849                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
850 
851         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
852                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
853                                     AC_PWRST_D0);
854                 msleep(40);
855                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
856                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
857                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
858         }
859 }
860 
861 /*
862  * Callbacks
863  */
864 
865 /* HBR should be Non-PCM, 8 channels */
866 #define is_hbr_format(format) \
867         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
868 
869 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
870                               bool hbr)
871 {
872         int pinctl, new_pinctl;
873 
874         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
875                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
876                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
877 
878                 if (pinctl < 0)
879                         return hbr ? -EINVAL : 0;
880 
881                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
882                 if (hbr)
883                         new_pinctl |= AC_PINCTL_EPT_HBR;
884                 else
885                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
886 
887                 codec_dbg(codec,
888                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
889                             pin_nid,
890                             pinctl == new_pinctl ? "" : "new-",
891                             new_pinctl);
892 
893                 if (pinctl != new_pinctl)
894                         snd_hda_codec_write(codec, pin_nid, 0,
895                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
896                                             new_pinctl);
897         } else if (hbr)
898                 return -EINVAL;
899 
900         return 0;
901 }
902 
903 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
904                               hda_nid_t pin_nid, u32 stream_tag, int format)
905 {
906         struct hdmi_spec *spec = codec->spec;
907         unsigned int param;
908         int err;
909 
910         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
911 
912         if (err) {
913                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
914                 return err;
915         }
916 
917         if (is_haswell_plus(codec)) {
918 
919                 /*
920                  * on recent platforms IEC Coding Type is required for HBR
921                  * support, read current Digital Converter settings and set
922                  * ICT bitfield if needed.
923                  */
924                 param = snd_hda_codec_read(codec, cvt_nid, 0,
925                                            AC_VERB_GET_DIGI_CONVERT_1, 0);
926 
927                 param = (param >> 16) & ~(AC_DIG3_ICT);
928 
929                 /* on recent platforms ICT mode is required for HBR support */
930                 if (is_hbr_format(format))
931                         param |= 0x1;
932 
933                 snd_hda_codec_write(codec, cvt_nid, 0,
934                                     AC_VERB_SET_DIGI_CONVERT_3, param);
935         }
936 
937         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
938         return 0;
939 }
940 
941 /* Try to find an available converter
942  * If pin_idx is less then zero, just try to find an available converter.
943  * Otherwise, try to find an available converter and get the cvt mux index
944  * of the pin.
945  */
946 static int hdmi_choose_cvt(struct hda_codec *codec,
947                            int pin_idx, int *cvt_id)
948 {
949         struct hdmi_spec *spec = codec->spec;
950         struct hdmi_spec_per_pin *per_pin;
951         struct hdmi_spec_per_cvt *per_cvt = NULL;
952         int cvt_idx, mux_idx = 0;
953 
954         /* pin_idx < 0 means no pin will be bound to the converter */
955         if (pin_idx < 0)
956                 per_pin = NULL;
957         else
958                 per_pin = get_pin(spec, pin_idx);
959 
960         /* Dynamically assign converter to stream */
961         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
962                 per_cvt = get_cvt(spec, cvt_idx);
963 
964                 /* Must not already be assigned */
965                 if (per_cvt->assigned)
966                         continue;
967                 if (per_pin == NULL)
968                         break;
969                 /* Must be in pin's mux's list of converters */
970                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
971                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
972                                 break;
973                 /* Not in mux list */
974                 if (mux_idx == per_pin->num_mux_nids)
975                         continue;
976                 break;
977         }
978 
979         /* No free converters */
980         if (cvt_idx == spec->num_cvts)
981                 return -EBUSY;
982 
983         if (per_pin != NULL)
984                 per_pin->mux_idx = mux_idx;
985 
986         if (cvt_id)
987                 *cvt_id = cvt_idx;
988 
989         return 0;
990 }
991 
992 /* Assure the pin select the right convetor */
993 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
994                         struct hdmi_spec_per_pin *per_pin)
995 {
996         hda_nid_t pin_nid = per_pin->pin_nid;
997         int mux_idx, curr;
998 
999         mux_idx = per_pin->mux_idx;
1000         curr = snd_hda_codec_read(codec, pin_nid, 0,
1001                                           AC_VERB_GET_CONNECT_SEL, 0);
1002         if (curr != mux_idx)
1003                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1004                                             AC_VERB_SET_CONNECT_SEL,
1005                                             mux_idx);
1006 }
1007 
1008 /* get the mux index for the converter of the pins
1009  * converter's mux index is the same for all pins on Intel platform
1010  */
1011 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1012                         hda_nid_t cvt_nid)
1013 {
1014         int i;
1015 
1016         for (i = 0; i < spec->num_cvts; i++)
1017                 if (spec->cvt_nids[i] == cvt_nid)
1018                         return i;
1019         return -EINVAL;
1020 }
1021 
1022 /* Intel HDMI workaround to fix audio routing issue:
1023  * For some Intel display codecs, pins share the same connection list.
1024  * So a conveter can be selected by multiple pins and playback on any of these
1025  * pins will generate sound on the external display, because audio flows from
1026  * the same converter to the display pipeline. Also muting one pin may make
1027  * other pins have no sound output.
1028  * So this function assures that an assigned converter for a pin is not selected
1029  * by any other pins.
1030  */
1031 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1032                                          hda_nid_t pin_nid,
1033                                          int dev_id, int mux_idx)
1034 {
1035         struct hdmi_spec *spec = codec->spec;
1036         hda_nid_t nid;
1037         int cvt_idx, curr;
1038         struct hdmi_spec_per_cvt *per_cvt;
1039         struct hdmi_spec_per_pin *per_pin;
1040         int pin_idx;
1041 
1042         /* configure the pins connections */
1043         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1044                 int dev_id_saved;
1045                 int dev_num;
1046 
1047                 per_pin = get_pin(spec, pin_idx);
1048                 /*
1049                  * pin not connected to monitor
1050                  * no need to operate on it
1051                  */
1052                 if (!per_pin->pcm)
1053                         continue;
1054 
1055                 if ((per_pin->pin_nid == pin_nid) &&
1056                         (per_pin->dev_id == dev_id))
1057                         continue;
1058 
1059                 /*
1060                  * if per_pin->dev_id >= dev_num,
1061                  * snd_hda_get_dev_select() will fail,
1062                  * and the following operation is unpredictable.
1063                  * So skip this situation.
1064                  */
1065                 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1066                 if (per_pin->dev_id >= dev_num)
1067                         continue;
1068 
1069                 nid = per_pin->pin_nid;
1070 
1071                 /*
1072                  * Calling this function should not impact
1073                  * on the device entry selection
1074                  * So let's save the dev id for each pin,
1075                  * and restore it when return
1076                  */
1077                 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1078                 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1079                 curr = snd_hda_codec_read(codec, nid, 0,
1080                                           AC_VERB_GET_CONNECT_SEL, 0);
1081                 if (curr != mux_idx) {
1082                         snd_hda_set_dev_select(codec, nid, dev_id_saved);
1083                         continue;
1084                 }
1085 
1086 
1087                 /* choose an unassigned converter. The conveters in the
1088                  * connection list are in the same order as in the codec.
1089                  */
1090                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1091                         per_cvt = get_cvt(spec, cvt_idx);
1092                         if (!per_cvt->assigned) {
1093                                 codec_dbg(codec,
1094                                           "choose cvt %d for pin nid %d\n",
1095                                         cvt_idx, nid);
1096                                 snd_hda_codec_write_cache(codec, nid, 0,
1097                                             AC_VERB_SET_CONNECT_SEL,
1098                                             cvt_idx);
1099                                 break;
1100                         }
1101                 }
1102                 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1103         }
1104 }
1105 
1106 /* A wrapper of intel_not_share_asigned_cvt() */
1107 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1108                         hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1109 {
1110         int mux_idx;
1111         struct hdmi_spec *spec = codec->spec;
1112 
1113         /* On Intel platform, the mapping of converter nid to
1114          * mux index of the pins are always the same.
1115          * The pin nid may be 0, this means all pins will not
1116          * share the converter.
1117          */
1118         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1119         if (mux_idx >= 0)
1120                 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1121 }
1122 
1123 /* skeleton caller of pin_cvt_fixup ops */
1124 static void pin_cvt_fixup(struct hda_codec *codec,
1125                           struct hdmi_spec_per_pin *per_pin,
1126                           hda_nid_t cvt_nid)
1127 {
1128         struct hdmi_spec *spec = codec->spec;
1129 
1130         if (spec->ops.pin_cvt_fixup)
1131                 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1132 }
1133 
1134 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1135  * in dyn_pcm_assign mode.
1136  */
1137 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1138                          struct hda_codec *codec,
1139                          struct snd_pcm_substream *substream)
1140 {
1141         struct hdmi_spec *spec = codec->spec;
1142         struct snd_pcm_runtime *runtime = substream->runtime;
1143         int cvt_idx, pcm_idx;
1144         struct hdmi_spec_per_cvt *per_cvt = NULL;
1145         int err;
1146 
1147         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1148         if (pcm_idx < 0)
1149                 return -EINVAL;
1150 
1151         err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1152         if (err)
1153                 return err;
1154 
1155         per_cvt = get_cvt(spec, cvt_idx);
1156         per_cvt->assigned = 1;
1157         hinfo->nid = per_cvt->cvt_nid;
1158 
1159         pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1160 
1161         set_bit(pcm_idx, &spec->pcm_in_use);
1162         /* todo: setup spdif ctls assign */
1163 
1164         /* Initially set the converter's capabilities */
1165         hinfo->channels_min = per_cvt->channels_min;
1166         hinfo->channels_max = per_cvt->channels_max;
1167         hinfo->rates = per_cvt->rates;
1168         hinfo->formats = per_cvt->formats;
1169         hinfo->maxbps = per_cvt->maxbps;
1170 
1171         /* Store the updated parameters */
1172         runtime->hw.channels_min = hinfo->channels_min;
1173         runtime->hw.channels_max = hinfo->channels_max;
1174         runtime->hw.formats = hinfo->formats;
1175         runtime->hw.rates = hinfo->rates;
1176 
1177         snd_pcm_hw_constraint_step(substream->runtime, 0,
1178                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1179         return 0;
1180 }
1181 
1182 /*
1183  * HDA PCM callbacks
1184  */
1185 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1186                          struct hda_codec *codec,
1187                          struct snd_pcm_substream *substream)
1188 {
1189         struct hdmi_spec *spec = codec->spec;
1190         struct snd_pcm_runtime *runtime = substream->runtime;
1191         int pin_idx, cvt_idx, pcm_idx;
1192         struct hdmi_spec_per_pin *per_pin;
1193         struct hdmi_eld *eld;
1194         struct hdmi_spec_per_cvt *per_cvt = NULL;
1195         int err;
1196 
1197         /* Validate hinfo */
1198         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1199         if (pcm_idx < 0)
1200                 return -EINVAL;
1201 
1202         mutex_lock(&spec->pcm_lock);
1203         pin_idx = hinfo_to_pin_index(codec, hinfo);
1204         if (!spec->dyn_pcm_assign) {
1205                 if (snd_BUG_ON(pin_idx < 0)) {
1206                         err = -EINVAL;
1207                         goto unlock;
1208                 }
1209         } else {
1210                 /* no pin is assigned to the PCM
1211                  * PA need pcm open successfully when probe
1212                  */
1213                 if (pin_idx < 0) {
1214                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1215                         goto unlock;
1216                 }
1217         }
1218 
1219         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1220         if (err < 0)
1221                 goto unlock;
1222 
1223         per_cvt = get_cvt(spec, cvt_idx);
1224         /* Claim converter */
1225         per_cvt->assigned = 1;
1226 
1227         set_bit(pcm_idx, &spec->pcm_in_use);
1228         per_pin = get_pin(spec, pin_idx);
1229         per_pin->cvt_nid = per_cvt->cvt_nid;
1230         hinfo->nid = per_cvt->cvt_nid;
1231 
1232         /* flip stripe flag for the assigned stream if supported */
1233         if (get_wcaps(codec, per_cvt->cvt_nid) & AC_WCAP_STRIPE)
1234                 azx_stream(get_azx_dev(substream))->stripe = 1;
1235 
1236         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1237         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1238                             AC_VERB_SET_CONNECT_SEL,
1239                             per_pin->mux_idx);
1240 
1241         /* configure unused pins to choose other converters */
1242         pin_cvt_fixup(codec, per_pin, 0);
1243 
1244         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1245 
1246         /* Initially set the converter's capabilities */
1247         hinfo->channels_min = per_cvt->channels_min;
1248         hinfo->channels_max = per_cvt->channels_max;
1249         hinfo->rates = per_cvt->rates;
1250         hinfo->formats = per_cvt->formats;
1251         hinfo->maxbps = per_cvt->maxbps;
1252 
1253         eld = &per_pin->sink_eld;
1254         /* Restrict capabilities by ELD if this isn't disabled */
1255         if (!static_hdmi_pcm && eld->eld_valid) {
1256                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1257                 if (hinfo->channels_min > hinfo->channels_max ||
1258                     !hinfo->rates || !hinfo->formats) {
1259                         per_cvt->assigned = 0;
1260                         hinfo->nid = 0;
1261                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1262                         err = -ENODEV;
1263                         goto unlock;
1264                 }
1265         }
1266 
1267         /* Store the updated parameters */
1268         runtime->hw.channels_min = hinfo->channels_min;
1269         runtime->hw.channels_max = hinfo->channels_max;
1270         runtime->hw.formats = hinfo->formats;
1271         runtime->hw.rates = hinfo->rates;
1272 
1273         snd_pcm_hw_constraint_step(substream->runtime, 0,
1274                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1275  unlock:
1276         mutex_unlock(&spec->pcm_lock);
1277         return err;
1278 }
1279 
1280 /*
1281  * HDA/HDMI auto parsing
1282  */
1283 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1284 {
1285         struct hdmi_spec *spec = codec->spec;
1286         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1287         hda_nid_t pin_nid = per_pin->pin_nid;
1288 
1289         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1290                 codec_warn(codec,
1291                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1292                            pin_nid, get_wcaps(codec, pin_nid));
1293                 return -EINVAL;
1294         }
1295 
1296         /* all the device entries on the same pin have the same conn list */
1297         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1298                                                         per_pin->mux_nids,
1299                                                         HDA_MAX_CONNECTIONS);
1300 
1301         return 0;
1302 }
1303 
1304 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1305                                 struct hdmi_spec_per_pin *per_pin)
1306 {
1307         int i;
1308 
1309         /* try the prefer PCM */
1310         if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1311                 return per_pin->pin_nid_idx;
1312 
1313         /* have a second try; check the "reserved area" over num_pins */
1314         for (i = spec->num_nids; i < spec->pcm_used; i++) {
1315                 if (!test_bit(i, &spec->pcm_bitmap))
1316                         return i;
1317         }
1318 
1319         /* the last try; check the empty slots in pins */
1320         for (i = 0; i < spec->num_nids; i++) {
1321                 if (!test_bit(i, &spec->pcm_bitmap))
1322                         return i;
1323         }
1324         return -EBUSY;
1325 }
1326 
1327 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1328                                 struct hdmi_spec_per_pin *per_pin)
1329 {
1330         int idx;
1331 
1332         /* pcm already be attached to the pin */
1333         if (per_pin->pcm)
1334                 return;
1335         idx = hdmi_find_pcm_slot(spec, per_pin);
1336         if (idx == -EBUSY)
1337                 return;
1338         per_pin->pcm_idx = idx;
1339         per_pin->pcm = get_hdmi_pcm(spec, idx);
1340         set_bit(idx, &spec->pcm_bitmap);
1341 }
1342 
1343 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1344                                 struct hdmi_spec_per_pin *per_pin)
1345 {
1346         int idx;
1347 
1348         /* pcm already be detached from the pin */
1349         if (!per_pin->pcm)
1350                 return;
1351         idx = per_pin->pcm_idx;
1352         per_pin->pcm_idx = -1;
1353         per_pin->pcm = NULL;
1354         if (idx >= 0 && idx < spec->pcm_used)
1355                 clear_bit(idx, &spec->pcm_bitmap);
1356 }
1357 
1358 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1359                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1360 {
1361         int mux_idx;
1362 
1363         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1364                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1365                         break;
1366         return mux_idx;
1367 }
1368 
1369 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1370 
1371 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1372                            struct hdmi_spec_per_pin *per_pin)
1373 {
1374         struct hda_codec *codec = per_pin->codec;
1375         struct hda_pcm *pcm;
1376         struct hda_pcm_stream *hinfo;
1377         struct snd_pcm_substream *substream;
1378         int mux_idx;
1379         bool non_pcm;
1380 
1381         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1382                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1383         else
1384                 return;
1385         if (!pcm->pcm)
1386                 return;
1387         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1388                 return;
1389 
1390         /* hdmi audio only uses playback and one substream */
1391         hinfo = pcm->stream;
1392         substream = pcm->pcm->streams[0].substream;
1393 
1394         per_pin->cvt_nid = hinfo->nid;
1395 
1396         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1397         if (mux_idx < per_pin->num_mux_nids) {
1398                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1399                                    per_pin->dev_id);
1400                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1401                                 AC_VERB_SET_CONNECT_SEL,
1402                                 mux_idx);
1403         }
1404         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1405 
1406         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1407         if (substream->runtime)
1408                 per_pin->channels = substream->runtime->channels;
1409         per_pin->setup = true;
1410         per_pin->mux_idx = mux_idx;
1411 
1412         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1413 }
1414 
1415 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1416                            struct hdmi_spec_per_pin *per_pin)
1417 {
1418         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1419                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1420 
1421         per_pin->chmap_set = false;
1422         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1423 
1424         per_pin->setup = false;
1425         per_pin->channels = 0;
1426 }
1427 
1428 /* update per_pin ELD from the given new ELD;
1429  * setup info frame and notification accordingly
1430  */
1431 static bool update_eld(struct hda_codec *codec,
1432                        struct hdmi_spec_per_pin *per_pin,
1433                        struct hdmi_eld *eld)
1434 {
1435         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1436         struct hdmi_spec *spec = codec->spec;
1437         bool old_eld_valid = pin_eld->eld_valid;
1438         bool eld_changed;
1439         int pcm_idx = -1;
1440 
1441         /* for monitor disconnection, save pcm_idx firstly */
1442         pcm_idx = per_pin->pcm_idx;
1443         if (spec->dyn_pcm_assign) {
1444                 if (eld->eld_valid) {
1445                         hdmi_attach_hda_pcm(spec, per_pin);
1446                         hdmi_pcm_setup_pin(spec, per_pin);
1447                 } else {
1448                         hdmi_pcm_reset_pin(spec, per_pin);
1449                         hdmi_detach_hda_pcm(spec, per_pin);
1450                 }
1451         }
1452         /* if pcm_idx == -1, it means this is in monitor connection event
1453          * we can get the correct pcm_idx now.
1454          */
1455         if (pcm_idx == -1)
1456                 pcm_idx = per_pin->pcm_idx;
1457 
1458         if (eld->eld_valid)
1459                 snd_hdmi_show_eld(codec, &eld->info);
1460 
1461         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1462         eld_changed |= (pin_eld->monitor_present != eld->monitor_present);
1463         if (!eld_changed && eld->eld_valid && pin_eld->eld_valid)
1464                 if (pin_eld->eld_size != eld->eld_size ||
1465                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1466                            eld->eld_size) != 0)
1467                         eld_changed = true;
1468 
1469         if (eld_changed) {
1470                 pin_eld->monitor_present = eld->monitor_present;
1471                 pin_eld->eld_valid = eld->eld_valid;
1472                 pin_eld->eld_size = eld->eld_size;
1473                 if (eld->eld_valid)
1474                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1475                                eld->eld_size);
1476                 pin_eld->info = eld->info;
1477         }
1478 
1479         /*
1480          * Re-setup pin and infoframe. This is needed e.g. when
1481          * - sink is first plugged-in
1482          * - transcoder can change during stream playback on Haswell
1483          *   and this can make HW reset converter selection on a pin.
1484          */
1485         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1486                 pin_cvt_fixup(codec, per_pin, 0);
1487                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1488         }
1489 
1490         if (eld_changed && pcm_idx >= 0)
1491                 snd_ctl_notify(codec->card,
1492                                SNDRV_CTL_EVENT_MASK_VALUE |
1493                                SNDRV_CTL_EVENT_MASK_INFO,
1494                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1495         return eld_changed;
1496 }
1497 
1498 /* update ELD and jack state via HD-audio verbs */
1499 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1500                                          int repoll)
1501 {
1502         struct hda_jack_tbl *jack;
1503         struct hda_codec *codec = per_pin->codec;
1504         struct hdmi_spec *spec = codec->spec;
1505         struct hdmi_eld *eld = &spec->temp_eld;
1506         hda_nid_t pin_nid = per_pin->pin_nid;
1507         /*
1508          * Always execute a GetPinSense verb here, even when called from
1509          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1510          * response's PD bit is not the real PD value, but indicates that
1511          * the real PD value changed. An older version of the HD-audio
1512          * specification worked this way. Hence, we just ignore the data in
1513          * the unsolicited response to avoid custom WARs.
1514          */
1515         int present;
1516         bool ret;
1517         bool do_repoll = false;
1518 
1519         present = snd_hda_pin_sense(codec, pin_nid);
1520 
1521         mutex_lock(&per_pin->lock);
1522         eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1523         if (eld->monitor_present)
1524                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1525         else
1526                 eld->eld_valid = false;
1527 
1528         codec_dbg(codec,
1529                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1530                 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1531 
1532         if (eld->eld_valid) {
1533                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1534                                                      &eld->eld_size) < 0)
1535                         eld->eld_valid = false;
1536                 else {
1537                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1538                                                     eld->eld_size) < 0)
1539                                 eld->eld_valid = false;
1540                 }
1541                 if (!eld->eld_valid && repoll)
1542                         do_repoll = true;
1543         }
1544 
1545         if (do_repoll)
1546                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1547         else
1548                 update_eld(codec, per_pin, eld);
1549 
1550         ret = !repoll || !eld->monitor_present || eld->eld_valid;
1551 
1552         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1553         if (jack) {
1554                 jack->block_report = !ret;
1555                 jack->pin_sense = (eld->monitor_present && eld->eld_valid) ?
1556                         AC_PINSENSE_PRESENCE : 0;
1557         }
1558         mutex_unlock(&per_pin->lock);
1559         return ret;
1560 }
1561 
1562 static struct snd_jack *pin_idx_to_jack(struct hda_codec *codec,
1563                                  struct hdmi_spec_per_pin *per_pin)
1564 {
1565         struct hdmi_spec *spec = codec->spec;
1566         struct snd_jack *jack = NULL;
1567         struct hda_jack_tbl *jack_tbl;
1568 
1569         /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1570          * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1571          * NULL even after snd_hda_jack_tbl_clear() is called to
1572          * free snd_jack. This may cause access invalid memory
1573          * when calling snd_jack_report
1574          */
1575         if (per_pin->pcm_idx >= 0 && spec->dyn_pcm_assign)
1576                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1577         else if (!spec->dyn_pcm_assign) {
1578                 /*
1579                  * jack tbl doesn't support DP MST
1580                  * DP MST will use dyn_pcm_assign,
1581                  * so DP MST will never come here
1582                  */
1583                 jack_tbl = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1584                 if (jack_tbl)
1585                         jack = jack_tbl->jack;
1586         }
1587         return jack;
1588 }
1589 
1590 /* update ELD and jack state via audio component */
1591 static void sync_eld_via_acomp(struct hda_codec *codec,
1592                                struct hdmi_spec_per_pin *per_pin)
1593 {
1594         struct hdmi_spec *spec = codec->spec;
1595         struct hdmi_eld *eld = &spec->temp_eld;
1596         struct snd_jack *jack = NULL;
1597         bool changed;
1598         int size;
1599 
1600         mutex_lock(&per_pin->lock);
1601         eld->monitor_present = false;
1602         size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1603                                       per_pin->dev_id, &eld->monitor_present,
1604                                       eld->eld_buffer, ELD_MAX_SIZE);
1605         if (size > 0) {
1606                 size = min(size, ELD_MAX_SIZE);
1607                 if (snd_hdmi_parse_eld(codec, &eld->info,
1608                                        eld->eld_buffer, size) < 0)
1609                         size = -EINVAL;
1610         }
1611 
1612         if (size > 0) {
1613                 eld->eld_valid = true;
1614                 eld->eld_size = size;
1615         } else {
1616                 eld->eld_valid = false;
1617                 eld->eld_size = 0;
1618         }
1619 
1620         /* pcm_idx >=0 before update_eld() means it is in monitor
1621          * disconnected event. Jack must be fetched before update_eld()
1622          */
1623         jack = pin_idx_to_jack(codec, per_pin);
1624         changed = update_eld(codec, per_pin, eld);
1625         if (jack == NULL)
1626                 jack = pin_idx_to_jack(codec, per_pin);
1627         if (changed && jack)
1628                 snd_jack_report(jack,
1629                                 (eld->monitor_present && eld->eld_valid) ?
1630                                 SND_JACK_AVOUT : 0);
1631         mutex_unlock(&per_pin->lock);
1632 }
1633 
1634 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1635 {
1636         struct hda_codec *codec = per_pin->codec;
1637         int ret;
1638 
1639         /* no temporary power up/down needed for component notifier */
1640         if (!codec_has_acomp(codec)) {
1641                 ret = snd_hda_power_up_pm(codec);
1642                 if (ret < 0 && pm_runtime_suspended(hda_codec_dev(codec))) {
1643                         snd_hda_power_down_pm(codec);
1644                         return false;
1645                 }
1646         }
1647 
1648         if (codec_has_acomp(codec)) {
1649                 sync_eld_via_acomp(codec, per_pin);
1650                 ret = false; /* don't call snd_hda_jack_report_sync() */
1651         } else {
1652                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
1653         }
1654 
1655         if (!codec_has_acomp(codec))
1656                 snd_hda_power_down_pm(codec);
1657 
1658         return ret;
1659 }
1660 
1661 static void hdmi_repoll_eld(struct work_struct *work)
1662 {
1663         struct hdmi_spec_per_pin *per_pin =
1664         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1665         struct hda_codec *codec = per_pin->codec;
1666         struct hdmi_spec *spec = codec->spec;
1667         struct hda_jack_tbl *jack;
1668 
1669         jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1670         if (jack)
1671                 jack->jack_dirty = 1;
1672 
1673         if (per_pin->repoll_count++ > 6)
1674                 per_pin->repoll_count = 0;
1675 
1676         mutex_lock(&spec->pcm_lock);
1677         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1678                 snd_hda_jack_report_sync(per_pin->codec);
1679         mutex_unlock(&spec->pcm_lock);
1680 }
1681 
1682 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1683                                              hda_nid_t nid);
1684 
1685 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1686 {
1687         struct hdmi_spec *spec = codec->spec;
1688         unsigned int caps, config;
1689         int pin_idx;
1690         struct hdmi_spec_per_pin *per_pin;
1691         int err;
1692         int dev_num, i;
1693 
1694         caps = snd_hda_query_pin_caps(codec, pin_nid);
1695         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1696                 return 0;
1697 
1698         /*
1699          * For DP MST audio, Configuration Default is the same for
1700          * all device entries on the same pin
1701          */
1702         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1703         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1704                 return 0;
1705 
1706         /*
1707          * To simplify the implementation, malloc all
1708          * the virtual pins in the initialization statically
1709          */
1710         if (is_haswell_plus(codec)) {
1711                 /*
1712                  * On Intel platforms, device entries number is
1713                  * changed dynamically. If there is a DP MST
1714                  * hub connected, the device entries number is 3.
1715                  * Otherwise, it is 1.
1716                  * Here we manually set dev_num to 3, so that
1717                  * we can initialize all the device entries when
1718                  * bootup statically.
1719                  */
1720                 dev_num = 3;
1721                 spec->dev_num = 3;
1722         } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1723                 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1724                 /*
1725                  * spec->dev_num is the maxinum number of device entries
1726                  * among all the pins
1727                  */
1728                 spec->dev_num = (spec->dev_num > dev_num) ?
1729                         spec->dev_num : dev_num;
1730         } else {
1731                 /*
1732                  * If the platform doesn't support DP MST,
1733                  * manually set dev_num to 1. This means
1734                  * the pin has only one device entry.
1735                  */
1736                 dev_num = 1;
1737                 spec->dev_num = 1;
1738         }
1739 
1740         for (i = 0; i < dev_num; i++) {
1741                 pin_idx = spec->num_pins;
1742                 per_pin = snd_array_new(&spec->pins);
1743 
1744                 if (!per_pin)
1745                         return -ENOMEM;
1746 
1747                 if (spec->dyn_pcm_assign) {
1748                         per_pin->pcm = NULL;
1749                         per_pin->pcm_idx = -1;
1750                 } else {
1751                         per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1752                         per_pin->pcm_idx = pin_idx;
1753                 }
1754                 per_pin->pin_nid = pin_nid;
1755                 per_pin->pin_nid_idx = spec->num_nids;
1756                 per_pin->dev_id = i;
1757                 per_pin->non_pcm = false;
1758                 snd_hda_set_dev_select(codec, pin_nid, i);
1759                 if (is_haswell_plus(codec))
1760                         intel_haswell_fixup_connect_list(codec, pin_nid);
1761                 err = hdmi_read_pin_conn(codec, pin_idx);
1762                 if (err < 0)
1763                         return err;
1764                 spec->num_pins++;
1765         }
1766         spec->num_nids++;
1767 
1768         return 0;
1769 }
1770 
1771 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1772 {
1773         struct hdmi_spec *spec = codec->spec;
1774         struct hdmi_spec_per_cvt *per_cvt;
1775         unsigned int chans;
1776         int err;
1777 
1778         chans = get_wcaps(codec, cvt_nid);
1779         chans = get_wcaps_channels(chans);
1780 
1781         per_cvt = snd_array_new(&spec->cvts);
1782         if (!per_cvt)
1783                 return -ENOMEM;
1784 
1785         per_cvt->cvt_nid = cvt_nid;
1786         per_cvt->channels_min = 2;
1787         if (chans <= 16) {
1788                 per_cvt->channels_max = chans;
1789                 if (chans > spec->chmap.channels_max)
1790                         spec->chmap.channels_max = chans;
1791         }
1792 
1793         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1794                                           &per_cvt->rates,
1795                                           &per_cvt->formats,
1796                                           &per_cvt->maxbps);
1797         if (err < 0)
1798                 return err;
1799 
1800         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1801                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1802         spec->num_cvts++;
1803 
1804         return 0;
1805 }
1806 
1807 static int hdmi_parse_codec(struct hda_codec *codec)
1808 {
1809         hda_nid_t nid;
1810         int i, nodes;
1811 
1812         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
1813         if (!nid || nodes < 0) {
1814                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1815                 return -EINVAL;
1816         }
1817 
1818         for (i = 0; i < nodes; i++, nid++) {
1819                 unsigned int caps;
1820                 unsigned int type;
1821 
1822                 caps = get_wcaps(codec, nid);
1823                 type = get_wcaps_type(caps);
1824 
1825                 if (!(caps & AC_WCAP_DIGITAL))
1826                         continue;
1827 
1828                 switch (type) {
1829                 case AC_WID_AUD_OUT:
1830                         hdmi_add_cvt(codec, nid);
1831                         break;
1832                 case AC_WID_PIN:
1833                         hdmi_add_pin(codec, nid);
1834                         break;
1835                 }
1836         }
1837 
1838         return 0;
1839 }
1840 
1841 /*
1842  */
1843 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1844 {
1845         struct hda_spdif_out *spdif;
1846         bool non_pcm;
1847 
1848         mutex_lock(&codec->spdif_mutex);
1849         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1850         /* Add sanity check to pass klockwork check.
1851          * This should never happen.
1852          */
1853         if (WARN_ON(spdif == NULL))
1854                 return true;
1855         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1856         mutex_unlock(&codec->spdif_mutex);
1857         return non_pcm;
1858 }
1859 
1860 /*
1861  * HDMI callbacks
1862  */
1863 
1864 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1865                                            struct hda_codec *codec,
1866                                            unsigned int stream_tag,
1867                                            unsigned int format,
1868                                            struct snd_pcm_substream *substream)
1869 {
1870         hda_nid_t cvt_nid = hinfo->nid;
1871         struct hdmi_spec *spec = codec->spec;
1872         int pin_idx;
1873         struct hdmi_spec_per_pin *per_pin;
1874         hda_nid_t pin_nid;
1875         struct snd_pcm_runtime *runtime = substream->runtime;
1876         bool non_pcm;
1877         int pinctl, stripe;
1878         int err = 0;
1879 
1880         mutex_lock(&spec->pcm_lock);
1881         pin_idx = hinfo_to_pin_index(codec, hinfo);
1882         if (spec->dyn_pcm_assign && pin_idx < 0) {
1883                 /* when dyn_pcm_assign and pcm is not bound to a pin
1884                  * skip pin setup and return 0 to make audio playback
1885                  * be ongoing
1886                  */
1887                 pin_cvt_fixup(codec, NULL, cvt_nid);
1888                 snd_hda_codec_setup_stream(codec, cvt_nid,
1889                                         stream_tag, 0, format);
1890                 goto unlock;
1891         }
1892 
1893         if (snd_BUG_ON(pin_idx < 0)) {
1894                 err = -EINVAL;
1895                 goto unlock;
1896         }
1897         per_pin = get_pin(spec, pin_idx);
1898         pin_nid = per_pin->pin_nid;
1899 
1900         /* Verify pin:cvt selections to avoid silent audio after S3.
1901          * After S3, the audio driver restores pin:cvt selections
1902          * but this can happen before gfx is ready and such selection
1903          * is overlooked by HW. Thus multiple pins can share a same
1904          * default convertor and mute control will affect each other,
1905          * which can cause a resumed audio playback become silent
1906          * after S3.
1907          */
1908         pin_cvt_fixup(codec, per_pin, 0);
1909 
1910         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1911         /* Todo: add DP1.2 MST audio support later */
1912         if (codec_has_acomp(codec))
1913                 snd_hdac_sync_audio_rate(&codec->core, pin_nid, per_pin->dev_id,
1914                                          runtime->rate);
1915 
1916         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1917         mutex_lock(&per_pin->lock);
1918         per_pin->channels = substream->runtime->channels;
1919         per_pin->setup = true;
1920 
1921         if (get_wcaps(codec, cvt_nid) & AC_WCAP_STRIPE) {
1922                 stripe = snd_hdac_get_stream_stripe_ctl(&codec->bus->core,
1923                                                         substream);
1924                 snd_hda_codec_write(codec, cvt_nid, 0,
1925                                     AC_VERB_SET_STRIPE_CONTROL,
1926                                     stripe);
1927         }
1928 
1929         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1930         mutex_unlock(&per_pin->lock);
1931         if (spec->dyn_pin_out) {
1932                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1933                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1934                 snd_hda_codec_write(codec, pin_nid, 0,
1935                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1936                                     pinctl | PIN_OUT);
1937         }
1938 
1939         /* snd_hda_set_dev_select() has been called before */
1940         err = spec->ops.setup_stream(codec, cvt_nid, pin_nid,
1941                                  stream_tag, format);
1942  unlock:
1943         mutex_unlock(&spec->pcm_lock);
1944         return err;
1945 }
1946 
1947 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1948                                              struct hda_codec *codec,
1949                                              struct snd_pcm_substream *substream)
1950 {
1951         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1952         return 0;
1953 }
1954 
1955 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1956                           struct hda_codec *codec,
1957                           struct snd_pcm_substream *substream)
1958 {
1959         struct hdmi_spec *spec = codec->spec;
1960         int cvt_idx, pin_idx, pcm_idx;
1961         struct hdmi_spec_per_cvt *per_cvt;
1962         struct hdmi_spec_per_pin *per_pin;
1963         int pinctl;
1964         int err = 0;
1965 
1966         if (hinfo->nid) {
1967                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1968                 if (snd_BUG_ON(pcm_idx < 0))
1969                         return -EINVAL;
1970                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1971                 if (snd_BUG_ON(cvt_idx < 0))
1972                         return -EINVAL;
1973                 per_cvt = get_cvt(spec, cvt_idx);
1974 
1975                 snd_BUG_ON(!per_cvt->assigned);
1976                 per_cvt->assigned = 0;
1977                 hinfo->nid = 0;
1978 
1979                 mutex_lock(&spec->pcm_lock);
1980                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1981                 clear_bit(pcm_idx, &spec->pcm_in_use);
1982                 pin_idx = hinfo_to_pin_index(codec, hinfo);
1983                 if (spec->dyn_pcm_assign && pin_idx < 0)
1984                         goto unlock;
1985 
1986                 if (snd_BUG_ON(pin_idx < 0)) {
1987                         err = -EINVAL;
1988                         goto unlock;
1989                 }
1990                 per_pin = get_pin(spec, pin_idx);
1991 
1992                 if (spec->dyn_pin_out) {
1993                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1994                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1995                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1996                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1997                                             pinctl & ~PIN_OUT);
1998                 }
1999 
2000                 mutex_lock(&per_pin->lock);
2001                 per_pin->chmap_set = false;
2002                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2003 
2004                 per_pin->setup = false;
2005                 per_pin->channels = 0;
2006                 mutex_unlock(&per_pin->lock);
2007         unlock:
2008                 mutex_unlock(&spec->pcm_lock);
2009         }
2010 
2011         return err;
2012 }
2013 
2014 static const struct hda_pcm_ops generic_ops = {
2015         .open = hdmi_pcm_open,
2016         .close = hdmi_pcm_close,
2017         .prepare = generic_hdmi_playback_pcm_prepare,
2018         .cleanup = generic_hdmi_playback_pcm_cleanup,
2019 };
2020 
2021 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
2022 {
2023         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2024         struct hdmi_spec *spec = codec->spec;
2025         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2026 
2027         if (!per_pin)
2028                 return 0;
2029 
2030         return per_pin->sink_eld.info.spk_alloc;
2031 }
2032 
2033 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
2034                                         unsigned char *chmap)
2035 {
2036         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2037         struct hdmi_spec *spec = codec->spec;
2038         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2039 
2040         /* chmap is already set to 0 in caller */
2041         if (!per_pin)
2042                 return;
2043 
2044         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
2045 }
2046 
2047 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
2048                                 unsigned char *chmap, int prepared)
2049 {
2050         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2051         struct hdmi_spec *spec = codec->spec;
2052         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2053 
2054         if (!per_pin)
2055                 return;
2056         mutex_lock(&per_pin->lock);
2057         per_pin->chmap_set = true;
2058         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2059         if (prepared)
2060                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2061         mutex_unlock(&per_pin->lock);
2062 }
2063 
2064 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2065 {
2066         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2067         struct hdmi_spec *spec = codec->spec;
2068         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2069 
2070         return per_pin ? true:false;
2071 }
2072 
2073 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2074 {
2075         struct hdmi_spec *spec = codec->spec;
2076         int idx;
2077 
2078         /*
2079          * for non-mst mode, pcm number is the same as before
2080          * for DP MST mode, pcm number is (nid number + dev_num - 1)
2081          *  dev_num is the device entry number in a pin
2082          *
2083          */
2084         for (idx = 0; idx < spec->num_nids + spec->dev_num - 1; idx++) {
2085                 struct hda_pcm *info;
2086                 struct hda_pcm_stream *pstr;
2087 
2088                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2089                 if (!info)
2090                         return -ENOMEM;
2091 
2092                 spec->pcm_rec[idx].pcm = info;
2093                 spec->pcm_used++;
2094                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2095                 info->own_chmap = true;
2096 
2097                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2098                 pstr->substreams = 1;
2099                 pstr->ops = generic_ops;
2100                 /* pcm number is less than 16 */
2101                 if (spec->pcm_used >= 16)
2102                         break;
2103                 /* other pstr fields are set in open */
2104         }
2105 
2106         return 0;
2107 }
2108 
2109 static void free_hdmi_jack_priv(struct snd_jack *jack)
2110 {
2111         struct hdmi_pcm *pcm = jack->private_data;
2112 
2113         pcm->jack = NULL;
2114 }
2115 
2116 static int add_hdmi_jack_kctl(struct hda_codec *codec,
2117                                struct hdmi_spec *spec,
2118                                int pcm_idx,
2119                                const char *name)
2120 {
2121         struct snd_jack *jack;
2122         int err;
2123 
2124         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
2125                            true, false);
2126         if (err < 0)
2127                 return err;
2128 
2129         spec->pcm_rec[pcm_idx].jack = jack;
2130         jack->private_data = &spec->pcm_rec[pcm_idx];
2131         jack->private_free = free_hdmi_jack_priv;
2132         return 0;
2133 }
2134 
2135 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2136 {
2137         char hdmi_str[32] = "HDMI/DP";
2138         struct hdmi_spec *spec = codec->spec;
2139         struct hdmi_spec_per_pin *per_pin;
2140         struct hda_jack_tbl *jack;
2141         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2142         bool phantom_jack;
2143         int ret;
2144 
2145         if (pcmdev > 0)
2146                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2147 
2148         if (spec->dyn_pcm_assign)
2149                 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
2150 
2151         /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
2152         /* if !dyn_pcm_assign, it must be non-MST mode.
2153          * This means pcms and pins are statically mapped.
2154          * And pcm_idx is pin_idx.
2155          */
2156         per_pin = get_pin(spec, pcm_idx);
2157         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
2158         if (phantom_jack)
2159                 strncat(hdmi_str, " Phantom",
2160                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2161         ret = snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
2162                                     phantom_jack, 0, NULL);
2163         if (ret < 0)
2164                 return ret;
2165         jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
2166         if (jack == NULL)
2167                 return 0;
2168         /* assign jack->jack to pcm_rec[].jack to
2169          * align with dyn_pcm_assign mode
2170          */
2171         spec->pcm_rec[pcm_idx].jack = jack->jack;
2172         return 0;
2173 }
2174 
2175 static int generic_hdmi_build_controls(struct hda_codec *codec)
2176 {
2177         struct hdmi_spec *spec = codec->spec;
2178         int dev, err;
2179         int pin_idx, pcm_idx;
2180 
2181         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2182                 if (!get_pcm_rec(spec, pcm_idx)->pcm) {
2183                         /* no PCM: mark this for skipping permanently */
2184                         set_bit(pcm_idx, &spec->pcm_bitmap);
2185                         continue;
2186                 }
2187 
2188                 err = generic_hdmi_build_jack(codec, pcm_idx);
2189                 if (err < 0)
2190                         return err;
2191 
2192                 /* create the spdif for each pcm
2193                  * pin will be bound when monitor is connected
2194                  */
2195                 if (spec->dyn_pcm_assign)
2196                         err = snd_hda_create_dig_out_ctls(codec,
2197                                           0, spec->cvt_nids[0],
2198                                           HDA_PCM_TYPE_HDMI);
2199                 else {
2200                         struct hdmi_spec_per_pin *per_pin =
2201                                 get_pin(spec, pcm_idx);
2202                         err = snd_hda_create_dig_out_ctls(codec,
2203                                                   per_pin->pin_nid,
2204                                                   per_pin->mux_nids[0],
2205                                                   HDA_PCM_TYPE_HDMI);
2206                 }
2207                 if (err < 0)
2208                         return err;
2209                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2210 
2211                 dev = get_pcm_rec(spec, pcm_idx)->device;
2212                 if (dev != SNDRV_PCM_INVALID_DEVICE) {
2213                         /* add control for ELD Bytes */
2214                         err = hdmi_create_eld_ctl(codec, pcm_idx, dev);
2215                         if (err < 0)
2216                                 return err;
2217                 }
2218         }
2219 
2220         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2221                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2222 
2223                 hdmi_present_sense(per_pin, 0);
2224         }
2225 
2226         /* add channel maps */
2227         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2228                 struct hda_pcm *pcm;
2229 
2230                 pcm = get_pcm_rec(spec, pcm_idx);
2231                 if (!pcm || !pcm->pcm)
2232                         break;
2233                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2234                 if (err < 0)
2235                         return err;
2236         }
2237 
2238         return 0;
2239 }
2240 
2241 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2242 {
2243         struct hdmi_spec *spec = codec->spec;
2244         int pin_idx;
2245 
2246         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2247                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2248 
2249                 per_pin->codec = codec;
2250                 mutex_init(&per_pin->lock);
2251                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2252                 eld_proc_new(per_pin, pin_idx);
2253         }
2254         return 0;
2255 }
2256 
2257 static int generic_hdmi_init(struct hda_codec *codec)
2258 {
2259         struct hdmi_spec *spec = codec->spec;
2260         int pin_idx;
2261 
2262         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2263                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2264                 hda_nid_t pin_nid = per_pin->pin_nid;
2265                 int dev_id = per_pin->dev_id;
2266 
2267                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2268                 hdmi_init_pin(codec, pin_nid);
2269                 if (!codec_has_acomp(codec))
2270                         snd_hda_jack_detect_enable_callback(codec, pin_nid,
2271                                 codec->jackpoll_interval > 0 ?
2272                                 jack_callback : NULL);
2273         }
2274         return 0;
2275 }
2276 
2277 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2278 {
2279         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2280         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2281 }
2282 
2283 static void hdmi_array_free(struct hdmi_spec *spec)
2284 {
2285         snd_array_free(&spec->pins);
2286         snd_array_free(&spec->cvts);
2287 }
2288 
2289 static void generic_spec_free(struct hda_codec *codec)
2290 {
2291         struct hdmi_spec *spec = codec->spec;
2292 
2293         if (spec) {
2294                 hdmi_array_free(spec);
2295                 kfree(spec);
2296                 codec->spec = NULL;
2297         }
2298         codec->dp_mst = false;
2299 }
2300 
2301 static void generic_hdmi_free(struct hda_codec *codec)
2302 {
2303         struct hdmi_spec *spec = codec->spec;
2304         int pin_idx, pcm_idx;
2305 
2306         if (codec_has_acomp(codec)) {
2307                 snd_hdac_acomp_register_notifier(&codec->bus->core, NULL);
2308                 codec->relaxed_resume = 0;
2309         }
2310 
2311         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2312                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2313                 cancel_delayed_work_sync(&per_pin->work);
2314                 eld_proc_free(per_pin);
2315         }
2316 
2317         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2318                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2319                         continue;
2320                 if (spec->dyn_pcm_assign)
2321                         snd_device_free(codec->card,
2322                                         spec->pcm_rec[pcm_idx].jack);
2323                 else
2324                         spec->pcm_rec[pcm_idx].jack = NULL;
2325         }
2326 
2327         generic_spec_free(codec);
2328 }
2329 
2330 #ifdef CONFIG_PM
2331 static int generic_hdmi_resume(struct hda_codec *codec)
2332 {
2333         struct hdmi_spec *spec = codec->spec;
2334         int pin_idx;
2335 
2336         codec->patch_ops.init(codec);
2337         regcache_sync(codec->core.regmap);
2338 
2339         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2340                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2341                 hdmi_present_sense(per_pin, 1);
2342         }
2343         return 0;
2344 }
2345 #endif
2346 
2347 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2348         .init                   = generic_hdmi_init,
2349         .free                   = generic_hdmi_free,
2350         .build_pcms             = generic_hdmi_build_pcms,
2351         .build_controls         = generic_hdmi_build_controls,
2352         .unsol_event            = hdmi_unsol_event,
2353 #ifdef CONFIG_PM
2354         .resume                 = generic_hdmi_resume,
2355 #endif
2356 };
2357 
2358 static const struct hdmi_ops generic_standard_hdmi_ops = {
2359         .pin_get_eld                            = snd_hdmi_get_eld,
2360         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2361         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2362         .setup_stream                           = hdmi_setup_stream,
2363 };
2364 
2365 /* allocate codec->spec and assign/initialize generic parser ops */
2366 static int alloc_generic_hdmi(struct hda_codec *codec)
2367 {
2368         struct hdmi_spec *spec;
2369 
2370         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2371         if (!spec)
2372                 return -ENOMEM;
2373 
2374         spec->ops = generic_standard_hdmi_ops;
2375         spec->dev_num = 1;      /* initialize to 1 */
2376         mutex_init(&spec->pcm_lock);
2377         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2378 
2379         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2380         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2381         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2382         spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc,
2383 
2384         codec->spec = spec;
2385         hdmi_array_init(spec, 4);
2386 
2387         codec->patch_ops = generic_hdmi_patch_ops;
2388 
2389         return 0;
2390 }
2391 
2392 /* generic HDMI parser */
2393 static int patch_generic_hdmi(struct hda_codec *codec)
2394 {
2395         int err;
2396 
2397         err = alloc_generic_hdmi(codec);
2398         if (err < 0)
2399                 return err;
2400 
2401         err = hdmi_parse_codec(codec);
2402         if (err < 0) {
2403                 generic_spec_free(codec);
2404                 return err;
2405         }
2406 
2407         generic_hdmi_init_per_pins(codec);
2408         return 0;
2409 }
2410 
2411 /*
2412  * Intel codec parsers and helpers
2413  */
2414 
2415 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2416                                              hda_nid_t nid)
2417 {
2418         struct hdmi_spec *spec = codec->spec;
2419         hda_nid_t conns[4];
2420         int nconns;
2421 
2422         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2423         if (nconns == spec->num_cvts &&
2424             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2425                 return;
2426 
2427         /* override pins connection list */
2428         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2429         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2430 }
2431 
2432 #define INTEL_GET_VENDOR_VERB   0xf81
2433 #define INTEL_SET_VENDOR_VERB   0x781
2434 #define INTEL_EN_DP12           0x02    /* enable DP 1.2 features */
2435 #define INTEL_EN_ALL_PIN_CVTS   0x01    /* enable 2nd & 3rd pins and convertors */
2436 
2437 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2438                                           bool update_tree)
2439 {
2440         unsigned int vendor_param;
2441         struct hdmi_spec *spec = codec->spec;
2442 
2443         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2444                                 INTEL_GET_VENDOR_VERB, 0);
2445         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2446                 return;
2447 
2448         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2449         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2450                                 INTEL_SET_VENDOR_VERB, vendor_param);
2451         if (vendor_param == -1)
2452                 return;
2453 
2454         if (update_tree)
2455                 snd_hda_codec_update_widgets(codec);
2456 }
2457 
2458 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2459 {
2460         unsigned int vendor_param;
2461         struct hdmi_spec *spec = codec->spec;
2462 
2463         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2464                                 INTEL_GET_VENDOR_VERB, 0);
2465         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2466                 return;
2467 
2468         /* enable DP1.2 mode */
2469         vendor_param |= INTEL_EN_DP12;
2470         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2471         snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2472                                 INTEL_SET_VENDOR_VERB, vendor_param);
2473 }
2474 
2475 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2476  * Otherwise you may get severe h/w communication errors.
2477  */
2478 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2479                                 unsigned int power_state)
2480 {
2481         if (power_state == AC_PWRST_D0) {
2482                 intel_haswell_enable_all_pins(codec, false);
2483                 intel_haswell_fixup_enable_dp12(codec);
2484         }
2485 
2486         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2487         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2488 }
2489 
2490 /* There is a fixed mapping between audio pin node and display port.
2491  * on SNB, IVY, HSW, BSW, SKL, BXT, KBL:
2492  * Pin Widget 5 - PORT B (port = 1 in i915 driver)
2493  * Pin Widget 6 - PORT C (port = 2 in i915 driver)
2494  * Pin Widget 7 - PORT D (port = 3 in i915 driver)
2495  *
2496  * on VLV, ILK:
2497  * Pin Widget 4 - PORT B (port = 1 in i915 driver)
2498  * Pin Widget 5 - PORT C (port = 2 in i915 driver)
2499  * Pin Widget 6 - PORT D (port = 3 in i915 driver)
2500  */
2501 static int intel_base_nid(struct hda_codec *codec)
2502 {
2503         switch (codec->core.vendor_id) {
2504         case 0x80860054: /* ILK */
2505         case 0x80862804: /* ILK */
2506         case 0x80862882: /* VLV */
2507                 return 4;
2508         default:
2509                 return 5;
2510         }
2511 }
2512 
2513 static int intel_pin2port(void *audio_ptr, int pin_nid)
2514 {
2515         struct hda_codec *codec = audio_ptr;
2516         struct hdmi_spec *spec = codec->spec;
2517         int base_nid, i;
2518 
2519         if (!spec->port_num) {
2520                 base_nid = intel_base_nid(codec);
2521                 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3))
2522                         return -1;
2523                 return pin_nid - base_nid + 1; /* intel port is 1-based */
2524         }
2525 
2526         /*
2527          * looking for the pin number in the mapping table and return
2528          * the index which indicate the port number
2529          */
2530         for (i = 0; i < spec->port_num; i++) {
2531                 if (pin_nid == spec->port_map[i])
2532                         return i + 1;
2533         }
2534 
2535         /* return -1 if pin number exceeds our expectation */
2536         codec_info(codec, "Can't find the HDMI/DP port for pin %d\n", pin_nid);
2537         return -1;
2538 }
2539 
2540 static int intel_port2pin(struct hda_codec *codec, int port)
2541 {
2542         struct hdmi_spec *spec = codec->spec;
2543 
2544         if (!spec->port_num) {
2545                 /* we assume only from port-B to port-D */
2546                 if (port < 1 || port > 3)
2547                         return 0;
2548                 /* intel port is 1-based */
2549                 return port + intel_base_nid(codec) - 1;
2550         }
2551 
2552         if (port < 1 || port > spec->port_num)
2553                 return 0;
2554         return spec->port_map[port - 1];
2555 }
2556 
2557 static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2558 {
2559         struct hda_codec *codec = audio_ptr;
2560         int pin_nid;
2561         int dev_id = pipe;
2562 
2563         pin_nid = intel_port2pin(codec, port);
2564         if (!pin_nid)
2565                 return;
2566         /* skip notification during system suspend (but not in runtime PM);
2567          * the state will be updated at resume
2568          */
2569         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2570                 return;
2571         /* ditto during suspend/resume process itself */
2572         if (snd_hdac_is_in_pm(&codec->core))
2573                 return;
2574 
2575         snd_hdac_i915_set_bclk(&codec->bus->core);
2576         check_presence_and_report(codec, pin_nid, dev_id);
2577 }
2578 
2579 /* register i915 component pin_eld_notify callback */
2580 static void register_i915_notifier(struct hda_codec *codec)
2581 {
2582         struct hdmi_spec *spec = codec->spec;
2583 
2584         spec->use_acomp_notifier = true;
2585         spec->drm_audio_ops.audio_ptr = codec;
2586         /* intel_audio_codec_enable() or intel_audio_codec_disable()
2587          * will call pin_eld_notify with using audio_ptr pointer
2588          * We need make sure audio_ptr is really setup
2589          */
2590         wmb();
2591         spec->drm_audio_ops.pin2port = intel_pin2port;
2592         spec->drm_audio_ops.pin_eld_notify = intel_pin_eld_notify;
2593         snd_hdac_acomp_register_notifier(&codec->bus->core,
2594                                         &spec->drm_audio_ops);
2595         /* no need for forcible resume for jack check thanks to notifier */
2596         codec->relaxed_resume = 1;
2597 }
2598 
2599 /* setup_stream ops override for HSW+ */
2600 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2601                                  hda_nid_t pin_nid, u32 stream_tag, int format)
2602 {
2603         haswell_verify_D0(codec, cvt_nid, pin_nid);
2604         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
2605 }
2606 
2607 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2608 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2609                                struct hdmi_spec_per_pin *per_pin,
2610                                hda_nid_t cvt_nid)
2611 {
2612         if (per_pin) {
2613                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2614                                per_pin->dev_id);
2615                 intel_verify_pin_cvt_connect(codec, per_pin);
2616                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2617                                      per_pin->dev_id, per_pin->mux_idx);
2618         } else {
2619                 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2620         }
2621 }
2622 
2623 /* precondition and allocation for Intel codecs */
2624 static int alloc_intel_hdmi(struct hda_codec *codec)
2625 {
2626         int err;
2627 
2628         /* requires i915 binding */
2629         if (!codec->bus->core.audio_component) {
2630                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2631                 /* set probe_id here to prevent generic fallback binding */
2632                 codec->probe_id = HDA_CODEC_ID_SKIP_PROBE;
2633                 return -ENODEV;
2634         }
2635 
2636         err = alloc_generic_hdmi(codec);
2637         if (err < 0)
2638                 return err;
2639         /* no need to handle unsol events */
2640         codec->patch_ops.unsol_event = NULL;
2641         return 0;
2642 }
2643 
2644 /* parse and post-process for Intel codecs */
2645 static int parse_intel_hdmi(struct hda_codec *codec)
2646 {
2647         int err;
2648 
2649         err = hdmi_parse_codec(codec);
2650         if (err < 0) {
2651                 generic_spec_free(codec);
2652                 return err;
2653         }
2654 
2655         generic_hdmi_init_per_pins(codec);
2656         register_i915_notifier(codec);
2657         return 0;
2658 }
2659 
2660 /* Intel Haswell and onwards; audio component with eld notifier */
2661 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
2662                                  const int *port_map, int port_num)
2663 {
2664         struct hdmi_spec *spec;
2665         int err;
2666 
2667         err = alloc_intel_hdmi(codec);
2668         if (err < 0)
2669                 return err;
2670         spec = codec->spec;
2671         codec->dp_mst = true;
2672         spec->dyn_pcm_assign = true;
2673         spec->vendor_nid = vendor_nid;
2674         spec->port_map = port_map;
2675         spec->port_num = port_num;
2676 
2677         intel_haswell_enable_all_pins(codec, true);
2678         intel_haswell_fixup_enable_dp12(codec);
2679 
2680         codec->display_power_control = 1;
2681 
2682         codec->patch_ops.set_power_state = haswell_set_power_state;
2683         codec->depop_delay = 0;
2684         codec->auto_runtime_pm = 1;
2685 
2686         spec->ops.setup_stream = i915_hsw_setup_stream;
2687         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2688 
2689         return parse_intel_hdmi(codec);
2690 }
2691 
2692 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2693 {
2694         return intel_hsw_common_init(codec, 0x08, NULL, 0);
2695 }
2696 
2697 static int patch_i915_glk_hdmi(struct hda_codec *codec)
2698 {
2699         return intel_hsw_common_init(codec, 0x0b, NULL, 0);
2700 }
2701 
2702 static int patch_i915_icl_hdmi(struct hda_codec *codec)
2703 {
2704         /*
2705          * pin to port mapping table where the value indicate the pin number and
2706          * the index indicate the port number with 1 base.
2707          */
2708         static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb};
2709 
2710         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2711 }
2712 
2713 static int patch_i915_tgl_hdmi(struct hda_codec *codec)
2714 {
2715         /*
2716          * pin to port mapping table where the value indicate the pin number and
2717          * the index indicate the port number with 1 base.
2718          */
2719         static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
2720 
2721         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2722 }
2723 
2724 
2725 /* Intel Baytrail and Braswell; with eld notifier */
2726 static int patch_i915_byt_hdmi(struct hda_codec *codec)
2727 {
2728         struct hdmi_spec *spec;
2729         int err;
2730 
2731         err = alloc_intel_hdmi(codec);
2732         if (err < 0)
2733                 return err;
2734         spec = codec->spec;
2735 
2736         /* For Valleyview/Cherryview, only the display codec is in the display
2737          * power well and can use link_power ops to request/release the power.
2738          */
2739         codec->display_power_control = 1;
2740 
2741         codec->depop_delay = 0;
2742         codec->auto_runtime_pm = 1;
2743 
2744         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2745 
2746         return parse_intel_hdmi(codec);
2747 }
2748 
2749 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
2750 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
2751 {
2752         int err;
2753 
2754         err = alloc_intel_hdmi(codec);
2755         if (err < 0)
2756                 return err;
2757         return parse_intel_hdmi(codec);
2758 }
2759 
2760 /*
2761  * Shared non-generic implementations
2762  */
2763 
2764 static int simple_playback_build_pcms(struct hda_codec *codec)
2765 {
2766         struct hdmi_spec *spec = codec->spec;
2767         struct hda_pcm *info;
2768         unsigned int chans;
2769         struct hda_pcm_stream *pstr;
2770         struct hdmi_spec_per_cvt *per_cvt;
2771 
2772         per_cvt = get_cvt(spec, 0);
2773         chans = get_wcaps(codec, per_cvt->cvt_nid);
2774         chans = get_wcaps_channels(chans);
2775 
2776         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2777         if (!info)
2778                 return -ENOMEM;
2779         spec->pcm_rec[0].pcm = info;
2780         info->pcm_type = HDA_PCM_TYPE_HDMI;
2781         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2782         *pstr = spec->pcm_playback;
2783         pstr->nid = per_cvt->cvt_nid;
2784         if (pstr->channels_max <= 2 && chans && chans <= 16)
2785                 pstr->channels_max = chans;
2786 
2787         return 0;
2788 }
2789 
2790 /* unsolicited event for jack sensing */
2791 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2792                                     unsigned int res)
2793 {
2794         snd_hda_jack_set_dirty_all(codec);
2795         snd_hda_jack_report_sync(codec);
2796 }
2797 
2798 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2799  * as long as spec->pins[] is set correctly
2800  */
2801 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2802 
2803 static int simple_playback_build_controls(struct hda_codec *codec)
2804 {
2805         struct hdmi_spec *spec = codec->spec;
2806         struct hdmi_spec_per_cvt *per_cvt;
2807         int err;
2808 
2809         per_cvt = get_cvt(spec, 0);
2810         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2811                                           per_cvt->cvt_nid,
2812                                           HDA_PCM_TYPE_HDMI);
2813         if (err < 0)
2814                 return err;
2815         return simple_hdmi_build_jack(codec, 0);
2816 }
2817 
2818 static int simple_playback_init(struct hda_codec *codec)
2819 {
2820         struct hdmi_spec *spec = codec->spec;
2821         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2822         hda_nid_t pin = per_pin->pin_nid;
2823 
2824         snd_hda_codec_write(codec, pin, 0,
2825                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2826         /* some codecs require to unmute the pin */
2827         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2828                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2829                                     AMP_OUT_UNMUTE);
2830         snd_hda_jack_detect_enable(codec, pin);
2831         return 0;
2832 }
2833 
2834 static void simple_playback_free(struct hda_codec *codec)
2835 {
2836         struct hdmi_spec *spec = codec->spec;
2837 
2838         hdmi_array_free(spec);
2839         kfree(spec);
2840 }
2841 
2842 /*
2843  * Nvidia specific implementations
2844  */
2845 
2846 #define Nv_VERB_SET_Channel_Allocation          0xF79
2847 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2848 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2849 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2850 
2851 #define nvhdmi_master_con_nid_7x        0x04
2852 #define nvhdmi_master_pin_nid_7x        0x05
2853 
2854 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2855         /*front, rear, clfe, rear_surr */
2856         0x6, 0x8, 0xa, 0xc,
2857 };
2858 
2859 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2860         /* set audio protect on */
2861         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2862         /* enable digital output on pin widget */
2863         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2864         {} /* terminator */
2865 };
2866 
2867 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2868         /* set audio protect on */
2869         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2870         /* enable digital output on pin widget */
2871         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2872         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2873         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2874         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2875         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2876         {} /* terminator */
2877 };
2878 
2879 #ifdef LIMITED_RATE_FMT_SUPPORT
2880 /* support only the safe format and rate */
2881 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2882 #define SUPPORTED_MAXBPS        16
2883 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2884 #else
2885 /* support all rates and formats */
2886 #define SUPPORTED_RATES \
2887         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2888         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2889          SNDRV_PCM_RATE_192000)
2890 #define SUPPORTED_MAXBPS        24
2891 #define SUPPORTED_FORMATS \
2892         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2893 #endif
2894 
2895 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2896 {
2897         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2898         return 0;
2899 }
2900 
2901 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2902 {
2903         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2904         return 0;
2905 }
2906 
2907 static const unsigned int channels_2_6_8[] = {
2908         2, 6, 8
2909 };
2910 
2911 static const unsigned int channels_2_8[] = {
2912         2, 8
2913 };
2914 
2915 static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2916         .count = ARRAY_SIZE(channels_2_6_8),
2917         .list = channels_2_6_8,
2918         .mask = 0,
2919 };
2920 
2921 static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2922         .count = ARRAY_SIZE(channels_2_8),
2923         .list = channels_2_8,
2924         .mask = 0,
2925 };
2926 
2927 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2928                                     struct hda_codec *codec,
2929                                     struct snd_pcm_substream *substream)
2930 {
2931         struct hdmi_spec *spec = codec->spec;
2932         const struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2933 
2934         switch (codec->preset->vendor_id) {
2935         case 0x10de0002:
2936         case 0x10de0003:
2937         case 0x10de0005:
2938         case 0x10de0006:
2939                 hw_constraints_channels = &hw_constraints_2_8_channels;
2940                 break;
2941         case 0x10de0007:
2942                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2943                 break;
2944         default:
2945                 break;
2946         }
2947 
2948         if (hw_constraints_channels != NULL) {
2949                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2950                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2951                                 hw_constraints_channels);
2952         } else {
2953                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2954                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2955         }
2956 
2957         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2958 }
2959 
2960 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2961                                      struct hda_codec *codec,
2962                                      struct snd_pcm_substream *substream)
2963 {
2964         struct hdmi_spec *spec = codec->spec;
2965         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2966 }
2967 
2968 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2969                                        struct hda_codec *codec,
2970                                        unsigned int stream_tag,
2971                                        unsigned int format,
2972                                        struct snd_pcm_substream *substream)
2973 {
2974         struct hdmi_spec *spec = codec->spec;
2975         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2976                                              stream_tag, format, substream);
2977 }
2978 
2979 static const struct hda_pcm_stream simple_pcm_playback = {
2980         .substreams = 1,
2981         .channels_min = 2,
2982         .channels_max = 2,
2983         .ops = {
2984                 .open = simple_playback_pcm_open,
2985                 .close = simple_playback_pcm_close,
2986                 .prepare = simple_playback_pcm_prepare
2987         },
2988 };
2989 
2990 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2991         .build_controls = simple_playback_build_controls,
2992         .build_pcms = simple_playback_build_pcms,
2993         .init = simple_playback_init,
2994         .free = simple_playback_free,
2995         .unsol_event = simple_hdmi_unsol_event,
2996 };
2997 
2998 static int patch_simple_hdmi(struct hda_codec *codec,
2999                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
3000 {
3001         struct hdmi_spec *spec;
3002         struct hdmi_spec_per_cvt *per_cvt;
3003         struct hdmi_spec_per_pin *per_pin;
3004 
3005         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3006         if (!spec)
3007                 return -ENOMEM;
3008 
3009         codec->spec = spec;
3010         hdmi_array_init(spec, 1);
3011 
3012         spec->multiout.num_dacs = 0;  /* no analog */
3013         spec->multiout.max_channels = 2;
3014         spec->multiout.dig_out_nid = cvt_nid;
3015         spec->num_cvts = 1;
3016         spec->num_pins = 1;
3017         per_pin = snd_array_new(&spec->pins);
3018         per_cvt = snd_array_new(&spec->cvts);
3019         if (!per_pin || !per_cvt) {
3020                 simple_playback_free(codec);
3021                 return -ENOMEM;
3022         }
3023         per_cvt->cvt_nid = cvt_nid;
3024         per_pin->pin_nid = pin_nid;
3025         spec->pcm_playback = simple_pcm_playback;
3026 
3027         codec->patch_ops = simple_hdmi_patch_ops;
3028 
3029         return 0;
3030 }
3031 
3032 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3033                                                     int channels)
3034 {
3035         unsigned int chanmask;
3036         int chan = channels ? (channels - 1) : 1;
3037 
3038         switch (channels) {
3039         default:
3040         case 0:
3041         case 2:
3042                 chanmask = 0x00;
3043                 break;
3044         case 4:
3045                 chanmask = 0x08;
3046                 break;
3047         case 6:
3048                 chanmask = 0x0b;
3049                 break;
3050         case 8:
3051                 chanmask = 0x13;
3052                 break;
3053         }
3054 
3055         /* Set the audio infoframe channel allocation and checksum fields.  The
3056          * channel count is computed implicitly by the hardware. */
3057         snd_hda_codec_write(codec, 0x1, 0,
3058                         Nv_VERB_SET_Channel_Allocation, chanmask);
3059 
3060         snd_hda_codec_write(codec, 0x1, 0,
3061                         Nv_VERB_SET_Info_Frame_Checksum,
3062                         (0x71 - chan - chanmask));
3063 }
3064 
3065 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3066                                    struct hda_codec *codec,
3067                                    struct snd_pcm_substream *substream)
3068 {
3069         struct hdmi_spec *spec = codec->spec;
3070         int i;
3071 
3072         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3073                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3074         for (i = 0; i < 4; i++) {
3075                 /* set the stream id */
3076                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3077                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3078                 /* set the stream format */
3079                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3080                                 AC_VERB_SET_STREAM_FORMAT, 0);
3081         }
3082 
3083         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3084          * streams are disabled. */
3085         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3086 
3087         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3088 }
3089 
3090 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3091                                      struct hda_codec *codec,
3092                                      unsigned int stream_tag,
3093                                      unsigned int format,
3094                                      struct snd_pcm_substream *substream)
3095 {
3096         int chs;
3097         unsigned int dataDCC2, channel_id;
3098         int i;
3099         struct hdmi_spec *spec = codec->spec;
3100         struct hda_spdif_out *spdif;
3101         struct hdmi_spec_per_cvt *per_cvt;
3102 
3103         mutex_lock(&codec->spdif_mutex);
3104         per_cvt = get_cvt(spec, 0);
3105         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3106 
3107         chs = substream->runtime->channels;
3108 
3109         dataDCC2 = 0x2;
3110 
3111         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3112         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3113                 snd_hda_codec_write(codec,
3114                                 nvhdmi_master_con_nid_7x,
3115                                 0,
3116                                 AC_VERB_SET_DIGI_CONVERT_1,
3117                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3118 
3119         /* set the stream id */
3120         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3121                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3122 
3123         /* set the stream format */
3124         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3125                         AC_VERB_SET_STREAM_FORMAT, format);
3126 
3127         /* turn on again (if needed) */
3128         /* enable and set the channel status audio/data flag */
3129         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3130                 snd_hda_codec_write(codec,
3131                                 nvhdmi_master_con_nid_7x,
3132                                 0,
3133                                 AC_VERB_SET_DIGI_CONVERT_1,
3134                                 spdif->ctls & 0xff);
3135                 snd_hda_codec_write(codec,
3136                                 nvhdmi_master_con_nid_7x,
3137                                 0,
3138                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3139         }
3140 
3141         for (i = 0; i < 4; i++) {
3142                 if (chs == 2)
3143                         channel_id = 0;
3144                 else
3145                         channel_id = i * 2;
3146 
3147                 /* turn off SPDIF once;
3148                  *otherwise the IEC958 bits won't be updated
3149                  */
3150                 if (codec->spdif_status_reset &&
3151                 (spdif->ctls & AC_DIG1_ENABLE))
3152                         snd_hda_codec_write(codec,
3153                                 nvhdmi_con_nids_7x[i],
3154                                 0,
3155                                 AC_VERB_SET_DIGI_CONVERT_1,
3156                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3157                 /* set the stream id */
3158                 snd_hda_codec_write(codec,
3159                                 nvhdmi_con_nids_7x[i],
3160                                 0,
3161                                 AC_VERB_SET_CHANNEL_STREAMID,
3162                                 (stream_tag << 4) | channel_id);
3163                 /* set the stream format */
3164                 snd_hda_codec_write(codec,
3165                                 nvhdmi_con_nids_7x[i],
3166                                 0,
3167                                 AC_VERB_SET_STREAM_FORMAT,
3168                                 format);
3169                 /* turn on again (if needed) */
3170                 /* enable and set the channel status audio/data flag */
3171                 if (codec->spdif_status_reset &&
3172                 (spdif->ctls & AC_DIG1_ENABLE)) {
3173                         snd_hda_codec_write(codec,
3174                                         nvhdmi_con_nids_7x[i],
3175                                         0,
3176                                         AC_VERB_SET_DIGI_CONVERT_1,
3177                                         spdif->ctls & 0xff);
3178                         snd_hda_codec_write(codec,
3179                                         nvhdmi_con_nids_7x[i],
3180                                         0,
3181                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3182                 }
3183         }
3184 
3185         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3186 
3187         mutex_unlock(&codec->spdif_mutex);
3188         return 0;
3189 }
3190 
3191 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3192         .substreams = 1,
3193         .channels_min = 2,
3194         .channels_max = 8,
3195         .nid = nvhdmi_master_con_nid_7x,
3196         .rates = SUPPORTED_RATES,
3197         .maxbps = SUPPORTED_MAXBPS,
3198         .formats = SUPPORTED_FORMATS,
3199         .ops = {
3200                 .open = simple_playback_pcm_open,
3201                 .close = nvhdmi_8ch_7x_pcm_close,
3202                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3203         },
3204 };
3205 
3206 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3207 {
3208         struct hdmi_spec *spec;
3209         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3210                                     nvhdmi_master_pin_nid_7x);
3211         if (err < 0)
3212                 return err;
3213 
3214         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3215         /* override the PCM rates, etc, as the codec doesn't give full list */
3216         spec = codec->spec;
3217         spec->pcm_playback.rates = SUPPORTED_RATES;
3218         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3219         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3220         return 0;
3221 }
3222 
3223 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3224 {
3225         struct hdmi_spec *spec = codec->spec;
3226         int err = simple_playback_build_pcms(codec);
3227         if (!err) {
3228                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3229                 info->own_chmap = true;
3230         }
3231         return err;
3232 }
3233 
3234 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3235 {
3236         struct hdmi_spec *spec = codec->spec;
3237         struct hda_pcm *info;
3238         struct snd_pcm_chmap *chmap;
3239         int err;
3240 
3241         err = simple_playback_build_controls(codec);
3242         if (err < 0)
3243                 return err;
3244 
3245         /* add channel maps */
3246         info = get_pcm_rec(spec, 0);
3247         err = snd_pcm_add_chmap_ctls(info->pcm,
3248                                      SNDRV_PCM_STREAM_PLAYBACK,
3249                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3250         if (err < 0)
3251                 return err;
3252         switch (codec->preset->vendor_id) {
3253         case 0x10de0002:
3254         case 0x10de0003:
3255         case 0x10de0005:
3256         case 0x10de0006:
3257                 chmap->channel_mask = (1U << 2) | (1U << 8);
3258                 break;
3259         case 0x10de0007:
3260                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3261         }
3262         return 0;
3263 }
3264 
3265 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3266 {
3267         struct hdmi_spec *spec;
3268         int err = patch_nvhdmi_2ch(codec);
3269         if (err < 0)
3270                 return err;
3271         spec = codec->spec;
3272         spec->multiout.max_channels = 8;
3273         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3274         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3275         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3276         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3277 
3278         /* Initialize the audio infoframe channel mask and checksum to something
3279          * valid */
3280         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3281 
3282         return 0;
3283 }
3284 
3285 /*
3286  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3287  * - 0x10de0015
3288  * - 0x10de0040
3289  */
3290 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3291                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3292 {
3293         if (cap->ca_index == 0x00 && channels == 2)
3294                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3295 
3296         /* If the speaker allocation matches the channel count, it is OK. */
3297         if (cap->channels != channels)
3298                 return -1;
3299 
3300         /* all channels are remappable freely */
3301         return SNDRV_CTL_TLVT_CHMAP_VAR;
3302 }
3303 
3304 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3305                 int ca, int chs, unsigned char *map)
3306 {
3307         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3308                 return -EINVAL;
3309 
3310         return 0;
3311 }
3312 
3313 static int patch_nvhdmi(struct hda_codec *codec)
3314 {
3315         struct hdmi_spec *spec;
3316         int err;
3317 
3318         err = patch_generic_hdmi(codec);
3319         if (err)
3320                 return err;
3321 
3322         spec = codec->spec;
3323         spec->dyn_pin_out = true;
3324 
3325         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3326                 nvhdmi_chmap_cea_alloc_validate_get_type;
3327         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3328 
3329         codec->link_down_at_suspend = 1;
3330 
3331         return 0;
3332 }
3333 
3334 /*
3335  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3336  * accessed using vendor-defined verbs. These registers can be used for
3337  * interoperability between the HDA and HDMI drivers.
3338  */
3339 
3340 /* Audio Function Group node */
3341 #define NVIDIA_AFG_NID 0x01
3342 
3343 /*
3344  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3345  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3346  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3347  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3348  * additional bit (at position 30) to signal the validity of the format.
3349  *
3350  * | 31      | 30    | 29  16 | 15   0 |
3351  * +---------+-------+--------+--------+
3352  * | TRIGGER | VALID | UNUSED | FORMAT |
3353  * +-----------------------------------|
3354  *
3355  * Note that for the trigger bit to take effect it needs to change value
3356  * (i.e. it needs to be toggled).
3357  */
3358 #define NVIDIA_GET_SCRATCH0             0xfa6
3359 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3360 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3361 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3362 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3363 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3364 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3365 
3366 #define NVIDIA_GET_SCRATCH1             0xfab
3367 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3368 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3369 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3370 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3371 
3372 /*
3373  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3374  * the format is invalidated so that the HDMI codec can be disabled.
3375  */
3376 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3377 {
3378         unsigned int value;
3379 
3380         /* bits [31:30] contain the trigger and valid bits */
3381         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3382                                    NVIDIA_GET_SCRATCH0, 0);
3383         value = (value >> 24) & 0xff;
3384 
3385         /* bits [15:0] are used to store the HDA format */
3386         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3387                             NVIDIA_SET_SCRATCH0_BYTE0,
3388                             (format >> 0) & 0xff);
3389         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3390                             NVIDIA_SET_SCRATCH0_BYTE1,
3391                             (format >> 8) & 0xff);
3392 
3393         /* bits [16:24] are unused */
3394         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3395                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3396 
3397         /*
3398          * Bit 30 signals that the data is valid and hence that HDMI audio can
3399          * be enabled.
3400          */
3401         if (format == 0)
3402                 value &= ~NVIDIA_SCRATCH_VALID;
3403         else
3404                 value |= NVIDIA_SCRATCH_VALID;
3405 
3406         /*
3407          * Whenever the trigger bit is toggled, an interrupt is raised in the
3408          * HDMI codec. The HDMI driver will use that as trigger to update its
3409          * configuration.
3410          */
3411         value ^= NVIDIA_SCRATCH_TRIGGER;
3412 
3413         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3414                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3415 }
3416 
3417 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3418                                   struct hda_codec *codec,
3419                                   unsigned int stream_tag,
3420                                   unsigned int format,
3421                                   struct snd_pcm_substream *substream)
3422 {
3423         int err;
3424 
3425         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3426                                                 format, substream);
3427         if (err < 0)
3428                 return err;
3429 
3430         /* notify the HDMI codec of the format change */
3431         tegra_hdmi_set_format(codec, format);
3432 
3433         return 0;
3434 }
3435 
3436 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3437                                   struct hda_codec *codec,
3438                                   struct snd_pcm_substream *substream)
3439 {
3440         /* invalidate the format in the HDMI codec */
3441         tegra_hdmi_set_format(codec, 0);
3442 
3443         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3444 }
3445 
3446 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3447 {
3448         struct hdmi_spec *spec = codec->spec;
3449         unsigned int i;
3450 
3451         for (i = 0; i < spec->num_pins; i++) {
3452                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3453 
3454                 if (pcm->pcm_type == type)
3455                         return pcm;
3456         }
3457 
3458         return NULL;
3459 }
3460 
3461 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3462 {
3463         struct hda_pcm_stream *stream;
3464         struct hda_pcm *pcm;
3465         int err;
3466 
3467         err = generic_hdmi_build_pcms(codec);
3468         if (err < 0)
3469                 return err;
3470 
3471         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3472         if (!pcm)
3473                 return -ENODEV;
3474 
3475         /*
3476          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3477          * codec about format changes.
3478          */
3479         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3480         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3481         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3482 
3483         return 0;
3484 }
3485 
3486 static int patch_tegra_hdmi(struct hda_codec *codec)
3487 {
3488         int err;
3489 
3490         err = patch_generic_hdmi(codec);
3491         if (err)
3492                 return err;
3493 
3494         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3495 
3496         return 0;
3497 }
3498 
3499 /*
3500  * ATI/AMD-specific implementations
3501  */
3502 
3503 #define is_amdhdmi_rev3_or_later(codec) \
3504         ((codec)->core.vendor_id == 0x1002aa01 && \
3505          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3506 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3507 
3508 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3509 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3510 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3511 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3512 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3513 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3514 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3515 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3516 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3517 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3518 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3519 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3520 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3521 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3522 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3523 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3524 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3525 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3526 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3527 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3528 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3529 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3530 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3531 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3532 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3533 
3534 /* AMD specific HDA cvt verbs */
3535 #define ATI_VERB_SET_RAMP_RATE          0x770
3536 #define ATI_VERB_GET_RAMP_RATE          0xf70
3537 
3538 #define ATI_OUT_ENABLE 0x1
3539 
3540 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3541 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3542 
3543 #define ATI_HBR_CAPABLE 0x01
3544 #define ATI_HBR_ENABLE 0x10
3545 
3546 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3547                            unsigned char *buf, int *eld_size)
3548 {
3549         /* call hda_eld.c ATI/AMD-specific function */
3550         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3551                                     is_amdhdmi_rev3_or_later(codec));
3552 }
3553 
3554 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3555                                         int active_channels, int conn_type)
3556 {
3557         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3558 }
3559 
3560 static int atihdmi_paired_swap_fc_lfe(int pos)
3561 {
3562         /*
3563          * ATI/AMD have automatic FC/LFE swap built-in
3564          * when in pairwise mapping mode.
3565          */
3566 
3567         switch (pos) {
3568                 /* see channel_allocations[].speakers[] */
3569                 case 2: return 3;
3570                 case 3: return 2;
3571                 default: break;
3572         }
3573 
3574         return pos;
3575 }
3576 
3577 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3578                         int ca, int chs, unsigned char *map)
3579 {
3580         struct hdac_cea_channel_speaker_allocation *cap;
3581         int i, j;
3582 
3583         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3584 
3585         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3586         for (i = 0; i < chs; ++i) {
3587                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3588                 bool ok = false;
3589                 bool companion_ok = false;
3590 
3591                 if (!mask)
3592                         continue;
3593 
3594                 for (j = 0 + i % 2; j < 8; j += 2) {
3595                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3596                         if (cap->speakers[chan_idx] == mask) {
3597                                 /* channel is in a supported position */
3598                                 ok = true;
3599 
3600                                 if (i % 2 == 0 && i + 1 < chs) {
3601                                         /* even channel, check the odd companion */
3602                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3603                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3604                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3605 
3606                                         if (comp_mask_req == comp_mask_act)
3607                                                 companion_ok = true;
3608                                         else
3609                                                 return -EINVAL;
3610                                 }
3611                                 break;
3612                         }
3613                 }
3614 
3615                 if (!ok)
3616                         return -EINVAL;
3617 
3618                 if (companion_ok)
3619                         i++; /* companion channel already checked */
3620         }
3621 
3622         return 0;
3623 }
3624 
3625 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3626                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3627 {
3628         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3629         int verb;
3630         int ati_channel_setup = 0;
3631 
3632         if (hdmi_slot > 7)
3633                 return -EINVAL;
3634 
3635         if (!has_amd_full_remap_support(codec)) {
3636                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3637 
3638                 /* In case this is an odd slot but without stream channel, do not
3639                  * disable the slot since the corresponding even slot could have a
3640                  * channel. In case neither have a channel, the slot pair will be
3641                  * disabled when this function is called for the even slot. */
3642                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3643                         return 0;
3644 
3645                 hdmi_slot -= hdmi_slot % 2;
3646 
3647                 if (stream_channel != 0xf)
3648                         stream_channel -= stream_channel % 2;
3649         }
3650 
3651         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3652 
3653         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3654 
3655         if (stream_channel != 0xf)
3656                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3657 
3658         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3659 }
3660 
3661 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3662                                 hda_nid_t pin_nid, int asp_slot)
3663 {
3664         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3665         bool was_odd = false;
3666         int ati_asp_slot = asp_slot;
3667         int verb;
3668         int ati_channel_setup;
3669 
3670         if (asp_slot > 7)
3671                 return -EINVAL;
3672 
3673         if (!has_amd_full_remap_support(codec)) {
3674                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3675                 if (ati_asp_slot % 2 != 0) {
3676                         ati_asp_slot -= 1;
3677                         was_odd = true;
3678                 }
3679         }
3680 
3681         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3682 
3683         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3684 
3685         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3686                 return 0xf;
3687 
3688         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3689 }
3690 
3691 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3692                 struct hdac_chmap *chmap,
3693                 struct hdac_cea_channel_speaker_allocation *cap,
3694                 int channels)
3695 {
3696         int c;
3697 
3698         /*
3699          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3700          * we need to take that into account (a single channel may take 2
3701          * channel slots if we need to carry a silent channel next to it).
3702          * On Rev3+ AMD codecs this function is not used.
3703          */
3704         int chanpairs = 0;
3705 
3706         /* We only produce even-numbered channel count TLVs */
3707         if ((channels % 2) != 0)
3708                 return -1;
3709 
3710         for (c = 0; c < 7; c += 2) {
3711                 if (cap->speakers[c] || cap->speakers[c+1])
3712                         chanpairs++;
3713         }
3714 
3715         if (chanpairs * 2 != channels)
3716                 return -1;
3717 
3718         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3719 }
3720 
3721 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
3722                 struct hdac_cea_channel_speaker_allocation *cap,
3723                 unsigned int *chmap, int channels)
3724 {
3725         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3726         int count = 0;
3727         int c;
3728 
3729         for (c = 7; c >= 0; c--) {
3730                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3731                 int spk = cap->speakers[chan];
3732                 if (!spk) {
3733                         /* add N/A channel if the companion channel is occupied */
3734                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3735                                 chmap[count++] = SNDRV_CHMAP_NA;
3736 
3737                         continue;
3738                 }
3739 
3740                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
3741         }
3742 
3743         WARN_ON(count != channels);
3744 }
3745 
3746 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3747                                  bool hbr)
3748 {
3749         int hbr_ctl, hbr_ctl_new;
3750 
3751         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3752         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3753                 if (hbr)
3754                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3755                 else
3756                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3757 
3758                 codec_dbg(codec,
3759                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3760                                 pin_nid,
3761                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3762                                 hbr_ctl_new);
3763 
3764                 if (hbr_ctl != hbr_ctl_new)
3765                         snd_hda_codec_write(codec, pin_nid, 0,
3766                                                 ATI_VERB_SET_HBR_CONTROL,
3767                                                 hbr_ctl_new);
3768 
3769         } else if (hbr)
3770                 return -EINVAL;
3771 
3772         return 0;
3773 }
3774 
3775 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3776                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3777 {
3778 
3779         if (is_amdhdmi_rev3_or_later(codec)) {
3780                 int ramp_rate = 180; /* default as per AMD spec */
3781                 /* disable ramp-up/down for non-pcm as per AMD spec */
3782                 if (format & AC_FMT_TYPE_NON_PCM)
3783                         ramp_rate = 0;
3784 
3785                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3786         }
3787 
3788         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3789 }
3790 
3791 
3792 static int atihdmi_init(struct hda_codec *codec)
3793 {
3794         struct hdmi_spec *spec = codec->spec;
3795         int pin_idx, err;
3796 
3797         err = generic_hdmi_init(codec);
3798 
3799         if (err)
3800                 return err;
3801 
3802         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3803                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3804 
3805                 /* make sure downmix information in infoframe is zero */
3806                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3807 
3808                 /* enable channel-wise remap mode if supported */
3809                 if (has_amd_full_remap_support(codec))
3810                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3811                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3812                                             ATI_MULTICHANNEL_MODE_SINGLE);
3813         }
3814 
3815         return 0;
3816 }
3817 
3818 static int patch_atihdmi(struct hda_codec *codec)
3819 {
3820         struct hdmi_spec *spec;
3821         struct hdmi_spec_per_cvt *per_cvt;
3822         int err, cvt_idx;
3823 
3824         err = patch_generic_hdmi(codec);
3825 
3826         if (err)
3827                 return err;
3828 
3829         codec->patch_ops.init = atihdmi_init;
3830 
3831         spec = codec->spec;
3832 
3833         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3834         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3835         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3836         spec->ops.setup_stream = atihdmi_setup_stream;
3837 
3838         spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3839         spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3840 
3841         if (!has_amd_full_remap_support(codec)) {
3842                 /* override to ATI/AMD-specific versions with pairwise mapping */
3843                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3844                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3845                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
3846                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
3847                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
3848         }
3849 
3850         /* ATI/AMD converters do not advertise all of their capabilities */
3851         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3852                 per_cvt = get_cvt(spec, cvt_idx);
3853                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3854                 per_cvt->rates |= SUPPORTED_RATES;
3855                 per_cvt->formats |= SUPPORTED_FORMATS;
3856                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3857         }
3858 
3859         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
3860 
3861         /* AMD GPUs have neither EPSS nor CLKSTOP bits, hence preventing
3862          * the link-down as is.  Tell the core to allow it.
3863          */
3864         codec->link_down_at_suspend = 1;
3865 
3866         return 0;
3867 }
3868 
3869 /* VIA HDMI Implementation */
3870 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3871 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3872 
3873 static int patch_via_hdmi(struct hda_codec *codec)
3874 {
3875         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3876 }
3877 
3878 /*
3879  * patch entries
3880  */
3881 static const struct hda_device_id snd_hda_id_hdmi[] = {
3882 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
3883 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
3884 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
3885 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
3886 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
3887 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
3888 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
3889 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI",       patch_nvhdmi_2ch),
3890 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3891 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3892 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI",      patch_nvhdmi_8ch_7x),
3893 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3894 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3895 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
3896 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP",   patch_nvhdmi),
3897 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP",   patch_nvhdmi),
3898 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
3899 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
3900 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
3901 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
3902 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
3903 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
3904 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
3905 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
3906 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
3907 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
3908 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
3909 /* 17 is known to be absent */
3910 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
3911 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
3912 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
3913 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
3914 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
3915 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
3916 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
3917 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
3918 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
3919 HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),
3920 HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
3921 HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
3922 HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
3923 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
3924 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
3925 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
3926 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
3927 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
3928 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP",   patch_nvhdmi),
3929 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP",   patch_nvhdmi),
3930 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
3931 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP",   patch_nvhdmi),
3932 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
3933 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP",   patch_nvhdmi),
3934 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP",   patch_nvhdmi),
3935 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
3936 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
3937 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
3938 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
3939 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP",   patch_nvhdmi),
3940 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP",   patch_nvhdmi),
3941 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP",   patch_nvhdmi),
3942 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP",   patch_nvhdmi),
3943 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP",   patch_nvhdmi),
3944 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
3945 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP",   patch_nvhdmi),
3946 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP",   patch_nvhdmi),
3947 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP",   patch_nvhdmi),
3948 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
3949 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
3950 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP",   patch_nvhdmi),
3951 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP",   patch_nvhdmi),
3952 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP",   patch_nvhdmi),
3953 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP",   patch_nvhdmi),
3954 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP",   patch_nvhdmi),
3955 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP",   patch_nvhdmi),
3956 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP",   patch_nvhdmi),
3957 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP",   patch_nvhdmi),
3958 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP",   patch_nvhdmi),
3959 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP",   patch_nvhdmi),
3960 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
3961 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI",    patch_nvhdmi_2ch),
3962 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
3963 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
3964 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
3965 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
3966 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
3967 HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI",  patch_i915_glk_hdmi),
3968 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
3969 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
3970 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
3971 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
3972 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
3973 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
3974 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_i915_hsw_hdmi),
3975 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_i915_hsw_hdmi),
3976 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_i915_hsw_hdmi),
3977 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_i915_hsw_hdmi),
3978 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_i915_hsw_hdmi),
3979 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI",  patch_i915_glk_hdmi),
3980 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI",  patch_i915_glk_hdmi),
3981 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI",     patch_i915_icl_hdmi),
3982 HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI",   patch_i915_tgl_hdmi),
3983 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
3984 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
3985 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_i915_byt_hdmi),
3986 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
3987 /* special ID for generic HDMI */
3988 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
3989 {} /* terminator */
3990 };
3991 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
3992 
3993 MODULE_LICENSE("GPL");
3994 MODULE_DESCRIPTION("HDMI HD-audio codec");
3995 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3996 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3997 MODULE_ALIAS("snd-hda-codec-atihdmi");
3998 
3999 static struct hda_codec_driver hdmi_driver = {
4000         .id = snd_hda_id_hdmi,
4001 };
4002 
4003 module_hda_codec_driver(hdmi_driver);
4004 

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