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TOMOYO Linux Cross Reference
Linux/sound/pci/oxygen/oxygen_pcm.c

Version: ~ [ linux-5.15-rc7 ] ~ [ linux-5.14.14 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.75 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.155 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.213 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.252 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.287 ] ~ [ linux-4.8.17 ] ~ [ linux-4.7.10 ] ~ [ linux-4.6.7 ] ~ [ linux-4.5.7 ] ~ [ linux-4.4.289 ] ~ [ linux-4.3.6 ] ~ [ linux-4.2.8 ] ~ [ linux-4.1.52 ] ~ [ linux-4.0.9 ] ~ [ linux-3.18.140 ] ~ [ linux-3.16.85 ] ~ [ linux-3.14.79 ] ~ [ linux-3.12.74 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.5 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 /*
  2  * C-Media CMI8788 driver - PCM code
  3  *
  4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5  *
  6  *
  7  *  This driver is free software; you can redistribute it and/or modify
  8  *  it under the terms of the GNU General Public License, version 2.
  9  *
 10  *  This driver is distributed in the hope that it will be useful,
 11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 13  *  GNU General Public License for more details.
 14  *
 15  *  You should have received a copy of the GNU General Public License
 16  *  along with this driver; if not, write to the Free Software
 17  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 18  */
 19 
 20 #include <linux/pci.h>
 21 #include <sound/control.h>
 22 #include <sound/core.h>
 23 #include <sound/pcm.h>
 24 #include <sound/pcm_params.h>
 25 #include "oxygen.h"
 26 
 27 /* most DMA channels have a 16-bit counter for 32-bit words */
 28 #define BUFFER_BYTES_MAX                ((1 << 16) * 4)
 29 /* the multichannel DMA channel has a 24-bit counter */
 30 #define BUFFER_BYTES_MAX_MULTICH        ((1 << 24) * 4)
 31 
 32 #define FIFO_BYTES                      256
 33 #define FIFO_BYTES_MULTICH              1024
 34 
 35 #define PERIOD_BYTES_MIN                64
 36 
 37 #define DEFAULT_BUFFER_BYTES            (BUFFER_BYTES_MAX / 2)
 38 #define DEFAULT_BUFFER_BYTES_MULTICH    (1024 * 1024)
 39 
 40 static const struct snd_pcm_hardware oxygen_stereo_hardware = {
 41         .info = SNDRV_PCM_INFO_MMAP |
 42                 SNDRV_PCM_INFO_MMAP_VALID |
 43                 SNDRV_PCM_INFO_INTERLEAVED |
 44                 SNDRV_PCM_INFO_PAUSE |
 45                 SNDRV_PCM_INFO_SYNC_START |
 46                 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
 47         .formats = SNDRV_PCM_FMTBIT_S16_LE |
 48                    SNDRV_PCM_FMTBIT_S32_LE,
 49         .rates = SNDRV_PCM_RATE_32000 |
 50                  SNDRV_PCM_RATE_44100 |
 51                  SNDRV_PCM_RATE_48000 |
 52                  SNDRV_PCM_RATE_64000 |
 53                  SNDRV_PCM_RATE_88200 |
 54                  SNDRV_PCM_RATE_96000 |
 55                  SNDRV_PCM_RATE_176400 |
 56                  SNDRV_PCM_RATE_192000,
 57         .rate_min = 32000,
 58         .rate_max = 192000,
 59         .channels_min = 2,
 60         .channels_max = 2,
 61         .buffer_bytes_max = BUFFER_BYTES_MAX,
 62         .period_bytes_min = PERIOD_BYTES_MIN,
 63         .period_bytes_max = BUFFER_BYTES_MAX,
 64         .periods_min = 1,
 65         .periods_max = BUFFER_BYTES_MAX / PERIOD_BYTES_MIN,
 66         .fifo_size = FIFO_BYTES,
 67 };
 68 static const struct snd_pcm_hardware oxygen_multichannel_hardware = {
 69         .info = SNDRV_PCM_INFO_MMAP |
 70                 SNDRV_PCM_INFO_MMAP_VALID |
 71                 SNDRV_PCM_INFO_INTERLEAVED |
 72                 SNDRV_PCM_INFO_PAUSE |
 73                 SNDRV_PCM_INFO_SYNC_START |
 74                 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
 75         .formats = SNDRV_PCM_FMTBIT_S16_LE |
 76                    SNDRV_PCM_FMTBIT_S32_LE,
 77         .rates = SNDRV_PCM_RATE_32000 |
 78                  SNDRV_PCM_RATE_44100 |
 79                  SNDRV_PCM_RATE_48000 |
 80                  SNDRV_PCM_RATE_64000 |
 81                  SNDRV_PCM_RATE_88200 |
 82                  SNDRV_PCM_RATE_96000 |
 83                  SNDRV_PCM_RATE_176400 |
 84                  SNDRV_PCM_RATE_192000,
 85         .rate_min = 32000,
 86         .rate_max = 192000,
 87         .channels_min = 2,
 88         .channels_max = 8,
 89         .buffer_bytes_max = BUFFER_BYTES_MAX_MULTICH,
 90         .period_bytes_min = PERIOD_BYTES_MIN,
 91         .period_bytes_max = BUFFER_BYTES_MAX_MULTICH,
 92         .periods_min = 1,
 93         .periods_max = BUFFER_BYTES_MAX_MULTICH / PERIOD_BYTES_MIN,
 94         .fifo_size = FIFO_BYTES_MULTICH,
 95 };
 96 static const struct snd_pcm_hardware oxygen_ac97_hardware = {
 97         .info = SNDRV_PCM_INFO_MMAP |
 98                 SNDRV_PCM_INFO_MMAP_VALID |
 99                 SNDRV_PCM_INFO_INTERLEAVED |
100                 SNDRV_PCM_INFO_PAUSE |
101                 SNDRV_PCM_INFO_SYNC_START |
102                 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
103         .formats = SNDRV_PCM_FMTBIT_S16_LE,
104         .rates = SNDRV_PCM_RATE_48000,
105         .rate_min = 48000,
106         .rate_max = 48000,
107         .channels_min = 2,
108         .channels_max = 2,
109         .buffer_bytes_max = BUFFER_BYTES_MAX,
110         .period_bytes_min = PERIOD_BYTES_MIN,
111         .period_bytes_max = BUFFER_BYTES_MAX,
112         .periods_min = 1,
113         .periods_max = BUFFER_BYTES_MAX / PERIOD_BYTES_MIN,
114         .fifo_size = FIFO_BYTES,
115 };
116 
117 static const struct snd_pcm_hardware *const oxygen_hardware[PCM_COUNT] = {
118         [PCM_A] = &oxygen_stereo_hardware,
119         [PCM_B] = &oxygen_stereo_hardware,
120         [PCM_C] = &oxygen_stereo_hardware,
121         [PCM_SPDIF] = &oxygen_stereo_hardware,
122         [PCM_MULTICH] = &oxygen_multichannel_hardware,
123         [PCM_AC97] = &oxygen_ac97_hardware,
124 };
125 
126 static inline unsigned int
127 oxygen_substream_channel(struct snd_pcm_substream *substream)
128 {
129         return (unsigned int)(uintptr_t)substream->runtime->private_data;
130 }
131 
132 static int oxygen_open(struct snd_pcm_substream *substream,
133                        unsigned int channel)
134 {
135         struct oxygen *chip = snd_pcm_substream_chip(substream);
136         struct snd_pcm_runtime *runtime = substream->runtime;
137         int err;
138 
139         runtime->private_data = (void *)(uintptr_t)channel;
140         if (channel == PCM_B && chip->has_ac97_1 &&
141             (chip->model.device_config & CAPTURE_2_FROM_AC97_1))
142                 runtime->hw = oxygen_ac97_hardware;
143         else
144                 runtime->hw = *oxygen_hardware[channel];
145         switch (channel) {
146         case PCM_C:
147                 runtime->hw.rates &= ~(SNDRV_PCM_RATE_32000 |
148                                        SNDRV_PCM_RATE_64000);
149                 runtime->hw.rate_min = 44100;
150                 /* fall through */
151         case PCM_A:
152         case PCM_B:
153                 runtime->hw.fifo_size = 0;
154                 break;
155         case PCM_MULTICH:
156                 runtime->hw.channels_max = chip->model.dac_channels_pcm;
157                 break;
158         }
159         if (chip->model.pcm_hardware_filter)
160                 chip->model.pcm_hardware_filter(channel, &runtime->hw);
161         err = snd_pcm_hw_constraint_step(runtime, 0,
162                                          SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32);
163         if (err < 0)
164                 return err;
165         err = snd_pcm_hw_constraint_step(runtime, 0,
166                                          SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32);
167         if (err < 0)
168                 return err;
169         if (runtime->hw.formats & SNDRV_PCM_FMTBIT_S32_LE) {
170                 err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
171                 if (err < 0)
172                         return err;
173         }
174         if (runtime->hw.channels_max > 2) {
175                 err = snd_pcm_hw_constraint_step(runtime, 0,
176                                                  SNDRV_PCM_HW_PARAM_CHANNELS,
177                                                  2);
178                 if (err < 0)
179                         return err;
180         }
181         snd_pcm_set_sync(substream);
182         chip->streams[channel] = substream;
183 
184         mutex_lock(&chip->mutex);
185         chip->pcm_active |= 1 << channel;
186         if (channel == PCM_SPDIF) {
187                 chip->spdif_pcm_bits = chip->spdif_bits;
188                 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access &=
189                         ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
190                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
191                                SNDRV_CTL_EVENT_MASK_INFO,
192                                &chip->controls[CONTROL_SPDIF_PCM]->id);
193         }
194         mutex_unlock(&chip->mutex);
195 
196         return 0;
197 }
198 
199 static int oxygen_rec_a_open(struct snd_pcm_substream *substream)
200 {
201         return oxygen_open(substream, PCM_A);
202 }
203 
204 static int oxygen_rec_b_open(struct snd_pcm_substream *substream)
205 {
206         return oxygen_open(substream, PCM_B);
207 }
208 
209 static int oxygen_rec_c_open(struct snd_pcm_substream *substream)
210 {
211         return oxygen_open(substream, PCM_C);
212 }
213 
214 static int oxygen_spdif_open(struct snd_pcm_substream *substream)
215 {
216         return oxygen_open(substream, PCM_SPDIF);
217 }
218 
219 static int oxygen_multich_open(struct snd_pcm_substream *substream)
220 {
221         return oxygen_open(substream, PCM_MULTICH);
222 }
223 
224 static int oxygen_ac97_open(struct snd_pcm_substream *substream)
225 {
226         return oxygen_open(substream, PCM_AC97);
227 }
228 
229 static int oxygen_close(struct snd_pcm_substream *substream)
230 {
231         struct oxygen *chip = snd_pcm_substream_chip(substream);
232         unsigned int channel = oxygen_substream_channel(substream);
233 
234         mutex_lock(&chip->mutex);
235         chip->pcm_active &= ~(1 << channel);
236         if (channel == PCM_SPDIF) {
237                 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access |=
238                         SNDRV_CTL_ELEM_ACCESS_INACTIVE;
239                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
240                                SNDRV_CTL_EVENT_MASK_INFO,
241                                &chip->controls[CONTROL_SPDIF_PCM]->id);
242         }
243         if (channel == PCM_SPDIF || channel == PCM_MULTICH)
244                 oxygen_update_spdif_source(chip);
245         mutex_unlock(&chip->mutex);
246 
247         chip->streams[channel] = NULL;
248         return 0;
249 }
250 
251 static unsigned int oxygen_format(struct snd_pcm_hw_params *hw_params)
252 {
253         if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
254                 return OXYGEN_FORMAT_24;
255         else
256                 return OXYGEN_FORMAT_16;
257 }
258 
259 static unsigned int oxygen_rate(struct snd_pcm_hw_params *hw_params)
260 {
261         switch (params_rate(hw_params)) {
262         case 32000:
263                 return OXYGEN_RATE_32000;
264         case 44100:
265                 return OXYGEN_RATE_44100;
266         default: /* 48000 */
267                 return OXYGEN_RATE_48000;
268         case 64000:
269                 return OXYGEN_RATE_64000;
270         case 88200:
271                 return OXYGEN_RATE_88200;
272         case 96000:
273                 return OXYGEN_RATE_96000;
274         case 176400:
275                 return OXYGEN_RATE_176400;
276         case 192000:
277                 return OXYGEN_RATE_192000;
278         }
279 }
280 
281 static unsigned int oxygen_i2s_bits(struct snd_pcm_hw_params *hw_params)
282 {
283         if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
284                 return OXYGEN_I2S_BITS_24;
285         else
286                 return OXYGEN_I2S_BITS_16;
287 }
288 
289 static unsigned int oxygen_play_channels(struct snd_pcm_hw_params *hw_params)
290 {
291         switch (params_channels(hw_params)) {
292         default: /* 2 */
293                 return OXYGEN_PLAY_CHANNELS_2;
294         case 4:
295                 return OXYGEN_PLAY_CHANNELS_4;
296         case 6:
297                 return OXYGEN_PLAY_CHANNELS_6;
298         case 8:
299                 return OXYGEN_PLAY_CHANNELS_8;
300         }
301 }
302 
303 static const unsigned int channel_base_registers[PCM_COUNT] = {
304         [PCM_A] = OXYGEN_DMA_A_ADDRESS,
305         [PCM_B] = OXYGEN_DMA_B_ADDRESS,
306         [PCM_C] = OXYGEN_DMA_C_ADDRESS,
307         [PCM_SPDIF] = OXYGEN_DMA_SPDIF_ADDRESS,
308         [PCM_MULTICH] = OXYGEN_DMA_MULTICH_ADDRESS,
309         [PCM_AC97] = OXYGEN_DMA_AC97_ADDRESS,
310 };
311 
312 static int oxygen_hw_params(struct snd_pcm_substream *substream,
313                             struct snd_pcm_hw_params *hw_params)
314 {
315         struct oxygen *chip = snd_pcm_substream_chip(substream);
316         unsigned int channel = oxygen_substream_channel(substream);
317         int err;
318 
319         err = snd_pcm_lib_malloc_pages(substream,
320                                        params_buffer_bytes(hw_params));
321         if (err < 0)
322                 return err;
323 
324         oxygen_write32(chip, channel_base_registers[channel],
325                        (u32)substream->runtime->dma_addr);
326         if (channel == PCM_MULTICH) {
327                 oxygen_write32(chip, OXYGEN_DMA_MULTICH_COUNT,
328                                params_buffer_bytes(hw_params) / 4 - 1);
329                 oxygen_write32(chip, OXYGEN_DMA_MULTICH_TCOUNT,
330                                params_period_bytes(hw_params) / 4 - 1);
331         } else {
332                 oxygen_write16(chip, channel_base_registers[channel] + 4,
333                                params_buffer_bytes(hw_params) / 4 - 1);
334                 oxygen_write16(chip, channel_base_registers[channel] + 6,
335                                params_period_bytes(hw_params) / 4 - 1);
336         }
337         return 0;
338 }
339 
340 static u16 get_mclk(struct oxygen *chip, unsigned int channel,
341                     struct snd_pcm_hw_params *params)
342 {
343         unsigned int mclks, shift;
344 
345         if (channel == PCM_MULTICH)
346                 mclks = chip->model.dac_mclks;
347         else
348                 mclks = chip->model.adc_mclks;
349 
350         if (params_rate(params) <= 48000)
351                 shift = 0;
352         else if (params_rate(params) <= 96000)
353                 shift = 2;
354         else
355                 shift = 4;
356 
357         return OXYGEN_I2S_MCLK(mclks >> shift);
358 }
359 
360 static int oxygen_rec_a_hw_params(struct snd_pcm_substream *substream,
361                                   struct snd_pcm_hw_params *hw_params)
362 {
363         struct oxygen *chip = snd_pcm_substream_chip(substream);
364         int err;
365 
366         err = oxygen_hw_params(substream, hw_params);
367         if (err < 0)
368                 return err;
369 
370         spin_lock_irq(&chip->reg_lock);
371         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
372                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_A_SHIFT,
373                              OXYGEN_REC_FORMAT_A_MASK);
374         oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT,
375                               oxygen_rate(hw_params) |
376                               chip->model.adc_i2s_format |
377                               get_mclk(chip, PCM_A, hw_params) |
378                               oxygen_i2s_bits(hw_params),
379                               OXYGEN_I2S_RATE_MASK |
380                               OXYGEN_I2S_FORMAT_MASK |
381                               OXYGEN_I2S_MCLK_MASK |
382                               OXYGEN_I2S_BITS_MASK);
383         spin_unlock_irq(&chip->reg_lock);
384 
385         mutex_lock(&chip->mutex);
386         chip->model.set_adc_params(chip, hw_params);
387         mutex_unlock(&chip->mutex);
388         return 0;
389 }
390 
391 static int oxygen_rec_b_hw_params(struct snd_pcm_substream *substream,
392                                   struct snd_pcm_hw_params *hw_params)
393 {
394         struct oxygen *chip = snd_pcm_substream_chip(substream);
395         int is_ac97;
396         int err;
397 
398         err = oxygen_hw_params(substream, hw_params);
399         if (err < 0)
400                 return err;
401 
402         is_ac97 = chip->has_ac97_1 &&
403                 (chip->model.device_config & CAPTURE_2_FROM_AC97_1);
404 
405         spin_lock_irq(&chip->reg_lock);
406         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
407                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_B_SHIFT,
408                              OXYGEN_REC_FORMAT_B_MASK);
409         if (!is_ac97)
410                 oxygen_write16_masked(chip, OXYGEN_I2S_B_FORMAT,
411                                       oxygen_rate(hw_params) |
412                                       chip->model.adc_i2s_format |
413                                       get_mclk(chip, PCM_B, hw_params) |
414                                       oxygen_i2s_bits(hw_params),
415                                       OXYGEN_I2S_RATE_MASK |
416                                       OXYGEN_I2S_FORMAT_MASK |
417                                       OXYGEN_I2S_MCLK_MASK |
418                                       OXYGEN_I2S_BITS_MASK);
419         spin_unlock_irq(&chip->reg_lock);
420 
421         if (!is_ac97) {
422                 mutex_lock(&chip->mutex);
423                 chip->model.set_adc_params(chip, hw_params);
424                 mutex_unlock(&chip->mutex);
425         }
426         return 0;
427 }
428 
429 static int oxygen_rec_c_hw_params(struct snd_pcm_substream *substream,
430                                   struct snd_pcm_hw_params *hw_params)
431 {
432         struct oxygen *chip = snd_pcm_substream_chip(substream);
433         int err;
434 
435         err = oxygen_hw_params(substream, hw_params);
436         if (err < 0)
437                 return err;
438 
439         spin_lock_irq(&chip->reg_lock);
440         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
441                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_C_SHIFT,
442                              OXYGEN_REC_FORMAT_C_MASK);
443         spin_unlock_irq(&chip->reg_lock);
444         return 0;
445 }
446 
447 static int oxygen_spdif_hw_params(struct snd_pcm_substream *substream,
448                                   struct snd_pcm_hw_params *hw_params)
449 {
450         struct oxygen *chip = snd_pcm_substream_chip(substream);
451         int err;
452 
453         err = oxygen_hw_params(substream, hw_params);
454         if (err < 0)
455                 return err;
456 
457         mutex_lock(&chip->mutex);
458         spin_lock_irq(&chip->reg_lock);
459         oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
460                             OXYGEN_SPDIF_OUT_ENABLE);
461         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
462                              oxygen_format(hw_params) << OXYGEN_SPDIF_FORMAT_SHIFT,
463                              OXYGEN_SPDIF_FORMAT_MASK);
464         oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
465                               oxygen_rate(hw_params) << OXYGEN_SPDIF_OUT_RATE_SHIFT,
466                               OXYGEN_SPDIF_OUT_RATE_MASK);
467         oxygen_update_spdif_source(chip);
468         spin_unlock_irq(&chip->reg_lock);
469         mutex_unlock(&chip->mutex);
470         return 0;
471 }
472 
473 static int oxygen_multich_hw_params(struct snd_pcm_substream *substream,
474                                     struct snd_pcm_hw_params *hw_params)
475 {
476         struct oxygen *chip = snd_pcm_substream_chip(substream);
477         int err;
478 
479         err = oxygen_hw_params(substream, hw_params);
480         if (err < 0)
481                 return err;
482 
483         mutex_lock(&chip->mutex);
484         spin_lock_irq(&chip->reg_lock);
485         oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS,
486                              oxygen_play_channels(hw_params),
487                              OXYGEN_PLAY_CHANNELS_MASK);
488         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
489                              oxygen_format(hw_params) << OXYGEN_MULTICH_FORMAT_SHIFT,
490                              OXYGEN_MULTICH_FORMAT_MASK);
491         oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT,
492                               oxygen_rate(hw_params) |
493                               chip->model.dac_i2s_format |
494                               get_mclk(chip, PCM_MULTICH, hw_params) |
495                               oxygen_i2s_bits(hw_params),
496                               OXYGEN_I2S_RATE_MASK |
497                               OXYGEN_I2S_FORMAT_MASK |
498                               OXYGEN_I2S_MCLK_MASK |
499                               OXYGEN_I2S_BITS_MASK);
500         oxygen_update_spdif_source(chip);
501         spin_unlock_irq(&chip->reg_lock);
502 
503         chip->model.set_dac_params(chip, hw_params);
504         oxygen_update_dac_routing(chip);
505         mutex_unlock(&chip->mutex);
506         return 0;
507 }
508 
509 static int oxygen_hw_free(struct snd_pcm_substream *substream)
510 {
511         struct oxygen *chip = snd_pcm_substream_chip(substream);
512         unsigned int channel = oxygen_substream_channel(substream);
513         unsigned int channel_mask = 1 << channel;
514 
515         spin_lock_irq(&chip->reg_lock);
516         chip->interrupt_mask &= ~channel_mask;
517         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
518 
519         oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
520         oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
521         spin_unlock_irq(&chip->reg_lock);
522 
523         return snd_pcm_lib_free_pages(substream);
524 }
525 
526 static int oxygen_spdif_hw_free(struct snd_pcm_substream *substream)
527 {
528         struct oxygen *chip = snd_pcm_substream_chip(substream);
529 
530         spin_lock_irq(&chip->reg_lock);
531         oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
532                             OXYGEN_SPDIF_OUT_ENABLE);
533         spin_unlock_irq(&chip->reg_lock);
534         return oxygen_hw_free(substream);
535 }
536 
537 static int oxygen_prepare(struct snd_pcm_substream *substream)
538 {
539         struct oxygen *chip = snd_pcm_substream_chip(substream);
540         unsigned int channel = oxygen_substream_channel(substream);
541         unsigned int channel_mask = 1 << channel;
542 
543         spin_lock_irq(&chip->reg_lock);
544         oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
545         oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
546 
547         if (substream->runtime->no_period_wakeup)
548                 chip->interrupt_mask &= ~channel_mask;
549         else
550                 chip->interrupt_mask |= channel_mask;
551         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
552         spin_unlock_irq(&chip->reg_lock);
553         return 0;
554 }
555 
556 static int oxygen_trigger(struct snd_pcm_substream *substream, int cmd)
557 {
558         struct oxygen *chip = snd_pcm_substream_chip(substream);
559         struct snd_pcm_substream *s;
560         unsigned int mask = 0;
561         int pausing;
562 
563         switch (cmd) {
564         case SNDRV_PCM_TRIGGER_STOP:
565         case SNDRV_PCM_TRIGGER_START:
566         case SNDRV_PCM_TRIGGER_SUSPEND:
567                 pausing = 0;
568                 break;
569         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
570         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
571                 pausing = 1;
572                 break;
573         default:
574                 return -EINVAL;
575         }
576 
577         snd_pcm_group_for_each_entry(s, substream) {
578                 if (snd_pcm_substream_chip(s) == chip) {
579                         mask |= 1 << oxygen_substream_channel(s);
580                         snd_pcm_trigger_done(s, substream);
581                 }
582         }
583 
584         spin_lock(&chip->reg_lock);
585         if (!pausing) {
586                 if (cmd == SNDRV_PCM_TRIGGER_START)
587                         chip->pcm_running |= mask;
588                 else
589                         chip->pcm_running &= ~mask;
590                 oxygen_write8(chip, OXYGEN_DMA_STATUS, chip->pcm_running);
591         } else {
592                 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
593                         oxygen_set_bits8(chip, OXYGEN_DMA_PAUSE, mask);
594                 else
595                         oxygen_clear_bits8(chip, OXYGEN_DMA_PAUSE, mask);
596         }
597         spin_unlock(&chip->reg_lock);
598         return 0;
599 }
600 
601 static snd_pcm_uframes_t oxygen_pointer(struct snd_pcm_substream *substream)
602 {
603         struct oxygen *chip = snd_pcm_substream_chip(substream);
604         struct snd_pcm_runtime *runtime = substream->runtime;
605         unsigned int channel = oxygen_substream_channel(substream);
606         u32 curr_addr;
607 
608         /* no spinlock, this read should be atomic */
609         curr_addr = oxygen_read32(chip, channel_base_registers[channel]);
610         return bytes_to_frames(runtime, curr_addr - (u32)runtime->dma_addr);
611 }
612 
613 static struct snd_pcm_ops oxygen_rec_a_ops = {
614         .open      = oxygen_rec_a_open,
615         .close     = oxygen_close,
616         .ioctl     = snd_pcm_lib_ioctl,
617         .hw_params = oxygen_rec_a_hw_params,
618         .hw_free   = oxygen_hw_free,
619         .prepare   = oxygen_prepare,
620         .trigger   = oxygen_trigger,
621         .pointer   = oxygen_pointer,
622 };
623 
624 static struct snd_pcm_ops oxygen_rec_b_ops = {
625         .open      = oxygen_rec_b_open,
626         .close     = oxygen_close,
627         .ioctl     = snd_pcm_lib_ioctl,
628         .hw_params = oxygen_rec_b_hw_params,
629         .hw_free   = oxygen_hw_free,
630         .prepare   = oxygen_prepare,
631         .trigger   = oxygen_trigger,
632         .pointer   = oxygen_pointer,
633 };
634 
635 static struct snd_pcm_ops oxygen_rec_c_ops = {
636         .open      = oxygen_rec_c_open,
637         .close     = oxygen_close,
638         .ioctl     = snd_pcm_lib_ioctl,
639         .hw_params = oxygen_rec_c_hw_params,
640         .hw_free   = oxygen_hw_free,
641         .prepare   = oxygen_prepare,
642         .trigger   = oxygen_trigger,
643         .pointer   = oxygen_pointer,
644 };
645 
646 static struct snd_pcm_ops oxygen_spdif_ops = {
647         .open      = oxygen_spdif_open,
648         .close     = oxygen_close,
649         .ioctl     = snd_pcm_lib_ioctl,
650         .hw_params = oxygen_spdif_hw_params,
651         .hw_free   = oxygen_spdif_hw_free,
652         .prepare   = oxygen_prepare,
653         .trigger   = oxygen_trigger,
654         .pointer   = oxygen_pointer,
655 };
656 
657 static struct snd_pcm_ops oxygen_multich_ops = {
658         .open      = oxygen_multich_open,
659         .close     = oxygen_close,
660         .ioctl     = snd_pcm_lib_ioctl,
661         .hw_params = oxygen_multich_hw_params,
662         .hw_free   = oxygen_hw_free,
663         .prepare   = oxygen_prepare,
664         .trigger   = oxygen_trigger,
665         .pointer   = oxygen_pointer,
666 };
667 
668 static struct snd_pcm_ops oxygen_ac97_ops = {
669         .open      = oxygen_ac97_open,
670         .close     = oxygen_close,
671         .ioctl     = snd_pcm_lib_ioctl,
672         .hw_params = oxygen_hw_params,
673         .hw_free   = oxygen_hw_free,
674         .prepare   = oxygen_prepare,
675         .trigger   = oxygen_trigger,
676         .pointer   = oxygen_pointer,
677 };
678 
679 static void oxygen_pcm_free(struct snd_pcm *pcm)
680 {
681         snd_pcm_lib_preallocate_free_for_all(pcm);
682 }
683 
684 int oxygen_pcm_init(struct oxygen *chip)
685 {
686         struct snd_pcm *pcm;
687         int outs, ins;
688         int err;
689 
690         outs = !!(chip->model.device_config & PLAYBACK_0_TO_I2S);
691         ins = !!(chip->model.device_config & (CAPTURE_0_FROM_I2S_1 |
692                                               CAPTURE_0_FROM_I2S_2));
693         if (outs | ins) {
694                 err = snd_pcm_new(chip->card, "Multichannel",
695                                   0, outs, ins, &pcm);
696                 if (err < 0)
697                         return err;
698                 if (outs)
699                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
700                                         &oxygen_multich_ops);
701                 if (chip->model.device_config & CAPTURE_0_FROM_I2S_1)
702                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
703                                         &oxygen_rec_a_ops);
704                 else if (chip->model.device_config & CAPTURE_0_FROM_I2S_2)
705                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
706                                         &oxygen_rec_b_ops);
707                 pcm->private_data = chip;
708                 pcm->private_free = oxygen_pcm_free;
709                 strcpy(pcm->name, "Multichannel");
710                 if (outs)
711                         snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream,
712                                                       SNDRV_DMA_TYPE_DEV,
713                                                       snd_dma_pci_data(chip->pci),
714                                                       DEFAULT_BUFFER_BYTES_MULTICH,
715                                                       BUFFER_BYTES_MAX_MULTICH);
716                 if (ins)
717                         snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream,
718                                                       SNDRV_DMA_TYPE_DEV,
719                                                       snd_dma_pci_data(chip->pci),
720                                                       DEFAULT_BUFFER_BYTES,
721                                                       BUFFER_BYTES_MAX);
722         }
723 
724         outs = !!(chip->model.device_config & PLAYBACK_1_TO_SPDIF);
725         ins = !!(chip->model.device_config & CAPTURE_1_FROM_SPDIF);
726         if (outs | ins) {
727                 err = snd_pcm_new(chip->card, "Digital", 1, outs, ins, &pcm);
728                 if (err < 0)
729                         return err;
730                 if (outs)
731                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
732                                         &oxygen_spdif_ops);
733                 if (ins)
734                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
735                                         &oxygen_rec_c_ops);
736                 pcm->private_data = chip;
737                 pcm->private_free = oxygen_pcm_free;
738                 strcpy(pcm->name, "Digital");
739                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
740                                                       snd_dma_pci_data(chip->pci),
741                                                       DEFAULT_BUFFER_BYTES,
742                                                       BUFFER_BYTES_MAX);
743         }
744 
745         if (chip->has_ac97_1) {
746                 outs = !!(chip->model.device_config & PLAYBACK_2_TO_AC97_1);
747                 ins = !!(chip->model.device_config & CAPTURE_2_FROM_AC97_1);
748         } else {
749                 outs = 0;
750                 ins = !!(chip->model.device_config & CAPTURE_2_FROM_I2S_2);
751         }
752         if (outs | ins) {
753                 err = snd_pcm_new(chip->card, outs ? "AC97" : "Analog2",
754                                   2, outs, ins, &pcm);
755                 if (err < 0)
756                         return err;
757                 if (outs) {
758                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
759                                         &oxygen_ac97_ops);
760                         oxygen_write8_masked(chip, OXYGEN_REC_ROUTING,
761                                              OXYGEN_REC_B_ROUTE_AC97_1,
762                                              OXYGEN_REC_B_ROUTE_MASK);
763                 }
764                 if (ins)
765                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
766                                         &oxygen_rec_b_ops);
767                 pcm->private_data = chip;
768                 pcm->private_free = oxygen_pcm_free;
769                 strcpy(pcm->name, outs ? "Front Panel" : "Analog 2");
770                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
771                                                       snd_dma_pci_data(chip->pci),
772                                                       DEFAULT_BUFFER_BYTES,
773                                                       BUFFER_BYTES_MAX);
774         }
775         return 0;
776 }
777 

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