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TOMOYO Linux Cross Reference
Linux/sound/pci/oxygen/oxygen_pcm.c

Version: ~ [ linux-5.12-rc7 ] ~ [ linux-5.11.13 ] ~ [ linux-5.10.29 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.111 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.186 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.230 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.266 ] ~ [ linux-4.8.17 ] ~ [ linux-4.7.10 ] ~ [ linux-4.6.7 ] ~ [ linux-4.5.7 ] ~ [ linux-4.4.266 ] ~ [ linux-4.3.6 ] ~ [ linux-4.2.8 ] ~ [ linux-4.1.52 ] ~ [ linux-4.0.9 ] ~ [ linux-3.18.140 ] ~ [ linux-3.16.85 ] ~ [ linux-3.14.79 ] ~ [ linux-3.12.74 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.5 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 /*
  2  * C-Media CMI8788 driver - PCM code
  3  *
  4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5  *
  6  *
  7  *  This driver is free software; you can redistribute it and/or modify
  8  *  it under the terms of the GNU General Public License, version 2.
  9  *
 10  *  This driver is distributed in the hope that it will be useful,
 11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 13  *  GNU General Public License for more details.
 14  *
 15  *  You should have received a copy of the GNU General Public License
 16  *  along with this driver; if not, write to the Free Software
 17  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 18  */
 19 
 20 #include <linux/pci.h>
 21 #include <sound/control.h>
 22 #include <sound/core.h>
 23 #include <sound/pcm.h>
 24 #include <sound/pcm_params.h>
 25 #include "oxygen.h"
 26 
 27 /* most DMA channels have a 16-bit counter for 32-bit words */
 28 #define BUFFER_BYTES_MAX                ((1 << 16) * 4)
 29 /* the multichannel DMA channel has a 24-bit counter */
 30 #define BUFFER_BYTES_MAX_MULTICH        ((1 << 24) * 4)
 31 
 32 #define FIFO_BYTES                      256
 33 #define FIFO_BYTES_MULTICH              1024
 34 
 35 #define PERIOD_BYTES_MIN                64
 36 
 37 #define DEFAULT_BUFFER_BYTES            (BUFFER_BYTES_MAX / 2)
 38 #define DEFAULT_BUFFER_BYTES_MULTICH    (1024 * 1024)
 39 
 40 static const struct snd_pcm_hardware oxygen_stereo_hardware = {
 41         .info = SNDRV_PCM_INFO_MMAP |
 42                 SNDRV_PCM_INFO_MMAP_VALID |
 43                 SNDRV_PCM_INFO_INTERLEAVED |
 44                 SNDRV_PCM_INFO_PAUSE |
 45                 SNDRV_PCM_INFO_SYNC_START |
 46                 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
 47         .formats = SNDRV_PCM_FMTBIT_S16_LE |
 48                    SNDRV_PCM_FMTBIT_S32_LE,
 49         .rates = SNDRV_PCM_RATE_32000 |
 50                  SNDRV_PCM_RATE_44100 |
 51                  SNDRV_PCM_RATE_48000 |
 52                  SNDRV_PCM_RATE_64000 |
 53                  SNDRV_PCM_RATE_88200 |
 54                  SNDRV_PCM_RATE_96000 |
 55                  SNDRV_PCM_RATE_176400 |
 56                  SNDRV_PCM_RATE_192000,
 57         .rate_min = 32000,
 58         .rate_max = 192000,
 59         .channels_min = 2,
 60         .channels_max = 2,
 61         .buffer_bytes_max = BUFFER_BYTES_MAX,
 62         .period_bytes_min = PERIOD_BYTES_MIN,
 63         .period_bytes_max = BUFFER_BYTES_MAX,
 64         .periods_min = 1,
 65         .periods_max = BUFFER_BYTES_MAX / PERIOD_BYTES_MIN,
 66         .fifo_size = FIFO_BYTES,
 67 };
 68 static const struct snd_pcm_hardware oxygen_multichannel_hardware = {
 69         .info = SNDRV_PCM_INFO_MMAP |
 70                 SNDRV_PCM_INFO_MMAP_VALID |
 71                 SNDRV_PCM_INFO_INTERLEAVED |
 72                 SNDRV_PCM_INFO_PAUSE |
 73                 SNDRV_PCM_INFO_SYNC_START |
 74                 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
 75         .formats = SNDRV_PCM_FMTBIT_S16_LE |
 76                    SNDRV_PCM_FMTBIT_S32_LE,
 77         .rates = SNDRV_PCM_RATE_32000 |
 78                  SNDRV_PCM_RATE_44100 |
 79                  SNDRV_PCM_RATE_48000 |
 80                  SNDRV_PCM_RATE_64000 |
 81                  SNDRV_PCM_RATE_88200 |
 82                  SNDRV_PCM_RATE_96000 |
 83                  SNDRV_PCM_RATE_176400 |
 84                  SNDRV_PCM_RATE_192000,
 85         .rate_min = 32000,
 86         .rate_max = 192000,
 87         .channels_min = 2,
 88         .channels_max = 8,
 89         .buffer_bytes_max = BUFFER_BYTES_MAX_MULTICH,
 90         .period_bytes_min = PERIOD_BYTES_MIN,
 91         .period_bytes_max = BUFFER_BYTES_MAX_MULTICH,
 92         .periods_min = 1,
 93         .periods_max = BUFFER_BYTES_MAX_MULTICH / PERIOD_BYTES_MIN,
 94         .fifo_size = FIFO_BYTES_MULTICH,
 95 };
 96 static const struct snd_pcm_hardware oxygen_ac97_hardware = {
 97         .info = SNDRV_PCM_INFO_MMAP |
 98                 SNDRV_PCM_INFO_MMAP_VALID |
 99                 SNDRV_PCM_INFO_INTERLEAVED |
100                 SNDRV_PCM_INFO_PAUSE |
101                 SNDRV_PCM_INFO_SYNC_START |
102                 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
103         .formats = SNDRV_PCM_FMTBIT_S16_LE,
104         .rates = SNDRV_PCM_RATE_48000,
105         .rate_min = 48000,
106         .rate_max = 48000,
107         .channels_min = 2,
108         .channels_max = 2,
109         .buffer_bytes_max = BUFFER_BYTES_MAX,
110         .period_bytes_min = PERIOD_BYTES_MIN,
111         .period_bytes_max = BUFFER_BYTES_MAX,
112         .periods_min = 1,
113         .periods_max = BUFFER_BYTES_MAX / PERIOD_BYTES_MIN,
114         .fifo_size = FIFO_BYTES,
115 };
116 
117 static const struct snd_pcm_hardware *const oxygen_hardware[PCM_COUNT] = {
118         [PCM_A] = &oxygen_stereo_hardware,
119         [PCM_B] = &oxygen_stereo_hardware,
120         [PCM_C] = &oxygen_stereo_hardware,
121         [PCM_SPDIF] = &oxygen_stereo_hardware,
122         [PCM_MULTICH] = &oxygen_multichannel_hardware,
123         [PCM_AC97] = &oxygen_ac97_hardware,
124 };
125 
126 static inline unsigned int
127 oxygen_substream_channel(struct snd_pcm_substream *substream)
128 {
129         return (unsigned int)(uintptr_t)substream->runtime->private_data;
130 }
131 
132 static int oxygen_open(struct snd_pcm_substream *substream,
133                        unsigned int channel)
134 {
135         struct oxygen *chip = snd_pcm_substream_chip(substream);
136         struct snd_pcm_runtime *runtime = substream->runtime;
137         int err;
138 
139         runtime->private_data = (void *)(uintptr_t)channel;
140         if (channel == PCM_B && chip->has_ac97_1 &&
141             (chip->model.device_config & CAPTURE_2_FROM_AC97_1))
142                 runtime->hw = oxygen_ac97_hardware;
143         else
144                 runtime->hw = *oxygen_hardware[channel];
145         switch (channel) {
146         case PCM_C:
147                 if (chip->model.device_config & CAPTURE_1_FROM_SPDIF) {
148                         runtime->hw.rates &= ~(SNDRV_PCM_RATE_32000 |
149                                                SNDRV_PCM_RATE_64000);
150                         runtime->hw.rate_min = 44100;
151                 }
152                 /* fall through */
153         case PCM_A:
154         case PCM_B:
155                 runtime->hw.fifo_size = 0;
156                 break;
157         case PCM_MULTICH:
158                 runtime->hw.channels_max = chip->model.dac_channels_pcm;
159                 break;
160         }
161         if (chip->model.pcm_hardware_filter)
162                 chip->model.pcm_hardware_filter(channel, &runtime->hw);
163         err = snd_pcm_hw_constraint_step(runtime, 0,
164                                          SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32);
165         if (err < 0)
166                 return err;
167         err = snd_pcm_hw_constraint_step(runtime, 0,
168                                          SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32);
169         if (err < 0)
170                 return err;
171         if (runtime->hw.formats & SNDRV_PCM_FMTBIT_S32_LE) {
172                 err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
173                 if (err < 0)
174                         return err;
175         }
176         if (runtime->hw.channels_max > 2) {
177                 err = snd_pcm_hw_constraint_step(runtime, 0,
178                                                  SNDRV_PCM_HW_PARAM_CHANNELS,
179                                                  2);
180                 if (err < 0)
181                         return err;
182         }
183         snd_pcm_set_sync(substream);
184         chip->streams[channel] = substream;
185 
186         mutex_lock(&chip->mutex);
187         chip->pcm_active |= 1 << channel;
188         if (channel == PCM_SPDIF) {
189                 chip->spdif_pcm_bits = chip->spdif_bits;
190                 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access &=
191                         ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
192                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
193                                SNDRV_CTL_EVENT_MASK_INFO,
194                                &chip->controls[CONTROL_SPDIF_PCM]->id);
195         }
196         mutex_unlock(&chip->mutex);
197 
198         return 0;
199 }
200 
201 static int oxygen_rec_a_open(struct snd_pcm_substream *substream)
202 {
203         return oxygen_open(substream, PCM_A);
204 }
205 
206 static int oxygen_rec_b_open(struct snd_pcm_substream *substream)
207 {
208         return oxygen_open(substream, PCM_B);
209 }
210 
211 static int oxygen_rec_c_open(struct snd_pcm_substream *substream)
212 {
213         return oxygen_open(substream, PCM_C);
214 }
215 
216 static int oxygen_spdif_open(struct snd_pcm_substream *substream)
217 {
218         return oxygen_open(substream, PCM_SPDIF);
219 }
220 
221 static int oxygen_multich_open(struct snd_pcm_substream *substream)
222 {
223         return oxygen_open(substream, PCM_MULTICH);
224 }
225 
226 static int oxygen_ac97_open(struct snd_pcm_substream *substream)
227 {
228         return oxygen_open(substream, PCM_AC97);
229 }
230 
231 static int oxygen_close(struct snd_pcm_substream *substream)
232 {
233         struct oxygen *chip = snd_pcm_substream_chip(substream);
234         unsigned int channel = oxygen_substream_channel(substream);
235 
236         mutex_lock(&chip->mutex);
237         chip->pcm_active &= ~(1 << channel);
238         if (channel == PCM_SPDIF) {
239                 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access |=
240                         SNDRV_CTL_ELEM_ACCESS_INACTIVE;
241                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
242                                SNDRV_CTL_EVENT_MASK_INFO,
243                                &chip->controls[CONTROL_SPDIF_PCM]->id);
244         }
245         if (channel == PCM_SPDIF || channel == PCM_MULTICH)
246                 oxygen_update_spdif_source(chip);
247         mutex_unlock(&chip->mutex);
248 
249         chip->streams[channel] = NULL;
250         return 0;
251 }
252 
253 static unsigned int oxygen_format(struct snd_pcm_hw_params *hw_params)
254 {
255         if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
256                 return OXYGEN_FORMAT_24;
257         else
258                 return OXYGEN_FORMAT_16;
259 }
260 
261 static unsigned int oxygen_rate(struct snd_pcm_hw_params *hw_params)
262 {
263         switch (params_rate(hw_params)) {
264         case 32000:
265                 return OXYGEN_RATE_32000;
266         case 44100:
267                 return OXYGEN_RATE_44100;
268         default: /* 48000 */
269                 return OXYGEN_RATE_48000;
270         case 64000:
271                 return OXYGEN_RATE_64000;
272         case 88200:
273                 return OXYGEN_RATE_88200;
274         case 96000:
275                 return OXYGEN_RATE_96000;
276         case 176400:
277                 return OXYGEN_RATE_176400;
278         case 192000:
279                 return OXYGEN_RATE_192000;
280         }
281 }
282 
283 static unsigned int oxygen_i2s_bits(struct snd_pcm_hw_params *hw_params)
284 {
285         if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
286                 return OXYGEN_I2S_BITS_24;
287         else
288                 return OXYGEN_I2S_BITS_16;
289 }
290 
291 static unsigned int oxygen_play_channels(struct snd_pcm_hw_params *hw_params)
292 {
293         switch (params_channels(hw_params)) {
294         default: /* 2 */
295                 return OXYGEN_PLAY_CHANNELS_2;
296         case 4:
297                 return OXYGEN_PLAY_CHANNELS_4;
298         case 6:
299                 return OXYGEN_PLAY_CHANNELS_6;
300         case 8:
301                 return OXYGEN_PLAY_CHANNELS_8;
302         }
303 }
304 
305 static const unsigned int channel_base_registers[PCM_COUNT] = {
306         [PCM_A] = OXYGEN_DMA_A_ADDRESS,
307         [PCM_B] = OXYGEN_DMA_B_ADDRESS,
308         [PCM_C] = OXYGEN_DMA_C_ADDRESS,
309         [PCM_SPDIF] = OXYGEN_DMA_SPDIF_ADDRESS,
310         [PCM_MULTICH] = OXYGEN_DMA_MULTICH_ADDRESS,
311         [PCM_AC97] = OXYGEN_DMA_AC97_ADDRESS,
312 };
313 
314 static int oxygen_hw_params(struct snd_pcm_substream *substream,
315                             struct snd_pcm_hw_params *hw_params)
316 {
317         struct oxygen *chip = snd_pcm_substream_chip(substream);
318         unsigned int channel = oxygen_substream_channel(substream);
319         int err;
320 
321         err = snd_pcm_lib_malloc_pages(substream,
322                                        params_buffer_bytes(hw_params));
323         if (err < 0)
324                 return err;
325 
326         oxygen_write32(chip, channel_base_registers[channel],
327                        (u32)substream->runtime->dma_addr);
328         if (channel == PCM_MULTICH) {
329                 oxygen_write32(chip, OXYGEN_DMA_MULTICH_COUNT,
330                                params_buffer_bytes(hw_params) / 4 - 1);
331                 oxygen_write32(chip, OXYGEN_DMA_MULTICH_TCOUNT,
332                                params_period_bytes(hw_params) / 4 - 1);
333         } else {
334                 oxygen_write16(chip, channel_base_registers[channel] + 4,
335                                params_buffer_bytes(hw_params) / 4 - 1);
336                 oxygen_write16(chip, channel_base_registers[channel] + 6,
337                                params_period_bytes(hw_params) / 4 - 1);
338         }
339         return 0;
340 }
341 
342 static u16 get_mclk(struct oxygen *chip, unsigned int channel,
343                     struct snd_pcm_hw_params *params)
344 {
345         unsigned int mclks, shift;
346 
347         if (channel == PCM_MULTICH)
348                 mclks = chip->model.dac_mclks;
349         else
350                 mclks = chip->model.adc_mclks;
351 
352         if (params_rate(params) <= 48000)
353                 shift = 0;
354         else if (params_rate(params) <= 96000)
355                 shift = 2;
356         else
357                 shift = 4;
358 
359         return OXYGEN_I2S_MCLK(mclks >> shift);
360 }
361 
362 static int oxygen_rec_a_hw_params(struct snd_pcm_substream *substream,
363                                   struct snd_pcm_hw_params *hw_params)
364 {
365         struct oxygen *chip = snd_pcm_substream_chip(substream);
366         int err;
367 
368         err = oxygen_hw_params(substream, hw_params);
369         if (err < 0)
370                 return err;
371 
372         spin_lock_irq(&chip->reg_lock);
373         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
374                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_A_SHIFT,
375                              OXYGEN_REC_FORMAT_A_MASK);
376         oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT,
377                               oxygen_rate(hw_params) |
378                               chip->model.adc_i2s_format |
379                               get_mclk(chip, PCM_A, hw_params) |
380                               oxygen_i2s_bits(hw_params),
381                               OXYGEN_I2S_RATE_MASK |
382                               OXYGEN_I2S_FORMAT_MASK |
383                               OXYGEN_I2S_MCLK_MASK |
384                               OXYGEN_I2S_BITS_MASK);
385         spin_unlock_irq(&chip->reg_lock);
386 
387         mutex_lock(&chip->mutex);
388         chip->model.set_adc_params(chip, hw_params);
389         mutex_unlock(&chip->mutex);
390         return 0;
391 }
392 
393 static int oxygen_rec_b_hw_params(struct snd_pcm_substream *substream,
394                                   struct snd_pcm_hw_params *hw_params)
395 {
396         struct oxygen *chip = snd_pcm_substream_chip(substream);
397         int is_ac97;
398         int err;
399 
400         err = oxygen_hw_params(substream, hw_params);
401         if (err < 0)
402                 return err;
403 
404         is_ac97 = chip->has_ac97_1 &&
405                 (chip->model.device_config & CAPTURE_2_FROM_AC97_1);
406 
407         spin_lock_irq(&chip->reg_lock);
408         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
409                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_B_SHIFT,
410                              OXYGEN_REC_FORMAT_B_MASK);
411         if (!is_ac97)
412                 oxygen_write16_masked(chip, OXYGEN_I2S_B_FORMAT,
413                                       oxygen_rate(hw_params) |
414                                       chip->model.adc_i2s_format |
415                                       get_mclk(chip, PCM_B, hw_params) |
416                                       oxygen_i2s_bits(hw_params),
417                                       OXYGEN_I2S_RATE_MASK |
418                                       OXYGEN_I2S_FORMAT_MASK |
419                                       OXYGEN_I2S_MCLK_MASK |
420                                       OXYGEN_I2S_BITS_MASK);
421         spin_unlock_irq(&chip->reg_lock);
422 
423         if (!is_ac97) {
424                 mutex_lock(&chip->mutex);
425                 chip->model.set_adc_params(chip, hw_params);
426                 mutex_unlock(&chip->mutex);
427         }
428         return 0;
429 }
430 
431 static int oxygen_rec_c_hw_params(struct snd_pcm_substream *substream,
432                                   struct snd_pcm_hw_params *hw_params)
433 {
434         struct oxygen *chip = snd_pcm_substream_chip(substream);
435         bool is_spdif;
436         int err;
437 
438         err = oxygen_hw_params(substream, hw_params);
439         if (err < 0)
440                 return err;
441 
442         is_spdif = chip->model.device_config & CAPTURE_1_FROM_SPDIF;
443 
444         spin_lock_irq(&chip->reg_lock);
445         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
446                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_C_SHIFT,
447                              OXYGEN_REC_FORMAT_C_MASK);
448         if (!is_spdif)
449                 oxygen_write16_masked(chip, OXYGEN_I2S_C_FORMAT,
450                                       oxygen_rate(hw_params) |
451                                       chip->model.adc_i2s_format |
452                                       get_mclk(chip, PCM_B, hw_params) |
453                                       oxygen_i2s_bits(hw_params),
454                                       OXYGEN_I2S_RATE_MASK |
455                                       OXYGEN_I2S_FORMAT_MASK |
456                                       OXYGEN_I2S_MCLK_MASK |
457                                       OXYGEN_I2S_BITS_MASK);
458         spin_unlock_irq(&chip->reg_lock);
459 
460         if (!is_spdif) {
461                 mutex_lock(&chip->mutex);
462                 chip->model.set_adc_params(chip, hw_params);
463                 mutex_unlock(&chip->mutex);
464         }
465         return 0;
466 }
467 
468 static int oxygen_spdif_hw_params(struct snd_pcm_substream *substream,
469                                   struct snd_pcm_hw_params *hw_params)
470 {
471         struct oxygen *chip = snd_pcm_substream_chip(substream);
472         int err;
473 
474         err = oxygen_hw_params(substream, hw_params);
475         if (err < 0)
476                 return err;
477 
478         mutex_lock(&chip->mutex);
479         spin_lock_irq(&chip->reg_lock);
480         oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
481                             OXYGEN_SPDIF_OUT_ENABLE);
482         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
483                              oxygen_format(hw_params) << OXYGEN_SPDIF_FORMAT_SHIFT,
484                              OXYGEN_SPDIF_FORMAT_MASK);
485         oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
486                               oxygen_rate(hw_params) << OXYGEN_SPDIF_OUT_RATE_SHIFT,
487                               OXYGEN_SPDIF_OUT_RATE_MASK);
488         oxygen_update_spdif_source(chip);
489         spin_unlock_irq(&chip->reg_lock);
490         mutex_unlock(&chip->mutex);
491         return 0;
492 }
493 
494 static int oxygen_multich_hw_params(struct snd_pcm_substream *substream,
495                                     struct snd_pcm_hw_params *hw_params)
496 {
497         struct oxygen *chip = snd_pcm_substream_chip(substream);
498         int err;
499 
500         err = oxygen_hw_params(substream, hw_params);
501         if (err < 0)
502                 return err;
503 
504         mutex_lock(&chip->mutex);
505         spin_lock_irq(&chip->reg_lock);
506         oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS,
507                              oxygen_play_channels(hw_params),
508                              OXYGEN_PLAY_CHANNELS_MASK);
509         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
510                              oxygen_format(hw_params) << OXYGEN_MULTICH_FORMAT_SHIFT,
511                              OXYGEN_MULTICH_FORMAT_MASK);
512         oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT,
513                               oxygen_rate(hw_params) |
514                               chip->model.dac_i2s_format |
515                               get_mclk(chip, PCM_MULTICH, hw_params) |
516                               oxygen_i2s_bits(hw_params),
517                               OXYGEN_I2S_RATE_MASK |
518                               OXYGEN_I2S_FORMAT_MASK |
519                               OXYGEN_I2S_MCLK_MASK |
520                               OXYGEN_I2S_BITS_MASK);
521         oxygen_update_spdif_source(chip);
522         spin_unlock_irq(&chip->reg_lock);
523 
524         chip->model.set_dac_params(chip, hw_params);
525         oxygen_update_dac_routing(chip);
526         mutex_unlock(&chip->mutex);
527         return 0;
528 }
529 
530 static int oxygen_hw_free(struct snd_pcm_substream *substream)
531 {
532         struct oxygen *chip = snd_pcm_substream_chip(substream);
533         unsigned int channel = oxygen_substream_channel(substream);
534         unsigned int channel_mask = 1 << channel;
535 
536         spin_lock_irq(&chip->reg_lock);
537         chip->interrupt_mask &= ~channel_mask;
538         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
539 
540         oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
541         oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
542         spin_unlock_irq(&chip->reg_lock);
543 
544         return snd_pcm_lib_free_pages(substream);
545 }
546 
547 static int oxygen_spdif_hw_free(struct snd_pcm_substream *substream)
548 {
549         struct oxygen *chip = snd_pcm_substream_chip(substream);
550 
551         spin_lock_irq(&chip->reg_lock);
552         oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
553                             OXYGEN_SPDIF_OUT_ENABLE);
554         spin_unlock_irq(&chip->reg_lock);
555         return oxygen_hw_free(substream);
556 }
557 
558 static int oxygen_prepare(struct snd_pcm_substream *substream)
559 {
560         struct oxygen *chip = snd_pcm_substream_chip(substream);
561         unsigned int channel = oxygen_substream_channel(substream);
562         unsigned int channel_mask = 1 << channel;
563 
564         spin_lock_irq(&chip->reg_lock);
565         oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
566         oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
567 
568         if (substream->runtime->no_period_wakeup)
569                 chip->interrupt_mask &= ~channel_mask;
570         else
571                 chip->interrupt_mask |= channel_mask;
572         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
573         spin_unlock_irq(&chip->reg_lock);
574         return 0;
575 }
576 
577 static int oxygen_trigger(struct snd_pcm_substream *substream, int cmd)
578 {
579         struct oxygen *chip = snd_pcm_substream_chip(substream);
580         struct snd_pcm_substream *s;
581         unsigned int mask = 0;
582         int pausing;
583 
584         switch (cmd) {
585         case SNDRV_PCM_TRIGGER_STOP:
586         case SNDRV_PCM_TRIGGER_START:
587         case SNDRV_PCM_TRIGGER_SUSPEND:
588                 pausing = 0;
589                 break;
590         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
591         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
592                 pausing = 1;
593                 break;
594         default:
595                 return -EINVAL;
596         }
597 
598         snd_pcm_group_for_each_entry(s, substream) {
599                 if (snd_pcm_substream_chip(s) == chip) {
600                         mask |= 1 << oxygen_substream_channel(s);
601                         snd_pcm_trigger_done(s, substream);
602                 }
603         }
604 
605         spin_lock(&chip->reg_lock);
606         if (!pausing) {
607                 if (cmd == SNDRV_PCM_TRIGGER_START)
608                         chip->pcm_running |= mask;
609                 else
610                         chip->pcm_running &= ~mask;
611                 oxygen_write8(chip, OXYGEN_DMA_STATUS, chip->pcm_running);
612         } else {
613                 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
614                         oxygen_set_bits8(chip, OXYGEN_DMA_PAUSE, mask);
615                 else
616                         oxygen_clear_bits8(chip, OXYGEN_DMA_PAUSE, mask);
617         }
618         spin_unlock(&chip->reg_lock);
619         return 0;
620 }
621 
622 static snd_pcm_uframes_t oxygen_pointer(struct snd_pcm_substream *substream)
623 {
624         struct oxygen *chip = snd_pcm_substream_chip(substream);
625         struct snd_pcm_runtime *runtime = substream->runtime;
626         unsigned int channel = oxygen_substream_channel(substream);
627         u32 curr_addr;
628 
629         /* no spinlock, this read should be atomic */
630         curr_addr = oxygen_read32(chip, channel_base_registers[channel]);
631         return bytes_to_frames(runtime, curr_addr - (u32)runtime->dma_addr);
632 }
633 
634 static struct snd_pcm_ops oxygen_rec_a_ops = {
635         .open      = oxygen_rec_a_open,
636         .close     = oxygen_close,
637         .ioctl     = snd_pcm_lib_ioctl,
638         .hw_params = oxygen_rec_a_hw_params,
639         .hw_free   = oxygen_hw_free,
640         .prepare   = oxygen_prepare,
641         .trigger   = oxygen_trigger,
642         .pointer   = oxygen_pointer,
643 };
644 
645 static struct snd_pcm_ops oxygen_rec_b_ops = {
646         .open      = oxygen_rec_b_open,
647         .close     = oxygen_close,
648         .ioctl     = snd_pcm_lib_ioctl,
649         .hw_params = oxygen_rec_b_hw_params,
650         .hw_free   = oxygen_hw_free,
651         .prepare   = oxygen_prepare,
652         .trigger   = oxygen_trigger,
653         .pointer   = oxygen_pointer,
654 };
655 
656 static struct snd_pcm_ops oxygen_rec_c_ops = {
657         .open      = oxygen_rec_c_open,
658         .close     = oxygen_close,
659         .ioctl     = snd_pcm_lib_ioctl,
660         .hw_params = oxygen_rec_c_hw_params,
661         .hw_free   = oxygen_hw_free,
662         .prepare   = oxygen_prepare,
663         .trigger   = oxygen_trigger,
664         .pointer   = oxygen_pointer,
665 };
666 
667 static struct snd_pcm_ops oxygen_spdif_ops = {
668         .open      = oxygen_spdif_open,
669         .close     = oxygen_close,
670         .ioctl     = snd_pcm_lib_ioctl,
671         .hw_params = oxygen_spdif_hw_params,
672         .hw_free   = oxygen_spdif_hw_free,
673         .prepare   = oxygen_prepare,
674         .trigger   = oxygen_trigger,
675         .pointer   = oxygen_pointer,
676 };
677 
678 static struct snd_pcm_ops oxygen_multich_ops = {
679         .open      = oxygen_multich_open,
680         .close     = oxygen_close,
681         .ioctl     = snd_pcm_lib_ioctl,
682         .hw_params = oxygen_multich_hw_params,
683         .hw_free   = oxygen_hw_free,
684         .prepare   = oxygen_prepare,
685         .trigger   = oxygen_trigger,
686         .pointer   = oxygen_pointer,
687 };
688 
689 static struct snd_pcm_ops oxygen_ac97_ops = {
690         .open      = oxygen_ac97_open,
691         .close     = oxygen_close,
692         .ioctl     = snd_pcm_lib_ioctl,
693         .hw_params = oxygen_hw_params,
694         .hw_free   = oxygen_hw_free,
695         .prepare   = oxygen_prepare,
696         .trigger   = oxygen_trigger,
697         .pointer   = oxygen_pointer,
698 };
699 
700 int oxygen_pcm_init(struct oxygen *chip)
701 {
702         struct snd_pcm *pcm;
703         int outs, ins;
704         int err;
705 
706         outs = !!(chip->model.device_config & PLAYBACK_0_TO_I2S);
707         ins = !!(chip->model.device_config & (CAPTURE_0_FROM_I2S_1 |
708                                               CAPTURE_0_FROM_I2S_2));
709         if (outs | ins) {
710                 err = snd_pcm_new(chip->card, "Multichannel",
711                                   0, outs, ins, &pcm);
712                 if (err < 0)
713                         return err;
714                 if (outs)
715                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
716                                         &oxygen_multich_ops);
717                 if (chip->model.device_config & CAPTURE_0_FROM_I2S_1)
718                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
719                                         &oxygen_rec_a_ops);
720                 else if (chip->model.device_config & CAPTURE_0_FROM_I2S_2)
721                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
722                                         &oxygen_rec_b_ops);
723                 pcm->private_data = chip;
724                 strcpy(pcm->name, "Multichannel");
725                 if (outs)
726                         snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream,
727                                                       SNDRV_DMA_TYPE_DEV,
728                                                       snd_dma_pci_data(chip->pci),
729                                                       DEFAULT_BUFFER_BYTES_MULTICH,
730                                                       BUFFER_BYTES_MAX_MULTICH);
731                 if (ins)
732                         snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream,
733                                                       SNDRV_DMA_TYPE_DEV,
734                                                       snd_dma_pci_data(chip->pci),
735                                                       DEFAULT_BUFFER_BYTES,
736                                                       BUFFER_BYTES_MAX);
737         }
738 
739         outs = !!(chip->model.device_config & PLAYBACK_1_TO_SPDIF);
740         ins = !!(chip->model.device_config & CAPTURE_1_FROM_SPDIF);
741         if (outs | ins) {
742                 err = snd_pcm_new(chip->card, "Digital", 1, outs, ins, &pcm);
743                 if (err < 0)
744                         return err;
745                 if (outs)
746                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
747                                         &oxygen_spdif_ops);
748                 if (ins)
749                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
750                                         &oxygen_rec_c_ops);
751                 pcm->private_data = chip;
752                 strcpy(pcm->name, "Digital");
753                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
754                                                       snd_dma_pci_data(chip->pci),
755                                                       DEFAULT_BUFFER_BYTES,
756                                                       BUFFER_BYTES_MAX);
757         }
758 
759         if (chip->has_ac97_1) {
760                 outs = !!(chip->model.device_config & PLAYBACK_2_TO_AC97_1);
761                 ins = !!(chip->model.device_config & CAPTURE_2_FROM_AC97_1);
762         } else {
763                 outs = 0;
764                 ins = !!(chip->model.device_config & CAPTURE_2_FROM_I2S_2);
765         }
766         if (outs | ins) {
767                 err = snd_pcm_new(chip->card, outs ? "AC97" : "Analog2",
768                                   2, outs, ins, &pcm);
769                 if (err < 0)
770                         return err;
771                 if (outs) {
772                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
773                                         &oxygen_ac97_ops);
774                         oxygen_write8_masked(chip, OXYGEN_REC_ROUTING,
775                                              OXYGEN_REC_B_ROUTE_AC97_1,
776                                              OXYGEN_REC_B_ROUTE_MASK);
777                 }
778                 if (ins)
779                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
780                                         &oxygen_rec_b_ops);
781                 pcm->private_data = chip;
782                 strcpy(pcm->name, outs ? "Front Panel" : "Analog 2");
783                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
784                                                       snd_dma_pci_data(chip->pci),
785                                                       DEFAULT_BUFFER_BYTES,
786                                                       BUFFER_BYTES_MAX);
787         }
788 
789         ins = !!(chip->model.device_config & CAPTURE_3_FROM_I2S_3);
790         if (ins) {
791                 err = snd_pcm_new(chip->card, "Analog3", 3, 0, ins, &pcm);
792                 if (err < 0)
793                         return err;
794                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
795                                 &oxygen_rec_c_ops);
796                 oxygen_write8_masked(chip, OXYGEN_REC_ROUTING,
797                                      OXYGEN_REC_C_ROUTE_I2S_ADC_3,
798                                      OXYGEN_REC_C_ROUTE_MASK);
799                 pcm->private_data = chip;
800                 strcpy(pcm->name, "Analog 3");
801                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
802                                                       snd_dma_pci_data(chip->pci),
803                                                       DEFAULT_BUFFER_BYTES,
804                                                       BUFFER_BYTES_MAX);
805         }
806         return 0;
807 }
808 

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