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TOMOYO Linux Cross Reference
Linux/sound/soc/codecs/da732x.c

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  1 // SPDX-License-Identifier: GPL-2.0-only
  2 /*
  3  * da732x.c --- Dialog DA732X ALSA SoC Audio Driver
  4  *
  5  * Copyright (C) 2012 Dialog Semiconductor GmbH
  6  *
  7  * Author: Michal Hajduk <Michal.Hajduk@diasemi.com>
  8  */
  9 
 10 #include <linux/module.h>
 11 #include <linux/moduleparam.h>
 12 #include <linux/init.h>
 13 #include <linux/delay.h>
 14 #include <linux/pm.h>
 15 #include <linux/i2c.h>
 16 #include <linux/regmap.h>
 17 #include <linux/platform_device.h>
 18 #include <linux/slab.h>
 19 #include <linux/sysfs.h>
 20 #include <sound/core.h>
 21 #include <sound/pcm.h>
 22 #include <sound/pcm_params.h>
 23 #include <sound/soc.h>
 24 #include <sound/soc-dapm.h>
 25 #include <sound/initval.h>
 26 #include <sound/tlv.h>
 27 #include <asm/div64.h>
 28 
 29 #include "da732x.h"
 30 #include "da732x_reg.h"
 31 
 32 
 33 struct da732x_priv {
 34         struct regmap *regmap;
 35 
 36         unsigned int sysclk;
 37         bool pll_en;
 38 };
 39 
 40 /*
 41  * da732x register cache - default settings
 42  */
 43 static const struct reg_default da732x_reg_cache[] = {
 44         { DA732X_REG_REF1               , 0x02 },
 45         { DA732X_REG_BIAS_EN            , 0x80 },
 46         { DA732X_REG_BIAS1              , 0x00 },
 47         { DA732X_REG_BIAS2              , 0x00 },
 48         { DA732X_REG_BIAS3              , 0x00 },
 49         { DA732X_REG_BIAS4              , 0x00 },
 50         { DA732X_REG_MICBIAS2           , 0x00 },
 51         { DA732X_REG_MICBIAS1           , 0x00 },
 52         { DA732X_REG_MICDET             , 0x00 },
 53         { DA732X_REG_MIC1_PRE           , 0x01 },
 54         { DA732X_REG_MIC1               , 0x40 },
 55         { DA732X_REG_MIC2_PRE           , 0x01 },
 56         { DA732X_REG_MIC2               , 0x40 },
 57         { DA732X_REG_AUX1L              , 0x75 },
 58         { DA732X_REG_AUX1R              , 0x75 },
 59         { DA732X_REG_MIC3_PRE           , 0x01 },
 60         { DA732X_REG_MIC3               , 0x40 },
 61         { DA732X_REG_INP_PINBIAS        , 0x00 },
 62         { DA732X_REG_INP_ZC_EN          , 0x00 },
 63         { DA732X_REG_INP_MUX            , 0x50 },
 64         { DA732X_REG_HP_DET             , 0x00 },
 65         { DA732X_REG_HPL_DAC_OFFSET     , 0x00 },
 66         { DA732X_REG_HPL_DAC_OFF_CNTL   , 0x00 },
 67         { DA732X_REG_HPL_OUT_OFFSET     , 0x00 },
 68         { DA732X_REG_HPL                , 0x40 },
 69         { DA732X_REG_HPL_VOL            , 0x0F },
 70         { DA732X_REG_HPR_DAC_OFFSET     , 0x00 },
 71         { DA732X_REG_HPR_DAC_OFF_CNTL   , 0x00 },
 72         { DA732X_REG_HPR_OUT_OFFSET     , 0x00 },
 73         { DA732X_REG_HPR                , 0x40 },
 74         { DA732X_REG_HPR_VOL            , 0x0F },
 75         { DA732X_REG_LIN2               , 0x4F },
 76         { DA732X_REG_LIN3               , 0x4F },
 77         { DA732X_REG_LIN4               , 0x4F },
 78         { DA732X_REG_OUT_ZC_EN          , 0x00 },
 79         { DA732X_REG_HP_LIN1_GNDSEL     , 0x00 },
 80         { DA732X_REG_CP_HP1             , 0x0C },
 81         { DA732X_REG_CP_HP2             , 0x03 },
 82         { DA732X_REG_CP_CTRL1           , 0x00 },
 83         { DA732X_REG_CP_CTRL2           , 0x99 },
 84         { DA732X_REG_CP_CTRL3           , 0x25 },
 85         { DA732X_REG_CP_LEVEL_MASK      , 0x3F },
 86         { DA732X_REG_CP_DET             , 0x00 },
 87         { DA732X_REG_CP_STATUS          , 0x00 },
 88         { DA732X_REG_CP_THRESH1         , 0x00 },
 89         { DA732X_REG_CP_THRESH2         , 0x00 },
 90         { DA732X_REG_CP_THRESH3         , 0x00 },
 91         { DA732X_REG_CP_THRESH4         , 0x00 },
 92         { DA732X_REG_CP_THRESH5         , 0x00 },
 93         { DA732X_REG_CP_THRESH6         , 0x00 },
 94         { DA732X_REG_CP_THRESH7         , 0x00 },
 95         { DA732X_REG_CP_THRESH8         , 0x00 },
 96         { DA732X_REG_PLL_DIV_LO         , 0x00 },
 97         { DA732X_REG_PLL_DIV_MID        , 0x00 },
 98         { DA732X_REG_PLL_DIV_HI         , 0x00 },
 99         { DA732X_REG_PLL_CTRL           , 0x02 },
100         { DA732X_REG_CLK_CTRL           , 0xaa },
101         { DA732X_REG_CLK_DSP            , 0x07 },
102         { DA732X_REG_CLK_EN1            , 0x00 },
103         { DA732X_REG_CLK_EN2            , 0x00 },
104         { DA732X_REG_CLK_EN3            , 0x00 },
105         { DA732X_REG_CLK_EN4            , 0x00 },
106         { DA732X_REG_CLK_EN5            , 0x00 },
107         { DA732X_REG_AIF_MCLK           , 0x00 },
108         { DA732X_REG_AIFA1              , 0x02 },
109         { DA732X_REG_AIFA2              , 0x00 },
110         { DA732X_REG_AIFA3              , 0x08 },
111         { DA732X_REG_AIFB1              , 0x02 },
112         { DA732X_REG_AIFB2              , 0x00 },
113         { DA732X_REG_AIFB3              , 0x08 },
114         { DA732X_REG_PC_CTRL            , 0xC0 },
115         { DA732X_REG_DATA_ROUTE         , 0x00 },
116         { DA732X_REG_DSP_CTRL           , 0x00 },
117         { DA732X_REG_CIF_CTRL2          , 0x00 },
118         { DA732X_REG_HANDSHAKE          , 0x00 },
119         { DA732X_REG_SPARE1_OUT         , 0x00 },
120         { DA732X_REG_SPARE2_OUT         , 0x00 },
121         { DA732X_REG_SPARE1_IN          , 0x00 },
122         { DA732X_REG_ADC1_PD            , 0x00 },
123         { DA732X_REG_ADC1_HPF           , 0x00 },
124         { DA732X_REG_ADC1_SEL           , 0x00 },
125         { DA732X_REG_ADC1_EQ12          , 0x00 },
126         { DA732X_REG_ADC1_EQ34          , 0x00 },
127         { DA732X_REG_ADC1_EQ5           , 0x00 },
128         { DA732X_REG_ADC2_PD            , 0x00 },
129         { DA732X_REG_ADC2_HPF           , 0x00 },
130         { DA732X_REG_ADC2_SEL           , 0x00 },
131         { DA732X_REG_ADC2_EQ12          , 0x00 },
132         { DA732X_REG_ADC2_EQ34          , 0x00 },
133         { DA732X_REG_ADC2_EQ5           , 0x00 },
134         { DA732X_REG_DAC1_HPF           , 0x00 },
135         { DA732X_REG_DAC1_L_VOL         , 0x00 },
136         { DA732X_REG_DAC1_R_VOL         , 0x00 },
137         { DA732X_REG_DAC1_SEL           , 0x00 },
138         { DA732X_REG_DAC1_SOFTMUTE      , 0x00 },
139         { DA732X_REG_DAC1_EQ12          , 0x00 },
140         { DA732X_REG_DAC1_EQ34          , 0x00 },
141         { DA732X_REG_DAC1_EQ5           , 0x00 },
142         { DA732X_REG_DAC2_HPF           , 0x00 },
143         { DA732X_REG_DAC2_L_VOL         , 0x00 },
144         { DA732X_REG_DAC2_R_VOL         , 0x00 },
145         { DA732X_REG_DAC2_SEL           , 0x00 },
146         { DA732X_REG_DAC2_SOFTMUTE      , 0x00 },
147         { DA732X_REG_DAC2_EQ12          , 0x00 },
148         { DA732X_REG_DAC2_EQ34          , 0x00 },
149         { DA732X_REG_DAC2_EQ5           , 0x00 },
150         { DA732X_REG_DAC3_HPF           , 0x00 },
151         { DA732X_REG_DAC3_VOL           , 0x00 },
152         { DA732X_REG_DAC3_SEL           , 0x00 },
153         { DA732X_REG_DAC3_SOFTMUTE      , 0x00 },
154         { DA732X_REG_DAC3_EQ12          , 0x00 },
155         { DA732X_REG_DAC3_EQ34          , 0x00 },
156         { DA732X_REG_DAC3_EQ5           , 0x00 },
157         { DA732X_REG_BIQ_BYP            , 0x00 },
158         { DA732X_REG_DMA_CMD            , 0x00 },
159         { DA732X_REG_DMA_ADDR0          , 0x00 },
160         { DA732X_REG_DMA_ADDR1          , 0x00 },
161         { DA732X_REG_DMA_DATA0          , 0x00 },
162         { DA732X_REG_DMA_DATA1          , 0x00 },
163         { DA732X_REG_DMA_DATA2          , 0x00 },
164         { DA732X_REG_DMA_DATA3          , 0x00 },
165         { DA732X_REG_UNLOCK             , 0x00 },
166 };
167 
168 static inline int da732x_get_input_div(struct snd_soc_component *component, int sysclk)
169 {
170         int val;
171         int ret;
172 
173         if (sysclk < DA732X_MCLK_10MHZ) {
174                 val = DA732X_MCLK_RET_0_10MHZ;
175                 ret = DA732X_MCLK_VAL_0_10MHZ;
176         } else if ((sysclk >= DA732X_MCLK_10MHZ) &&
177             (sysclk < DA732X_MCLK_20MHZ)) {
178                 val = DA732X_MCLK_RET_10_20MHZ;
179                 ret = DA732X_MCLK_VAL_10_20MHZ;
180         } else if ((sysclk >= DA732X_MCLK_20MHZ) &&
181             (sysclk < DA732X_MCLK_40MHZ)) {
182                 val = DA732X_MCLK_RET_20_40MHZ;
183                 ret = DA732X_MCLK_VAL_20_40MHZ;
184         } else if ((sysclk >= DA732X_MCLK_40MHZ) &&
185             (sysclk <= DA732X_MCLK_54MHZ)) {
186                 val = DA732X_MCLK_RET_40_54MHZ;
187                 ret = DA732X_MCLK_VAL_40_54MHZ;
188         } else {
189                 return -EINVAL;
190         }
191 
192         snd_soc_component_write(component, DA732X_REG_PLL_CTRL, val);
193 
194         return ret;
195 }
196 
197 static void da732x_set_charge_pump(struct snd_soc_component *component, int state)
198 {
199         switch (state) {
200         case DA732X_ENABLE_CP:
201                 snd_soc_component_write(component, DA732X_REG_CLK_EN2, DA732X_CP_CLK_EN);
202                 snd_soc_component_write(component, DA732X_REG_CP_HP2, DA732X_HP_CP_EN |
203                               DA732X_HP_CP_REG | DA732X_HP_CP_PULSESKIP);
204                 snd_soc_component_write(component, DA732X_REG_CP_CTRL1, DA732X_CP_EN |
205                               DA732X_CP_CTRL_CPVDD1);
206                 snd_soc_component_write(component, DA732X_REG_CP_CTRL2,
207                               DA732X_CP_MANAGE_MAGNITUDE | DA732X_CP_BOOST);
208                 snd_soc_component_write(component, DA732X_REG_CP_CTRL3, DA732X_CP_1MHZ);
209                 break;
210         case DA732X_DISABLE_CP:
211                 snd_soc_component_write(component, DA732X_REG_CLK_EN2, DA732X_CP_CLK_DIS);
212                 snd_soc_component_write(component, DA732X_REG_CP_HP2, DA732X_HP_CP_DIS);
213                 snd_soc_component_write(component, DA732X_REG_CP_CTRL1, DA723X_CP_DIS);
214                 break;
215         default:
216                 pr_err("Wrong charge pump state\n");
217                 break;
218         }
219 }
220 
221 static const DECLARE_TLV_DB_SCALE(mic_boost_tlv, DA732X_MIC_PRE_VOL_DB_MIN,
222                                   DA732X_MIC_PRE_VOL_DB_INC, 0);
223 
224 static const DECLARE_TLV_DB_SCALE(mic_pga_tlv, DA732X_MIC_VOL_DB_MIN,
225                                   DA732X_MIC_VOL_DB_INC, 0);
226 
227 static const DECLARE_TLV_DB_SCALE(aux_pga_tlv, DA732X_AUX_VOL_DB_MIN,
228                                   DA732X_AUX_VOL_DB_INC, 0);
229 
230 static const DECLARE_TLV_DB_SCALE(hp_pga_tlv, DA732X_HP_VOL_DB_MIN,
231                                   DA732X_AUX_VOL_DB_INC, 0);
232 
233 static const DECLARE_TLV_DB_SCALE(lin2_pga_tlv, DA732X_LIN2_VOL_DB_MIN,
234                                   DA732X_LIN2_VOL_DB_INC, 0);
235 
236 static const DECLARE_TLV_DB_SCALE(lin3_pga_tlv, DA732X_LIN3_VOL_DB_MIN,
237                                   DA732X_LIN3_VOL_DB_INC, 0);
238 
239 static const DECLARE_TLV_DB_SCALE(lin4_pga_tlv, DA732X_LIN4_VOL_DB_MIN,
240                                   DA732X_LIN4_VOL_DB_INC, 0);
241 
242 static const DECLARE_TLV_DB_SCALE(adc_pga_tlv, DA732X_ADC_VOL_DB_MIN,
243                                   DA732X_ADC_VOL_DB_INC, 0);
244 
245 static const DECLARE_TLV_DB_SCALE(dac_pga_tlv, DA732X_DAC_VOL_DB_MIN,
246                                   DA732X_DAC_VOL_DB_INC, 0);
247 
248 static const DECLARE_TLV_DB_SCALE(eq_band_pga_tlv, DA732X_EQ_BAND_VOL_DB_MIN,
249                                   DA732X_EQ_BAND_VOL_DB_INC, 0);
250 
251 static const DECLARE_TLV_DB_SCALE(eq_overall_tlv, DA732X_EQ_OVERALL_VOL_DB_MIN,
252                                   DA732X_EQ_OVERALL_VOL_DB_INC, 0);
253 
254 /* High Pass Filter */
255 static const char *da732x_hpf_mode[] = {
256         "Disable", "Music", "Voice",
257 };
258 
259 static const char *da732x_hpf_music[] = {
260         "1.8Hz", "3.75Hz", "7.5Hz", "15Hz",
261 };
262 
263 static const char *da732x_hpf_voice[] = {
264         "2.5Hz", "25Hz", "50Hz", "100Hz",
265         "150Hz", "200Hz", "300Hz", "400Hz"
266 };
267 
268 static SOC_ENUM_SINGLE_DECL(da732x_dac1_hpf_mode_enum,
269                             DA732X_REG_DAC1_HPF, DA732X_HPF_MODE_SHIFT,
270                             da732x_hpf_mode);
271 
272 static SOC_ENUM_SINGLE_DECL(da732x_dac2_hpf_mode_enum,
273                             DA732X_REG_DAC2_HPF, DA732X_HPF_MODE_SHIFT,
274                             da732x_hpf_mode);
275 
276 static SOC_ENUM_SINGLE_DECL(da732x_dac3_hpf_mode_enum,
277                             DA732X_REG_DAC3_HPF, DA732X_HPF_MODE_SHIFT,
278                             da732x_hpf_mode);
279 
280 static SOC_ENUM_SINGLE_DECL(da732x_adc1_hpf_mode_enum,
281                             DA732X_REG_ADC1_HPF, DA732X_HPF_MODE_SHIFT,
282                             da732x_hpf_mode);
283 
284 static SOC_ENUM_SINGLE_DECL(da732x_adc2_hpf_mode_enum,
285                             DA732X_REG_ADC2_HPF, DA732X_HPF_MODE_SHIFT,
286                             da732x_hpf_mode);
287 
288 static SOC_ENUM_SINGLE_DECL(da732x_dac1_hp_filter_enum,
289                             DA732X_REG_DAC1_HPF, DA732X_HPF_MUSIC_SHIFT,
290                             da732x_hpf_music);
291 
292 static SOC_ENUM_SINGLE_DECL(da732x_dac2_hp_filter_enum,
293                             DA732X_REG_DAC2_HPF, DA732X_HPF_MUSIC_SHIFT,
294                             da732x_hpf_music);
295 
296 static SOC_ENUM_SINGLE_DECL(da732x_dac3_hp_filter_enum,
297                             DA732X_REG_DAC3_HPF, DA732X_HPF_MUSIC_SHIFT,
298                             da732x_hpf_music);
299 
300 static SOC_ENUM_SINGLE_DECL(da732x_adc1_hp_filter_enum,
301                             DA732X_REG_ADC1_HPF, DA732X_HPF_MUSIC_SHIFT,
302                             da732x_hpf_music);
303 
304 static SOC_ENUM_SINGLE_DECL(da732x_adc2_hp_filter_enum,
305                             DA732X_REG_ADC2_HPF, DA732X_HPF_MUSIC_SHIFT,
306                             da732x_hpf_music);
307 
308 static SOC_ENUM_SINGLE_DECL(da732x_dac1_voice_filter_enum,
309                             DA732X_REG_DAC1_HPF, DA732X_HPF_VOICE_SHIFT,
310                             da732x_hpf_voice);
311 
312 static SOC_ENUM_SINGLE_DECL(da732x_dac2_voice_filter_enum,
313                             DA732X_REG_DAC2_HPF, DA732X_HPF_VOICE_SHIFT,
314                             da732x_hpf_voice);
315 
316 static SOC_ENUM_SINGLE_DECL(da732x_dac3_voice_filter_enum,
317                             DA732X_REG_DAC3_HPF, DA732X_HPF_VOICE_SHIFT,
318                             da732x_hpf_voice);
319 
320 static SOC_ENUM_SINGLE_DECL(da732x_adc1_voice_filter_enum,
321                             DA732X_REG_ADC1_HPF, DA732X_HPF_VOICE_SHIFT,
322                             da732x_hpf_voice);
323 
324 static SOC_ENUM_SINGLE_DECL(da732x_adc2_voice_filter_enum,
325                             DA732X_REG_ADC2_HPF, DA732X_HPF_VOICE_SHIFT,
326                             da732x_hpf_voice);
327 
328 static int da732x_hpf_set(struct snd_kcontrol *kcontrol,
329                           struct snd_ctl_elem_value *ucontrol)
330 {
331         struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
332         struct soc_enum *enum_ctrl = (struct soc_enum *)kcontrol->private_value;
333         unsigned int reg = enum_ctrl->reg;
334         unsigned int sel = ucontrol->value.enumerated.item[0];
335         unsigned int bits;
336 
337         switch (sel) {
338         case DA732X_HPF_DISABLED:
339                 bits = DA732X_HPF_DIS;
340                 break;
341         case DA732X_HPF_VOICE:
342                 bits = DA732X_HPF_VOICE_EN;
343                 break;
344         case DA732X_HPF_MUSIC:
345                 bits = DA732X_HPF_MUSIC_EN;
346                 break;
347         default:
348                 return -EINVAL;
349         }
350 
351         snd_soc_component_update_bits(component, reg, DA732X_HPF_MASK, bits);
352 
353         return 0;
354 }
355 
356 static int da732x_hpf_get(struct snd_kcontrol *kcontrol,
357                           struct snd_ctl_elem_value *ucontrol)
358 {
359         struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
360         struct soc_enum *enum_ctrl = (struct soc_enum *)kcontrol->private_value;
361         unsigned int reg = enum_ctrl->reg;
362         int val;
363 
364         val = snd_soc_component_read32(component, reg) & DA732X_HPF_MASK;
365 
366         switch (val) {
367         case DA732X_HPF_VOICE_EN:
368                 ucontrol->value.enumerated.item[0] = DA732X_HPF_VOICE;
369                 break;
370         case DA732X_HPF_MUSIC_EN:
371                 ucontrol->value.enumerated.item[0] = DA732X_HPF_MUSIC;
372                 break;
373         default:
374                 ucontrol->value.enumerated.item[0] = DA732X_HPF_DISABLED;
375                 break;
376         }
377 
378         return 0;
379 }
380 
381 static const struct snd_kcontrol_new da732x_snd_controls[] = {
382         /* Input PGAs */
383         SOC_SINGLE_RANGE_TLV("MIC1 Boost Volume", DA732X_REG_MIC1_PRE,
384                              DA732X_MICBOOST_SHIFT, DA732X_MICBOOST_MIN,
385                              DA732X_MICBOOST_MAX, 0, mic_boost_tlv),
386         SOC_SINGLE_RANGE_TLV("MIC2 Boost Volume", DA732X_REG_MIC2_PRE,
387                              DA732X_MICBOOST_SHIFT, DA732X_MICBOOST_MIN,
388                              DA732X_MICBOOST_MAX, 0, mic_boost_tlv),
389         SOC_SINGLE_RANGE_TLV("MIC3 Boost Volume", DA732X_REG_MIC3_PRE,
390                              DA732X_MICBOOST_SHIFT, DA732X_MICBOOST_MIN,
391                              DA732X_MICBOOST_MAX, 0, mic_boost_tlv),
392 
393         /* MICs */
394         SOC_SINGLE("MIC1 Switch", DA732X_REG_MIC1, DA732X_MIC_MUTE_SHIFT,
395                    DA732X_SWITCH_MAX, DA732X_INVERT),
396         SOC_SINGLE_RANGE_TLV("MIC1 Volume", DA732X_REG_MIC1,
397                              DA732X_MIC_VOL_SHIFT, DA732X_MIC_VOL_VAL_MIN,
398                              DA732X_MIC_VOL_VAL_MAX, 0, mic_pga_tlv),
399         SOC_SINGLE("MIC2 Switch", DA732X_REG_MIC2, DA732X_MIC_MUTE_SHIFT,
400                    DA732X_SWITCH_MAX, DA732X_INVERT),
401         SOC_SINGLE_RANGE_TLV("MIC2 Volume", DA732X_REG_MIC2,
402                              DA732X_MIC_VOL_SHIFT, DA732X_MIC_VOL_VAL_MIN,
403                              DA732X_MIC_VOL_VAL_MAX, 0, mic_pga_tlv),
404         SOC_SINGLE("MIC3 Switch", DA732X_REG_MIC3, DA732X_MIC_MUTE_SHIFT,
405                    DA732X_SWITCH_MAX, DA732X_INVERT),
406         SOC_SINGLE_RANGE_TLV("MIC3 Volume", DA732X_REG_MIC3,
407                              DA732X_MIC_VOL_SHIFT, DA732X_MIC_VOL_VAL_MIN,
408                              DA732X_MIC_VOL_VAL_MAX, 0, mic_pga_tlv),
409 
410         /* AUXs */
411         SOC_SINGLE("AUX1L Switch", DA732X_REG_AUX1L, DA732X_AUX_MUTE_SHIFT,
412                    DA732X_SWITCH_MAX, DA732X_INVERT),
413         SOC_SINGLE_TLV("AUX1L Volume", DA732X_REG_AUX1L,
414                        DA732X_AUX_VOL_SHIFT, DA732X_AUX_VOL_VAL_MAX,
415                        DA732X_NO_INVERT, aux_pga_tlv),
416         SOC_SINGLE("AUX1R Switch", DA732X_REG_AUX1R, DA732X_AUX_MUTE_SHIFT,
417                    DA732X_SWITCH_MAX, DA732X_INVERT),
418         SOC_SINGLE_TLV("AUX1R Volume", DA732X_REG_AUX1R,
419                        DA732X_AUX_VOL_SHIFT, DA732X_AUX_VOL_VAL_MAX,
420                        DA732X_NO_INVERT, aux_pga_tlv),
421 
422         /* ADCs */
423         SOC_DOUBLE_TLV("ADC1 Volume", DA732X_REG_ADC1_SEL,
424                        DA732X_ADCL_VOL_SHIFT, DA732X_ADCR_VOL_SHIFT,
425                        DA732X_ADC_VOL_VAL_MAX, DA732X_INVERT, adc_pga_tlv),
426 
427         SOC_DOUBLE_TLV("ADC2 Volume", DA732X_REG_ADC2_SEL,
428                        DA732X_ADCL_VOL_SHIFT, DA732X_ADCR_VOL_SHIFT,
429                        DA732X_ADC_VOL_VAL_MAX, DA732X_INVERT, adc_pga_tlv),
430 
431         /* DACs */
432         SOC_DOUBLE("Digital Playback DAC12 Switch", DA732X_REG_DAC1_SEL,
433                    DA732X_DACL_MUTE_SHIFT, DA732X_DACR_MUTE_SHIFT,
434                    DA732X_SWITCH_MAX, DA732X_INVERT),
435         SOC_DOUBLE_R_TLV("Digital Playback DAC12 Volume", DA732X_REG_DAC1_L_VOL,
436                          DA732X_REG_DAC1_R_VOL, DA732X_DAC_VOL_SHIFT,
437                          DA732X_DAC_VOL_VAL_MAX, DA732X_INVERT, dac_pga_tlv),
438         SOC_SINGLE("Digital Playback DAC3 Switch", DA732X_REG_DAC2_SEL,
439                    DA732X_DACL_MUTE_SHIFT, DA732X_SWITCH_MAX, DA732X_INVERT),
440         SOC_SINGLE_TLV("Digital Playback DAC3 Volume", DA732X_REG_DAC2_L_VOL,
441                         DA732X_DAC_VOL_SHIFT, DA732X_DAC_VOL_VAL_MAX,
442                         DA732X_INVERT, dac_pga_tlv),
443         SOC_SINGLE("Digital Playback DAC4 Switch", DA732X_REG_DAC2_SEL,
444                    DA732X_DACR_MUTE_SHIFT, DA732X_SWITCH_MAX, DA732X_INVERT),
445         SOC_SINGLE_TLV("Digital Playback DAC4 Volume", DA732X_REG_DAC2_R_VOL,
446                        DA732X_DAC_VOL_SHIFT, DA732X_DAC_VOL_VAL_MAX,
447                        DA732X_INVERT, dac_pga_tlv),
448         SOC_SINGLE("Digital Playback DAC5 Switch", DA732X_REG_DAC3_SEL,
449                    DA732X_DACL_MUTE_SHIFT, DA732X_SWITCH_MAX, DA732X_INVERT),
450         SOC_SINGLE_TLV("Digital Playback DAC5 Volume", DA732X_REG_DAC3_VOL,
451                        DA732X_DAC_VOL_SHIFT, DA732X_DAC_VOL_VAL_MAX,
452                        DA732X_INVERT, dac_pga_tlv),
453 
454         /* High Pass Filters */
455         SOC_ENUM_EXT("DAC1 High Pass Filter Mode",
456                      da732x_dac1_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
457         SOC_ENUM("DAC1 High Pass Filter", da732x_dac1_hp_filter_enum),
458         SOC_ENUM("DAC1 Voice Filter", da732x_dac1_voice_filter_enum),
459 
460         SOC_ENUM_EXT("DAC2 High Pass Filter Mode",
461                      da732x_dac2_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
462         SOC_ENUM("DAC2 High Pass Filter", da732x_dac2_hp_filter_enum),
463         SOC_ENUM("DAC2 Voice Filter", da732x_dac2_voice_filter_enum),
464 
465         SOC_ENUM_EXT("DAC3 High Pass Filter Mode",
466                      da732x_dac3_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
467         SOC_ENUM("DAC3 High Pass Filter", da732x_dac3_hp_filter_enum),
468         SOC_ENUM("DAC3 Filter Mode", da732x_dac3_voice_filter_enum),
469 
470         SOC_ENUM_EXT("ADC1 High Pass Filter Mode",
471                      da732x_adc1_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
472         SOC_ENUM("ADC1 High Pass Filter", da732x_adc1_hp_filter_enum),
473         SOC_ENUM("ADC1 Voice Filter", da732x_adc1_voice_filter_enum),
474 
475         SOC_ENUM_EXT("ADC2 High Pass Filter Mode",
476                      da732x_adc2_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
477         SOC_ENUM("ADC2 High Pass Filter", da732x_adc2_hp_filter_enum),
478         SOC_ENUM("ADC2 Voice Filter", da732x_adc2_voice_filter_enum),
479 
480         /* Equalizers */
481         SOC_SINGLE("ADC1 EQ Switch", DA732X_REG_ADC1_EQ5,
482                    DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
483         SOC_SINGLE_TLV("ADC1 EQ Band 1 Volume", DA732X_REG_ADC1_EQ12,
484                        DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
485                        DA732X_INVERT, eq_band_pga_tlv),
486         SOC_SINGLE_TLV("ADC1 EQ Band 2 Volume", DA732X_REG_ADC1_EQ12,
487                        DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
488                        DA732X_INVERT, eq_band_pga_tlv),
489         SOC_SINGLE_TLV("ADC1 EQ Band 3 Volume", DA732X_REG_ADC1_EQ34,
490                        DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
491                        DA732X_INVERT, eq_band_pga_tlv),
492         SOC_SINGLE_TLV("ADC1 EQ Band 4 Volume", DA732X_REG_ADC1_EQ34,
493                        DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
494                        DA732X_INVERT, eq_band_pga_tlv),
495         SOC_SINGLE_TLV("ADC1 EQ Band 5 Volume", DA732X_REG_ADC1_EQ5,
496                        DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
497                        DA732X_INVERT, eq_band_pga_tlv),
498         SOC_SINGLE_TLV("ADC1 EQ Overall Volume", DA732X_REG_ADC1_EQ5,
499                        DA732X_EQ_OVERALL_SHIFT, DA732X_EQ_OVERALL_VOL_VAL_MAX,
500                        DA732X_INVERT, eq_overall_tlv),
501 
502         SOC_SINGLE("ADC2 EQ Switch", DA732X_REG_ADC2_EQ5,
503                    DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
504         SOC_SINGLE_TLV("ADC2 EQ Band 1 Volume", DA732X_REG_ADC2_EQ12,
505                        DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
506                        DA732X_INVERT, eq_band_pga_tlv),
507         SOC_SINGLE_TLV("ADC2 EQ Band 2 Volume", DA732X_REG_ADC2_EQ12,
508                        DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
509                        DA732X_INVERT, eq_band_pga_tlv),
510         SOC_SINGLE_TLV("ADC2 EQ Band 3 Volume", DA732X_REG_ADC2_EQ34,
511                        DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
512                        DA732X_INVERT, eq_band_pga_tlv),
513         SOC_SINGLE_TLV("ACD2 EQ Band 4 Volume", DA732X_REG_ADC2_EQ34,
514                        DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
515                        DA732X_INVERT, eq_band_pga_tlv),
516         SOC_SINGLE_TLV("ACD2 EQ Band 5 Volume", DA732X_REG_ADC2_EQ5,
517                        DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
518                        DA732X_INVERT, eq_band_pga_tlv),
519         SOC_SINGLE_TLV("ADC2 EQ Overall Volume", DA732X_REG_ADC1_EQ5,
520                        DA732X_EQ_OVERALL_SHIFT, DA732X_EQ_OVERALL_VOL_VAL_MAX,
521                        DA732X_INVERT, eq_overall_tlv),
522 
523         SOC_SINGLE("DAC1 EQ Switch", DA732X_REG_DAC1_EQ5,
524                    DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
525         SOC_SINGLE_TLV("DAC1 EQ Band 1 Volume", DA732X_REG_DAC1_EQ12,
526                        DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
527                        DA732X_INVERT, eq_band_pga_tlv),
528         SOC_SINGLE_TLV("DAC1 EQ Band 2 Volume", DA732X_REG_DAC1_EQ12,
529                        DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
530                        DA732X_INVERT, eq_band_pga_tlv),
531         SOC_SINGLE_TLV("DAC1 EQ Band 3 Volume", DA732X_REG_DAC1_EQ34,
532                        DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
533                        DA732X_INVERT, eq_band_pga_tlv),
534         SOC_SINGLE_TLV("DAC1 EQ Band 4 Volume", DA732X_REG_DAC1_EQ34,
535                        DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
536                        DA732X_INVERT, eq_band_pga_tlv),
537         SOC_SINGLE_TLV("DAC1 EQ Band 5 Volume", DA732X_REG_DAC1_EQ5,
538                        DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
539                        DA732X_INVERT, eq_band_pga_tlv),
540 
541         SOC_SINGLE("DAC2 EQ Switch", DA732X_REG_DAC2_EQ5,
542                    DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
543         SOC_SINGLE_TLV("DAC2 EQ Band 1 Volume", DA732X_REG_DAC2_EQ12,
544                        DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
545                        DA732X_INVERT, eq_band_pga_tlv),
546         SOC_SINGLE_TLV("DAC2 EQ Band 2 Volume", DA732X_REG_DAC2_EQ12,
547                        DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
548                        DA732X_INVERT, eq_band_pga_tlv),
549         SOC_SINGLE_TLV("DAC2 EQ Band 3 Volume", DA732X_REG_DAC2_EQ34,
550                        DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
551                        DA732X_INVERT, eq_band_pga_tlv),
552         SOC_SINGLE_TLV("DAC2 EQ Band 4 Volume", DA732X_REG_DAC2_EQ34,
553                        DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
554                        DA732X_INVERT, eq_band_pga_tlv),
555         SOC_SINGLE_TLV("DAC2 EQ Band 5 Volume", DA732X_REG_DAC2_EQ5,
556                        DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
557                        DA732X_INVERT, eq_band_pga_tlv),
558 
559         SOC_SINGLE("DAC3 EQ Switch", DA732X_REG_DAC3_EQ5,
560                    DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
561         SOC_SINGLE_TLV("DAC3 EQ Band 1 Volume", DA732X_REG_DAC3_EQ12,
562                        DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
563                        DA732X_INVERT, eq_band_pga_tlv),
564         SOC_SINGLE_TLV("DAC3 EQ Band 2 Volume", DA732X_REG_DAC3_EQ12,
565                        DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
566                        DA732X_INVERT, eq_band_pga_tlv),
567         SOC_SINGLE_TLV("DAC3 EQ Band 3 Volume", DA732X_REG_DAC3_EQ34,
568                        DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
569                        DA732X_INVERT, eq_band_pga_tlv),
570         SOC_SINGLE_TLV("DAC3 EQ Band 4 Volume", DA732X_REG_DAC3_EQ34,
571                        DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
572                        DA732X_INVERT, eq_band_pga_tlv),
573         SOC_SINGLE_TLV("DAC3 EQ Band 5 Volume", DA732X_REG_DAC3_EQ5,
574                        DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
575                        DA732X_INVERT, eq_band_pga_tlv),
576 
577         /* Lineout 2 Reciever*/
578         SOC_SINGLE("Lineout 2 Switch", DA732X_REG_LIN2, DA732X_LOUT_MUTE_SHIFT,
579                    DA732X_SWITCH_MAX, DA732X_INVERT),
580         SOC_SINGLE_TLV("Lineout 2 Volume", DA732X_REG_LIN2,
581                        DA732X_LOUT_VOL_SHIFT, DA732X_LOUT_VOL_VAL_MAX,
582                        DA732X_NO_INVERT, lin2_pga_tlv),
583 
584         /* Lineout 3 SPEAKER*/
585         SOC_SINGLE("Lineout 3 Switch", DA732X_REG_LIN3, DA732X_LOUT_MUTE_SHIFT,
586                    DA732X_SWITCH_MAX, DA732X_INVERT),
587         SOC_SINGLE_TLV("Lineout 3 Volume", DA732X_REG_LIN3,
588                        DA732X_LOUT_VOL_SHIFT, DA732X_LOUT_VOL_VAL_MAX,
589                        DA732X_NO_INVERT, lin3_pga_tlv),
590 
591         /* Lineout 4 */
592         SOC_SINGLE("Lineout 4 Switch", DA732X_REG_LIN4, DA732X_LOUT_MUTE_SHIFT,
593                    DA732X_SWITCH_MAX, DA732X_INVERT),
594         SOC_SINGLE_TLV("Lineout 4 Volume", DA732X_REG_LIN4,
595                        DA732X_LOUT_VOL_SHIFT, DA732X_LOUT_VOL_VAL_MAX,
596                        DA732X_NO_INVERT, lin4_pga_tlv),
597 
598         /* Headphones */
599         SOC_DOUBLE_R("Headphone Switch", DA732X_REG_HPR, DA732X_REG_HPL,
600                      DA732X_HP_MUTE_SHIFT, DA732X_SWITCH_MAX, DA732X_INVERT),
601         SOC_DOUBLE_R_TLV("Headphone Volume", DA732X_REG_HPL_VOL,
602                          DA732X_REG_HPR_VOL, DA732X_HP_VOL_SHIFT,
603                          DA732X_HP_VOL_VAL_MAX, DA732X_NO_INVERT, hp_pga_tlv),
604 };
605 
606 static int da732x_adc_event(struct snd_soc_dapm_widget *w,
607                             struct snd_kcontrol *kcontrol, int event)
608 {
609         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
610 
611         switch (event) {
612         case SND_SOC_DAPM_POST_PMU:
613                 switch (w->reg) {
614                 case DA732X_REG_ADC1_PD:
615                         snd_soc_component_update_bits(component, DA732X_REG_CLK_EN3,
616                                             DA732X_ADCA_BB_CLK_EN,
617                                             DA732X_ADCA_BB_CLK_EN);
618                         break;
619                 case DA732X_REG_ADC2_PD:
620                         snd_soc_component_update_bits(component, DA732X_REG_CLK_EN3,
621                                             DA732X_ADCC_BB_CLK_EN,
622                                             DA732X_ADCC_BB_CLK_EN);
623                         break;
624                 default:
625                         return -EINVAL;
626                 }
627 
628                 snd_soc_component_update_bits(component, w->reg, DA732X_ADC_RST_MASK,
629                                     DA732X_ADC_SET_ACT);
630                 snd_soc_component_update_bits(component, w->reg, DA732X_ADC_PD_MASK,
631                                     DA732X_ADC_ON);
632                 break;
633         case SND_SOC_DAPM_POST_PMD:
634                 snd_soc_component_update_bits(component, w->reg, DA732X_ADC_PD_MASK,
635                                     DA732X_ADC_OFF);
636                 snd_soc_component_update_bits(component, w->reg, DA732X_ADC_RST_MASK,
637                                     DA732X_ADC_SET_RST);
638 
639                 switch (w->reg) {
640                 case DA732X_REG_ADC1_PD:
641                         snd_soc_component_update_bits(component, DA732X_REG_CLK_EN3,
642                                             DA732X_ADCA_BB_CLK_EN, 0);
643                         break;
644                 case DA732X_REG_ADC2_PD:
645                         snd_soc_component_update_bits(component, DA732X_REG_CLK_EN3,
646                                             DA732X_ADCC_BB_CLK_EN, 0);
647                         break;
648                 default:
649                         return -EINVAL;
650                 }
651 
652                 break;
653         default:
654                 return -EINVAL;
655         }
656 
657         return 0;
658 }
659 
660 static int da732x_out_pga_event(struct snd_soc_dapm_widget *w,
661                                 struct snd_kcontrol *kcontrol, int event)
662 {
663         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
664 
665         switch (event) {
666         case SND_SOC_DAPM_POST_PMU:
667                 snd_soc_component_update_bits(component, w->reg,
668                                     (1 << w->shift) | DA732X_OUT_HIZ_EN,
669                                     (1 << w->shift) | DA732X_OUT_HIZ_EN);
670                 break;
671         case SND_SOC_DAPM_POST_PMD:
672                 snd_soc_component_update_bits(component, w->reg,
673                                     (1 << w->shift) | DA732X_OUT_HIZ_EN,
674                                     (1 << w->shift) | DA732X_OUT_HIZ_DIS);
675                 break;
676         default:
677                 return -EINVAL;
678         }
679 
680         return 0;
681 }
682 
683 static const char *adcl_text[] = {
684         "AUX1L", "MIC1"
685 };
686 
687 static const char *adcr_text[] = {
688         "AUX1R", "MIC2", "MIC3"
689 };
690 
691 static const char *enable_text[] = {
692         "Disabled",
693         "Enabled"
694 };
695 
696 /* ADC1LMUX */
697 static SOC_ENUM_SINGLE_DECL(adc1l_enum,
698                             DA732X_REG_INP_MUX, DA732X_ADC1L_MUX_SEL_SHIFT,
699                             adcl_text);
700 static const struct snd_kcontrol_new adc1l_mux =
701         SOC_DAPM_ENUM("ADC Route", adc1l_enum);
702 
703 /* ADC1RMUX */
704 static SOC_ENUM_SINGLE_DECL(adc1r_enum,
705                             DA732X_REG_INP_MUX, DA732X_ADC1R_MUX_SEL_SHIFT,
706                             adcr_text);
707 static const struct snd_kcontrol_new adc1r_mux =
708         SOC_DAPM_ENUM("ADC Route", adc1r_enum);
709 
710 /* ADC2LMUX */
711 static SOC_ENUM_SINGLE_DECL(adc2l_enum,
712                             DA732X_REG_INP_MUX, DA732X_ADC2L_MUX_SEL_SHIFT,
713                             adcl_text);
714 static const struct snd_kcontrol_new adc2l_mux =
715         SOC_DAPM_ENUM("ADC Route", adc2l_enum);
716 
717 /* ADC2RMUX */
718 static SOC_ENUM_SINGLE_DECL(adc2r_enum,
719                             DA732X_REG_INP_MUX, DA732X_ADC2R_MUX_SEL_SHIFT,
720                             adcr_text);
721 
722 static const struct snd_kcontrol_new adc2r_mux =
723         SOC_DAPM_ENUM("ADC Route", adc2r_enum);
724 
725 static SOC_ENUM_SINGLE_DECL(da732x_hp_left_output,
726                             DA732X_REG_HPL, DA732X_HP_OUT_DAC_EN_SHIFT,
727                             enable_text);
728 
729 static const struct snd_kcontrol_new hpl_mux =
730         SOC_DAPM_ENUM("HPL Switch", da732x_hp_left_output);
731 
732 static SOC_ENUM_SINGLE_DECL(da732x_hp_right_output,
733                             DA732X_REG_HPR, DA732X_HP_OUT_DAC_EN_SHIFT,
734                             enable_text);
735 
736 static const struct snd_kcontrol_new hpr_mux =
737         SOC_DAPM_ENUM("HPR Switch", da732x_hp_right_output);
738 
739 static SOC_ENUM_SINGLE_DECL(da732x_speaker_output,
740                             DA732X_REG_LIN3, DA732X_LOUT_DAC_EN_SHIFT,
741                             enable_text);
742 
743 static const struct snd_kcontrol_new spk_mux =
744         SOC_DAPM_ENUM("SPK Switch", da732x_speaker_output);
745 
746 static SOC_ENUM_SINGLE_DECL(da732x_lout4_output,
747                             DA732X_REG_LIN4, DA732X_LOUT_DAC_EN_SHIFT,
748                             enable_text);
749 
750 static const struct snd_kcontrol_new lout4_mux =
751         SOC_DAPM_ENUM("LOUT4 Switch", da732x_lout4_output);
752 
753 static SOC_ENUM_SINGLE_DECL(da732x_lout2_output,
754                             DA732X_REG_LIN2, DA732X_LOUT_DAC_EN_SHIFT,
755                             enable_text);
756 
757 static const struct snd_kcontrol_new lout2_mux =
758         SOC_DAPM_ENUM("LOUT2 Switch", da732x_lout2_output);
759 
760 static const struct snd_soc_dapm_widget da732x_dapm_widgets[] = {
761         /* Supplies */
762         SND_SOC_DAPM_SUPPLY("ADC1 Supply", DA732X_REG_ADC1_PD, 0,
763                             DA732X_NO_INVERT, da732x_adc_event,
764                             SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
765         SND_SOC_DAPM_SUPPLY("ADC2 Supply", DA732X_REG_ADC2_PD, 0,
766                             DA732X_NO_INVERT, da732x_adc_event,
767                             SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
768         SND_SOC_DAPM_SUPPLY("DAC1 CLK", DA732X_REG_CLK_EN4,
769                             DA732X_DACA_BB_CLK_SHIFT, DA732X_NO_INVERT,
770                             NULL, 0),
771         SND_SOC_DAPM_SUPPLY("DAC2 CLK", DA732X_REG_CLK_EN4,
772                             DA732X_DACC_BB_CLK_SHIFT, DA732X_NO_INVERT,
773                             NULL, 0),
774         SND_SOC_DAPM_SUPPLY("DAC3 CLK", DA732X_REG_CLK_EN5,
775                             DA732X_DACE_BB_CLK_SHIFT, DA732X_NO_INVERT,
776                             NULL, 0),
777 
778         /* Micbias */
779         SND_SOC_DAPM_SUPPLY("MICBIAS1", DA732X_REG_MICBIAS1,
780                             DA732X_MICBIAS_EN_SHIFT,
781                             DA732X_NO_INVERT, NULL, 0),
782         SND_SOC_DAPM_SUPPLY("MICBIAS2", DA732X_REG_MICBIAS2,
783                             DA732X_MICBIAS_EN_SHIFT,
784                             DA732X_NO_INVERT, NULL, 0),
785 
786         /* Inputs */
787         SND_SOC_DAPM_INPUT("MIC1"),
788         SND_SOC_DAPM_INPUT("MIC2"),
789         SND_SOC_DAPM_INPUT("MIC3"),
790         SND_SOC_DAPM_INPUT("AUX1L"),
791         SND_SOC_DAPM_INPUT("AUX1R"),
792 
793         /* Outputs */
794         SND_SOC_DAPM_OUTPUT("HPL"),
795         SND_SOC_DAPM_OUTPUT("HPR"),
796         SND_SOC_DAPM_OUTPUT("LOUTL"),
797         SND_SOC_DAPM_OUTPUT("LOUTR"),
798         SND_SOC_DAPM_OUTPUT("ClassD"),
799 
800         /* ADCs */
801         SND_SOC_DAPM_ADC("ADC1L", NULL, DA732X_REG_ADC1_SEL,
802                          DA732X_ADCL_EN_SHIFT, DA732X_NO_INVERT),
803         SND_SOC_DAPM_ADC("ADC1R", NULL, DA732X_REG_ADC1_SEL,
804                          DA732X_ADCR_EN_SHIFT, DA732X_NO_INVERT),
805         SND_SOC_DAPM_ADC("ADC2L", NULL, DA732X_REG_ADC2_SEL,
806                          DA732X_ADCL_EN_SHIFT, DA732X_NO_INVERT),
807         SND_SOC_DAPM_ADC("ADC2R", NULL, DA732X_REG_ADC2_SEL,
808                          DA732X_ADCR_EN_SHIFT, DA732X_NO_INVERT),
809 
810         /* DACs */
811         SND_SOC_DAPM_DAC("DAC1L", NULL, DA732X_REG_DAC1_SEL,
812                          DA732X_DACL_EN_SHIFT, DA732X_NO_INVERT),
813         SND_SOC_DAPM_DAC("DAC1R", NULL, DA732X_REG_DAC1_SEL,
814                          DA732X_DACR_EN_SHIFT, DA732X_NO_INVERT),
815         SND_SOC_DAPM_DAC("DAC2L", NULL, DA732X_REG_DAC2_SEL,
816                          DA732X_DACL_EN_SHIFT, DA732X_NO_INVERT),
817         SND_SOC_DAPM_DAC("DAC2R", NULL, DA732X_REG_DAC2_SEL,
818                          DA732X_DACR_EN_SHIFT, DA732X_NO_INVERT),
819         SND_SOC_DAPM_DAC("DAC3", NULL, DA732X_REG_DAC3_SEL,
820                          DA732X_DACL_EN_SHIFT, DA732X_NO_INVERT),
821 
822         /* Input Pgas */
823         SND_SOC_DAPM_PGA("MIC1 PGA", DA732X_REG_MIC1, DA732X_MIC_EN_SHIFT,
824                          0, NULL, 0),
825         SND_SOC_DAPM_PGA("MIC2 PGA", DA732X_REG_MIC2, DA732X_MIC_EN_SHIFT,
826                          0, NULL, 0),
827         SND_SOC_DAPM_PGA("MIC3 PGA", DA732X_REG_MIC3, DA732X_MIC_EN_SHIFT,
828                          0, NULL, 0),
829         SND_SOC_DAPM_PGA("AUX1L PGA", DA732X_REG_AUX1L, DA732X_AUX_EN_SHIFT,
830                          0, NULL, 0),
831         SND_SOC_DAPM_PGA("AUX1R PGA", DA732X_REG_AUX1R, DA732X_AUX_EN_SHIFT,
832                          0, NULL, 0),
833 
834         SND_SOC_DAPM_PGA_E("HP Left", DA732X_REG_HPL, DA732X_HP_OUT_EN_SHIFT,
835                            0, NULL, 0, da732x_out_pga_event,
836                            SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
837         SND_SOC_DAPM_PGA_E("HP Right", DA732X_REG_HPR, DA732X_HP_OUT_EN_SHIFT,
838                            0, NULL, 0, da732x_out_pga_event,
839                            SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
840         SND_SOC_DAPM_PGA_E("LIN2", DA732X_REG_LIN2, DA732X_LIN_OUT_EN_SHIFT,
841                            0, NULL, 0, da732x_out_pga_event,
842                            SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
843         SND_SOC_DAPM_PGA_E("LIN3", DA732X_REG_LIN3, DA732X_LIN_OUT_EN_SHIFT,
844                            0, NULL, 0, da732x_out_pga_event,
845                            SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
846         SND_SOC_DAPM_PGA_E("LIN4", DA732X_REG_LIN4, DA732X_LIN_OUT_EN_SHIFT,
847                            0, NULL, 0, da732x_out_pga_event,
848                            SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
849 
850         /* MUXs */
851         SND_SOC_DAPM_MUX("ADC1 Left MUX", SND_SOC_NOPM, 0, 0, &adc1l_mux),
852         SND_SOC_DAPM_MUX("ADC1 Right MUX", SND_SOC_NOPM, 0, 0, &adc1r_mux),
853         SND_SOC_DAPM_MUX("ADC2 Left MUX", SND_SOC_NOPM, 0, 0, &adc2l_mux),
854         SND_SOC_DAPM_MUX("ADC2 Right MUX", SND_SOC_NOPM, 0, 0, &adc2r_mux),
855 
856         SND_SOC_DAPM_MUX("HP Left MUX", SND_SOC_NOPM, 0, 0, &hpl_mux),
857         SND_SOC_DAPM_MUX("HP Right MUX", SND_SOC_NOPM, 0, 0, &hpr_mux),
858         SND_SOC_DAPM_MUX("Speaker MUX", SND_SOC_NOPM, 0, 0, &spk_mux),
859         SND_SOC_DAPM_MUX("LOUT2 MUX", SND_SOC_NOPM, 0, 0, &lout2_mux),
860         SND_SOC_DAPM_MUX("LOUT4 MUX", SND_SOC_NOPM, 0, 0, &lout4_mux),
861 
862         /* AIF interfaces */
863         SND_SOC_DAPM_AIF_OUT("AIFA Output", "AIFA Capture", 0, DA732X_REG_AIFA3,
864                              DA732X_AIF_EN_SHIFT, 0),
865         SND_SOC_DAPM_AIF_IN("AIFA Input", "AIFA Playback", 0, DA732X_REG_AIFA3,
866                             DA732X_AIF_EN_SHIFT, 0),
867 
868         SND_SOC_DAPM_AIF_OUT("AIFB Output", "AIFB Capture", 0, DA732X_REG_AIFB3,
869                              DA732X_AIF_EN_SHIFT, 0),
870         SND_SOC_DAPM_AIF_IN("AIFB Input", "AIFB Playback", 0, DA732X_REG_AIFB3,
871                             DA732X_AIF_EN_SHIFT, 0),
872 };
873 
874 static const struct snd_soc_dapm_route da732x_dapm_routes[] = {
875         /* Inputs */
876         {"AUX1L PGA", NULL, "AUX1L"},
877         {"AUX1R PGA", NULL, "AUX1R"},
878         {"MIC1 PGA", NULL, "MIC1"},
879         {"MIC2 PGA", NULL, "MIC2"},
880         {"MIC3 PGA", NULL, "MIC3"},
881 
882         /* Capture Path */
883         {"ADC1 Left MUX", "MIC1", "MIC1 PGA"},
884         {"ADC1 Left MUX", "AUX1L", "AUX1L PGA"},
885 
886         {"ADC1 Right MUX", "AUX1R", "AUX1R PGA"},
887         {"ADC1 Right MUX", "MIC2", "MIC2 PGA"},
888         {"ADC1 Right MUX", "MIC3", "MIC3 PGA"},
889 
890         {"ADC2 Left MUX", "AUX1L", "AUX1L PGA"},
891         {"ADC2 Left MUX", "MIC1", "MIC1 PGA"},
892 
893         {"ADC2 Right MUX", "AUX1R", "AUX1R PGA"},
894         {"ADC2 Right MUX", "MIC2", "MIC2 PGA"},
895         {"ADC2 Right MUX", "MIC3", "MIC3 PGA"},
896 
897         {"ADC1L", NULL, "ADC1 Supply"},
898         {"ADC1R", NULL, "ADC1 Supply"},
899         {"ADC2L", NULL, "ADC2 Supply"},
900         {"ADC2R", NULL, "ADC2 Supply"},
901 
902         {"ADC1L", NULL, "ADC1 Left MUX"},
903         {"ADC1R", NULL, "ADC1 Right MUX"},
904         {"ADC2L", NULL, "ADC2 Left MUX"},
905         {"ADC2R", NULL, "ADC2 Right MUX"},
906 
907         {"AIFA Output", NULL, "ADC1L"},
908         {"AIFA Output", NULL, "ADC1R"},
909         {"AIFB Output", NULL, "ADC2L"},
910         {"AIFB Output", NULL, "ADC2R"},
911 
912         {"HP Left MUX", "Enabled", "AIFA Input"},
913         {"HP Right MUX", "Enabled", "AIFA Input"},
914         {"Speaker MUX", "Enabled", "AIFB Input"},
915         {"LOUT2 MUX", "Enabled", "AIFB Input"},
916         {"LOUT4 MUX", "Enabled", "AIFB Input"},
917 
918         {"DAC1L", NULL, "DAC1 CLK"},
919         {"DAC1R", NULL, "DAC1 CLK"},
920         {"DAC2L", NULL, "DAC2 CLK"},
921         {"DAC2R", NULL, "DAC2 CLK"},
922         {"DAC3", NULL, "DAC3 CLK"},
923 
924         {"DAC1L", NULL, "HP Left MUX"},
925         {"DAC1R", NULL, "HP Right MUX"},
926         {"DAC2L", NULL, "Speaker MUX"},
927         {"DAC2R", NULL, "LOUT4 MUX"},
928         {"DAC3", NULL, "LOUT2 MUX"},
929 
930         /* Output Pgas */
931         {"HP Left", NULL, "DAC1L"},
932         {"HP Right", NULL, "DAC1R"},
933         {"LIN3", NULL, "DAC2L"},
934         {"LIN4", NULL, "DAC2R"},
935         {"LIN2", NULL, "DAC3"},
936 
937         /* Outputs */
938         {"ClassD", NULL, "LIN3"},
939         {"LOUTL", NULL, "LIN2"},
940         {"LOUTR", NULL, "LIN4"},
941         {"HPL", NULL, "HP Left"},
942         {"HPR", NULL, "HP Right"},
943 };
944 
945 static int da732x_hw_params(struct snd_pcm_substream *substream,
946                             struct snd_pcm_hw_params *params,
947                             struct snd_soc_dai *dai)
948 {
949         struct snd_soc_component *component = dai->component;
950         u32 aif = 0;
951         u32 reg_aif;
952         u32 fs;
953 
954         reg_aif = dai->driver->base;
955 
956         switch (params_width(params)) {
957         case 16:
958                 aif |= DA732X_AIF_WORD_16;
959                 break;
960         case 20:
961                 aif |= DA732X_AIF_WORD_20;
962                 break;
963         case 24:
964                 aif |= DA732X_AIF_WORD_24;
965                 break;
966         case 32:
967                 aif |= DA732X_AIF_WORD_32;
968                 break;
969         default:
970                 return -EINVAL;
971         }
972 
973         switch (params_rate(params)) {
974         case 8000:
975                 fs = DA732X_SR_8KHZ;
976                 break;
977         case 11025:
978                 fs = DA732X_SR_11_025KHZ;
979                 break;
980         case 12000:
981                 fs = DA732X_SR_12KHZ;
982                 break;
983         case 16000:
984                 fs = DA732X_SR_16KHZ;
985                 break;
986         case 22050:
987                 fs = DA732X_SR_22_05KHZ;
988                 break;
989         case 24000:
990                 fs = DA732X_SR_24KHZ;
991                 break;
992         case 32000:
993                 fs = DA732X_SR_32KHZ;
994                 break;
995         case 44100:
996                 fs = DA732X_SR_44_1KHZ;
997                 break;
998         case 48000:
999                 fs = DA732X_SR_48KHZ;
1000                 break;
1001         case 88100:
1002                 fs = DA732X_SR_88_1KHZ;
1003                 break;
1004         case 96000:
1005                 fs = DA732X_SR_96KHZ;
1006                 break;
1007         default:
1008                 return -EINVAL;
1009         }
1010 
1011         snd_soc_component_update_bits(component, reg_aif, DA732X_AIF_WORD_MASK, aif);
1012         snd_soc_component_update_bits(component, DA732X_REG_CLK_CTRL, DA732X_SR1_MASK, fs);
1013 
1014         return 0;
1015 }
1016 
1017 static int da732x_set_dai_fmt(struct snd_soc_dai *dai, u32 fmt)
1018 {
1019         struct snd_soc_component *component = dai->component;
1020         u32 aif_mclk, pc_count;
1021         u32 reg_aif1, aif1;
1022         u32 reg_aif3, aif3;
1023 
1024         switch (dai->id) {
1025         case DA732X_DAI_ID1:
1026                 reg_aif1 = DA732X_REG_AIFA1;
1027                 reg_aif3 = DA732X_REG_AIFA3;
1028                 pc_count = DA732X_PC_PULSE_AIFA | DA732X_PC_RESYNC_NOT_AUT |
1029                            DA732X_PC_SAME;
1030                 break;
1031         case DA732X_DAI_ID2:
1032                 reg_aif1 = DA732X_REG_AIFB1;
1033                 reg_aif3 = DA732X_REG_AIFB3;
1034                 pc_count = DA732X_PC_PULSE_AIFB | DA732X_PC_RESYNC_NOT_AUT |
1035                            DA732X_PC_SAME;
1036                 break;
1037         default:
1038                 return -EINVAL;
1039         }
1040 
1041         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1042         case SND_SOC_DAIFMT_CBS_CFS:
1043                 aif1 = DA732X_AIF_SLAVE;
1044                 aif_mclk = DA732X_AIFM_FRAME_64 | DA732X_AIFM_SRC_SEL_AIFA;
1045                 break;
1046         case SND_SOC_DAIFMT_CBM_CFM:
1047                 aif1 = DA732X_AIF_CLK_FROM_SRC;
1048                 aif_mclk = DA732X_CLK_GENERATION_AIF_A;
1049                 break;
1050         default:
1051                 return -EINVAL;
1052         }
1053 
1054         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1055         case SND_SOC_DAIFMT_I2S:
1056                 aif3 = DA732X_AIF_I2S_MODE;
1057                 break;
1058         case SND_SOC_DAIFMT_RIGHT_J:
1059                 aif3 = DA732X_AIF_RIGHT_J_MODE;
1060                 break;
1061         case SND_SOC_DAIFMT_LEFT_J:
1062                 aif3 = DA732X_AIF_LEFT_J_MODE;
1063                 break;
1064         case SND_SOC_DAIFMT_DSP_B:
1065                 aif3 = DA732X_AIF_DSP_MODE;
1066                 break;
1067         default:
1068                 return -EINVAL;
1069         }
1070 
1071         /* Clock inversion */
1072         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1073         case SND_SOC_DAIFMT_DSP_B:
1074                 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1075                 case SND_SOC_DAIFMT_NB_NF:
1076                         break;
1077                 case SND_SOC_DAIFMT_IB_NF:
1078                         aif3 |= DA732X_AIF_BCLK_INV;
1079                         break;
1080                 default:
1081                         return -EINVAL;
1082                 }
1083                 break;
1084         case SND_SOC_DAIFMT_I2S:
1085         case SND_SOC_DAIFMT_RIGHT_J:
1086         case SND_SOC_DAIFMT_LEFT_J:
1087                 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1088                 case SND_SOC_DAIFMT_NB_NF:
1089                         break;
1090                 case SND_SOC_DAIFMT_IB_IF:
1091                         aif3 |= DA732X_AIF_BCLK_INV | DA732X_AIF_WCLK_INV;
1092                         break;
1093                 case SND_SOC_DAIFMT_IB_NF:
1094                         aif3 |= DA732X_AIF_BCLK_INV;
1095                         break;
1096                 case SND_SOC_DAIFMT_NB_IF:
1097                         aif3 |= DA732X_AIF_WCLK_INV;
1098                         break;
1099                 default:
1100                         return -EINVAL;
1101                 }
1102                 break;
1103         default:
1104                 return -EINVAL;
1105         }
1106 
1107         snd_soc_component_write(component, DA732X_REG_AIF_MCLK, aif_mclk);
1108         snd_soc_component_update_bits(component, reg_aif1, DA732X_AIF1_CLK_MASK, aif1);
1109         snd_soc_component_update_bits(component, reg_aif3, DA732X_AIF_BCLK_INV |
1110                             DA732X_AIF_WCLK_INV | DA732X_AIF_MODE_MASK, aif3);
1111         snd_soc_component_write(component, DA732X_REG_PC_CTRL, pc_count);
1112 
1113         return 0;
1114 }
1115 
1116 
1117 
1118 static int da732x_set_dai_pll(struct snd_soc_component *component, int pll_id,
1119                               int source, unsigned int freq_in,
1120                               unsigned int freq_out)
1121 {
1122         struct da732x_priv *da732x = snd_soc_component_get_drvdata(component);
1123         int fref, indiv;
1124         u8 div_lo, div_mid, div_hi;
1125         u64 frac_div;
1126 
1127         /* Disable PLL */
1128         if (freq_out == 0) {
1129                 snd_soc_component_update_bits(component, DA732X_REG_PLL_CTRL,
1130                                     DA732X_PLL_EN, 0);
1131                 da732x->pll_en = false;
1132                 return 0;
1133         }
1134 
1135         if (da732x->pll_en)
1136                 return -EBUSY;
1137 
1138         if (source == DA732X_SRCCLK_MCLK) {
1139                 /* Validate Sysclk rate */
1140                 switch (da732x->sysclk) {
1141                 case 11290000:
1142                 case 12288000:
1143                 case 22580000:
1144                 case 24576000:
1145                 case 45160000:
1146                 case 49152000:
1147                         snd_soc_component_write(component, DA732X_REG_PLL_CTRL,
1148                                       DA732X_PLL_BYPASS);
1149                         return 0;
1150                 default:
1151                         dev_err(component->dev,
1152                                 "Cannot use PLL Bypass, invalid SYSCLK rate\n");
1153                         return -EINVAL;
1154                 }
1155         }
1156 
1157         indiv = da732x_get_input_div(component, da732x->sysclk);
1158         if (indiv < 0)
1159                 return indiv;
1160 
1161         fref = (da732x->sysclk / indiv);
1162         div_hi = freq_out / fref;
1163         frac_div = (u64)(freq_out % fref) * 8192ULL;
1164         do_div(frac_div, fref);
1165         div_mid = (frac_div >> DA732X_1BYTE_SHIFT) & DA732X_U8_MASK;
1166         div_lo = (frac_div) & DA732X_U8_MASK;
1167 
1168         snd_soc_component_write(component, DA732X_REG_PLL_DIV_LO, div_lo);
1169         snd_soc_component_write(component, DA732X_REG_PLL_DIV_MID, div_mid);
1170         snd_soc_component_write(component, DA732X_REG_PLL_DIV_HI, div_hi);
1171 
1172         snd_soc_component_update_bits(component, DA732X_REG_PLL_CTRL, DA732X_PLL_EN,
1173                             DA732X_PLL_EN);
1174 
1175         da732x->pll_en = true;
1176 
1177         return 0;
1178 }
1179 
1180 static int da732x_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
1181                                  unsigned int freq, int dir)
1182 {
1183         struct snd_soc_component *component = dai->component;
1184         struct da732x_priv *da732x = snd_soc_component_get_drvdata(component);
1185 
1186         da732x->sysclk = freq;
1187 
1188         return 0;
1189 }
1190 
1191 #define DA732X_RATES    SNDRV_PCM_RATE_8000_96000
1192 
1193 #define DA732X_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1194                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1195 
1196 static const struct snd_soc_dai_ops da732x_dai_ops = {
1197         .hw_params      = da732x_hw_params,
1198         .set_fmt        = da732x_set_dai_fmt,
1199         .set_sysclk     = da732x_set_dai_sysclk,
1200 };
1201 
1202 static struct snd_soc_dai_driver da732x_dai[] = {
1203         {
1204                 .name   = "DA732X_AIFA",
1205                 .id     = DA732X_DAI_ID1,
1206                 .base   = DA732X_REG_AIFA1,
1207                 .playback = {
1208                         .stream_name = "AIFA Playback",
1209                         .channels_min = 1,
1210                         .channels_max = 2,
1211                         .rates = DA732X_RATES,
1212                         .formats = DA732X_FORMATS,
1213                 },
1214                 .capture = {
1215                         .stream_name = "AIFA Capture",
1216                         .channels_min = 1,
1217                         .channels_max = 2,
1218                         .rates = DA732X_RATES,
1219                         .formats = DA732X_FORMATS,
1220                 },
1221                 .ops = &da732x_dai_ops,
1222         },
1223         {
1224                 .name   = "DA732X_AIFB",
1225                 .id     = DA732X_DAI_ID2,
1226                 .base   = DA732X_REG_AIFB1,
1227                 .playback = {
1228                         .stream_name = "AIFB Playback",
1229                         .channels_min = 1,
1230                         .channels_max = 2,
1231                         .rates = DA732X_RATES,
1232                         .formats = DA732X_FORMATS,
1233                 },
1234                 .capture = {
1235                         .stream_name = "AIFB Capture",
1236                         .channels_min = 1,
1237                         .channels_max = 2,
1238                         .rates = DA732X_RATES,
1239                         .formats = DA732X_FORMATS,
1240                 },
1241                 .ops = &da732x_dai_ops,
1242         },
1243 };
1244 
1245 static bool da732x_volatile(struct device *dev, unsigned int reg)
1246 {
1247         switch (reg) {
1248         case DA732X_REG_HPL_DAC_OFF_CNTL:
1249         case DA732X_REG_HPR_DAC_OFF_CNTL:
1250                 return true;
1251         default:
1252                 return false;
1253         }
1254 }
1255 
1256 static const struct regmap_config da732x_regmap = {
1257         .reg_bits               = 8,
1258         .val_bits               = 8,
1259 
1260         .max_register           = DA732X_MAX_REG,
1261         .volatile_reg           = da732x_volatile,
1262         .reg_defaults           = da732x_reg_cache,
1263         .num_reg_defaults       = ARRAY_SIZE(da732x_reg_cache),
1264         .cache_type             = REGCACHE_RBTREE,
1265 };
1266 
1267 
1268 static void da732x_dac_offset_adjust(struct snd_soc_component *component)
1269 {
1270         u8 offset[DA732X_HP_DACS];
1271         u8 sign[DA732X_HP_DACS];
1272         u8 step = DA732X_DAC_OFFSET_STEP;
1273 
1274         /* Initialize DAC offset calibration circuits and registers */
1275         snd_soc_component_write(component, DA732X_REG_HPL_DAC_OFFSET,
1276                       DA732X_HP_DAC_OFFSET_TRIM_VAL);
1277         snd_soc_component_write(component, DA732X_REG_HPR_DAC_OFFSET,
1278                       DA732X_HP_DAC_OFFSET_TRIM_VAL);
1279         snd_soc_component_write(component, DA732X_REG_HPL_DAC_OFF_CNTL,
1280                       DA732X_HP_DAC_OFF_CALIBRATION |
1281                       DA732X_HP_DAC_OFF_SCALE_STEPS);
1282         snd_soc_component_write(component, DA732X_REG_HPR_DAC_OFF_CNTL,
1283                       DA732X_HP_DAC_OFF_CALIBRATION |
1284                       DA732X_HP_DAC_OFF_SCALE_STEPS);
1285 
1286         /* Wait for voltage stabilization */
1287         msleep(DA732X_WAIT_FOR_STABILIZATION);
1288 
1289         /* Check DAC offset sign */
1290         sign[DA732X_HPL_DAC] = (snd_soc_component_read32(component, DA732X_REG_HPL_DAC_OFF_CNTL) &
1291                                 DA732X_HP_DAC_OFF_CNTL_COMPO);
1292         sign[DA732X_HPR_DAC] = (snd_soc_component_read32(component, DA732X_REG_HPR_DAC_OFF_CNTL) &
1293                                 DA732X_HP_DAC_OFF_CNTL_COMPO);
1294 
1295         /* Binary search DAC offset values (both channels at once) */
1296         offset[DA732X_HPL_DAC] = sign[DA732X_HPL_DAC] << DA732X_HP_DAC_COMPO_SHIFT;
1297         offset[DA732X_HPR_DAC] = sign[DA732X_HPR_DAC] << DA732X_HP_DAC_COMPO_SHIFT;
1298 
1299         do {
1300                 offset[DA732X_HPL_DAC] |= step;
1301                 offset[DA732X_HPR_DAC] |= step;
1302                 snd_soc_component_write(component, DA732X_REG_HPL_DAC_OFFSET,
1303                               ~offset[DA732X_HPL_DAC] & DA732X_HP_DAC_OFF_MASK);
1304                 snd_soc_component_write(component, DA732X_REG_HPR_DAC_OFFSET,
1305                               ~offset[DA732X_HPR_DAC] & DA732X_HP_DAC_OFF_MASK);
1306 
1307                 msleep(DA732X_WAIT_FOR_STABILIZATION);
1308 
1309                 if ((snd_soc_component_read32(component, DA732X_REG_HPL_DAC_OFF_CNTL) &
1310                      DA732X_HP_DAC_OFF_CNTL_COMPO) ^ sign[DA732X_HPL_DAC])
1311                         offset[DA732X_HPL_DAC] &= ~step;
1312                 if ((snd_soc_component_read32(component, DA732X_REG_HPR_DAC_OFF_CNTL) &
1313                      DA732X_HP_DAC_OFF_CNTL_COMPO) ^ sign[DA732X_HPR_DAC])
1314                         offset[DA732X_HPR_DAC] &= ~step;
1315 
1316                 step >>= 1;
1317         } while (step);
1318 
1319         /* Write final DAC offsets to registers */
1320         snd_soc_component_write(component, DA732X_REG_HPL_DAC_OFFSET,
1321                       ~offset[DA732X_HPL_DAC] & DA732X_HP_DAC_OFF_MASK);
1322         snd_soc_component_write(component, DA732X_REG_HPR_DAC_OFFSET,
1323                       ~offset[DA732X_HPR_DAC] & DA732X_HP_DAC_OFF_MASK);
1324 
1325         /* End DAC calibration mode */
1326         snd_soc_component_write(component, DA732X_REG_HPL_DAC_OFF_CNTL,
1327                 DA732X_HP_DAC_OFF_SCALE_STEPS);
1328         snd_soc_component_write(component, DA732X_REG_HPR_DAC_OFF_CNTL,
1329                 DA732X_HP_DAC_OFF_SCALE_STEPS);
1330 }
1331 
1332 static void da732x_output_offset_adjust(struct snd_soc_component *component)
1333 {
1334         u8 offset[DA732X_HP_AMPS];
1335         u8 sign[DA732X_HP_AMPS];
1336         u8 step = DA732X_OUTPUT_OFFSET_STEP;
1337 
1338         offset[DA732X_HPL_AMP] = DA732X_HP_OUT_TRIM_VAL;
1339         offset[DA732X_HPR_AMP] = DA732X_HP_OUT_TRIM_VAL;
1340 
1341         /* Initialize output offset calibration circuits and registers  */
1342         snd_soc_component_write(component, DA732X_REG_HPL_OUT_OFFSET, DA732X_HP_OUT_TRIM_VAL);
1343         snd_soc_component_write(component, DA732X_REG_HPR_OUT_OFFSET, DA732X_HP_OUT_TRIM_VAL);
1344         snd_soc_component_write(component, DA732X_REG_HPL,
1345                       DA732X_HP_OUT_COMP | DA732X_HP_OUT_EN);
1346         snd_soc_component_write(component, DA732X_REG_HPR,
1347                       DA732X_HP_OUT_COMP | DA732X_HP_OUT_EN);
1348 
1349         /* Wait for voltage stabilization */
1350         msleep(DA732X_WAIT_FOR_STABILIZATION);
1351 
1352         /* Check output offset sign */
1353         sign[DA732X_HPL_AMP] = snd_soc_component_read32(component, DA732X_REG_HPL) &
1354                                DA732X_HP_OUT_COMPO;
1355         sign[DA732X_HPR_AMP] = snd_soc_component_read32(component, DA732X_REG_HPR) &
1356                                DA732X_HP_OUT_COMPO;
1357 
1358         snd_soc_component_write(component, DA732X_REG_HPL, DA732X_HP_OUT_COMP |
1359                       (sign[DA732X_HPL_AMP] >> DA732X_HP_OUT_COMPO_SHIFT) |
1360                       DA732X_HP_OUT_EN);
1361         snd_soc_component_write(component, DA732X_REG_HPR, DA732X_HP_OUT_COMP |
1362                       (sign[DA732X_HPR_AMP] >> DA732X_HP_OUT_COMPO_SHIFT) |
1363                       DA732X_HP_OUT_EN);
1364 
1365         /* Binary search output offset values (both channels at once) */
1366         do {
1367                 offset[DA732X_HPL_AMP] |= step;
1368                 offset[DA732X_HPR_AMP] |= step;
1369                 snd_soc_component_write(component, DA732X_REG_HPL_OUT_OFFSET,
1370                               offset[DA732X_HPL_AMP]);
1371                 snd_soc_component_write(component, DA732X_REG_HPR_OUT_OFFSET,
1372                               offset[DA732X_HPR_AMP]);
1373 
1374                 msleep(DA732X_WAIT_FOR_STABILIZATION);
1375 
1376                 if ((snd_soc_component_read32(component, DA732X_REG_HPL) &
1377                      DA732X_HP_OUT_COMPO) ^ sign[DA732X_HPL_AMP])
1378                         offset[DA732X_HPL_AMP] &= ~step;
1379                 if ((snd_soc_component_read32(component, DA732X_REG_HPR) &
1380                      DA732X_HP_OUT_COMPO) ^ sign[DA732X_HPR_AMP])
1381                         offset[DA732X_HPR_AMP] &= ~step;
1382 
1383                 step >>= 1;
1384         } while (step);
1385 
1386         /* Write final DAC offsets to registers */
1387         snd_soc_component_write(component, DA732X_REG_HPL_OUT_OFFSET, offset[DA732X_HPL_AMP]);
1388         snd_soc_component_write(component, DA732X_REG_HPR_OUT_OFFSET, offset[DA732X_HPR_AMP]);
1389 }
1390 
1391 static void da732x_hp_dc_offset_cancellation(struct snd_soc_component *component)
1392 {
1393         /* Make sure that we have Soft Mute enabled */
1394         snd_soc_component_write(component, DA732X_REG_DAC1_SOFTMUTE, DA732X_SOFTMUTE_EN |
1395                       DA732X_GAIN_RAMPED | DA732X_16_SAMPLES);
1396         snd_soc_component_write(component, DA732X_REG_DAC1_SEL, DA732X_DACL_EN |
1397                       DA732X_DACR_EN | DA732X_DACL_SDM | DA732X_DACR_SDM |
1398                       DA732X_DACL_MUTE | DA732X_DACR_MUTE);
1399         snd_soc_component_write(component, DA732X_REG_HPL, DA732X_HP_OUT_DAC_EN |
1400                       DA732X_HP_OUT_MUTE | DA732X_HP_OUT_EN);
1401         snd_soc_component_write(component, DA732X_REG_HPR, DA732X_HP_OUT_EN |
1402                       DA732X_HP_OUT_MUTE | DA732X_HP_OUT_DAC_EN);
1403 
1404         da732x_dac_offset_adjust(component);
1405         da732x_output_offset_adjust(component);
1406 
1407         snd_soc_component_write(component, DA732X_REG_DAC1_SEL, DA732X_DACS_DIS);
1408         snd_soc_component_write(component, DA732X_REG_HPL, DA732X_HP_DIS);
1409         snd_soc_component_write(component, DA732X_REG_HPR, DA732X_HP_DIS);
1410 }
1411 
1412 static int da732x_set_bias_level(struct snd_soc_component *component,
1413                                  enum snd_soc_bias_level level)
1414 {
1415         struct da732x_priv *da732x = snd_soc_component_get_drvdata(component);
1416 
1417         switch (level) {
1418         case SND_SOC_BIAS_ON:
1419                 snd_soc_component_update_bits(component, DA732X_REG_BIAS_EN,
1420                                     DA732X_BIAS_BOOST_MASK,
1421                                     DA732X_BIAS_BOOST_100PC);
1422                 break;
1423         case SND_SOC_BIAS_PREPARE:
1424                 break;
1425         case SND_SOC_BIAS_STANDBY:
1426                 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
1427                         /* Init Codec */
1428                         snd_soc_component_write(component, DA732X_REG_REF1,
1429                                       DA732X_VMID_FASTCHG);
1430                         snd_soc_component_write(component, DA732X_REG_BIAS_EN,
1431                                       DA732X_BIAS_EN);
1432 
1433                         mdelay(DA732X_STARTUP_DELAY);
1434 
1435                         /* Disable Fast Charge and enable DAC ref voltage */
1436                         snd_soc_component_write(component, DA732X_REG_REF1,
1437                                       DA732X_REFBUFX2_EN);
1438 
1439                         /* Enable bypass DSP routing */
1440                         snd_soc_component_write(component, DA732X_REG_DATA_ROUTE,
1441                                       DA732X_BYPASS_DSP);
1442 
1443                         /* Enable Digital subsystem */
1444                         snd_soc_component_write(component, DA732X_REG_DSP_CTRL,
1445                                       DA732X_DIGITAL_EN);
1446 
1447                         snd_soc_component_write(component, DA732X_REG_SPARE1_OUT,
1448                                       DA732X_HP_DRIVER_EN |
1449                                       DA732X_HP_GATE_LOW |
1450                                       DA732X_HP_LOOP_GAIN_CTRL);
1451                         snd_soc_component_write(component, DA732X_REG_HP_LIN1_GNDSEL,
1452                                       DA732X_HP_OUT_GNDSEL);
1453 
1454                         da732x_set_charge_pump(component, DA732X_ENABLE_CP);
1455 
1456                         snd_soc_component_write(component, DA732X_REG_CLK_EN1,
1457                               DA732X_SYS3_CLK_EN | DA732X_PC_CLK_EN);
1458 
1459                         /* Enable Zero Crossing */
1460                         snd_soc_component_write(component, DA732X_REG_INP_ZC_EN,
1461                                       DA732X_MIC1_PRE_ZC_EN |
1462                                       DA732X_MIC1_ZC_EN |
1463                                       DA732X_MIC2_PRE_ZC_EN |
1464                                       DA732X_MIC2_ZC_EN |
1465                                       DA732X_AUXL_ZC_EN |
1466                                       DA732X_AUXR_ZC_EN |
1467                                       DA732X_MIC3_PRE_ZC_EN |
1468                                       DA732X_MIC3_ZC_EN);
1469                         snd_soc_component_write(component, DA732X_REG_OUT_ZC_EN,
1470                                       DA732X_HPL_ZC_EN | DA732X_HPR_ZC_EN |
1471                                       DA732X_LIN2_ZC_EN | DA732X_LIN3_ZC_EN |
1472                                       DA732X_LIN4_ZC_EN);
1473 
1474                         da732x_hp_dc_offset_cancellation(component);
1475 
1476                         regcache_cache_only(da732x->regmap, false);
1477                         regcache_sync(da732x->regmap);
1478                 } else {
1479                         snd_soc_component_update_bits(component, DA732X_REG_BIAS_EN,
1480                                             DA732X_BIAS_BOOST_MASK,
1481                                             DA732X_BIAS_BOOST_50PC);
1482                         snd_soc_component_update_bits(component, DA732X_REG_PLL_CTRL,
1483                                             DA732X_PLL_EN, 0);
1484                         da732x->pll_en = false;
1485                 }
1486                 break;
1487         case SND_SOC_BIAS_OFF:
1488                 regcache_cache_only(da732x->regmap, true);
1489                 da732x_set_charge_pump(component, DA732X_DISABLE_CP);
1490                 snd_soc_component_update_bits(component, DA732X_REG_BIAS_EN, DA732X_BIAS_EN,
1491                                     DA732X_BIAS_DIS);
1492                 da732x->pll_en = false;
1493                 break;
1494         }
1495 
1496         return 0;
1497 }
1498 
1499 static const struct snd_soc_component_driver soc_component_dev_da732x = {
1500         .set_bias_level         = da732x_set_bias_level,
1501         .controls               = da732x_snd_controls,
1502         .num_controls           = ARRAY_SIZE(da732x_snd_controls),
1503         .dapm_widgets           = da732x_dapm_widgets,
1504         .num_dapm_widgets       = ARRAY_SIZE(da732x_dapm_widgets),
1505         .dapm_routes            = da732x_dapm_routes,
1506         .num_dapm_routes        = ARRAY_SIZE(da732x_dapm_routes),
1507         .set_pll                = da732x_set_dai_pll,
1508         .idle_bias_on           = 1,
1509         .use_pmdown_time        = 1,
1510         .endianness             = 1,
1511         .non_legacy_dai_naming  = 1,
1512 };
1513 
1514 static int da732x_i2c_probe(struct i2c_client *i2c,
1515                             const struct i2c_device_id *id)
1516 {
1517         struct da732x_priv *da732x;
1518         unsigned int reg;
1519         int ret;
1520 
1521         da732x = devm_kzalloc(&i2c->dev, sizeof(struct da732x_priv),
1522                               GFP_KERNEL);
1523         if (!da732x)
1524                 return -ENOMEM;
1525 
1526         i2c_set_clientdata(i2c, da732x);
1527 
1528         da732x->regmap = devm_regmap_init_i2c(i2c, &da732x_regmap);
1529         if (IS_ERR(da732x->regmap)) {
1530                 ret = PTR_ERR(da732x->regmap);
1531                 dev_err(&i2c->dev, "Failed to initialize regmap\n");
1532                 goto err;
1533         }
1534 
1535         ret = regmap_read(da732x->regmap, DA732X_REG_ID, &reg);
1536         if (ret < 0) {
1537                 dev_err(&i2c->dev, "Failed to read ID register: %d\n", ret);
1538                 goto err;
1539         }
1540 
1541         dev_info(&i2c->dev, "Revision: %d.%d\n",
1542                  (reg & DA732X_ID_MAJOR_MASK) >> 4,
1543                  (reg & DA732X_ID_MINOR_MASK));
1544 
1545         ret = devm_snd_soc_register_component(&i2c->dev,
1546                                      &soc_component_dev_da732x,
1547                                      da732x_dai, ARRAY_SIZE(da732x_dai));
1548         if (ret != 0)
1549                 dev_err(&i2c->dev, "Failed to register component.\n");
1550 
1551 err:
1552         return ret;
1553 }
1554 
1555 static int da732x_i2c_remove(struct i2c_client *client)
1556 {
1557         return 0;
1558 }
1559 
1560 static const struct i2c_device_id da732x_i2c_id[] = {
1561         { "da7320", 0},
1562         { }
1563 };
1564 MODULE_DEVICE_TABLE(i2c, da732x_i2c_id);
1565 
1566 static struct i2c_driver da732x_i2c_driver = {
1567         .driver         = {
1568                 .name   = "da7320",
1569         },
1570         .probe          = da732x_i2c_probe,
1571         .remove         = da732x_i2c_remove,
1572         .id_table       = da732x_i2c_id,
1573 };
1574 
1575 module_i2c_driver(da732x_i2c_driver);
1576 
1577 
1578 MODULE_DESCRIPTION("ASoC DA732X driver");
1579 MODULE_AUTHOR("Michal Hajduk <michal.hajduk@diasemi.com>");
1580 MODULE_LICENSE("GPL");
1581 

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