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TOMOYO Linux Cross Reference
Linux/sound/soc/codecs/rt5659.c

Version: ~ [ linux-5.12-rc1 ] ~ [ linux-5.11.2 ] ~ [ linux-5.10.19 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.101 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.177 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.222 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.258 ] ~ [ linux-4.8.17 ] ~ [ linux-4.7.10 ] ~ [ linux-4.6.7 ] ~ [ linux-4.5.7 ] ~ [ linux-4.4.258 ] ~ [ linux-4.3.6 ] ~ [ linux-4.2.8 ] ~ [ linux-4.1.52 ] ~ [ linux-4.0.9 ] ~ [ linux-3.18.140 ] ~ [ linux-3.16.85 ] ~ [ linux-3.14.79 ] ~ [ linux-3.12.74 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.5 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 // SPDX-License-Identifier: GPL-2.0-only
  2 /*
  3  * rt5659.c  --  RT5659/RT5658 ALSA SoC audio codec driver
  4  *
  5  * Copyright 2015 Realtek Semiconductor Corp.
  6  * Author: Bard Liao <bardliao@realtek.com>
  7  */
  8 
  9 #include <linux/clk.h>
 10 #include <linux/module.h>
 11 #include <linux/moduleparam.h>
 12 #include <linux/init.h>
 13 #include <linux/delay.h>
 14 #include <linux/pm.h>
 15 #include <linux/i2c.h>
 16 #include <linux/platform_device.h>
 17 #include <linux/spi/spi.h>
 18 #include <linux/acpi.h>
 19 #include <linux/gpio.h>
 20 #include <linux/gpio/consumer.h>
 21 #include <sound/core.h>
 22 #include <sound/pcm.h>
 23 #include <sound/pcm_params.h>
 24 #include <sound/jack.h>
 25 #include <sound/soc.h>
 26 #include <sound/soc-dapm.h>
 27 #include <sound/initval.h>
 28 #include <sound/tlv.h>
 29 #include <sound/rt5659.h>
 30 
 31 #include "rl6231.h"
 32 #include "rt5659.h"
 33 
 34 static const struct reg_default rt5659_reg[] = {
 35         { 0x0000, 0x0000 },
 36         { 0x0001, 0x4848 },
 37         { 0x0002, 0x8080 },
 38         { 0x0003, 0xc8c8 },
 39         { 0x0004, 0xc80a },
 40         { 0x0005, 0x0000 },
 41         { 0x0006, 0x0000 },
 42         { 0x0007, 0x0103 },
 43         { 0x0008, 0x0080 },
 44         { 0x0009, 0x0000 },
 45         { 0x000a, 0x0000 },
 46         { 0x000c, 0x0000 },
 47         { 0x000d, 0x0000 },
 48         { 0x000f, 0x0808 },
 49         { 0x0010, 0x3080 },
 50         { 0x0011, 0x4a00 },
 51         { 0x0012, 0x4e00 },
 52         { 0x0015, 0x42c1 },
 53         { 0x0016, 0x0000 },
 54         { 0x0018, 0x000b },
 55         { 0x0019, 0xafaf },
 56         { 0x001a, 0xafaf },
 57         { 0x001b, 0x0011 },
 58         { 0x001c, 0x2f2f },
 59         { 0x001d, 0x2f2f },
 60         { 0x001e, 0x2f2f },
 61         { 0x001f, 0x0000 },
 62         { 0x0020, 0x0000 },
 63         { 0x0021, 0x0000 },
 64         { 0x0022, 0x5757 },
 65         { 0x0023, 0x0039 },
 66         { 0x0026, 0xc060 },
 67         { 0x0027, 0xd8d8 },
 68         { 0x0029, 0x8080 },
 69         { 0x002a, 0xaaaa },
 70         { 0x002b, 0xaaaa },
 71         { 0x002c, 0x00af },
 72         { 0x002d, 0x0000 },
 73         { 0x002f, 0x1002 },
 74         { 0x0031, 0x5000 },
 75         { 0x0032, 0x0000 },
 76         { 0x0033, 0x0000 },
 77         { 0x0034, 0x0000 },
 78         { 0x0035, 0x0000 },
 79         { 0x0036, 0x0000 },
 80         { 0x003a, 0x0000 },
 81         { 0x003b, 0x0000 },
 82         { 0x003c, 0x007f },
 83         { 0x003d, 0x0000 },
 84         { 0x003e, 0x007f },
 85         { 0x0040, 0x0808 },
 86         { 0x0046, 0x001f },
 87         { 0x0047, 0x001f },
 88         { 0x0048, 0x0003 },
 89         { 0x0049, 0xe061 },
 90         { 0x004a, 0x0000 },
 91         { 0x004b, 0x031f },
 92         { 0x004d, 0x0000 },
 93         { 0x004e, 0x001f },
 94         { 0x004f, 0x0000 },
 95         { 0x0050, 0x001f },
 96         { 0x0052, 0xf000 },
 97         { 0x0053, 0x0111 },
 98         { 0x0054, 0x0064 },
 99         { 0x0055, 0x0080 },
100         { 0x0056, 0xef0e },
101         { 0x0057, 0xf0f0 },
102         { 0x0058, 0xef0e },
103         { 0x0059, 0xf0f0 },
104         { 0x005a, 0xef0e },
105         { 0x005b, 0xf0f0 },
106         { 0x005c, 0xf000 },
107         { 0x005d, 0x0000 },
108         { 0x005e, 0x1f2c },
109         { 0x005f, 0x1f2c },
110         { 0x0060, 0x2717 },
111         { 0x0061, 0x0000 },
112         { 0x0062, 0x0000 },
113         { 0x0063, 0x003e },
114         { 0x0064, 0x0000 },
115         { 0x0065, 0x0000 },
116         { 0x0066, 0x0000 },
117         { 0x0067, 0x0000 },
118         { 0x006a, 0x0000 },
119         { 0x006b, 0x0000 },
120         { 0x006c, 0x0000 },
121         { 0x006e, 0x0000 },
122         { 0x006f, 0x0000 },
123         { 0x0070, 0x8000 },
124         { 0x0071, 0x8000 },
125         { 0x0072, 0x8000 },
126         { 0x0073, 0x1110 },
127         { 0x0074, 0xfe00 },
128         { 0x0075, 0x2409 },
129         { 0x0076, 0x000a },
130         { 0x0077, 0x00f0 },
131         { 0x0078, 0x0000 },
132         { 0x0079, 0x0000 },
133         { 0x007a, 0x0123 },
134         { 0x007b, 0x8003 },
135         { 0x0080, 0x0000 },
136         { 0x0081, 0x0000 },
137         { 0x0082, 0x0000 },
138         { 0x0083, 0x0000 },
139         { 0x0084, 0x0000 },
140         { 0x0085, 0x0000 },
141         { 0x0086, 0x0008 },
142         { 0x0087, 0x0000 },
143         { 0x0088, 0x0000 },
144         { 0x0089, 0x0000 },
145         { 0x008a, 0x0000 },
146         { 0x008b, 0x0000 },
147         { 0x008c, 0x0003 },
148         { 0x008e, 0x0000 },
149         { 0x008f, 0x1000 },
150         { 0x0090, 0x0646 },
151         { 0x0091, 0x0c16 },
152         { 0x0092, 0x0073 },
153         { 0x0093, 0x0000 },
154         { 0x0094, 0x0080 },
155         { 0x0097, 0x0000 },
156         { 0x0098, 0x0000 },
157         { 0x0099, 0x0000 },
158         { 0x009a, 0x0000 },
159         { 0x009b, 0x0000 },
160         { 0x009c, 0x007f },
161         { 0x009d, 0x0000 },
162         { 0x009e, 0x007f },
163         { 0x009f, 0x0000 },
164         { 0x00a0, 0x0060 },
165         { 0x00a1, 0x90a1 },
166         { 0x00ae, 0x2000 },
167         { 0x00af, 0x0000 },
168         { 0x00b0, 0x2000 },
169         { 0x00b1, 0x0000 },
170         { 0x00b2, 0x0000 },
171         { 0x00b6, 0x0000 },
172         { 0x00b7, 0x0000 },
173         { 0x00b8, 0x0000 },
174         { 0x00b9, 0x0000 },
175         { 0x00ba, 0x0000 },
176         { 0x00bb, 0x0000 },
177         { 0x00be, 0x0000 },
178         { 0x00bf, 0x0000 },
179         { 0x00c0, 0x0000 },
180         { 0x00c1, 0x0000 },
181         { 0x00c2, 0x0000 },
182         { 0x00c3, 0x0000 },
183         { 0x00c4, 0x0003 },
184         { 0x00c5, 0x0000 },
185         { 0x00cb, 0xa02f },
186         { 0x00cc, 0x0000 },
187         { 0x00cd, 0x0e02 },
188         { 0x00d6, 0x0000 },
189         { 0x00d7, 0x2244 },
190         { 0x00d9, 0x0809 },
191         { 0x00da, 0x0000 },
192         { 0x00db, 0x0008 },
193         { 0x00dc, 0x00c0 },
194         { 0x00dd, 0x6724 },
195         { 0x00de, 0x3131 },
196         { 0x00df, 0x0008 },
197         { 0x00e0, 0x4000 },
198         { 0x00e1, 0x3131 },
199         { 0x00e4, 0x400c },
200         { 0x00e5, 0x8031 },
201         { 0x00ea, 0xb320 },
202         { 0x00eb, 0x0000 },
203         { 0x00ec, 0xb300 },
204         { 0x00ed, 0x0000 },
205         { 0x00f0, 0x0000 },
206         { 0x00f1, 0x0202 },
207         { 0x00f2, 0x0ddd },
208         { 0x00f3, 0x0ddd },
209         { 0x00f4, 0x0ddd },
210         { 0x00f6, 0x0000 },
211         { 0x00f7, 0x0000 },
212         { 0x00f8, 0x0000 },
213         { 0x00f9, 0x0000 },
214         { 0x00fa, 0x8000 },
215         { 0x00fb, 0x0000 },
216         { 0x00fc, 0x0000 },
217         { 0x00fd, 0x0001 },
218         { 0x00fe, 0x10ec },
219         { 0x00ff, 0x6311 },
220         { 0x0100, 0xaaaa },
221         { 0x010a, 0xaaaa },
222         { 0x010b, 0x00a0 },
223         { 0x010c, 0xaeae },
224         { 0x010d, 0xaaaa },
225         { 0x010e, 0xaaa8 },
226         { 0x010f, 0xa0aa },
227         { 0x0110, 0xe02a },
228         { 0x0111, 0xa702 },
229         { 0x0112, 0xaaaa },
230         { 0x0113, 0x2800 },
231         { 0x0116, 0x0000 },
232         { 0x0117, 0x0f00 },
233         { 0x011a, 0x0020 },
234         { 0x011b, 0x0011 },
235         { 0x011c, 0x0150 },
236         { 0x011d, 0x0000 },
237         { 0x011e, 0x0000 },
238         { 0x011f, 0x0000 },
239         { 0x0120, 0x0000 },
240         { 0x0121, 0x009b },
241         { 0x0122, 0x5014 },
242         { 0x0123, 0x0421 },
243         { 0x0124, 0x7cea },
244         { 0x0125, 0x0420 },
245         { 0x0126, 0x5550 },
246         { 0x0132, 0x0000 },
247         { 0x0133, 0x0000 },
248         { 0x0137, 0x5055 },
249         { 0x0138, 0x3700 },
250         { 0x0139, 0x79a1 },
251         { 0x013a, 0x2020 },
252         { 0x013b, 0x2020 },
253         { 0x013c, 0x2005 },
254         { 0x013e, 0x1f00 },
255         { 0x013f, 0x0000 },
256         { 0x0145, 0x0002 },
257         { 0x0146, 0x0000 },
258         { 0x0147, 0x0000 },
259         { 0x0148, 0x0000 },
260         { 0x0150, 0x1813 },
261         { 0x0151, 0x0690 },
262         { 0x0152, 0x1c17 },
263         { 0x0153, 0x6883 },
264         { 0x0154, 0xd3ce },
265         { 0x0155, 0x352d },
266         { 0x0156, 0x00eb },
267         { 0x0157, 0x3717 },
268         { 0x0158, 0x4c6a },
269         { 0x0159, 0xe41b },
270         { 0x015a, 0x2a13 },
271         { 0x015b, 0xb600 },
272         { 0x015c, 0xc730 },
273         { 0x015d, 0x35d4 },
274         { 0x015e, 0x00bf },
275         { 0x0160, 0x0ec0 },
276         { 0x0161, 0x0020 },
277         { 0x0162, 0x0080 },
278         { 0x0163, 0x0800 },
279         { 0x0164, 0x0000 },
280         { 0x0165, 0x0000 },
281         { 0x0166, 0x0000 },
282         { 0x0167, 0x001f },
283         { 0x0170, 0x4e80 },
284         { 0x0171, 0x0020 },
285         { 0x0172, 0x0080 },
286         { 0x0173, 0x0800 },
287         { 0x0174, 0x000c },
288         { 0x0175, 0x0000 },
289         { 0x0190, 0x3300 },
290         { 0x0191, 0x2200 },
291         { 0x0192, 0x0000 },
292         { 0x01b0, 0x4b38 },
293         { 0x01b1, 0x0000 },
294         { 0x01b2, 0x0000 },
295         { 0x01b3, 0x0000 },
296         { 0x01c0, 0x0045 },
297         { 0x01c1, 0x0540 },
298         { 0x01c2, 0x0000 },
299         { 0x01c3, 0x0030 },
300         { 0x01c7, 0x0000 },
301         { 0x01c8, 0x5757 },
302         { 0x01c9, 0x5757 },
303         { 0x01ca, 0x5757 },
304         { 0x01cb, 0x5757 },
305         { 0x01cc, 0x5757 },
306         { 0x01cd, 0x5757 },
307         { 0x01ce, 0x006f },
308         { 0x01da, 0x0000 },
309         { 0x01db, 0x0000 },
310         { 0x01de, 0x7d00 },
311         { 0x01df, 0x10c0 },
312         { 0x01e0, 0x06a1 },
313         { 0x01e1, 0x0000 },
314         { 0x01e2, 0x0000 },
315         { 0x01e3, 0x0000 },
316         { 0x01e4, 0x0001 },
317         { 0x01e6, 0x0000 },
318         { 0x01e7, 0x0000 },
319         { 0x01e8, 0x0000 },
320         { 0x01ea, 0x0000 },
321         { 0x01eb, 0x0000 },
322         { 0x01ec, 0x0000 },
323         { 0x01ed, 0x0000 },
324         { 0x01ee, 0x0000 },
325         { 0x01ef, 0x0000 },
326         { 0x01f0, 0x0000 },
327         { 0x01f1, 0x0000 },
328         { 0x01f2, 0x0000 },
329         { 0x01f6, 0x1e04 },
330         { 0x01f7, 0x01a1 },
331         { 0x01f8, 0x0000 },
332         { 0x01f9, 0x0000 },
333         { 0x01fa, 0x0002 },
334         { 0x01fb, 0x0000 },
335         { 0x01fc, 0x0000 },
336         { 0x01fd, 0x0000 },
337         { 0x01fe, 0x0000 },
338         { 0x0200, 0x066c },
339         { 0x0201, 0x7fff },
340         { 0x0202, 0x7fff },
341         { 0x0203, 0x0000 },
342         { 0x0204, 0x0000 },
343         { 0x0205, 0x0000 },
344         { 0x0206, 0x0000 },
345         { 0x0207, 0x0000 },
346         { 0x0208, 0x0000 },
347         { 0x0256, 0x0000 },
348         { 0x0257, 0x0000 },
349         { 0x0258, 0x0000 },
350         { 0x0259, 0x0000 },
351         { 0x025a, 0x0000 },
352         { 0x025b, 0x3333 },
353         { 0x025c, 0x3333 },
354         { 0x025d, 0x3333 },
355         { 0x025e, 0x0000 },
356         { 0x025f, 0x0000 },
357         { 0x0260, 0x0000 },
358         { 0x0261, 0x0022 },
359         { 0x0262, 0x0300 },
360         { 0x0265, 0x1e80 },
361         { 0x0266, 0x0131 },
362         { 0x0267, 0x0003 },
363         { 0x0268, 0x0000 },
364         { 0x0269, 0x0000 },
365         { 0x026a, 0x0000 },
366         { 0x026b, 0x0000 },
367         { 0x026c, 0x0000 },
368         { 0x026d, 0x0000 },
369         { 0x026e, 0x0000 },
370         { 0x026f, 0x0000 },
371         { 0x0270, 0x0000 },
372         { 0x0271, 0x0000 },
373         { 0x0272, 0x0000 },
374         { 0x0273, 0x0000 },
375         { 0x0280, 0x0000 },
376         { 0x0281, 0x0000 },
377         { 0x0282, 0x0418 },
378         { 0x0283, 0x7fff },
379         { 0x0284, 0x7000 },
380         { 0x0290, 0x01d0 },
381         { 0x0291, 0x0100 },
382         { 0x02fa, 0x0000 },
383         { 0x02fb, 0x0000 },
384         { 0x02fc, 0x0000 },
385         { 0x0300, 0x001f },
386         { 0x0301, 0x032c },
387         { 0x0302, 0x5f21 },
388         { 0x0303, 0x4000 },
389         { 0x0304, 0x4000 },
390         { 0x0305, 0x0600 },
391         { 0x0306, 0x8000 },
392         { 0x0307, 0x0700 },
393         { 0x0308, 0x001f },
394         { 0x0309, 0x032c },
395         { 0x030a, 0x5f21 },
396         { 0x030b, 0x4000 },
397         { 0x030c, 0x4000 },
398         { 0x030d, 0x0600 },
399         { 0x030e, 0x8000 },
400         { 0x030f, 0x0700 },
401         { 0x0310, 0x4560 },
402         { 0x0311, 0xa4a8 },
403         { 0x0312, 0x7418 },
404         { 0x0313, 0x0000 },
405         { 0x0314, 0x0006 },
406         { 0x0315, 0x00ff },
407         { 0x0316, 0xc400 },
408         { 0x0317, 0x4560 },
409         { 0x0318, 0xa4a8 },
410         { 0x0319, 0x7418 },
411         { 0x031a, 0x0000 },
412         { 0x031b, 0x0006 },
413         { 0x031c, 0x00ff },
414         { 0x031d, 0xc400 },
415         { 0x0320, 0x0f20 },
416         { 0x0321, 0x8700 },
417         { 0x0322, 0x7dc2 },
418         { 0x0323, 0xa178 },
419         { 0x0324, 0x5383 },
420         { 0x0325, 0x7dc2 },
421         { 0x0326, 0xa178 },
422         { 0x0327, 0x5383 },
423         { 0x0328, 0x003e },
424         { 0x0329, 0x02c1 },
425         { 0x032a, 0xd37d },
426         { 0x0330, 0x00a6 },
427         { 0x0331, 0x04c3 },
428         { 0x0332, 0x27c8 },
429         { 0x0333, 0xbf50 },
430         { 0x0334, 0x0045 },
431         { 0x0335, 0x2007 },
432         { 0x0336, 0x7418 },
433         { 0x0337, 0x0501 },
434         { 0x0338, 0x0000 },
435         { 0x0339, 0x0010 },
436         { 0x033a, 0x1010 },
437         { 0x0340, 0x0800 },
438         { 0x0341, 0x0800 },
439         { 0x0342, 0x0800 },
440         { 0x0343, 0x0800 },
441         { 0x0344, 0x0000 },
442         { 0x0345, 0x0000 },
443         { 0x0346, 0x0000 },
444         { 0x0347, 0x0000 },
445         { 0x0348, 0x0000 },
446         { 0x0349, 0x0000 },
447         { 0x034a, 0x0000 },
448         { 0x034b, 0x0000 },
449         { 0x034c, 0x0000 },
450         { 0x034d, 0x0000 },
451         { 0x034e, 0x0000 },
452         { 0x034f, 0x0000 },
453         { 0x0350, 0x0000 },
454         { 0x0351, 0x0000 },
455         { 0x0352, 0x0000 },
456         { 0x0353, 0x0000 },
457         { 0x0354, 0x0000 },
458         { 0x0355, 0x0000 },
459         { 0x0356, 0x0000 },
460         { 0x0357, 0x0000 },
461         { 0x0358, 0x0000 },
462         { 0x0359, 0x0000 },
463         { 0x035a, 0x0000 },
464         { 0x035b, 0x0000 },
465         { 0x035c, 0x0000 },
466         { 0x035d, 0x0000 },
467         { 0x035e, 0x2000 },
468         { 0x035f, 0x0000 },
469         { 0x0360, 0x2000 },
470         { 0x0361, 0x2000 },
471         { 0x0362, 0x0000 },
472         { 0x0363, 0x2000 },
473         { 0x0364, 0x0200 },
474         { 0x0365, 0x0000 },
475         { 0x0366, 0x0000 },
476         { 0x0367, 0x0000 },
477         { 0x0368, 0x0000 },
478         { 0x0369, 0x0000 },
479         { 0x036a, 0x0000 },
480         { 0x036b, 0x0000 },
481         { 0x036c, 0x0000 },
482         { 0x036d, 0x0000 },
483         { 0x036e, 0x0200 },
484         { 0x036f, 0x0000 },
485         { 0x0370, 0x0000 },
486         { 0x0371, 0x0000 },
487         { 0x0372, 0x0000 },
488         { 0x0373, 0x0000 },
489         { 0x0374, 0x0000 },
490         { 0x0375, 0x0000 },
491         { 0x0376, 0x0000 },
492         { 0x0377, 0x0000 },
493         { 0x03d0, 0x0000 },
494         { 0x03d1, 0x0000 },
495         { 0x03d2, 0x0000 },
496         { 0x03d3, 0x0000 },
497         { 0x03d4, 0x2000 },
498         { 0x03d5, 0x2000 },
499         { 0x03d6, 0x0000 },
500         { 0x03d7, 0x0000 },
501         { 0x03d8, 0x2000 },
502         { 0x03d9, 0x2000 },
503         { 0x03da, 0x2000 },
504         { 0x03db, 0x2000 },
505         { 0x03dc, 0x0000 },
506         { 0x03dd, 0x0000 },
507         { 0x03de, 0x0000 },
508         { 0x03df, 0x2000 },
509         { 0x03e0, 0x0000 },
510         { 0x03e1, 0x0000 },
511         { 0x03e2, 0x0000 },
512         { 0x03e3, 0x0000 },
513         { 0x03e4, 0x0000 },
514         { 0x03e5, 0x0000 },
515         { 0x03e6, 0x0000 },
516         { 0x03e7, 0x0000 },
517         { 0x03e8, 0x0000 },
518         { 0x03e9, 0x0000 },
519         { 0x03ea, 0x0000 },
520         { 0x03eb, 0x0000 },
521         { 0x03ec, 0x0000 },
522         { 0x03ed, 0x0000 },
523         { 0x03ee, 0x0000 },
524         { 0x03ef, 0x0000 },
525         { 0x03f0, 0x0800 },
526         { 0x03f1, 0x0800 },
527         { 0x03f2, 0x0800 },
528         { 0x03f3, 0x0800 },
529 };
530 
531 static bool rt5659_volatile_register(struct device *dev, unsigned int reg)
532 {
533         switch (reg) {
534         case RT5659_RESET:
535         case RT5659_EJD_CTRL_2:
536         case RT5659_SILENCE_CTRL:
537         case RT5659_DAC2_DIG_VOL:
538         case RT5659_HP_IMP_GAIN_2:
539         case RT5659_PDM_OUT_CTRL:
540         case RT5659_PDM_DATA_CTRL_1:
541         case RT5659_PDM_DATA_CTRL_4:
542         case RT5659_HAPTIC_GEN_CTRL_1:
543         case RT5659_HAPTIC_GEN_CTRL_3:
544         case RT5659_HAPTIC_LPF_CTRL_3:
545         case RT5659_CLK_DET:
546         case RT5659_MICBIAS_1:
547         case RT5659_ASRC_11:
548         case RT5659_ADC_EQ_CTRL_1:
549         case RT5659_DAC_EQ_CTRL_1:
550         case RT5659_INT_ST_1:
551         case RT5659_INT_ST_2:
552         case RT5659_GPIO_STA:
553         case RT5659_SINE_GEN_CTRL_1:
554         case RT5659_IL_CMD_1:
555         case RT5659_4BTN_IL_CMD_1:
556         case RT5659_PSV_IL_CMD_1:
557         case RT5659_AJD1_CTRL:
558         case RT5659_AJD2_AJD3_CTRL:
559         case RT5659_JD_CTRL_3:
560         case RT5659_VENDOR_ID:
561         case RT5659_VENDOR_ID_1:
562         case RT5659_DEVICE_ID:
563         case RT5659_MEMORY_TEST:
564         case RT5659_SOFT_RAMP_DEPOP_DAC_CLK_CTRL:
565         case RT5659_VOL_TEST:
566         case RT5659_STO_NG2_CTRL_1:
567         case RT5659_STO_NG2_CTRL_5:
568         case RT5659_STO_NG2_CTRL_6:
569         case RT5659_STO_NG2_CTRL_7:
570         case RT5659_MONO_NG2_CTRL_1:
571         case RT5659_MONO_NG2_CTRL_5:
572         case RT5659_MONO_NG2_CTRL_6:
573         case RT5659_HP_IMP_SENS_CTRL_1:
574         case RT5659_HP_IMP_SENS_CTRL_3:
575         case RT5659_HP_IMP_SENS_CTRL_4:
576         case RT5659_HP_CALIB_CTRL_1:
577         case RT5659_HP_CALIB_CTRL_9:
578         case RT5659_HP_CALIB_STA_1:
579         case RT5659_HP_CALIB_STA_2:
580         case RT5659_HP_CALIB_STA_3:
581         case RT5659_HP_CALIB_STA_4:
582         case RT5659_HP_CALIB_STA_5:
583         case RT5659_HP_CALIB_STA_6:
584         case RT5659_HP_CALIB_STA_7:
585         case RT5659_HP_CALIB_STA_8:
586         case RT5659_HP_CALIB_STA_9:
587         case RT5659_MONO_AMP_CALIB_CTRL_1:
588         case RT5659_MONO_AMP_CALIB_CTRL_3:
589         case RT5659_MONO_AMP_CALIB_STA_1:
590         case RT5659_MONO_AMP_CALIB_STA_2:
591         case RT5659_MONO_AMP_CALIB_STA_3:
592         case RT5659_MONO_AMP_CALIB_STA_4:
593         case RT5659_SPK_PWR_LMT_STA_1:
594         case RT5659_SPK_PWR_LMT_STA_2:
595         case RT5659_SPK_PWR_LMT_STA_3:
596         case RT5659_SPK_PWR_LMT_STA_4:
597         case RT5659_SPK_PWR_LMT_STA_5:
598         case RT5659_SPK_PWR_LMT_STA_6:
599         case RT5659_SPK_DC_CAILB_CTRL_1:
600         case RT5659_SPK_DC_CAILB_STA_1:
601         case RT5659_SPK_DC_CAILB_STA_2:
602         case RT5659_SPK_DC_CAILB_STA_3:
603         case RT5659_SPK_DC_CAILB_STA_4:
604         case RT5659_SPK_DC_CAILB_STA_5:
605         case RT5659_SPK_DC_CAILB_STA_6:
606         case RT5659_SPK_DC_CAILB_STA_7:
607         case RT5659_SPK_DC_CAILB_STA_8:
608         case RT5659_SPK_DC_CAILB_STA_9:
609         case RT5659_SPK_DC_CAILB_STA_10:
610         case RT5659_SPK_VDD_STA_1:
611         case RT5659_SPK_VDD_STA_2:
612         case RT5659_SPK_DC_DET_CTRL_1:
613         case RT5659_PURE_DC_DET_CTRL_1:
614         case RT5659_PURE_DC_DET_CTRL_2:
615         case RT5659_DRC1_PRIV_1:
616         case RT5659_DRC1_PRIV_4:
617         case RT5659_DRC1_PRIV_5:
618         case RT5659_DRC1_PRIV_6:
619         case RT5659_DRC1_PRIV_7:
620         case RT5659_DRC2_PRIV_1:
621         case RT5659_DRC2_PRIV_4:
622         case RT5659_DRC2_PRIV_5:
623         case RT5659_DRC2_PRIV_6:
624         case RT5659_DRC2_PRIV_7:
625         case RT5659_ALC_PGA_STA_1:
626         case RT5659_ALC_PGA_STA_2:
627         case RT5659_ALC_PGA_STA_3:
628                 return true;
629         default:
630                 return false;
631         }
632 }
633 
634 static bool rt5659_readable_register(struct device *dev, unsigned int reg)
635 {
636         switch (reg) {
637         case RT5659_RESET:
638         case RT5659_SPO_VOL:
639         case RT5659_HP_VOL:
640         case RT5659_LOUT:
641         case RT5659_MONO_OUT:
642         case RT5659_HPL_GAIN:
643         case RT5659_HPR_GAIN:
644         case RT5659_MONO_GAIN:
645         case RT5659_SPDIF_CTRL_1:
646         case RT5659_SPDIF_CTRL_2:
647         case RT5659_CAL_BST_CTRL:
648         case RT5659_IN1_IN2:
649         case RT5659_IN3_IN4:
650         case RT5659_INL1_INR1_VOL:
651         case RT5659_EJD_CTRL_1:
652         case RT5659_EJD_CTRL_2:
653         case RT5659_EJD_CTRL_3:
654         case RT5659_SILENCE_CTRL:
655         case RT5659_PSV_CTRL:
656         case RT5659_SIDETONE_CTRL:
657         case RT5659_DAC1_DIG_VOL:
658         case RT5659_DAC2_DIG_VOL:
659         case RT5659_DAC_CTRL:
660         case RT5659_STO1_ADC_DIG_VOL:
661         case RT5659_MONO_ADC_DIG_VOL:
662         case RT5659_STO2_ADC_DIG_VOL:
663         case RT5659_STO1_BOOST:
664         case RT5659_MONO_BOOST:
665         case RT5659_STO2_BOOST:
666         case RT5659_HP_IMP_GAIN_1:
667         case RT5659_HP_IMP_GAIN_2:
668         case RT5659_STO1_ADC_MIXER:
669         case RT5659_MONO_ADC_MIXER:
670         case RT5659_AD_DA_MIXER:
671         case RT5659_STO_DAC_MIXER:
672         case RT5659_MONO_DAC_MIXER:
673         case RT5659_DIG_MIXER:
674         case RT5659_A_DAC_MUX:
675         case RT5659_DIG_INF23_DATA:
676         case RT5659_PDM_OUT_CTRL:
677         case RT5659_PDM_DATA_CTRL_1:
678         case RT5659_PDM_DATA_CTRL_2:
679         case RT5659_PDM_DATA_CTRL_3:
680         case RT5659_PDM_DATA_CTRL_4:
681         case RT5659_SPDIF_CTRL:
682         case RT5659_REC1_GAIN:
683         case RT5659_REC1_L1_MIXER:
684         case RT5659_REC1_L2_MIXER:
685         case RT5659_REC1_R1_MIXER:
686         case RT5659_REC1_R2_MIXER:
687         case RT5659_CAL_REC:
688         case RT5659_REC2_L1_MIXER:
689         case RT5659_REC2_L2_MIXER:
690         case RT5659_REC2_R1_MIXER:
691         case RT5659_REC2_R2_MIXER:
692         case RT5659_SPK_L_MIXER:
693         case RT5659_SPK_R_MIXER:
694         case RT5659_SPO_AMP_GAIN:
695         case RT5659_ALC_BACK_GAIN:
696         case RT5659_MONOMIX_GAIN:
697         case RT5659_MONOMIX_IN_GAIN:
698         case RT5659_OUT_L_GAIN:
699         case RT5659_OUT_L_MIXER:
700         case RT5659_OUT_R_GAIN:
701         case RT5659_OUT_R_MIXER:
702         case RT5659_LOUT_MIXER:
703         case RT5659_HAPTIC_GEN_CTRL_1:
704         case RT5659_HAPTIC_GEN_CTRL_2:
705         case RT5659_HAPTIC_GEN_CTRL_3:
706         case RT5659_HAPTIC_GEN_CTRL_4:
707         case RT5659_HAPTIC_GEN_CTRL_5:
708         case RT5659_HAPTIC_GEN_CTRL_6:
709         case RT5659_HAPTIC_GEN_CTRL_7:
710         case RT5659_HAPTIC_GEN_CTRL_8:
711         case RT5659_HAPTIC_GEN_CTRL_9:
712         case RT5659_HAPTIC_GEN_CTRL_10:
713         case RT5659_HAPTIC_GEN_CTRL_11:
714         case RT5659_HAPTIC_LPF_CTRL_1:
715         case RT5659_HAPTIC_LPF_CTRL_2:
716         case RT5659_HAPTIC_LPF_CTRL_3:
717         case RT5659_PWR_DIG_1:
718         case RT5659_PWR_DIG_2:
719         case RT5659_PWR_ANLG_1:
720         case RT5659_PWR_ANLG_2:
721         case RT5659_PWR_ANLG_3:
722         case RT5659_PWR_MIXER:
723         case RT5659_PWR_VOL:
724         case RT5659_PRIV_INDEX:
725         case RT5659_CLK_DET:
726         case RT5659_PRIV_DATA:
727         case RT5659_PRE_DIV_1:
728         case RT5659_PRE_DIV_2:
729         case RT5659_I2S1_SDP:
730         case RT5659_I2S2_SDP:
731         case RT5659_I2S3_SDP:
732         case RT5659_ADDA_CLK_1:
733         case RT5659_ADDA_CLK_2:
734         case RT5659_DMIC_CTRL_1:
735         case RT5659_DMIC_CTRL_2:
736         case RT5659_TDM_CTRL_1:
737         case RT5659_TDM_CTRL_2:
738         case RT5659_TDM_CTRL_3:
739         case RT5659_TDM_CTRL_4:
740         case RT5659_TDM_CTRL_5:
741         case RT5659_GLB_CLK:
742         case RT5659_PLL_CTRL_1:
743         case RT5659_PLL_CTRL_2:
744         case RT5659_ASRC_1:
745         case RT5659_ASRC_2:
746         case RT5659_ASRC_3:
747         case RT5659_ASRC_4:
748         case RT5659_ASRC_5:
749         case RT5659_ASRC_6:
750         case RT5659_ASRC_7:
751         case RT5659_ASRC_8:
752         case RT5659_ASRC_9:
753         case RT5659_ASRC_10:
754         case RT5659_DEPOP_1:
755         case RT5659_DEPOP_2:
756         case RT5659_DEPOP_3:
757         case RT5659_HP_CHARGE_PUMP_1:
758         case RT5659_HP_CHARGE_PUMP_2:
759         case RT5659_MICBIAS_1:
760         case RT5659_MICBIAS_2:
761         case RT5659_ASRC_11:
762         case RT5659_ASRC_12:
763         case RT5659_ASRC_13:
764         case RT5659_REC_M1_M2_GAIN_CTRL:
765         case RT5659_RC_CLK_CTRL:
766         case RT5659_CLASSD_CTRL_1:
767         case RT5659_CLASSD_CTRL_2:
768         case RT5659_ADC_EQ_CTRL_1:
769         case RT5659_ADC_EQ_CTRL_2:
770         case RT5659_DAC_EQ_CTRL_1:
771         case RT5659_DAC_EQ_CTRL_2:
772         case RT5659_DAC_EQ_CTRL_3:
773         case RT5659_IRQ_CTRL_1:
774         case RT5659_IRQ_CTRL_2:
775         case RT5659_IRQ_CTRL_3:
776         case RT5659_IRQ_CTRL_4:
777         case RT5659_IRQ_CTRL_5:
778         case RT5659_IRQ_CTRL_6:
779         case RT5659_INT_ST_1:
780         case RT5659_INT_ST_2:
781         case RT5659_GPIO_CTRL_1:
782         case RT5659_GPIO_CTRL_2:
783         case RT5659_GPIO_CTRL_3:
784         case RT5659_GPIO_CTRL_4:
785         case RT5659_GPIO_CTRL_5:
786         case RT5659_GPIO_STA:
787         case RT5659_SINE_GEN_CTRL_1:
788         case RT5659_SINE_GEN_CTRL_2:
789         case RT5659_SINE_GEN_CTRL_3:
790         case RT5659_HP_AMP_DET_CTRL_1:
791         case RT5659_HP_AMP_DET_CTRL_2:
792         case RT5659_SV_ZCD_1:
793         case RT5659_SV_ZCD_2:
794         case RT5659_IL_CMD_1:
795         case RT5659_IL_CMD_2:
796         case RT5659_IL_CMD_3:
797         case RT5659_IL_CMD_4:
798         case RT5659_4BTN_IL_CMD_1:
799         case RT5659_4BTN_IL_CMD_2:
800         case RT5659_4BTN_IL_CMD_3:
801         case RT5659_PSV_IL_CMD_1:
802         case RT5659_PSV_IL_CMD_2:
803         case RT5659_ADC_STO1_HP_CTRL_1:
804         case RT5659_ADC_STO1_HP_CTRL_2:
805         case RT5659_ADC_MONO_HP_CTRL_1:
806         case RT5659_ADC_MONO_HP_CTRL_2:
807         case RT5659_AJD1_CTRL:
808         case RT5659_AJD2_AJD3_CTRL:
809         case RT5659_JD1_THD:
810         case RT5659_JD2_THD:
811         case RT5659_JD3_THD:
812         case RT5659_JD_CTRL_1:
813         case RT5659_JD_CTRL_2:
814         case RT5659_JD_CTRL_3:
815         case RT5659_JD_CTRL_4:
816         case RT5659_DIG_MISC:
817         case RT5659_DUMMY_2:
818         case RT5659_DUMMY_3:
819         case RT5659_VENDOR_ID:
820         case RT5659_VENDOR_ID_1:
821         case RT5659_DEVICE_ID:
822         case RT5659_DAC_ADC_DIG_VOL:
823         case RT5659_BIAS_CUR_CTRL_1:
824         case RT5659_BIAS_CUR_CTRL_2:
825         case RT5659_BIAS_CUR_CTRL_3:
826         case RT5659_BIAS_CUR_CTRL_4:
827         case RT5659_BIAS_CUR_CTRL_5:
828         case RT5659_BIAS_CUR_CTRL_6:
829         case RT5659_BIAS_CUR_CTRL_7:
830         case RT5659_BIAS_CUR_CTRL_8:
831         case RT5659_BIAS_CUR_CTRL_9:
832         case RT5659_BIAS_CUR_CTRL_10:
833         case RT5659_MEMORY_TEST:
834         case RT5659_VREF_REC_OP_FB_CAP_CTRL:
835         case RT5659_CLASSD_0:
836         case RT5659_CLASSD_1:
837         case RT5659_CLASSD_2:
838         case RT5659_CLASSD_3:
839         case RT5659_CLASSD_4:
840         case RT5659_CLASSD_5:
841         case RT5659_CLASSD_6:
842         case RT5659_CLASSD_7:
843         case RT5659_CLASSD_8:
844         case RT5659_CLASSD_9:
845         case RT5659_CLASSD_10:
846         case RT5659_CHARGE_PUMP_1:
847         case RT5659_CHARGE_PUMP_2:
848         case RT5659_DIG_IN_CTRL_1:
849         case RT5659_DIG_IN_CTRL_2:
850         case RT5659_PAD_DRIVING_CTRL:
851         case RT5659_SOFT_RAMP_DEPOP:
852         case RT5659_PLL:
853         case RT5659_CHOP_DAC:
854         case RT5659_CHOP_ADC:
855         case RT5659_CALIB_ADC_CTRL:
856         case RT5659_SOFT_RAMP_DEPOP_DAC_CLK_CTRL:
857         case RT5659_VOL_TEST:
858         case RT5659_TEST_MODE_CTRL_1:
859         case RT5659_TEST_MODE_CTRL_2:
860         case RT5659_TEST_MODE_CTRL_3:
861         case RT5659_TEST_MODE_CTRL_4:
862         case RT5659_BASSBACK_CTRL:
863         case RT5659_MP3_PLUS_CTRL_1:
864         case RT5659_MP3_PLUS_CTRL_2:
865         case RT5659_MP3_HPF_A1:
866         case RT5659_MP3_HPF_A2:
867         case RT5659_MP3_HPF_H0:
868         case RT5659_MP3_LPF_H0:
869         case RT5659_3D_SPK_CTRL:
870         case RT5659_3D_SPK_COEF_1:
871         case RT5659_3D_SPK_COEF_2:
872         case RT5659_3D_SPK_COEF_3:
873         case RT5659_3D_SPK_COEF_4:
874         case RT5659_3D_SPK_COEF_5:
875         case RT5659_3D_SPK_COEF_6:
876         case RT5659_3D_SPK_COEF_7:
877         case RT5659_STO_NG2_CTRL_1:
878         case RT5659_STO_NG2_CTRL_2:
879         case RT5659_STO_NG2_CTRL_3:
880         case RT5659_STO_NG2_CTRL_4:
881         case RT5659_STO_NG2_CTRL_5:
882         case RT5659_STO_NG2_CTRL_6:
883         case RT5659_STO_NG2_CTRL_7:
884         case RT5659_STO_NG2_CTRL_8:
885         case RT5659_MONO_NG2_CTRL_1:
886         case RT5659_MONO_NG2_CTRL_2:
887         case RT5659_MONO_NG2_CTRL_3:
888         case RT5659_MONO_NG2_CTRL_4:
889         case RT5659_MONO_NG2_CTRL_5:
890         case RT5659_MONO_NG2_CTRL_6:
891         case RT5659_MID_HP_AMP_DET:
892         case RT5659_LOW_HP_AMP_DET:
893         case RT5659_LDO_CTRL:
894         case RT5659_HP_DECROSS_CTRL_1:
895         case RT5659_HP_DECROSS_CTRL_2:
896         case RT5659_HP_DECROSS_CTRL_3:
897         case RT5659_HP_DECROSS_CTRL_4:
898         case RT5659_HP_IMP_SENS_CTRL_1:
899         case RT5659_HP_IMP_SENS_CTRL_2:
900         case RT5659_HP_IMP_SENS_CTRL_3:
901         case RT5659_HP_IMP_SENS_CTRL_4:
902         case RT5659_HP_IMP_SENS_MAP_1:
903         case RT5659_HP_IMP_SENS_MAP_2:
904         case RT5659_HP_IMP_SENS_MAP_3:
905         case RT5659_HP_IMP_SENS_MAP_4:
906         case RT5659_HP_IMP_SENS_MAP_5:
907         case RT5659_HP_IMP_SENS_MAP_6:
908         case RT5659_HP_IMP_SENS_MAP_7:
909         case RT5659_HP_IMP_SENS_MAP_8:
910         case RT5659_HP_LOGIC_CTRL_1:
911         case RT5659_HP_LOGIC_CTRL_2:
912         case RT5659_HP_CALIB_CTRL_1:
913         case RT5659_HP_CALIB_CTRL_2:
914         case RT5659_HP_CALIB_CTRL_3:
915         case RT5659_HP_CALIB_CTRL_4:
916         case RT5659_HP_CALIB_CTRL_5:
917         case RT5659_HP_CALIB_CTRL_6:
918         case RT5659_HP_CALIB_CTRL_7:
919         case RT5659_HP_CALIB_CTRL_9:
920         case RT5659_HP_CALIB_CTRL_10:
921         case RT5659_HP_CALIB_CTRL_11:
922         case RT5659_HP_CALIB_STA_1:
923         case RT5659_HP_CALIB_STA_2:
924         case RT5659_HP_CALIB_STA_3:
925         case RT5659_HP_CALIB_STA_4:
926         case RT5659_HP_CALIB_STA_5:
927         case RT5659_HP_CALIB_STA_6:
928         case RT5659_HP_CALIB_STA_7:
929         case RT5659_HP_CALIB_STA_8:
930         case RT5659_HP_CALIB_STA_9:
931         case RT5659_MONO_AMP_CALIB_CTRL_1:
932         case RT5659_MONO_AMP_CALIB_CTRL_2:
933         case RT5659_MONO_AMP_CALIB_CTRL_3:
934         case RT5659_MONO_AMP_CALIB_CTRL_4:
935         case RT5659_MONO_AMP_CALIB_CTRL_5:
936         case RT5659_MONO_AMP_CALIB_STA_1:
937         case RT5659_MONO_AMP_CALIB_STA_2:
938         case RT5659_MONO_AMP_CALIB_STA_3:
939         case RT5659_MONO_AMP_CALIB_STA_4:
940         case RT5659_SPK_PWR_LMT_CTRL_1:
941         case RT5659_SPK_PWR_LMT_CTRL_2:
942         case RT5659_SPK_PWR_LMT_CTRL_3:
943         case RT5659_SPK_PWR_LMT_STA_1:
944         case RT5659_SPK_PWR_LMT_STA_2:
945         case RT5659_SPK_PWR_LMT_STA_3:
946         case RT5659_SPK_PWR_LMT_STA_4:
947         case RT5659_SPK_PWR_LMT_STA_5:
948         case RT5659_SPK_PWR_LMT_STA_6:
949         case RT5659_FLEX_SPK_BST_CTRL_1:
950         case RT5659_FLEX_SPK_BST_CTRL_2:
951         case RT5659_FLEX_SPK_BST_CTRL_3:
952         case RT5659_FLEX_SPK_BST_CTRL_4:
953         case RT5659_SPK_EX_LMT_CTRL_1:
954         case RT5659_SPK_EX_LMT_CTRL_2:
955         case RT5659_SPK_EX_LMT_CTRL_3:
956         case RT5659_SPK_EX_LMT_CTRL_4:
957         case RT5659_SPK_EX_LMT_CTRL_5:
958         case RT5659_SPK_EX_LMT_CTRL_6:
959         case RT5659_SPK_EX_LMT_CTRL_7:
960         case RT5659_ADJ_HPF_CTRL_1:
961         case RT5659_ADJ_HPF_CTRL_2:
962         case RT5659_SPK_DC_CAILB_CTRL_1:
963         case RT5659_SPK_DC_CAILB_CTRL_2:
964         case RT5659_SPK_DC_CAILB_CTRL_3:
965         case RT5659_SPK_DC_CAILB_CTRL_4:
966         case RT5659_SPK_DC_CAILB_CTRL_5:
967         case RT5659_SPK_DC_CAILB_STA_1:
968         case RT5659_SPK_DC_CAILB_STA_2:
969         case RT5659_SPK_DC_CAILB_STA_3:
970         case RT5659_SPK_DC_CAILB_STA_4:
971         case RT5659_SPK_DC_CAILB_STA_5:
972         case RT5659_SPK_DC_CAILB_STA_6:
973         case RT5659_SPK_DC_CAILB_STA_7:
974         case RT5659_SPK_DC_CAILB_STA_8:
975         case RT5659_SPK_DC_CAILB_STA_9:
976         case RT5659_SPK_DC_CAILB_STA_10:
977         case RT5659_SPK_VDD_STA_1:
978         case RT5659_SPK_VDD_STA_2:
979         case RT5659_SPK_DC_DET_CTRL_1:
980         case RT5659_SPK_DC_DET_CTRL_2:
981         case RT5659_SPK_DC_DET_CTRL_3:
982         case RT5659_PURE_DC_DET_CTRL_1:
983         case RT5659_PURE_DC_DET_CTRL_2:
984         case RT5659_DUMMY_4:
985         case RT5659_DUMMY_5:
986         case RT5659_DUMMY_6:
987         case RT5659_DRC1_CTRL_1:
988         case RT5659_DRC1_CTRL_2:
989         case RT5659_DRC1_CTRL_3:
990         case RT5659_DRC1_CTRL_4:
991         case RT5659_DRC1_CTRL_5:
992         case RT5659_DRC1_CTRL_6:
993         case RT5659_DRC1_HARD_LMT_CTRL_1:
994         case RT5659_DRC1_HARD_LMT_CTRL_2:
995         case RT5659_DRC2_CTRL_1:
996         case RT5659_DRC2_CTRL_2:
997         case RT5659_DRC2_CTRL_3:
998         case RT5659_DRC2_CTRL_4:
999         case RT5659_DRC2_CTRL_5:
1000         case RT5659_DRC2_CTRL_6:
1001         case RT5659_DRC2_HARD_LMT_CTRL_1:
1002         case RT5659_DRC2_HARD_LMT_CTRL_2:
1003         case RT5659_DRC1_PRIV_1:
1004         case RT5659_DRC1_PRIV_2:
1005         case RT5659_DRC1_PRIV_3:
1006         case RT5659_DRC1_PRIV_4:
1007         case RT5659_DRC1_PRIV_5:
1008         case RT5659_DRC1_PRIV_6:
1009         case RT5659_DRC1_PRIV_7:
1010         case RT5659_DRC2_PRIV_1:
1011         case RT5659_DRC2_PRIV_2:
1012         case RT5659_DRC2_PRIV_3:
1013         case RT5659_DRC2_PRIV_4:
1014         case RT5659_DRC2_PRIV_5:
1015         case RT5659_DRC2_PRIV_6:
1016         case RT5659_DRC2_PRIV_7:
1017         case RT5659_MULTI_DRC_CTRL:
1018         case RT5659_CROSS_OVER_1:
1019         case RT5659_CROSS_OVER_2:
1020         case RT5659_CROSS_OVER_3:
1021         case RT5659_CROSS_OVER_4:
1022         case RT5659_CROSS_OVER_5:
1023         case RT5659_CROSS_OVER_6:
1024         case RT5659_CROSS_OVER_7:
1025         case RT5659_CROSS_OVER_8:
1026         case RT5659_CROSS_OVER_9:
1027         case RT5659_CROSS_OVER_10:
1028         case RT5659_ALC_PGA_CTRL_1:
1029         case RT5659_ALC_PGA_CTRL_2:
1030         case RT5659_ALC_PGA_CTRL_3:
1031         case RT5659_ALC_PGA_CTRL_4:
1032         case RT5659_ALC_PGA_CTRL_5:
1033         case RT5659_ALC_PGA_CTRL_6:
1034         case RT5659_ALC_PGA_CTRL_7:
1035         case RT5659_ALC_PGA_CTRL_8:
1036         case RT5659_ALC_PGA_STA_1:
1037         case RT5659_ALC_PGA_STA_2:
1038         case RT5659_ALC_PGA_STA_3:
1039         case RT5659_DAC_L_EQ_PRE_VOL:
1040         case RT5659_DAC_R_EQ_PRE_VOL:
1041         case RT5659_DAC_L_EQ_POST_VOL:
1042         case RT5659_DAC_R_EQ_POST_VOL:
1043         case RT5659_DAC_L_EQ_LPF1_A1:
1044         case RT5659_DAC_L_EQ_LPF1_H0:
1045         case RT5659_DAC_R_EQ_LPF1_A1:
1046         case RT5659_DAC_R_EQ_LPF1_H0:
1047         case RT5659_DAC_L_EQ_BPF2_A1:
1048         case RT5659_DAC_L_EQ_BPF2_A2:
1049         case RT5659_DAC_L_EQ_BPF2_H0:
1050         case RT5659_DAC_R_EQ_BPF2_A1:
1051         case RT5659_DAC_R_EQ_BPF2_A2:
1052         case RT5659_DAC_R_EQ_BPF2_H0:
1053         case RT5659_DAC_L_EQ_BPF3_A1:
1054         case RT5659_DAC_L_EQ_BPF3_A2:
1055         case RT5659_DAC_L_EQ_BPF3_H0:
1056         case RT5659_DAC_R_EQ_BPF3_A1:
1057         case RT5659_DAC_R_EQ_BPF3_A2:
1058         case RT5659_DAC_R_EQ_BPF3_H0:
1059         case RT5659_DAC_L_EQ_BPF4_A1:
1060         case RT5659_DAC_L_EQ_BPF4_A2:
1061         case RT5659_DAC_L_EQ_BPF4_H0:
1062         case RT5659_DAC_R_EQ_BPF4_A1:
1063         case RT5659_DAC_R_EQ_BPF4_A2:
1064         case RT5659_DAC_R_EQ_BPF4_H0:
1065         case RT5659_DAC_L_EQ_HPF1_A1:
1066         case RT5659_DAC_L_EQ_HPF1_H0:
1067         case RT5659_DAC_R_EQ_HPF1_A1:
1068         case RT5659_DAC_R_EQ_HPF1_H0:
1069         case RT5659_DAC_L_EQ_HPF2_A1:
1070         case RT5659_DAC_L_EQ_HPF2_A2:
1071         case RT5659_DAC_L_EQ_HPF2_H0:
1072         case RT5659_DAC_R_EQ_HPF2_A1:
1073         case RT5659_DAC_R_EQ_HPF2_A2:
1074         case RT5659_DAC_R_EQ_HPF2_H0:
1075         case RT5659_DAC_L_BI_EQ_BPF1_H0_1:
1076         case RT5659_DAC_L_BI_EQ_BPF1_H0_2:
1077         case RT5659_DAC_L_BI_EQ_BPF1_B1_1:
1078         case RT5659_DAC_L_BI_EQ_BPF1_B1_2:
1079         case RT5659_DAC_L_BI_EQ_BPF1_B2_1:
1080         case RT5659_DAC_L_BI_EQ_BPF1_B2_2:
1081         case RT5659_DAC_L_BI_EQ_BPF1_A1_1:
1082         case RT5659_DAC_L_BI_EQ_BPF1_A1_2:
1083         case RT5659_DAC_L_BI_EQ_BPF1_A2_1:
1084         case RT5659_DAC_L_BI_EQ_BPF1_A2_2:
1085         case RT5659_DAC_R_BI_EQ_BPF1_H0_1:
1086         case RT5659_DAC_R_BI_EQ_BPF1_H0_2:
1087         case RT5659_DAC_R_BI_EQ_BPF1_B1_1:
1088         case RT5659_DAC_R_BI_EQ_BPF1_B1_2:
1089         case RT5659_DAC_R_BI_EQ_BPF1_B2_1:
1090         case RT5659_DAC_R_BI_EQ_BPF1_B2_2:
1091         case RT5659_DAC_R_BI_EQ_BPF1_A1_1:
1092         case RT5659_DAC_R_BI_EQ_BPF1_A1_2:
1093         case RT5659_DAC_R_BI_EQ_BPF1_A2_1:
1094         case RT5659_DAC_R_BI_EQ_BPF1_A2_2:
1095         case RT5659_ADC_L_EQ_LPF1_A1:
1096         case RT5659_ADC_R_EQ_LPF1_A1:
1097         case RT5659_ADC_L_EQ_LPF1_H0:
1098         case RT5659_ADC_R_EQ_LPF1_H0:
1099         case RT5659_ADC_L_EQ_BPF1_A1:
1100         case RT5659_ADC_R_EQ_BPF1_A1:
1101         case RT5659_ADC_L_EQ_BPF1_A2:
1102         case RT5659_ADC_R_EQ_BPF1_A2:
1103         case RT5659_ADC_L_EQ_BPF1_H0:
1104         case RT5659_ADC_R_EQ_BPF1_H0:
1105         case RT5659_ADC_L_EQ_BPF2_A1:
1106         case RT5659_ADC_R_EQ_BPF2_A1:
1107         case RT5659_ADC_L_EQ_BPF2_A2:
1108         case RT5659_ADC_R_EQ_BPF2_A2:
1109         case RT5659_ADC_L_EQ_BPF2_H0:
1110         case RT5659_ADC_R_EQ_BPF2_H0:
1111         case RT5659_ADC_L_EQ_BPF3_A1:
1112         case RT5659_ADC_R_EQ_BPF3_A1:
1113         case RT5659_ADC_L_EQ_BPF3_A2:
1114         case RT5659_ADC_R_EQ_BPF3_A2:
1115         case RT5659_ADC_L_EQ_BPF3_H0:
1116         case RT5659_ADC_R_EQ_BPF3_H0:
1117         case RT5659_ADC_L_EQ_BPF4_A1:
1118         case RT5659_ADC_R_EQ_BPF4_A1:
1119         case RT5659_ADC_L_EQ_BPF4_A2:
1120         case RT5659_ADC_R_EQ_BPF4_A2:
1121         case RT5659_ADC_L_EQ_BPF4_H0:
1122         case RT5659_ADC_R_EQ_BPF4_H0:
1123         case RT5659_ADC_L_EQ_HPF1_A1:
1124         case RT5659_ADC_R_EQ_HPF1_A1:
1125         case RT5659_ADC_L_EQ_HPF1_H0:
1126         case RT5659_ADC_R_EQ_HPF1_H0:
1127         case RT5659_ADC_L_EQ_PRE_VOL:
1128         case RT5659_ADC_R_EQ_PRE_VOL:
1129         case RT5659_ADC_L_EQ_POST_VOL:
1130         case RT5659_ADC_R_EQ_POST_VOL:
1131                 return true;
1132         default:
1133                 return false;
1134         }
1135 }
1136 
1137 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2325, 75, 0);
1138 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
1139 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
1140 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
1141 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
1142 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
1143 static const DECLARE_TLV_DB_SCALE(in_bst_tlv, -1200, 75, 0);
1144 
1145 /* Interface data select */
1146 static const char * const rt5659_data_select[] = {
1147         "L/R", "R/L", "L/L", "R/R"
1148 };
1149 
1150 static SOC_ENUM_SINGLE_DECL(rt5659_if1_01_adc_enum,
1151         RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT01_SFT, rt5659_data_select);
1152 
1153 static SOC_ENUM_SINGLE_DECL(rt5659_if1_23_adc_enum,
1154         RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT23_SFT, rt5659_data_select);
1155 
1156 static SOC_ENUM_SINGLE_DECL(rt5659_if1_45_adc_enum,
1157         RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT45_SFT, rt5659_data_select);
1158 
1159 static SOC_ENUM_SINGLE_DECL(rt5659_if1_67_adc_enum,
1160         RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT67_SFT, rt5659_data_select);
1161 
1162 static SOC_ENUM_SINGLE_DECL(rt5659_if2_dac_enum,
1163         RT5659_DIG_INF23_DATA, RT5659_IF2_DAC_SEL_SFT, rt5659_data_select);
1164 
1165 static SOC_ENUM_SINGLE_DECL(rt5659_if2_adc_enum,
1166         RT5659_DIG_INF23_DATA, RT5659_IF2_ADC_SEL_SFT, rt5659_data_select);
1167 
1168 static SOC_ENUM_SINGLE_DECL(rt5659_if3_dac_enum,
1169         RT5659_DIG_INF23_DATA, RT5659_IF3_DAC_SEL_SFT, rt5659_data_select);
1170 
1171 static SOC_ENUM_SINGLE_DECL(rt5659_if3_adc_enum,
1172         RT5659_DIG_INF23_DATA, RT5659_IF3_ADC_SEL_SFT, rt5659_data_select);
1173 
1174 static const struct snd_kcontrol_new rt5659_if1_01_adc_swap_mux =
1175         SOC_DAPM_ENUM("IF1 01 ADC Swap Source", rt5659_if1_01_adc_enum);
1176 
1177 static const struct snd_kcontrol_new rt5659_if1_23_adc_swap_mux =
1178         SOC_DAPM_ENUM("IF1 23 ADC1 Swap Source", rt5659_if1_23_adc_enum);
1179 
1180 static const struct snd_kcontrol_new rt5659_if1_45_adc_swap_mux =
1181         SOC_DAPM_ENUM("IF1 45 ADC1 Swap Source", rt5659_if1_45_adc_enum);
1182 
1183 static const struct snd_kcontrol_new rt5659_if1_67_adc_swap_mux =
1184         SOC_DAPM_ENUM("IF1 67 ADC1 Swap Source", rt5659_if1_67_adc_enum);
1185 
1186 static const struct snd_kcontrol_new rt5659_if2_dac_swap_mux =
1187         SOC_DAPM_ENUM("IF2 DAC Swap Source", rt5659_if2_dac_enum);
1188 
1189 static const struct snd_kcontrol_new rt5659_if2_adc_swap_mux =
1190         SOC_DAPM_ENUM("IF2 ADC Swap Source", rt5659_if2_adc_enum);
1191 
1192 static const struct snd_kcontrol_new rt5659_if3_dac_swap_mux =
1193         SOC_DAPM_ENUM("IF3 DAC Swap Source", rt5659_if3_dac_enum);
1194 
1195 static const struct snd_kcontrol_new rt5659_if3_adc_swap_mux =
1196         SOC_DAPM_ENUM("IF3 ADC Swap Source", rt5659_if3_adc_enum);
1197 
1198 static const char * const rt5659_asrc_clk_src[] = {
1199         "clk_sysy_div_out", "clk_i2s1_track", "clk_i2s2_track",
1200         "clk_i2s3_track", "clk_sys2", "clk_sys3"
1201 };
1202 
1203 static unsigned int rt5659_asrc_clk_map_values[] = {
1204         0, 1, 2, 3, 5, 6,
1205 };
1206 
1207 static SOC_VALUE_ENUM_SINGLE_DECL(
1208         rt5659_da_sto_asrc_enum, RT5659_ASRC_2, RT5659_DA_STO_T_SFT, 0x7,
1209         rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1210 
1211 static SOC_VALUE_ENUM_SINGLE_DECL(
1212         rt5659_da_monol_asrc_enum, RT5659_ASRC_2, RT5659_DA_MONO_L_T_SFT, 0x7,
1213         rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1214 
1215 static SOC_VALUE_ENUM_SINGLE_DECL(
1216         rt5659_da_monor_asrc_enum, RT5659_ASRC_2, RT5659_DA_MONO_R_T_SFT, 0x7,
1217         rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1218 
1219 static SOC_VALUE_ENUM_SINGLE_DECL(
1220         rt5659_ad_sto1_asrc_enum, RT5659_ASRC_2, RT5659_AD_STO1_T_SFT, 0x7,
1221         rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1222 
1223 static SOC_VALUE_ENUM_SINGLE_DECL(
1224         rt5659_ad_sto2_asrc_enum, RT5659_ASRC_3, RT5659_AD_STO2_T_SFT, 0x7,
1225         rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1226 
1227 static SOC_VALUE_ENUM_SINGLE_DECL(
1228         rt5659_ad_monol_asrc_enum, RT5659_ASRC_3, RT5659_AD_MONO_L_T_SFT, 0x7,
1229         rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1230 
1231 static SOC_VALUE_ENUM_SINGLE_DECL(
1232         rt5659_ad_monor_asrc_enum, RT5659_ASRC_3, RT5659_AD_MONO_R_T_SFT, 0x7,
1233         rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1234 
1235 static int rt5659_hp_vol_put(struct snd_kcontrol *kcontrol,
1236                 struct snd_ctl_elem_value *ucontrol)
1237 {
1238         struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
1239         int ret = snd_soc_put_volsw(kcontrol, ucontrol);
1240 
1241         if (snd_soc_component_read32(component, RT5659_STO_NG2_CTRL_1) & RT5659_NG2_EN) {
1242                 snd_soc_component_update_bits(component, RT5659_STO_NG2_CTRL_1,
1243                         RT5659_NG2_EN_MASK, RT5659_NG2_DIS);
1244                 snd_soc_component_update_bits(component, RT5659_STO_NG2_CTRL_1,
1245                         RT5659_NG2_EN_MASK, RT5659_NG2_EN);
1246         }
1247 
1248         return ret;
1249 }
1250 
1251 static void rt5659_enable_push_button_irq(struct snd_soc_component *component,
1252         bool enable)
1253 {
1254         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1255 
1256         if (enable) {
1257                 snd_soc_component_write(component, RT5659_4BTN_IL_CMD_1, 0x000b);
1258 
1259                 /* MICBIAS1 and Mic Det Power for button detect*/
1260                 snd_soc_dapm_force_enable_pin(dapm, "MICBIAS1");
1261                 snd_soc_dapm_force_enable_pin(dapm,
1262                         "Mic Det Power");
1263                 snd_soc_dapm_sync(dapm);
1264 
1265                 snd_soc_component_update_bits(component, RT5659_PWR_ANLG_2,
1266                         RT5659_PWR_MB1, RT5659_PWR_MB1);
1267                 snd_soc_component_update_bits(component, RT5659_PWR_VOL,
1268                         RT5659_PWR_MIC_DET, RT5659_PWR_MIC_DET);
1269 
1270                 snd_soc_component_update_bits(component, RT5659_IRQ_CTRL_2,
1271                                 RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_EN);
1272                 snd_soc_component_update_bits(component, RT5659_4BTN_IL_CMD_2,
1273                                 RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_EN);
1274         } else {
1275                 snd_soc_component_update_bits(component, RT5659_4BTN_IL_CMD_2,
1276                                 RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_DIS);
1277                 snd_soc_component_update_bits(component, RT5659_IRQ_CTRL_2,
1278                                 RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_DIS);
1279                 /* MICBIAS1 and Mic Det Power for button detect*/
1280                 snd_soc_dapm_disable_pin(dapm, "MICBIAS1");
1281                 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1282                 snd_soc_dapm_sync(dapm);
1283         }
1284 }
1285 
1286 /**
1287  * rt5659_headset_detect - Detect headset.
1288  * @component: SoC audio component device.
1289  * @jack_insert: Jack insert or not.
1290  *
1291  * Detect whether is headset or not when jack inserted.
1292  *
1293  * Returns detect status.
1294  */
1295 
1296 static int rt5659_headset_detect(struct snd_soc_component *component, int jack_insert)
1297 {
1298         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1299         int val, i = 0, sleep_time[5] = {300, 150, 100, 50, 30};
1300         int reg_63;
1301 
1302         struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1303 
1304         if (jack_insert) {
1305                 snd_soc_dapm_force_enable_pin(dapm,
1306                         "Mic Det Power");
1307                 snd_soc_dapm_sync(dapm);
1308                 reg_63 = snd_soc_component_read32(component, RT5659_PWR_ANLG_1);
1309 
1310                 snd_soc_component_update_bits(component, RT5659_PWR_ANLG_1,
1311                         RT5659_PWR_VREF2 | RT5659_PWR_MB,
1312                         RT5659_PWR_VREF2 | RT5659_PWR_MB);
1313                 msleep(20);
1314                 snd_soc_component_update_bits(component, RT5659_PWR_ANLG_1,
1315                         RT5659_PWR_FV2, RT5659_PWR_FV2);
1316 
1317                 snd_soc_component_write(component, RT5659_EJD_CTRL_2, 0x4160);
1318                 snd_soc_component_update_bits(component, RT5659_EJD_CTRL_1,
1319                         0x20, 0x0);
1320                 msleep(20);
1321                 snd_soc_component_update_bits(component, RT5659_EJD_CTRL_1,
1322                         0x20, 0x20);
1323 
1324                 while (i < 5) {
1325                         msleep(sleep_time[i]);
1326                         val = snd_soc_component_read32(component, RT5659_EJD_CTRL_2) & 0x0003;
1327                         i++;
1328                         if (val == 0x1 || val == 0x2 || val == 0x3)
1329                                 break;
1330                 }
1331 
1332                 switch (val) {
1333                 case 1:
1334                         rt5659->jack_type = SND_JACK_HEADSET;
1335                         rt5659_enable_push_button_irq(component, true);
1336                         break;
1337                 default:
1338                         snd_soc_component_write(component, RT5659_PWR_ANLG_1, reg_63);
1339                         rt5659->jack_type = SND_JACK_HEADPHONE;
1340                         snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1341                         snd_soc_dapm_sync(dapm);
1342                         break;
1343                 }
1344         } else {
1345                 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1346                 snd_soc_dapm_sync(dapm);
1347                 if (rt5659->jack_type == SND_JACK_HEADSET)
1348                         rt5659_enable_push_button_irq(component, false);
1349                 rt5659->jack_type = 0;
1350         }
1351 
1352         dev_dbg(component->dev, "jack_type = %d\n", rt5659->jack_type);
1353         return rt5659->jack_type;
1354 }
1355 
1356 static int rt5659_button_detect(struct snd_soc_component *component)
1357 {
1358         int btn_type, val;
1359 
1360         val = snd_soc_component_read32(component, RT5659_4BTN_IL_CMD_1);
1361         btn_type = val & 0xfff0;
1362         snd_soc_component_write(component, RT5659_4BTN_IL_CMD_1, val);
1363 
1364         return btn_type;
1365 }
1366 
1367 static irqreturn_t rt5659_irq(int irq, void *data)
1368 {
1369         struct rt5659_priv *rt5659 = data;
1370 
1371         queue_delayed_work(system_power_efficient_wq,
1372                            &rt5659->jack_detect_work, msecs_to_jiffies(250));
1373 
1374         return IRQ_HANDLED;
1375 }
1376 
1377 int rt5659_set_jack_detect(struct snd_soc_component *component,
1378         struct snd_soc_jack *hs_jack)
1379 {
1380         struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1381 
1382         rt5659->hs_jack = hs_jack;
1383 
1384         rt5659_irq(0, rt5659);
1385 
1386         return 0;
1387 }
1388 EXPORT_SYMBOL_GPL(rt5659_set_jack_detect);
1389 
1390 static void rt5659_jack_detect_work(struct work_struct *work)
1391 {
1392         struct rt5659_priv *rt5659 =
1393                 container_of(work, struct rt5659_priv, jack_detect_work.work);
1394         int val, btn_type, report = 0;
1395 
1396         if (!rt5659->component)
1397                 return;
1398 
1399         val = snd_soc_component_read32(rt5659->component, RT5659_INT_ST_1) & 0x0080;
1400         if (!val) {
1401                 /* jack in */
1402                 if (rt5659->jack_type == 0) {
1403                         /* jack was out, report jack type */
1404                         report = rt5659_headset_detect(rt5659->component, 1);
1405                 } else {
1406                         /* jack is already in, report button event */
1407                         report = SND_JACK_HEADSET;
1408                         btn_type = rt5659_button_detect(rt5659->component);
1409                         /**
1410                          * rt5659 can report three kinds of button behavior,
1411                          * one click, double click and hold. However,
1412                          * currently we will report button pressed/released
1413                          * event. So all the three button behaviors are
1414                          * treated as button pressed.
1415                          */
1416                         switch (btn_type) {
1417                         case 0x8000:
1418                         case 0x4000:
1419                         case 0x2000:
1420                                 report |= SND_JACK_BTN_0;
1421                                 break;
1422                         case 0x1000:
1423                         case 0x0800:
1424                         case 0x0400:
1425                                 report |= SND_JACK_BTN_1;
1426                                 break;
1427                         case 0x0200:
1428                         case 0x0100:
1429                         case 0x0080:
1430                                 report |= SND_JACK_BTN_2;
1431                                 break;
1432                         case 0x0040:
1433                         case 0x0020:
1434                         case 0x0010:
1435                                 report |= SND_JACK_BTN_3;
1436                                 break;
1437                         case 0x0000: /* unpressed */
1438                                 break;
1439                         default:
1440                                 btn_type = 0;
1441                                 dev_err(rt5659->component->dev,
1442                                         "Unexpected button code 0x%04x\n",
1443                                         btn_type);
1444                                 break;
1445                         }
1446 
1447                         /* button release or spurious interrput*/
1448                         if (btn_type == 0)
1449                                 report =  rt5659->jack_type;
1450                 }
1451         } else {
1452                 /* jack out */
1453                 report = rt5659_headset_detect(rt5659->component, 0);
1454         }
1455 
1456         snd_soc_jack_report(rt5659->hs_jack, report, SND_JACK_HEADSET |
1457                             SND_JACK_BTN_0 | SND_JACK_BTN_1 |
1458                             SND_JACK_BTN_2 | SND_JACK_BTN_3);
1459 }
1460 
1461 static void rt5659_jack_detect_intel_hd_header(struct work_struct *work)
1462 {
1463         struct rt5659_priv *rt5659 =
1464                 container_of(work, struct rt5659_priv, jack_detect_work.work);
1465         unsigned int value;
1466         bool hp_flag, mic_flag;
1467 
1468         if (!rt5659->hs_jack)
1469                 return;
1470 
1471         /* headphone jack */
1472         regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value);
1473         hp_flag = (!(value & 0x8)) ? true : false;
1474 
1475         if (hp_flag != rt5659->hda_hp_plugged) {
1476                 rt5659->hda_hp_plugged = hp_flag;
1477 
1478                 if (hp_flag) {
1479                         regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
1480                                 0x10, 0x0);
1481                         rt5659->jack_type |= SND_JACK_HEADPHONE;
1482                 } else {
1483                         regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
1484                                 0x10, 0x10);
1485                         rt5659->jack_type = rt5659->jack_type &
1486                                 (~SND_JACK_HEADPHONE);
1487                 }
1488 
1489                 snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type,
1490                         SND_JACK_HEADPHONE);
1491         }
1492 
1493         /* mic jack */
1494         regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
1495         regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value);
1496         mic_flag = (value & 0x2000) ? true : false;
1497 
1498         if (mic_flag != rt5659->hda_mic_plugged) {
1499                 rt5659->hda_mic_plugged = mic_flag;
1500                 if (mic_flag) {
1501                         regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
1502                                 0x2, 0x2);
1503                         rt5659->jack_type |= SND_JACK_MICROPHONE;
1504                 } else {
1505                         regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
1506                                 0x2, 0x0);
1507                         rt5659->jack_type = rt5659->jack_type
1508                                 & (~SND_JACK_MICROPHONE);
1509                 }
1510 
1511                 snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type,
1512                         SND_JACK_MICROPHONE);
1513         }
1514 }
1515 
1516 static const struct snd_kcontrol_new rt5659_snd_controls[] = {
1517         /* Speaker Output Volume */
1518         SOC_DOUBLE_TLV("Speaker Playback Volume", RT5659_SPO_VOL,
1519                 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 39, 1, out_vol_tlv),
1520 
1521         /* Headphone Output Volume */
1522         SOC_DOUBLE_R_EXT_TLV("Headphone Playback Volume", RT5659_HPL_GAIN,
1523                 RT5659_HPR_GAIN, RT5659_G_HP_SFT, 31, 1, snd_soc_get_volsw,
1524                 rt5659_hp_vol_put, hp_vol_tlv),
1525 
1526         /* Mono Output Volume */
1527         SOC_SINGLE_TLV("Mono Playback Volume", RT5659_MONO_OUT,
1528                 RT5659_L_VOL_SFT, 39, 1, out_vol_tlv),
1529 
1530         /* Output Volume */
1531         SOC_DOUBLE_TLV("OUT Playback Volume", RT5659_LOUT,
1532                 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 39, 1, out_vol_tlv),
1533 
1534         /* DAC Digital Volume */
1535         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5659_DAC1_DIG_VOL,
1536                 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 175, 0, dac_vol_tlv),
1537         SOC_DOUBLE("DAC1 Playback Switch", RT5659_AD_DA_MIXER,
1538                 RT5659_M_DAC1_L_SFT, RT5659_M_DAC1_R_SFT, 1, 1),
1539 
1540         SOC_DOUBLE_TLV("DAC2 Playback Volume", RT5659_DAC2_DIG_VOL,
1541                 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 175, 0, dac_vol_tlv),
1542         SOC_DOUBLE("DAC2 Playback Switch", RT5659_DAC_CTRL,
1543                 RT5659_M_DAC2_L_VOL_SFT, RT5659_M_DAC2_R_VOL_SFT, 1, 1),
1544 
1545         /* IN1/IN2/IN3/IN4 Volume */
1546         SOC_SINGLE_TLV("IN1 Boost Volume", RT5659_IN1_IN2,
1547                 RT5659_BST1_SFT, 69, 0, in_bst_tlv),
1548         SOC_SINGLE_TLV("IN2 Boost Volume", RT5659_IN1_IN2,
1549                 RT5659_BST2_SFT, 69, 0, in_bst_tlv),
1550         SOC_SINGLE_TLV("IN3 Boost Volume", RT5659_IN3_IN4,
1551                 RT5659_BST3_SFT, 69, 0, in_bst_tlv),
1552         SOC_SINGLE_TLV("IN4 Boost Volume", RT5659_IN3_IN4,
1553                 RT5659_BST4_SFT, 69, 0, in_bst_tlv),
1554 
1555         /* INL/INR Volume Control */
1556         SOC_DOUBLE_TLV("IN Capture Volume", RT5659_INL1_INR1_VOL,
1557                 RT5659_INL_VOL_SFT, RT5659_INR_VOL_SFT, 31, 1, in_vol_tlv),
1558 
1559         /* ADC Digital Volume Control */
1560         SOC_DOUBLE("STO1 ADC Capture Switch", RT5659_STO1_ADC_DIG_VOL,
1561                 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1562         SOC_DOUBLE_TLV("STO1 ADC Capture Volume", RT5659_STO1_ADC_DIG_VOL,
1563                 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1564         SOC_DOUBLE("Mono ADC Capture Switch", RT5659_MONO_ADC_DIG_VOL,
1565                 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1566         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5659_MONO_ADC_DIG_VOL,
1567                 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1568         SOC_DOUBLE("STO2 ADC Capture Switch", RT5659_STO2_ADC_DIG_VOL,
1569                 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1570         SOC_DOUBLE_TLV("STO2 ADC Capture Volume", RT5659_STO2_ADC_DIG_VOL,
1571                 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1572 
1573         /* ADC Boost Volume Control */
1574         SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5659_STO1_BOOST,
1575                 RT5659_STO1_ADC_L_BST_SFT, RT5659_STO1_ADC_R_BST_SFT,
1576                 3, 0, adc_bst_tlv),
1577 
1578         SOC_DOUBLE_TLV("Mono ADC Boost Gain Volume", RT5659_MONO_BOOST,
1579                 RT5659_MONO_ADC_L_BST_SFT, RT5659_MONO_ADC_R_BST_SFT,
1580                 3, 0, adc_bst_tlv),
1581 
1582         SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5659_STO2_BOOST,
1583                 RT5659_STO2_ADC_L_BST_SFT, RT5659_STO2_ADC_R_BST_SFT,
1584                 3, 0, adc_bst_tlv),
1585 
1586         SOC_SINGLE("DAC IF1 DAC1 L Data Switch", RT5659_TDM_CTRL_4, 12, 7, 0),
1587         SOC_SINGLE("DAC IF1 DAC1 R Data Switch", RT5659_TDM_CTRL_4, 8, 7, 0),
1588         SOC_SINGLE("DAC IF1 DAC2 L Data Switch", RT5659_TDM_CTRL_4, 4, 7, 0),
1589         SOC_SINGLE("DAC IF1 DAC2 R Data Switch", RT5659_TDM_CTRL_4, 0, 7, 0),
1590 };
1591 
1592 /**
1593  * set_dmic_clk - Set parameter of dmic.
1594  *
1595  * @w: DAPM widget.
1596  * @kcontrol: The kcontrol of this widget.
1597  * @event: Event id.
1598  *
1599  * Choose dmic clock between 1MHz and 3MHz.
1600  * It is better for clock to approximate 3MHz.
1601  */
1602 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
1603         struct snd_kcontrol *kcontrol, int event)
1604 {
1605         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1606         struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1607         int pd, idx = -EINVAL;
1608 
1609         pd = rl6231_get_pre_div(rt5659->regmap,
1610                 RT5659_ADDA_CLK_1, RT5659_I2S_PD1_SFT);
1611         idx = rl6231_calc_dmic_clk(rt5659->sysclk / pd);
1612 
1613         if (idx < 0)
1614                 dev_err(component->dev, "Failed to set DMIC clock\n");
1615         else {
1616                 snd_soc_component_update_bits(component, RT5659_DMIC_CTRL_1,
1617                         RT5659_DMIC_CLK_MASK, idx << RT5659_DMIC_CLK_SFT);
1618         }
1619         return idx;
1620 }
1621 
1622 static int set_adc1_clk(struct snd_soc_dapm_widget *w,
1623         struct snd_kcontrol *kcontrol, int event)
1624 {
1625         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1626 
1627         switch (event) {
1628         case SND_SOC_DAPM_POST_PMU:
1629                 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1630                         RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK,
1631                         RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK);
1632                 break;
1633 
1634         case SND_SOC_DAPM_PRE_PMD:
1635                 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1636                         RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK, 0);
1637                 break;
1638 
1639         default:
1640                 return 0;
1641         }
1642 
1643         return 0;
1644 
1645 }
1646 
1647 static int set_adc2_clk(struct snd_soc_dapm_widget *w,
1648         struct snd_kcontrol *kcontrol, int event)
1649 {
1650         struct snd_soc_component *component =
1651                 snd_soc_dapm_to_component(w->dapm);
1652 
1653         switch (event) {
1654         case SND_SOC_DAPM_POST_PMU:
1655                 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1656                         RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK,
1657                         RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK);
1658                 break;
1659 
1660         case SND_SOC_DAPM_PRE_PMD:
1661                 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1662                         RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK, 0);
1663                 break;
1664 
1665         default:
1666                 return 0;
1667         }
1668 
1669         return 0;
1670 
1671 }
1672 
1673 static int rt5659_charge_pump_event(struct snd_soc_dapm_widget *w,
1674         struct snd_kcontrol *kcontrol, int event)
1675 {
1676         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1677 
1678         switch (event) {
1679         case SND_SOC_DAPM_PRE_PMU:
1680                 /* Depop */
1681                 snd_soc_component_write(component, RT5659_DEPOP_1, 0x0009);
1682                 break;
1683         case SND_SOC_DAPM_POST_PMD:
1684                 snd_soc_component_write(component, RT5659_HP_CHARGE_PUMP_1, 0x0c16);
1685                 break;
1686         default:
1687                 return 0;
1688         }
1689 
1690         return 0;
1691 }
1692 
1693 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *w,
1694                          struct snd_soc_dapm_widget *sink)
1695 {
1696         unsigned int val;
1697         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1698 
1699         val = snd_soc_component_read32(component, RT5659_GLB_CLK);
1700         val &= RT5659_SCLK_SRC_MASK;
1701         if (val == RT5659_SCLK_SRC_PLL1)
1702                 return 1;
1703         else
1704                 return 0;
1705 }
1706 
1707 static int is_using_asrc(struct snd_soc_dapm_widget *w,
1708                          struct snd_soc_dapm_widget *sink)
1709 {
1710         unsigned int reg, shift, val;
1711         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1712 
1713         switch (w->shift) {
1714         case RT5659_ADC_MONO_R_ASRC_SFT:
1715                 reg = RT5659_ASRC_3;
1716                 shift = RT5659_AD_MONO_R_T_SFT;
1717                 break;
1718         case RT5659_ADC_MONO_L_ASRC_SFT:
1719                 reg = RT5659_ASRC_3;
1720                 shift = RT5659_AD_MONO_L_T_SFT;
1721                 break;
1722         case RT5659_ADC_STO1_ASRC_SFT:
1723                 reg = RT5659_ASRC_2;
1724                 shift = RT5659_AD_STO1_T_SFT;
1725                 break;
1726         case RT5659_DAC_MONO_R_ASRC_SFT:
1727                 reg = RT5659_ASRC_2;
1728                 shift = RT5659_DA_MONO_R_T_SFT;
1729                 break;
1730         case RT5659_DAC_MONO_L_ASRC_SFT:
1731                 reg = RT5659_ASRC_2;
1732                 shift = RT5659_DA_MONO_L_T_SFT;
1733                 break;
1734         case RT5659_DAC_STO_ASRC_SFT:
1735                 reg = RT5659_ASRC_2;
1736                 shift = RT5659_DA_STO_T_SFT;
1737                 break;
1738         default:
1739                 return 0;
1740         }
1741 
1742         val = (snd_soc_component_read32(component, reg) >> shift) & 0xf;
1743         switch (val) {
1744         case 1:
1745         case 2:
1746         case 3:
1747                 /* I2S_Pre_Div1 should be 1 in asrc mode */
1748                 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
1749                         RT5659_I2S_PD1_MASK, RT5659_I2S_PD1_2);
1750                 return 1;
1751         default:
1752                 return 0;
1753         }
1754 
1755 }
1756 
1757 /* Digital Mixer */
1758 static const struct snd_kcontrol_new rt5659_sto1_adc_l_mix[] = {
1759         SOC_DAPM_SINGLE("ADC1 Switch", RT5659_STO1_ADC_MIXER,
1760                         RT5659_M_STO1_ADC_L1_SFT, 1, 1),
1761         SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
1762                         RT5659_M_STO1_ADC_L2_SFT, 1, 1),
1763 };
1764 
1765 static const struct snd_kcontrol_new rt5659_sto1_adc_r_mix[] = {
1766         SOC_DAPM_SINGLE("ADC1 Switch", RT5659_STO1_ADC_MIXER,
1767                         RT5659_M_STO1_ADC_R1_SFT, 1, 1),
1768         SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
1769                         RT5659_M_STO1_ADC_R2_SFT, 1, 1),
1770 };
1771 
1772 static const struct snd_kcontrol_new rt5659_mono_adc_l_mix[] = {
1773         SOC_DAPM_SINGLE("ADC1 Switch", RT5659_MONO_ADC_MIXER,
1774                         RT5659_M_MONO_ADC_L1_SFT, 1, 1),
1775         SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
1776                         RT5659_M_MONO_ADC_L2_SFT, 1, 1),
1777 };
1778 
1779 static const struct snd_kcontrol_new rt5659_mono_adc_r_mix[] = {
1780         SOC_DAPM_SINGLE("ADC1 Switch", RT5659_MONO_ADC_MIXER,
1781                         RT5659_M_MONO_ADC_R1_SFT, 1, 1),
1782         SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
1783                         RT5659_M_MONO_ADC_R2_SFT, 1, 1),
1784 };
1785 
1786 static const struct snd_kcontrol_new rt5659_dac_l_mix[] = {
1787         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5659_AD_DA_MIXER,
1788                         RT5659_M_ADCMIX_L_SFT, 1, 1),
1789         SOC_DAPM_SINGLE("DAC1 Switch", RT5659_AD_DA_MIXER,
1790                         RT5659_M_DAC1_L_SFT, 1, 1),
1791 };
1792 
1793 static const struct snd_kcontrol_new rt5659_dac_r_mix[] = {
1794         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5659_AD_DA_MIXER,
1795                         RT5659_M_ADCMIX_R_SFT, 1, 1),
1796         SOC_DAPM_SINGLE("DAC1 Switch", RT5659_AD_DA_MIXER,
1797                         RT5659_M_DAC1_R_SFT, 1, 1),
1798 };
1799 
1800 static const struct snd_kcontrol_new rt5659_sto_dac_l_mix[] = {
1801         SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_STO_DAC_MIXER,
1802                         RT5659_M_DAC_L1_STO_L_SFT, 1, 1),
1803         SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_STO_DAC_MIXER,
1804                         RT5659_M_DAC_R1_STO_L_SFT, 1, 1),
1805         SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_STO_DAC_MIXER,
1806                         RT5659_M_DAC_L2_STO_L_SFT, 1, 1),
1807         SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_STO_DAC_MIXER,
1808                         RT5659_M_DAC_R2_STO_L_SFT, 1, 1),
1809 };
1810 
1811 static const struct snd_kcontrol_new rt5659_sto_dac_r_mix[] = {
1812         SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_STO_DAC_MIXER,
1813                         RT5659_M_DAC_L1_STO_R_SFT, 1, 1),
1814         SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_STO_DAC_MIXER,
1815                         RT5659_M_DAC_R1_STO_R_SFT, 1, 1),
1816         SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_STO_DAC_MIXER,
1817                         RT5659_M_DAC_L2_STO_R_SFT, 1, 1),
1818         SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_STO_DAC_MIXER,
1819                         RT5659_M_DAC_R2_STO_R_SFT, 1, 1),
1820 };
1821 
1822 static const struct snd_kcontrol_new rt5659_mono_dac_l_mix[] = {
1823         SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_MONO_DAC_MIXER,
1824                         RT5659_M_DAC_L1_MONO_L_SFT, 1, 1),
1825         SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_MONO_DAC_MIXER,
1826                         RT5659_M_DAC_R1_MONO_L_SFT, 1, 1),
1827         SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONO_DAC_MIXER,
1828                         RT5659_M_DAC_L2_MONO_L_SFT, 1, 1),
1829         SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONO_DAC_MIXER,
1830                         RT5659_M_DAC_R2_MONO_L_SFT, 1, 1),
1831 };
1832 
1833 static const struct snd_kcontrol_new rt5659_mono_dac_r_mix[] = {
1834         SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_MONO_DAC_MIXER,
1835                         RT5659_M_DAC_L1_MONO_R_SFT, 1, 1),
1836         SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_MONO_DAC_MIXER,
1837                         RT5659_M_DAC_R1_MONO_R_SFT, 1, 1),
1838         SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONO_DAC_MIXER,
1839                         RT5659_M_DAC_L2_MONO_R_SFT, 1, 1),
1840         SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONO_DAC_MIXER,
1841                         RT5659_M_DAC_R2_MONO_R_SFT, 1, 1),
1842 };
1843 
1844 /* Analog Input Mixer */
1845 static const struct snd_kcontrol_new rt5659_rec1_l_mix[] = {
1846         SOC_DAPM_SINGLE("SPKVOLL Switch", RT5659_REC1_L2_MIXER,
1847                         RT5659_M_SPKVOLL_RM1_L_SFT, 1, 1),
1848         SOC_DAPM_SINGLE("INL Switch", RT5659_REC1_L2_MIXER,
1849                         RT5659_M_INL_RM1_L_SFT, 1, 1),
1850         SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC1_L2_MIXER,
1851                         RT5659_M_BST4_RM1_L_SFT, 1, 1),
1852         SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC1_L2_MIXER,
1853                         RT5659_M_BST3_RM1_L_SFT, 1, 1),
1854         SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC1_L2_MIXER,
1855                         RT5659_M_BST2_RM1_L_SFT, 1, 1),
1856         SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC1_L2_MIXER,
1857                         RT5659_M_BST1_RM1_L_SFT, 1, 1),
1858 };
1859 
1860 static const struct snd_kcontrol_new rt5659_rec1_r_mix[] = {
1861         SOC_DAPM_SINGLE("HPOVOLR Switch", RT5659_REC1_L2_MIXER,
1862                         RT5659_M_HPOVOLR_RM1_R_SFT, 1, 1),
1863         SOC_DAPM_SINGLE("INR Switch", RT5659_REC1_R2_MIXER,
1864                         RT5659_M_INR_RM1_R_SFT, 1, 1),
1865         SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC1_R2_MIXER,
1866                         RT5659_M_BST4_RM1_R_SFT, 1, 1),
1867         SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC1_R2_MIXER,
1868                         RT5659_M_BST3_RM1_R_SFT, 1, 1),
1869         SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC1_R2_MIXER,
1870                         RT5659_M_BST2_RM1_R_SFT, 1, 1),
1871         SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC1_R2_MIXER,
1872                         RT5659_M_BST1_RM1_R_SFT, 1, 1),
1873 };
1874 
1875 static const struct snd_kcontrol_new rt5659_rec2_l_mix[] = {
1876         SOC_DAPM_SINGLE("SPKVOLL Switch", RT5659_REC2_L2_MIXER,
1877                         RT5659_M_SPKVOL_RM2_L_SFT, 1, 1),
1878         SOC_DAPM_SINGLE("OUTVOLL Switch", RT5659_REC2_L2_MIXER,
1879                         RT5659_M_OUTVOLL_RM2_L_SFT, 1, 1),
1880         SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC2_L2_MIXER,
1881                         RT5659_M_BST4_RM2_L_SFT, 1, 1),
1882         SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC2_L2_MIXER,
1883                         RT5659_M_BST3_RM2_L_SFT, 1, 1),
1884         SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC2_L2_MIXER,
1885                         RT5659_M_BST2_RM2_L_SFT, 1, 1),
1886         SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC2_L2_MIXER,
1887                         RT5659_M_BST1_RM2_L_SFT, 1, 1),
1888 };
1889 
1890 static const struct snd_kcontrol_new rt5659_rec2_r_mix[] = {
1891         SOC_DAPM_SINGLE("MONOVOL Switch", RT5659_REC2_R2_MIXER,
1892                         RT5659_M_MONOVOL_RM2_R_SFT, 1, 1),
1893         SOC_DAPM_SINGLE("OUTVOLR Switch", RT5659_REC2_R2_MIXER,
1894                         RT5659_M_OUTVOLR_RM2_R_SFT, 1, 1),
1895         SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC2_R2_MIXER,
1896                         RT5659_M_BST4_RM2_R_SFT, 1, 1),
1897         SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC2_R2_MIXER,
1898                         RT5659_M_BST3_RM2_R_SFT, 1, 1),
1899         SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC2_R2_MIXER,
1900                         RT5659_M_BST2_RM2_R_SFT, 1, 1),
1901         SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC2_R2_MIXER,
1902                         RT5659_M_BST1_RM2_R_SFT, 1, 1),
1903 };
1904 
1905 static const struct snd_kcontrol_new rt5659_spk_l_mix[] = {
1906         SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_SPK_L_MIXER,
1907                         RT5659_M_DAC_L2_SM_L_SFT, 1, 1),
1908         SOC_DAPM_SINGLE("BST1 Switch", RT5659_SPK_L_MIXER,
1909                         RT5659_M_BST1_SM_L_SFT, 1, 1),
1910         SOC_DAPM_SINGLE("INL Switch", RT5659_SPK_L_MIXER,
1911                         RT5659_M_IN_L_SM_L_SFT, 1, 1),
1912         SOC_DAPM_SINGLE("INR Switch", RT5659_SPK_L_MIXER,
1913                         RT5659_M_IN_R_SM_L_SFT, 1, 1),
1914         SOC_DAPM_SINGLE("BST3 Switch", RT5659_SPK_L_MIXER,
1915                         RT5659_M_BST3_SM_L_SFT, 1, 1),
1916 };
1917 
1918 static const struct snd_kcontrol_new rt5659_spk_r_mix[] = {
1919         SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_SPK_R_MIXER,
1920                         RT5659_M_DAC_R2_SM_R_SFT, 1, 1),
1921         SOC_DAPM_SINGLE("BST4 Switch", RT5659_SPK_R_MIXER,
1922                         RT5659_M_BST4_SM_R_SFT, 1, 1),
1923         SOC_DAPM_SINGLE("INL Switch", RT5659_SPK_R_MIXER,
1924                         RT5659_M_IN_L_SM_R_SFT, 1, 1),
1925         SOC_DAPM_SINGLE("INR Switch", RT5659_SPK_R_MIXER,
1926                         RT5659_M_IN_R_SM_R_SFT, 1, 1),
1927         SOC_DAPM_SINGLE("BST3 Switch", RT5659_SPK_R_MIXER,
1928                         RT5659_M_BST3_SM_R_SFT, 1, 1),
1929 };
1930 
1931 static const struct snd_kcontrol_new rt5659_monovol_mix[] = {
1932         SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONOMIX_IN_GAIN,
1933                         RT5659_M_DAC_L2_MM_SFT, 1, 1),
1934         SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONOMIX_IN_GAIN,
1935                         RT5659_M_DAC_R2_MM_SFT, 1, 1),
1936         SOC_DAPM_SINGLE("BST1 Switch", RT5659_MONOMIX_IN_GAIN,
1937                         RT5659_M_BST1_MM_SFT, 1, 1),
1938         SOC_DAPM_SINGLE("BST2 Switch", RT5659_MONOMIX_IN_GAIN,
1939                         RT5659_M_BST2_MM_SFT, 1, 1),
1940         SOC_DAPM_SINGLE("BST3 Switch", RT5659_MONOMIX_IN_GAIN,
1941                         RT5659_M_BST3_MM_SFT, 1, 1),
1942 };
1943 
1944 static const struct snd_kcontrol_new rt5659_out_l_mix[] = {
1945         SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_OUT_L_MIXER,
1946                         RT5659_M_DAC_L2_OM_L_SFT, 1, 1),
1947         SOC_DAPM_SINGLE("INL Switch", RT5659_OUT_L_MIXER,
1948                         RT5659_M_IN_L_OM_L_SFT, 1, 1),
1949         SOC_DAPM_SINGLE("BST1 Switch", RT5659_OUT_L_MIXER,
1950                         RT5659_M_BST1_OM_L_SFT, 1, 1),
1951         SOC_DAPM_SINGLE("BST2 Switch", RT5659_OUT_L_MIXER,
1952                         RT5659_M_BST2_OM_L_SFT, 1, 1),
1953         SOC_DAPM_SINGLE("BST3 Switch", RT5659_OUT_L_MIXER,
1954                         RT5659_M_BST3_OM_L_SFT, 1, 1),
1955 };
1956 
1957 static const struct snd_kcontrol_new rt5659_out_r_mix[] = {
1958         SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_OUT_R_MIXER,
1959                         RT5659_M_DAC_R2_OM_R_SFT, 1, 1),
1960         SOC_DAPM_SINGLE("INR Switch", RT5659_OUT_R_MIXER,
1961                         RT5659_M_IN_R_OM_R_SFT, 1, 1),
1962         SOC_DAPM_SINGLE("BST2 Switch", RT5659_OUT_R_MIXER,
1963                         RT5659_M_BST2_OM_R_SFT, 1, 1),
1964         SOC_DAPM_SINGLE("BST3 Switch", RT5659_OUT_R_MIXER,
1965                         RT5659_M_BST3_OM_R_SFT, 1, 1),
1966         SOC_DAPM_SINGLE("BST4 Switch", RT5659_OUT_R_MIXER,
1967                         RT5659_M_BST4_OM_R_SFT, 1, 1),
1968 };
1969 
1970 static const struct snd_kcontrol_new rt5659_spo_l_mix[] = {
1971         SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_SPO_AMP_GAIN,
1972                         RT5659_M_DAC_L2_SPKOMIX_SFT, 1, 0),
1973         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5659_SPO_AMP_GAIN,
1974                         RT5659_M_SPKVOLL_SPKOMIX_SFT, 1, 0),
1975 };
1976 
1977 static const struct snd_kcontrol_new rt5659_spo_r_mix[] = {
1978         SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_SPO_AMP_GAIN,
1979                         RT5659_M_DAC_R2_SPKOMIX_SFT, 1, 0),
1980         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5659_SPO_AMP_GAIN,
1981                         RT5659_M_SPKVOLR_SPKOMIX_SFT, 1, 0),
1982 };
1983 
1984 static const struct snd_kcontrol_new rt5659_mono_mix[] = {
1985         SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONOMIX_IN_GAIN,
1986                         RT5659_M_DAC_L2_MA_SFT, 1, 1),
1987         SOC_DAPM_SINGLE("MONOVOL Switch", RT5659_MONOMIX_IN_GAIN,
1988                         RT5659_M_MONOVOL_MA_SFT, 1, 1),
1989 };
1990 
1991 static const struct snd_kcontrol_new rt5659_lout_l_mix[] = {
1992         SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_LOUT_MIXER,
1993                         RT5659_M_DAC_L2_LM_SFT, 1, 1),
1994         SOC_DAPM_SINGLE("OUTVOL L Switch", RT5659_LOUT_MIXER,
1995                         RT5659_M_OV_L_LM_SFT, 1, 1),
1996 };
1997 
1998 static const struct snd_kcontrol_new rt5659_lout_r_mix[] = {
1999         SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_LOUT_MIXER,
2000                         RT5659_M_DAC_R2_LM_SFT, 1, 1),
2001         SOC_DAPM_SINGLE("OUTVOL R Switch", RT5659_LOUT_MIXER,
2002                         RT5659_M_OV_R_LM_SFT, 1, 1),
2003 };
2004 
2005 /*DAC L2, DAC R2*/
2006 /*MX-1B [6:4], MX-1B [2:0]*/
2007 static const char * const rt5659_dac2_src[] = {
2008         "IF1 DAC2", "IF2 DAC", "IF3 DAC", "Mono ADC MIX"
2009 };
2010 
2011 static SOC_ENUM_SINGLE_DECL(
2012         rt5659_dac_l2_enum, RT5659_DAC_CTRL,
2013         RT5659_DAC_L2_SEL_SFT, rt5659_dac2_src);
2014 
2015 static const struct snd_kcontrol_new rt5659_dac_l2_mux =
2016         SOC_DAPM_ENUM("DAC L2 Source", rt5659_dac_l2_enum);
2017 
2018 static SOC_ENUM_SINGLE_DECL(
2019         rt5659_dac_r2_enum, RT5659_DAC_CTRL,
2020         RT5659_DAC_R2_SEL_SFT, rt5659_dac2_src);
2021 
2022 static const struct snd_kcontrol_new rt5659_dac_r2_mux =
2023         SOC_DAPM_ENUM("DAC R2 Source", rt5659_dac_r2_enum);
2024 
2025 
2026 /* STO1 ADC1 Source */
2027 /* MX-26 [13] */
2028 static const char * const rt5659_sto1_adc1_src[] = {
2029         "DAC MIX", "ADC"
2030 };
2031 
2032 static SOC_ENUM_SINGLE_DECL(
2033         rt5659_sto1_adc1_enum, RT5659_STO1_ADC_MIXER,
2034         RT5659_STO1_ADC1_SRC_SFT, rt5659_sto1_adc1_src);
2035 
2036 static const struct snd_kcontrol_new rt5659_sto1_adc1_mux =
2037         SOC_DAPM_ENUM("Stereo1 ADC1 Source", rt5659_sto1_adc1_enum);
2038 
2039 /* STO1 ADC Source */
2040 /* MX-26 [12] */
2041 static const char * const rt5659_sto1_adc_src[] = {
2042         "ADC1", "ADC2"
2043 };
2044 
2045 static SOC_ENUM_SINGLE_DECL(
2046         rt5659_sto1_adc_enum, RT5659_STO1_ADC_MIXER,
2047         RT5659_STO1_ADC_SRC_SFT, rt5659_sto1_adc_src);
2048 
2049 static const struct snd_kcontrol_new rt5659_sto1_adc_mux =
2050         SOC_DAPM_ENUM("Stereo1 ADC Source", rt5659_sto1_adc_enum);
2051 
2052 /* STO1 ADC2 Source */
2053 /* MX-26 [11] */
2054 static const char * const rt5659_sto1_adc2_src[] = {
2055         "DAC MIX", "DMIC"
2056 };
2057 
2058 static SOC_ENUM_SINGLE_DECL(
2059         rt5659_sto1_adc2_enum, RT5659_STO1_ADC_MIXER,
2060         RT5659_STO1_ADC2_SRC_SFT, rt5659_sto1_adc2_src);
2061 
2062 static const struct snd_kcontrol_new rt5659_sto1_adc2_mux =
2063         SOC_DAPM_ENUM("Stereo1 ADC2 Source", rt5659_sto1_adc2_enum);
2064 
2065 /* STO1 DMIC Source */
2066 /* MX-26 [8] */
2067 static const char * const rt5659_sto1_dmic_src[] = {
2068         "DMIC1", "DMIC2"
2069 };
2070 
2071 static SOC_ENUM_SINGLE_DECL(
2072         rt5659_sto1_dmic_enum, RT5659_STO1_ADC_MIXER,
2073         RT5659_STO1_DMIC_SRC_SFT, rt5659_sto1_dmic_src);
2074 
2075 static const struct snd_kcontrol_new rt5659_sto1_dmic_mux =
2076         SOC_DAPM_ENUM("Stereo1 DMIC Source", rt5659_sto1_dmic_enum);
2077 
2078 
2079 /* MONO ADC L2 Source */
2080 /* MX-27 [12] */
2081 static const char * const rt5659_mono_adc_l2_src[] = {
2082         "Mono DAC MIXL", "DMIC"
2083 };
2084 
2085 static SOC_ENUM_SINGLE_DECL(
2086         rt5659_mono_adc_l2_enum, RT5659_MONO_ADC_MIXER,
2087         RT5659_MONO_ADC_L2_SRC_SFT, rt5659_mono_adc_l2_src);
2088 
2089 static const struct snd_kcontrol_new rt5659_mono_adc_l2_mux =
2090         SOC_DAPM_ENUM("Mono ADC L2 Source", rt5659_mono_adc_l2_enum);
2091 
2092 
2093 /* MONO ADC L1 Source */
2094 /* MX-27 [11] */
2095 static const char * const rt5659_mono_adc_l1_src[] = {
2096         "Mono DAC MIXL", "ADC"
2097 };
2098 
2099 static SOC_ENUM_SINGLE_DECL(
2100         rt5659_mono_adc_l1_enum, RT5659_MONO_ADC_MIXER,
2101         RT5659_MONO_ADC_L1_SRC_SFT, rt5659_mono_adc_l1_src);
2102 
2103 static const struct snd_kcontrol_new rt5659_mono_adc_l1_mux =
2104         SOC_DAPM_ENUM("Mono ADC L1 Source", rt5659_mono_adc_l1_enum);
2105 
2106 /* MONO ADC L Source, MONO ADC R Source*/
2107 /* MX-27 [10:9], MX-27 [2:1] */
2108 static const char * const rt5659_mono_adc_src[] = {
2109         "ADC1 L", "ADC1 R", "ADC2 L", "ADC2 R"
2110 };
2111 
2112 static SOC_ENUM_SINGLE_DECL(
2113         rt5659_mono_adc_l_enum, RT5659_MONO_ADC_MIXER,
2114         RT5659_MONO_ADC_L_SRC_SFT, rt5659_mono_adc_src);
2115 
2116 static const struct snd_kcontrol_new rt5659_mono_adc_l_mux =
2117         SOC_DAPM_ENUM("Mono ADC L Source", rt5659_mono_adc_l_enum);
2118 
2119 static SOC_ENUM_SINGLE_DECL(
2120         rt5659_mono_adcr_enum, RT5659_MONO_ADC_MIXER,
2121         RT5659_MONO_ADC_R_SRC_SFT, rt5659_mono_adc_src);
2122 
2123 static const struct snd_kcontrol_new rt5659_mono_adc_r_mux =
2124         SOC_DAPM_ENUM("Mono ADC R Source", rt5659_mono_adcr_enum);
2125 
2126 /* MONO DMIC L Source */
2127 /* MX-27 [8] */
2128 static const char * const rt5659_mono_dmic_l_src[] = {
2129         "DMIC1 L", "DMIC2 L"
2130 };
2131 
2132 static SOC_ENUM_SINGLE_DECL(
2133         rt5659_mono_dmic_l_enum, RT5659_MONO_ADC_MIXER,
2134         RT5659_MONO_DMIC_L_SRC_SFT, rt5659_mono_dmic_l_src);
2135 
2136 static const struct snd_kcontrol_new rt5659_mono_dmic_l_mux =
2137         SOC_DAPM_ENUM("Mono DMIC L Source", rt5659_mono_dmic_l_enum);
2138 
2139 /* MONO ADC R2 Source */
2140 /* MX-27 [4] */
2141 static const char * const rt5659_mono_adc_r2_src[] = {
2142         "Mono DAC MIXR", "DMIC"
2143 };
2144 
2145 static SOC_ENUM_SINGLE_DECL(
2146         rt5659_mono_adc_r2_enum, RT5659_MONO_ADC_MIXER,
2147         RT5659_MONO_ADC_R2_SRC_SFT, rt5659_mono_adc_r2_src);
2148 
2149 static const struct snd_kcontrol_new rt5659_mono_adc_r2_mux =
2150         SOC_DAPM_ENUM("Mono ADC R2 Source", rt5659_mono_adc_r2_enum);
2151 
2152 /* MONO ADC R1 Source */
2153 /* MX-27 [3] */
2154 static const char * const rt5659_mono_adc_r1_src[] = {
2155         "Mono DAC MIXR", "ADC"
2156 };
2157 
2158 static SOC_ENUM_SINGLE_DECL(
2159         rt5659_mono_adc_r1_enum, RT5659_MONO_ADC_MIXER,
2160         RT5659_MONO_ADC_R1_SRC_SFT, rt5659_mono_adc_r1_src);
2161 
2162 static const struct snd_kcontrol_new rt5659_mono_adc_r1_mux =
2163         SOC_DAPM_ENUM("Mono ADC R1 Source", rt5659_mono_adc_r1_enum);
2164 
2165 /* MONO DMIC R Source */
2166 /* MX-27 [0] */
2167 static const char * const rt5659_mono_dmic_r_src[] = {
2168         "DMIC1 R", "DMIC2 R"
2169 };
2170 
2171 static SOC_ENUM_SINGLE_DECL(
2172         rt5659_mono_dmic_r_enum, RT5659_MONO_ADC_MIXER,
2173         RT5659_MONO_DMIC_R_SRC_SFT, rt5659_mono_dmic_r_src);
2174 
2175 static const struct snd_kcontrol_new rt5659_mono_dmic_r_mux =
2176         SOC_DAPM_ENUM("Mono DMIC R Source", rt5659_mono_dmic_r_enum);
2177 
2178 
2179 /* DAC R1 Source, DAC L1 Source*/
2180 /* MX-29 [11:10], MX-29 [9:8]*/
2181 static const char * const rt5659_dac1_src[] = {
2182         "IF1 DAC1", "IF2 DAC", "IF3 DAC"
2183 };
2184 
2185 static SOC_ENUM_SINGLE_DECL(
2186         rt5659_dac_r1_enum, RT5659_AD_DA_MIXER,
2187         RT5659_DAC1_R_SEL_SFT, rt5659_dac1_src);
2188 
2189 static const struct snd_kcontrol_new rt5659_dac_r1_mux =
2190         SOC_DAPM_ENUM("DAC R1 Source", rt5659_dac_r1_enum);
2191 
2192 static SOC_ENUM_SINGLE_DECL(
2193         rt5659_dac_l1_enum, RT5659_AD_DA_MIXER,
2194         RT5659_DAC1_L_SEL_SFT, rt5659_dac1_src);
2195 
2196 static const struct snd_kcontrol_new rt5659_dac_l1_mux =
2197         SOC_DAPM_ENUM("DAC L1 Source", rt5659_dac_l1_enum);
2198 
2199 /* DAC Digital Mixer L Source, DAC Digital Mixer R Source*/
2200 /* MX-2C [6], MX-2C [4]*/
2201 static const char * const rt5659_dig_dac_mix_src[] = {
2202         "Stereo DAC Mixer", "Mono DAC Mixer"
2203 };
2204 
2205 static SOC_ENUM_SINGLE_DECL(
2206         rt5659_dig_dac_mixl_enum, RT5659_DIG_MIXER,
2207         RT5659_DAC_MIX_L_SFT, rt5659_dig_dac_mix_src);
2208 
2209 static const struct snd_kcontrol_new rt5659_dig_dac_mixl_mux =
2210         SOC_DAPM_ENUM("DAC Digital Mixer L Source", rt5659_dig_dac_mixl_enum);
2211 
2212 static SOC_ENUM_SINGLE_DECL(
2213         rt5659_dig_dac_mixr_enum, RT5659_DIG_MIXER,
2214         RT5659_DAC_MIX_R_SFT, rt5659_dig_dac_mix_src);
2215 
2216 static const struct snd_kcontrol_new rt5659_dig_dac_mixr_mux =
2217         SOC_DAPM_ENUM("DAC Digital Mixer R Source", rt5659_dig_dac_mixr_enum);
2218 
2219 /* Analog DAC L1 Source, Analog DAC R1 Source*/
2220 /* MX-2D [3], MX-2D [2]*/
2221 static const char * const rt5659_alg_dac1_src[] = {
2222         "DAC", "Stereo DAC Mixer"
2223 };
2224 
2225 static SOC_ENUM_SINGLE_DECL(
2226         rt5659_alg_dac_l1_enum, RT5659_A_DAC_MUX,
2227         RT5659_A_DACL1_SFT, rt5659_alg_dac1_src);
2228 
2229 static const struct snd_kcontrol_new rt5659_alg_dac_l1_mux =
2230         SOC_DAPM_ENUM("Analog DACL1 Source", rt5659_alg_dac_l1_enum);
2231 
2232 static SOC_ENUM_SINGLE_DECL(
2233         rt5659_alg_dac_r1_enum, RT5659_A_DAC_MUX,
2234         RT5659_A_DACR1_SFT, rt5659_alg_dac1_src);
2235 
2236 static const struct snd_kcontrol_new rt5659_alg_dac_r1_mux =
2237         SOC_DAPM_ENUM("Analog DACR1 Source", rt5659_alg_dac_r1_enum);
2238 
2239 /* Analog DAC LR Source, Analog DAC R2 Source*/
2240 /* MX-2D [1], MX-2D [0]*/
2241 static const char * const rt5659_alg_dac2_src[] = {
2242         "Stereo DAC Mixer", "Mono DAC Mixer"
2243 };
2244 
2245 static SOC_ENUM_SINGLE_DECL(
2246         rt5659_alg_dac_l2_enum, RT5659_A_DAC_MUX,
2247         RT5659_A_DACL2_SFT, rt5659_alg_dac2_src);
2248 
2249 static const struct snd_kcontrol_new rt5659_alg_dac_l2_mux =
2250         SOC_DAPM_ENUM("Analog DAC L2 Source", rt5659_alg_dac_l2_enum);
2251 
2252 static SOC_ENUM_SINGLE_DECL(
2253         rt5659_alg_dac_r2_enum, RT5659_A_DAC_MUX,
2254         RT5659_A_DACR2_SFT, rt5659_alg_dac2_src);
2255 
2256 static const struct snd_kcontrol_new rt5659_alg_dac_r2_mux =
2257         SOC_DAPM_ENUM("Analog DAC R2 Source", rt5659_alg_dac_r2_enum);
2258 
2259 /* Interface2 ADC Data Input*/
2260 /* MX-2F [13:12] */
2261 static const char * const rt5659_if2_adc_in_src[] = {
2262         "IF_ADC1", "IF_ADC2", "DAC_REF", "IF_ADC3"
2263 };
2264 
2265 static SOC_ENUM_SINGLE_DECL(
2266         rt5659_if2_adc_in_enum, RT5659_DIG_INF23_DATA,
2267         RT5659_IF2_ADC_IN_SFT, rt5659_if2_adc_in_src);
2268 
2269 static const struct snd_kcontrol_new rt5659_if2_adc_in_mux =
2270         SOC_DAPM_ENUM("IF2 ADC IN Source", rt5659_if2_adc_in_enum);
2271 
2272 /* Interface3 ADC Data Input*/
2273 /* MX-2F [1:0] */
2274 static const char * const rt5659_if3_adc_in_src[] = {
2275         "IF_ADC1", "IF_ADC2", "DAC_REF", "Stereo2_ADC_L/R"
2276 };
2277 
2278 static SOC_ENUM_SINGLE_DECL(
2279         rt5659_if3_adc_in_enum, RT5659_DIG_INF23_DATA,
2280         RT5659_IF3_ADC_IN_SFT, rt5659_if3_adc_in_src);
2281 
2282 static const struct snd_kcontrol_new rt5659_if3_adc_in_mux =
2283         SOC_DAPM_ENUM("IF3 ADC IN Source", rt5659_if3_adc_in_enum);
2284 
2285 /* PDM 1 L/R*/
2286 /* MX-31 [15] [13] */
2287 static const char * const rt5659_pdm_src[] = {
2288         "Mono DAC", "Stereo DAC"
2289 };
2290 
2291 static SOC_ENUM_SINGLE_DECL(
2292         rt5659_pdm_l_enum, RT5659_PDM_OUT_CTRL,
2293         RT5659_PDM1_L_SFT, rt5659_pdm_src);
2294 
2295 static const struct snd_kcontrol_new rt5659_pdm_l_mux =
2296         SOC_DAPM_ENUM("PDM L Source", rt5659_pdm_l_enum);
2297 
2298 static SOC_ENUM_SINGLE_DECL(
2299         rt5659_pdm_r_enum, RT5659_PDM_OUT_CTRL,
2300         RT5659_PDM1_R_SFT, rt5659_pdm_src);
2301 
2302 static const struct snd_kcontrol_new rt5659_pdm_r_mux =
2303         SOC_DAPM_ENUM("PDM R Source", rt5659_pdm_r_enum);
2304 
2305 /* SPDIF Output source*/
2306 /* MX-36 [1:0] */
2307 static const char * const rt5659_spdif_src[] = {
2308         "IF1_DAC1", "IF1_DAC2", "IF2_DAC", "IF3_DAC"
2309 };
2310 
2311 static SOC_ENUM_SINGLE_DECL(
2312         rt5659_spdif_enum, RT5659_SPDIF_CTRL,
2313         RT5659_SPDIF_SEL_SFT, rt5659_spdif_src);
2314 
2315 static const struct snd_kcontrol_new rt5659_spdif_mux =
2316         SOC_DAPM_ENUM("SPDIF Source", rt5659_spdif_enum);
2317 
2318 /* I2S1 TDM ADCDAT Source */
2319 /* MX-78[4:0] */
2320 static const char * const rt5659_rx_adc_data_src[] = {
2321         "AD1:AD2:DAC:NUL", "AD1:AD2:NUL:DAC", "AD1:DAC:AD2:NUL",
2322         "AD1:DAC:NUL:AD2", "AD1:NUL:DAC:AD2", "AD1:NUL:AD2:DAC",
2323         "AD2:AD1:DAC:NUL", "AD2:AD1:NUL:DAC", "AD2:DAC:AD1:NUL",
2324         "AD2:DAC:NUL:AD1", "AD2:NUL:DAC:AD1", "AD1:NUL:AD1:DAC",
2325         "DAC:AD1:AD2:NUL", "DAC:AD1:NUL:AD2", "DAC:AD2:AD1:NUL",
2326         "DAC:AD2:NUL:AD1", "DAC:NUL:DAC:AD2", "DAC:NUL:AD2:DAC",
2327         "NUL:AD1:AD2:DAC", "NUL:AD1:DAC:AD2", "NUL:AD2:AD1:DAC",
2328         "NUL:AD2:DAC:AD1", "NUL:DAC:DAC:AD2", "NUL:DAC:AD2:DAC"
2329 };
2330 
2331 static SOC_ENUM_SINGLE_DECL(
2332         rt5659_rx_adc_data_enum, RT5659_TDM_CTRL_2,
2333         RT5659_ADCDAT_SRC_SFT, rt5659_rx_adc_data_src);
2334 
2335 static const struct snd_kcontrol_new rt5659_rx_adc_dac_mux =
2336         SOC_DAPM_ENUM("TDM ADCDAT Source", rt5659_rx_adc_data_enum);
2337 
2338 /* Out Volume Switch */
2339 static const struct snd_kcontrol_new spkvol_l_switch =
2340         SOC_DAPM_SINGLE("Switch", RT5659_SPO_VOL, RT5659_VOL_L_SFT, 1, 1);
2341 
2342 static const struct snd_kcontrol_new spkvol_r_switch =
2343         SOC_DAPM_SINGLE("Switch", RT5659_SPO_VOL, RT5659_VOL_R_SFT, 1, 1);
2344 
2345 static const struct snd_kcontrol_new monovol_switch =
2346         SOC_DAPM_SINGLE("Switch", RT5659_MONO_OUT, RT5659_VOL_L_SFT, 1, 1);
2347 
2348 static const struct snd_kcontrol_new outvol_l_switch =
2349         SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_VOL_L_SFT, 1, 1);
2350 
2351 static const struct snd_kcontrol_new outvol_r_switch =
2352         SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_VOL_R_SFT, 1, 1);
2353 
2354 /* Out Switch */
2355 static const struct snd_kcontrol_new spo_switch =
2356         SOC_DAPM_SINGLE("Switch", RT5659_CLASSD_2, RT5659_M_RF_DIG_SFT, 1, 1);
2357 
2358 static const struct snd_kcontrol_new mono_switch =
2359         SOC_DAPM_SINGLE("Switch", RT5659_MONO_OUT, RT5659_L_MUTE_SFT, 1, 1);
2360 
2361 static const struct snd_kcontrol_new hpo_l_switch =
2362         SOC_DAPM_SINGLE("Switch", RT5659_HP_VOL, RT5659_L_MUTE_SFT, 1, 1);
2363 
2364 static const struct snd_kcontrol_new hpo_r_switch =
2365         SOC_DAPM_SINGLE("Switch", RT5659_HP_VOL, RT5659_R_MUTE_SFT, 1, 1);
2366 
2367 static const struct snd_kcontrol_new lout_l_switch =
2368         SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_L_MUTE_SFT, 1, 1);
2369 
2370 static const struct snd_kcontrol_new lout_r_switch =
2371         SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_R_MUTE_SFT, 1, 1);
2372 
2373 static const struct snd_kcontrol_new pdm_l_switch =
2374         SOC_DAPM_SINGLE("Switch", RT5659_PDM_OUT_CTRL, RT5659_M_PDM1_L_SFT, 1,
2375                 1);
2376 
2377 static const struct snd_kcontrol_new pdm_r_switch =
2378         SOC_DAPM_SINGLE("Switch", RT5659_PDM_OUT_CTRL, RT5659_M_PDM1_R_SFT, 1,
2379                 1);
2380 
2381 static int rt5659_spk_event(struct snd_soc_dapm_widget *w,
2382         struct snd_kcontrol *kcontrol, int event)
2383 {
2384         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2385 
2386         switch (event) {
2387         case SND_SOC_DAPM_PRE_PMU:
2388                 snd_soc_component_update_bits(component, RT5659_CLASSD_CTRL_1,
2389                         RT5659_POW_CLSD_DB_MASK, RT5659_POW_CLSD_DB_EN);
2390                 snd_soc_component_update_bits(component, RT5659_CLASSD_2,
2391                         RT5659_M_RI_DIG, RT5659_M_RI_DIG);
2392                 snd_soc_component_write(component, RT5659_CLASSD_1, 0x0803);
2393                 snd_soc_component_write(component, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000);
2394                 break;
2395 
2396         case SND_SOC_DAPM_POST_PMD:
2397                 snd_soc_component_write(component, RT5659_CLASSD_1, 0x0011);
2398                 snd_soc_component_update_bits(component, RT5659_CLASSD_2,
2399                         RT5659_M_RI_DIG, 0x0);
2400                 snd_soc_component_write(component, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003);
2401                 snd_soc_component_update_bits(component, RT5659_CLASSD_CTRL_1,
2402                         RT5659_POW_CLSD_DB_MASK, RT5659_POW_CLSD_DB_DIS);
2403                 break;
2404 
2405         default:
2406                 return 0;
2407         }
2408 
2409         return 0;
2410 
2411 }
2412 
2413 static int rt5659_mono_event(struct snd_soc_dapm_widget *w,
2414         struct snd_kcontrol *kcontrol, int event)
2415 {
2416         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2417 
2418         switch (event) {
2419         case SND_SOC_DAPM_PRE_PMU:
2420                 snd_soc_component_write(component, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00);
2421                 break;
2422 
2423         case SND_SOC_DAPM_POST_PMD:
2424                 snd_soc_component_write(component, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04);
2425                 break;
2426 
2427         default:
2428                 return 0;
2429         }
2430 
2431         return 0;
2432 
2433 }
2434 
2435 static int rt5659_hp_event(struct snd_soc_dapm_widget *w,
2436         struct snd_kcontrol *kcontrol, int event)
2437 {
2438         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2439 
2440         switch (event) {
2441         case SND_SOC_DAPM_POST_PMU:
2442                 snd_soc_component_write(component, RT5659_HP_CHARGE_PUMP_1, 0x0e1e);
2443                 snd_soc_component_update_bits(component, RT5659_DEPOP_1, 0x0010, 0x0010);
2444                 break;
2445 
2446         case SND_SOC_DAPM_PRE_PMD:
2447                 snd_soc_component_write(component, RT5659_DEPOP_1, 0x0000);
2448                 break;
2449 
2450         default:
2451                 return 0;
2452         }
2453 
2454         return 0;
2455 }
2456 
2457 static int set_dmic_power(struct snd_soc_dapm_widget *w,
2458         struct snd_kcontrol *kcontrol, int event)
2459 {
2460         switch (event) {
2461         case SND_SOC_DAPM_POST_PMU:
2462                 /*Add delay to avoid pop noise*/
2463                 msleep(450);
2464                 break;
2465 
2466         default:
2467                 return 0;
2468         }
2469 
2470         return 0;
2471 }
2472 
2473 static const struct snd_soc_dapm_widget rt5659_dapm_widgets[] = {
2474         SND_SOC_DAPM_SUPPLY("LDO2", RT5659_PWR_ANLG_3, RT5659_PWR_LDO2_BIT, 0,
2475                 NULL, 0),
2476         SND_SOC_DAPM_SUPPLY("PLL", RT5659_PWR_ANLG_3, RT5659_PWR_PLL_BIT, 0,
2477                 NULL, 0),
2478         SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5659_PWR_VOL,
2479                 RT5659_PWR_MIC_DET_BIT, 0, NULL, 0),
2480         SND_SOC_DAPM_SUPPLY("Mono Vref", RT5659_PWR_ANLG_1,
2481                 RT5659_PWR_VREF3_BIT, 0, NULL, 0),
2482 
2483         /* ASRC */
2484         SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5659_ASRC_1,
2485                 RT5659_I2S1_ASRC_SFT, 0, NULL, 0),
2486         SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5659_ASRC_1,
2487                 RT5659_I2S2_ASRC_SFT, 0, NULL, 0),
2488         SND_SOC_DAPM_SUPPLY_S("I2S3 ASRC", 1, RT5659_ASRC_1,
2489                 RT5659_I2S3_ASRC_SFT, 0, NULL, 0),
2490         SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5659_ASRC_1,
2491                 RT5659_DAC_STO_ASRC_SFT, 0, NULL, 0),
2492         SND_SOC_DAPM_SUPPLY_S("DAC Mono L ASRC", 1, RT5659_ASRC_1,
2493                 RT5659_DAC_MONO_L_ASRC_SFT, 0, NULL, 0),
2494         SND_SOC_DAPM_SUPPLY_S("DAC Mono R ASRC", 1, RT5659_ASRC_1,
2495                 RT5659_DAC_MONO_R_ASRC_SFT, 0, NULL, 0),
2496         SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5659_ASRC_1,
2497                 RT5659_ADC_STO1_ASRC_SFT, 0, NULL, 0),
2498         SND_SOC_DAPM_SUPPLY_S("ADC Mono L ASRC", 1, RT5659_ASRC_1,
2499                 RT5659_ADC_MONO_L_ASRC_SFT, 0, NULL, 0),
2500         SND_SOC_DAPM_SUPPLY_S("ADC Mono R ASRC", 1, RT5659_ASRC_1,
2501                 RT5659_ADC_MONO_R_ASRC_SFT, 0, NULL, 0),
2502 
2503         /* Input Side */
2504         SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5659_PWR_ANLG_2, RT5659_PWR_MB1_BIT,
2505                 0, NULL, 0),
2506         SND_SOC_DAPM_SUPPLY("MICBIAS2", RT5659_PWR_ANLG_2, RT5659_PWR_MB2_BIT,
2507                 0, NULL, 0),
2508         SND_SOC_DAPM_SUPPLY("MICBIAS3", RT5659_PWR_ANLG_2, RT5659_PWR_MB3_BIT,
2509                 0, NULL, 0),
2510 
2511         /* Input Lines */
2512         SND_SOC_DAPM_INPUT("DMIC L1"),
2513         SND_SOC_DAPM_INPUT("DMIC R1"),
2514         SND_SOC_DAPM_INPUT("DMIC L2"),
2515         SND_SOC_DAPM_INPUT("DMIC R2"),
2516 
2517         SND_SOC_DAPM_INPUT("IN1P"),
2518         SND_SOC_DAPM_INPUT("IN1N"),
2519         SND_SOC_DAPM_INPUT("IN2P"),
2520         SND_SOC_DAPM_INPUT("IN2N"),
2521         SND_SOC_DAPM_INPUT("IN3P"),
2522         SND_SOC_DAPM_INPUT("IN3N"),
2523         SND_SOC_DAPM_INPUT("IN4P"),
2524         SND_SOC_DAPM_INPUT("IN4N"),
2525 
2526         SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2527         SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2528 
2529         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2530                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
2531         SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5659_DMIC_CTRL_1,
2532                 RT5659_DMIC_1_EN_SFT, 0, set_dmic_power, SND_SOC_DAPM_POST_PMU),
2533         SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5659_DMIC_CTRL_1,
2534                 RT5659_DMIC_2_EN_SFT, 0, set_dmic_power, SND_SOC_DAPM_POST_PMU),
2535 
2536         /* Boost */
2537         SND_SOC_DAPM_PGA("BST1", RT5659_PWR_ANLG_2,
2538                 RT5659_PWR_BST1_P_BIT, 0, NULL, 0),
2539         SND_SOC_DAPM_PGA("BST2", RT5659_PWR_ANLG_2,
2540                 RT5659_PWR_BST2_P_BIT, 0, NULL, 0),
2541         SND_SOC_DAPM_PGA("BST3", RT5659_PWR_ANLG_2,
2542                 RT5659_PWR_BST3_P_BIT, 0, NULL, 0),
2543         SND_SOC_DAPM_PGA("BST4", RT5659_PWR_ANLG_2,
2544                 RT5659_PWR_BST4_P_BIT, 0, NULL, 0),
2545         SND_SOC_DAPM_SUPPLY("BST1 Power", RT5659_PWR_ANLG_2,
2546                 RT5659_PWR_BST1_BIT, 0, NULL, 0),
2547         SND_SOC_DAPM_SUPPLY("BST2 Power", RT5659_PWR_ANLG_2,
2548                 RT5659_PWR_BST2_BIT, 0, NULL, 0),
2549         SND_SOC_DAPM_SUPPLY("BST3 Power", RT5659_PWR_ANLG_2,
2550                 RT5659_PWR_BST3_BIT, 0, NULL, 0),
2551         SND_SOC_DAPM_SUPPLY("BST4 Power", RT5659_PWR_ANLG_2,
2552                 RT5659_PWR_BST4_BIT, 0, NULL, 0),
2553 
2554 
2555         /* Input Volume */
2556         SND_SOC_DAPM_PGA("INL VOL", RT5659_PWR_VOL, RT5659_PWR_IN_L_BIT,
2557                 0, NULL, 0),
2558         SND_SOC_DAPM_PGA("INR VOL", RT5659_PWR_VOL, RT5659_PWR_IN_R_BIT,
2559                 0, NULL, 0),
2560 
2561         /* REC Mixer */
2562         SND_SOC_DAPM_MIXER("RECMIX1L", RT5659_PWR_MIXER, RT5659_PWR_RM1_L_BIT,
2563                 0, rt5659_rec1_l_mix, ARRAY_SIZE(rt5659_rec1_l_mix)),
2564         SND_SOC_DAPM_MIXER("RECMIX1R", RT5659_PWR_MIXER, RT5659_PWR_RM1_R_BIT,
2565                 0, rt5659_rec1_r_mix, ARRAY_SIZE(rt5659_rec1_r_mix)),
2566         SND_SOC_DAPM_MIXER("RECMIX2L", RT5659_PWR_MIXER, RT5659_PWR_RM2_L_BIT,
2567                 0, rt5659_rec2_l_mix, ARRAY_SIZE(rt5659_rec2_l_mix)),
2568         SND_SOC_DAPM_MIXER("RECMIX2R", RT5659_PWR_MIXER, RT5659_PWR_RM2_R_BIT,
2569                 0, rt5659_rec2_r_mix, ARRAY_SIZE(rt5659_rec2_r_mix)),
2570 
2571         /* ADCs */
2572         SND_SOC_DAPM_ADC("ADC1 L", NULL, SND_SOC_NOPM, 0, 0),
2573         SND_SOC_DAPM_ADC("ADC1 R", NULL, SND_SOC_NOPM, 0, 0),
2574         SND_SOC_DAPM_ADC("ADC2 L", NULL, SND_SOC_NOPM, 0, 0),
2575         SND_SOC_DAPM_ADC("ADC2 R", NULL, SND_SOC_NOPM, 0, 0),
2576 
2577         SND_SOC_DAPM_SUPPLY("ADC1 L Power", RT5659_PWR_DIG_1,
2578                 RT5659_PWR_ADC_L1_BIT, 0, NULL, 0),
2579         SND_SOC_DAPM_SUPPLY("ADC1 R Power", RT5659_PWR_DIG_1,
2580                 RT5659_PWR_ADC_R1_BIT, 0, NULL, 0),
2581         SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_1,
2582                 RT5659_PWR_ADC_L2_BIT, 0, NULL, 0),
2583         SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_1,
2584                 RT5659_PWR_ADC_R2_BIT, 0, NULL, 0),
2585         SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc1_clk,
2586                 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
2587         SND_SOC_DAPM_SUPPLY("ADC2 clock", SND_SOC_NOPM, 0, 0, set_adc2_clk,
2588                 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
2589 
2590         /* ADC Mux */
2591         SND_SOC_DAPM_MUX("Stereo1 DMIC L Mux", SND_SOC_NOPM, 0, 0,
2592                 &rt5659_sto1_dmic_mux),
2593         SND_SOC_DAPM_MUX("Stereo1 DMIC R Mux", SND_SOC_NOPM, 0, 0,
2594                 &rt5659_sto1_dmic_mux),
2595         SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2596                 &rt5659_sto1_adc1_mux),
2597         SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2598                 &rt5659_sto1_adc1_mux),
2599         SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2600                 &rt5659_sto1_adc2_mux),
2601         SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2602                 &rt5659_sto1_adc2_mux),
2603         SND_SOC_DAPM_MUX("Stereo1 ADC L Mux", SND_SOC_NOPM, 0, 0,
2604                 &rt5659_sto1_adc_mux),
2605         SND_SOC_DAPM_MUX("Stereo1 ADC R Mux", SND_SOC_NOPM, 0, 0,
2606                 &rt5659_sto1_adc_mux),
2607         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2608                 &rt5659_mono_adc_l2_mux),
2609         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2610                 &rt5659_mono_adc_r2_mux),
2611         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2612                 &rt5659_mono_adc_l1_mux),
2613         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2614                 &rt5659_mono_adc_r1_mux),
2615         SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
2616                 &rt5659_mono_dmic_l_mux),
2617         SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
2618                 &rt5659_mono_dmic_r_mux),
2619         SND_SOC_DAPM_MUX("Mono ADC L Mux", SND_SOC_NOPM, 0, 0,
2620                 &rt5659_mono_adc_l_mux),
2621         SND_SOC_DAPM_MUX("Mono ADC R Mux", SND_SOC_NOPM, 0, 0,
2622                 &rt5659_mono_adc_r_mux),
2623         /* ADC Mixer */
2624         SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5659_PWR_DIG_2,
2625                 RT5659_PWR_ADC_S1F_BIT, 0, NULL, 0),
2626         SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5659_PWR_DIG_2,
2627                 RT5659_PWR_ADC_S2F_BIT, 0, NULL, 0),
2628         SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM,
2629                 0, 0, rt5659_sto1_adc_l_mix,
2630                 ARRAY_SIZE(rt5659_sto1_adc_l_mix)),
2631         SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM,
2632                 0, 0, rt5659_sto1_adc_r_mix,
2633                 ARRAY_SIZE(rt5659_sto1_adc_r_mix)),
2634         SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5659_PWR_DIG_2,
2635                 RT5659_PWR_ADC_MF_L_BIT, 0, NULL, 0),
2636         SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5659_MONO_ADC_DIG_VOL,
2637                 RT5659_L_MUTE_SFT, 1, rt5659_mono_adc_l_mix,
2638                 ARRAY_SIZE(rt5659_mono_adc_l_mix)),
2639         SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5659_PWR_DIG_2,
2640                 RT5659_PWR_ADC_MF_R_BIT, 0, NULL, 0),
2641         SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5659_MONO_ADC_DIG_VOL,
2642                 RT5659_R_MUTE_SFT, 1, rt5659_mono_adc_r_mix,
2643                 ARRAY_SIZE(rt5659_mono_adc_r_mix)),
2644 
2645         /* ADC PGA */
2646         SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2647         SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2648         SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2649         SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2650         SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2651         SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2652         SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
2653         SND_SOC_DAPM_PGA("Stereo2 ADC LR", SND_SOC_NOPM, 0, 0, NULL, 0),
2654 
2655         SND_SOC_DAPM_PGA("Stereo1 ADC Volume L", RT5659_STO1_ADC_DIG_VOL,
2656                 RT5659_L_MUTE_SFT, 1, NULL, 0),
2657         SND_SOC_DAPM_PGA("Stereo1 ADC Volume R", RT5659_STO1_ADC_DIG_VOL,
2658                 RT5659_R_MUTE_SFT, 1, NULL, 0),
2659 
2660         /* Digital Interface */
2661         SND_SOC_DAPM_SUPPLY("I2S1", RT5659_PWR_DIG_1, RT5659_PWR_I2S1_BIT,
2662                 0, NULL, 0),
2663         SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2664         SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2665         SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
2666         SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
2667         SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
2668         SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
2669         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2670         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2671         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2672         SND_SOC_DAPM_SUPPLY("I2S2", RT5659_PWR_DIG_1, RT5659_PWR_I2S2_BIT, 0,
2673                 NULL, 0),
2674         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2675         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2676         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2677         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2678         SND_SOC_DAPM_PGA("IF2 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2679         SND_SOC_DAPM_PGA("IF2 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2680         SND_SOC_DAPM_SUPPLY("I2S3", RT5659_PWR_DIG_1, RT5659_PWR_I2S3_BIT, 0,
2681                 NULL, 0),
2682         SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2683         SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2684         SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2685         SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2686         SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2687         SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2688 
2689         /* Digital Interface Select */
2690         SND_SOC_DAPM_PGA("TDM AD1:AD2:DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2691         SND_SOC_DAPM_PGA("TDM AD2:DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2692         SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
2693                 &rt5659_rx_adc_dac_mux),
2694         SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
2695                 &rt5659_if2_adc_in_mux),
2696         SND_SOC_DAPM_MUX("IF3 ADC Mux", SND_SOC_NOPM, 0, 0,
2697                 &rt5659_if3_adc_in_mux),
2698         SND_SOC_DAPM_MUX("IF1 01 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2699                         &rt5659_if1_01_adc_swap_mux),
2700         SND_SOC_DAPM_MUX("IF1 23 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2701                         &rt5659_if1_23_adc_swap_mux),
2702         SND_SOC_DAPM_MUX("IF1 45 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2703                         &rt5659_if1_45_adc_swap_mux),
2704         SND_SOC_DAPM_MUX("IF1 67 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2705                         &rt5659_if1_67_adc_swap_mux),
2706         SND_SOC_DAPM_MUX("IF2 DAC Swap Mux", SND_SOC_NOPM, 0, 0,
2707                         &rt5659_if2_dac_swap_mux),
2708         SND_SOC_DAPM_MUX("IF2 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2709                         &rt5659_if2_adc_swap_mux),
2710         SND_SOC_DAPM_MUX("IF3 DAC Swap Mux", SND_SOC_NOPM, 0, 0,
2711                         &rt5659_if3_dac_swap_mux),
2712         SND_SOC_DAPM_MUX("IF3 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2713                         &rt5659_if3_adc_swap_mux),
2714 
2715         /* Audio Interface */
2716         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
2717         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
2718         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
2719         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
2720         SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
2721         SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
2722 
2723         /* Output Side */
2724         /* DAC mixer before sound effect  */
2725         SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
2726                 rt5659_dac_l_mix, ARRAY_SIZE(rt5659_dac_l_mix)),
2727         SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
2728                 rt5659_dac_r_mix, ARRAY_SIZE(rt5659_dac_r_mix)),
2729 
2730         /* DAC channel Mux */
2731         SND_SOC_DAPM_MUX("DAC L1 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_l1_mux),
2732         SND_SOC_DAPM_MUX("DAC R1 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_r1_mux),
2733         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_l2_mux),
2734         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_r2_mux),
2735 
2736         SND_SOC_DAPM_MUX("DAC L1 Source", SND_SOC_NOPM, 0, 0,
2737                 &rt5659_alg_dac_l1_mux),
2738         SND_SOC_DAPM_MUX("DAC R1 Source", SND_SOC_NOPM, 0, 0,
2739                 &rt5659_alg_dac_r1_mux),
2740         SND_SOC_DAPM_MUX("DAC L2 Source", SND_SOC_NOPM, 0, 0,
2741                 &rt5659_alg_dac_l2_mux),
2742         SND_SOC_DAPM_MUX("DAC R2 Source", SND_SOC_NOPM, 0, 0,
2743                 &rt5659_alg_dac_r2_mux),
2744 
2745         /* DAC Mixer */
2746         SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5659_PWR_DIG_2,
2747                 RT5659_PWR_DAC_S1F_BIT, 0, NULL, 0),
2748         SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5659_PWR_DIG_2,
2749                 RT5659_PWR_DAC_MF_L_BIT, 0, NULL, 0),
2750         SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5659_PWR_DIG_2,
2751                 RT5659_PWR_DAC_MF_R_BIT, 0, NULL, 0),
2752         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
2753                 rt5659_sto_dac_l_mix, ARRAY_SIZE(rt5659_sto_dac_l_mix)),
2754         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
2755                 rt5659_sto_dac_r_mix, ARRAY_SIZE(rt5659_sto_dac_r_mix)),
2756         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2757                 rt5659_mono_dac_l_mix, ARRAY_SIZE(rt5659_mono_dac_l_mix)),
2758         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2759                 rt5659_mono_dac_r_mix, ARRAY_SIZE(rt5659_mono_dac_r_mix)),
2760         SND_SOC_DAPM_MUX("DAC MIXL", SND_SOC_NOPM, 0, 0,
2761                 &rt5659_dig_dac_mixl_mux),
2762         SND_SOC_DAPM_MUX("DAC MIXR", SND_SOC_NOPM, 0, 0,
2763                 &rt5659_dig_dac_mixr_mux),
2764 
2765         /* DACs */
2766         SND_SOC_DAPM_SUPPLY_S("DAC L1 Power", 1, RT5659_PWR_DIG_1,
2767                 RT5659_PWR_DAC_L1_BIT, 0, NULL, 0),
2768         SND_SOC_DAPM_SUPPLY_S("DAC R1 Power", 1, RT5659_PWR_DIG_1,
2769                 RT5659_PWR_DAC_R1_BIT, 0, NULL, 0),
2770         SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
2771         SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
2772 
2773         SND_SOC_DAPM_SUPPLY("DAC L2 Power", RT5659_PWR_DIG_1,
2774                 RT5659_PWR_DAC_L2_BIT, 0, NULL, 0),
2775         SND_SOC_DAPM_SUPPLY("DAC R2 Power", RT5659_PWR_DIG_1,
2776                 RT5659_PWR_DAC_R2_BIT, 0, NULL, 0),
2777         SND_SOC_DAPM_DAC("DAC L2", NULL, SND_SOC_NOPM, 0, 0),
2778         SND_SOC_DAPM_DAC("DAC R2", NULL, SND_SOC_NOPM, 0, 0),
2779         SND_SOC_DAPM_PGA("DAC_REF", SND_SOC_NOPM, 0, 0, NULL, 0),
2780 
2781         /* OUT Mixer */
2782         SND_SOC_DAPM_MIXER("SPK MIXL", RT5659_PWR_MIXER, RT5659_PWR_SM_L_BIT,
2783                 0, rt5659_spk_l_mix, ARRAY_SIZE(rt5659_spk_l_mix)),
2784         SND_SOC_DAPM_MIXER("SPK MIXR", RT5659_PWR_MIXER, RT5659_PWR_SM_R_BIT,
2785                 0, rt5659_spk_r_mix, ARRAY_SIZE(rt5659_spk_r_mix)),
2786         SND_SOC_DAPM_MIXER("MONOVOL MIX", RT5659_PWR_MIXER, RT5659_PWR_MM_BIT,
2787                 0, rt5659_monovol_mix, ARRAY_SIZE(rt5659_monovol_mix)),
2788         SND_SOC_DAPM_MIXER("OUT MIXL", RT5659_PWR_MIXER, RT5659_PWR_OM_L_BIT,
2789                 0, rt5659_out_l_mix, ARRAY_SIZE(rt5659_out_l_mix)),
2790         SND_SOC_DAPM_MIXER("OUT MIXR", RT5659_PWR_MIXER, RT5659_PWR_OM_R_BIT,
2791                 0, rt5659_out_r_mix, ARRAY_SIZE(rt5659_out_r_mix)),
2792 
2793         /* Output Volume */
2794         SND_SOC_DAPM_SWITCH("SPKVOL L", RT5659_PWR_VOL, RT5659_PWR_SV_L_BIT, 0,
2795                 &spkvol_l_switch),
2796         SND_SOC_DAPM_SWITCH("SPKVOL R", RT5659_PWR_VOL, RT5659_PWR_SV_R_BIT, 0,
2797                 &spkvol_r_switch),
2798         SND_SOC_DAPM_SWITCH("MONOVOL", RT5659_PWR_VOL, RT5659_PWR_MV_BIT, 0,
2799                 &monovol_switch),
2800         SND_SOC_DAPM_SWITCH("OUTVOL L", RT5659_PWR_VOL, RT5659_PWR_OV_L_BIT, 0,
2801                 &outvol_l_switch),
2802         SND_SOC_DAPM_SWITCH("OUTVOL R", RT5659_PWR_VOL, RT5659_PWR_OV_R_BIT, 0,
2803                 &outvol_r_switch),
2804 
2805         /* SPO/MONO/HPO/LOUT */
2806         SND_SOC_DAPM_MIXER("SPO L MIX", SND_SOC_NOPM, 0, 0, rt5659_spo_l_mix,
2807                 ARRAY_SIZE(rt5659_spo_l_mix)),
2808         SND_SOC_DAPM_MIXER("SPO R MIX", SND_SOC_NOPM, 0, 0, rt5659_spo_r_mix,
2809                 ARRAY_SIZE(rt5659_spo_r_mix)),
2810         SND_SOC_DAPM_MIXER("Mono MIX", SND_SOC_NOPM, 0, 0, rt5659_mono_mix,
2811                 ARRAY_SIZE(rt5659_mono_mix)),
2812         SND_SOC_DAPM_MIXER("LOUT L MIX", SND_SOC_NOPM, 0, 0, rt5659_lout_l_mix,
2813                 ARRAY_SIZE(rt5659_lout_l_mix)),
2814         SND_SOC_DAPM_MIXER("LOUT R MIX", SND_SOC_NOPM, 0, 0, rt5659_lout_r_mix,
2815                 ARRAY_SIZE(rt5659_lout_r_mix)),
2816 
2817         SND_SOC_DAPM_PGA_S("SPK Amp", 1, RT5659_PWR_DIG_1, RT5659_PWR_CLS_D_BIT,
2818                 0, rt5659_spk_event, SND_SOC_DAPM_POST_PMD |
2819                 SND_SOC_DAPM_PRE_PMU),
2820         SND_SOC_DAPM_PGA_S("Mono Amp", 1, RT5659_PWR_ANLG_1, RT5659_PWR_MA_BIT,
2821                 0, rt5659_mono_event, SND_SOC_DAPM_POST_PMD |
2822                 SND_SOC_DAPM_PRE_PMU),
2823         SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5659_hp_event,
2824                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2825         SND_SOC_DAPM_PGA_S("LOUT Amp", 1,  RT5659_PWR_ANLG_1, RT5659_PWR_LM_BIT,
2826                 0,  NULL, 0),
2827 
2828         SND_SOC_DAPM_SUPPLY("Charge Pump", SND_SOC_NOPM, 0, 0,
2829                 rt5659_charge_pump_event, SND_SOC_DAPM_PRE_PMU |
2830                 SND_SOC_DAPM_POST_PMD),
2831 
2832         SND_SOC_DAPM_SWITCH("SPO Playback", SND_SOC_NOPM, 0, 0, &spo_switch),
2833         SND_SOC_DAPM_SWITCH("Mono Playback", SND_SOC_NOPM, 0, 0,
2834                 &mono_switch),
2835         SND_SOC_DAPM_SWITCH("HPO L Playback", SND_SOC_NOPM, 0, 0,
2836                 &hpo_l_switch),
2837         SND_SOC_DAPM_SWITCH("HPO R Playback", SND_SOC_NOPM, 0, 0,
2838                 &hpo_r_switch),
2839         SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
2840                 &lout_l_switch),
2841         SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
2842                 &lout_r_switch),
2843         SND_SOC_DAPM_SWITCH("PDM L Playback", SND_SOC_NOPM, 0, 0,
2844                 &pdm_l_switch),
2845         SND_SOC_DAPM_SWITCH("PDM R Playback", SND_SOC_NOPM, 0, 0,
2846                 &pdm_r_switch),
2847 
2848         /* PDM */
2849         SND_SOC_DAPM_SUPPLY("PDM Power", RT5659_PWR_DIG_2,
2850                 RT5659_PWR_PDM1_BIT, 0, NULL, 0),
2851         SND_SOC_DAPM_MUX("PDM L Mux", RT5659_PDM_OUT_CTRL,
2852                 RT5659_M_PDM1_L_SFT, 1, &rt5659_pdm_l_mux),
2853         SND_SOC_DAPM_MUX("PDM R Mux", RT5659_PDM_OUT_CTRL,
2854                 RT5659_M_PDM1_R_SFT, 1, &rt5659_pdm_r_mux),
2855 
2856         /* SPDIF */
2857         SND_SOC_DAPM_MUX("SPDIF Mux", SND_SOC_NOPM, 0, 0, &rt5659_spdif_mux),
2858 
2859         SND_SOC_DAPM_SUPPLY("SYS CLK DET", RT5659_CLK_DET, 3, 0, NULL, 0),
2860         SND_SOC_DAPM_SUPPLY("CLKDET", RT5659_CLK_DET, 0, 0, NULL, 0),
2861 
2862         /* Output Lines */
2863         SND_SOC_DAPM_OUTPUT("HPOL"),
2864         SND_SOC_DAPM_OUTPUT("HPOR"),
2865         SND_SOC_DAPM_OUTPUT("SPOL"),
2866         SND_SOC_DAPM_OUTPUT("SPOR"),
2867         SND_SOC_DAPM_OUTPUT("LOUTL"),
2868         SND_SOC_DAPM_OUTPUT("LOUTR"),
2869         SND_SOC_DAPM_OUTPUT("MONOOUT"),
2870         SND_SOC_DAPM_OUTPUT("PDML"),
2871         SND_SOC_DAPM_OUTPUT("PDMR"),
2872         SND_SOC_DAPM_OUTPUT("SPDIF"),
2873 };
2874 
2875 static const struct snd_soc_dapm_route rt5659_dapm_routes[] = {
2876         /*PLL*/
2877         { "ADC Stereo1 Filter", NULL, "PLL", is_sys_clk_from_pll },
2878         { "ADC Stereo2 Filter", NULL, "PLL", is_sys_clk_from_pll },
2879         { "ADC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
2880         { "ADC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
2881         { "DAC Stereo1 Filter", NULL, "PLL", is_sys_clk_from_pll },
2882         { "DAC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
2883         { "DAC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
2884 
2885         /*ASRC*/
2886         { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
2887         { "ADC Mono Left Filter", NULL, "ADC Mono L ASRC", is_using_asrc },
2888         { "ADC Mono Right Filter", NULL, "ADC Mono R ASRC", is_using_asrc },
2889         { "DAC Mono Left Filter", NULL, "DAC Mono L ASRC", is_using_asrc },
2890         { "DAC Mono Right Filter", NULL, "DAC Mono R ASRC", is_using_asrc },
2891         { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
2892 
2893         { "SYS CLK DET", NULL, "CLKDET" },
2894 
2895         { "I2S1", NULL, "I2S1 ASRC" },
2896         { "I2S2", NULL, "I2S2 ASRC" },
2897         { "I2S3", NULL, "I2S3 ASRC" },
2898 
2899         { "DMIC1", NULL, "DMIC L1" },
2900         { "DMIC1", NULL, "DMIC R1" },
2901         { "DMIC2", NULL, "DMIC L2" },
2902         { "DMIC2", NULL, "DMIC R2" },
2903 
2904         { "BST1", NULL, "IN1P" },
2905         { "BST1", NULL, "IN1N" },
2906         { "BST1", NULL, "BST1 Power" },
2907         { "BST2", NULL, "IN2P" },
2908         { "BST2", NULL, "IN2N" },
2909         { "BST2", NULL, "BST2 Power" },
2910         { "BST3", NULL, "IN3P" },
2911         { "BST3", NULL, "IN3N" },
2912         { "BST3", NULL, "BST3 Power" },
2913         { "BST4", NULL, "IN4P" },
2914         { "BST4", NULL, "IN4N" },
2915         { "BST4", NULL, "BST4 Power" },
2916 
2917         { "INL VOL", NULL, "IN2P" },
2918         { "INR VOL", NULL, "IN2N" },
2919 
2920         { "RECMIX1L", "SPKVOLL Switch", "SPKVOL L" },
2921         { "RECMIX1L", "INL Switch", "INL VOL" },
2922         { "RECMIX1L", "BST4 Switch", "BST4" },
2923         { "RECMIX1L", "BST3 Switch", "BST3" },
2924         { "RECMIX1L", "BST2 Switch", "BST2" },
2925         { "RECMIX1L", "BST1 Switch", "BST1" },
2926 
2927         { "RECMIX1R", "HPOVOLR Switch", "HPO R Playback" },
2928         { "RECMIX1R", "INR Switch", "INR VOL" },
2929         { "RECMIX1R", "BST4 Switch", "BST4" },
2930         { "RECMIX1R", "BST3 Switch", "BST3" },
2931         { "RECMIX1R", "BST2 Switch", "BST2" },
2932         { "RECMIX1R", "BST1 Switch", "BST1" },
2933 
2934         { "RECMIX2L", "SPKVOLL Switch", "SPKVOL L" },
2935         { "RECMIX2L", "OUTVOLL Switch", "OUTVOL L" },
2936         { "RECMIX2L", "BST4 Switch", "BST4" },
2937         { "RECMIX2L", "BST3 Switch", "BST3" },
2938         { "RECMIX2L", "BST2 Switch", "BST2" },
2939         { "RECMIX2L", "BST1 Switch", "BST1" },
2940 
2941         { "RECMIX2R", "MONOVOL Switch", "MONOVOL" },
2942         { "RECMIX2R", "OUTVOLR Switch", "OUTVOL R" },
2943         { "RECMIX2R", "BST4 Switch", "BST4" },
2944         { "RECMIX2R", "BST3 Switch", "BST3" },
2945         { "RECMIX2R", "BST2 Switch", "BST2" },
2946         { "RECMIX2R", "BST1 Switch", "BST1" },
2947 
2948         { "ADC1 L", NULL, "RECMIX1L" },
2949         { "ADC1 L", NULL, "ADC1 L Power" },
2950         { "ADC1 L", NULL, "ADC1 clock" },
2951         { "ADC1 R", NULL, "RECMIX1R" },
2952         { "ADC1 R", NULL, "ADC1 R Power" },
2953         { "ADC1 R", NULL, "ADC1 clock" },
2954 
2955         { "ADC2 L", NULL, "RECMIX2L" },
2956         { "ADC2 L", NULL, "ADC2 L Power" },
2957         { "ADC2 L", NULL, "ADC2 clock" },
2958         { "ADC2 R", NULL, "RECMIX2R" },
2959         { "ADC2 R", NULL, "ADC2 R Power" },
2960         { "ADC2 R", NULL, "ADC2 clock" },
2961 
2962         { "DMIC L1", NULL, "DMIC CLK" },
2963         { "DMIC L1", NULL, "DMIC1 Power" },
2964         { "DMIC R1", NULL, "DMIC CLK" },
2965         { "DMIC R1", NULL, "DMIC1 Power" },
2966         { "DMIC L2", NULL, "DMIC CLK" },
2967         { "DMIC L2", NULL, "DMIC2 Power" },
2968         { "DMIC R2", NULL, "DMIC CLK" },
2969         { "DMIC R2", NULL, "DMIC2 Power" },
2970 
2971         { "Stereo1 DMIC L Mux", "DMIC1", "DMIC L1" },
2972         { "Stereo1 DMIC L Mux", "DMIC2", "DMIC L2" },
2973 
2974         { "Stereo1 DMIC R Mux", "DMIC1", "DMIC R1" },
2975         { "Stereo1 DMIC R Mux", "DMIC2", "DMIC R2" },
2976 
2977         { "Mono DMIC L Mux", "DMIC1 L", "DMIC L1" },
2978         { "Mono DMIC L Mux", "DMIC2 L", "DMIC L2" },
2979 
2980         { "Mono DMIC R Mux", "DMIC1 R", "DMIC R1" },
2981         { "Mono DMIC R Mux", "DMIC2 R", "DMIC R2" },
2982 
2983         { "Stereo1 ADC L Mux", "ADC1", "ADC1 L" },
2984         { "Stereo1 ADC L Mux", "ADC2", "ADC2 L" },
2985         { "Stereo1 ADC R Mux", "ADC1", "ADC1 R" },
2986         { "Stereo1 ADC R Mux", "ADC2", "ADC2 R" },
2987 
2988         { "Stereo1 ADC L1 Mux", "ADC", "Stereo1 ADC L Mux" },
2989         { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2990         { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC L Mux" },
2991         { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2992 
2993         { "Stereo1 ADC R1 Mux", "ADC", "Stereo1 ADC R Mux" },
2994         { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2995         { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC R Mux" },
2996         { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2997 
2998         { "Mono ADC L Mux", "ADC1 L", "ADC1 L" },
2999         { "Mono ADC L Mux", "ADC1 R", "ADC1 R" },
3000         { "Mono ADC L Mux", "ADC2 L", "ADC2 L" },
3001         { "Mono ADC L Mux", "ADC2 R", "ADC2 R" },
3002 
3003         { "Mono ADC R Mux", "ADC1 L", "ADC1 L" },
3004         { "Mono ADC R Mux", "ADC1 R", "ADC1 R" },
3005         { "Mono ADC R Mux", "ADC2 L", "ADC2 L" },
3006         { "Mono ADC R Mux", "ADC2 R", "ADC2 R" },
3007 
3008         { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
3009         { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
3010         { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
3011         { "Mono ADC L1 Mux", "ADC",  "Mono ADC L Mux" },
3012 
3013         { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
3014         { "Mono ADC R1 Mux", "ADC", "Mono ADC R Mux" },
3015         { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
3016         { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
3017 
3018         { "Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
3019         { "Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
3020         { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
3021 
3022         { "Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
3023         { "Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
3024         { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
3025 
3026         { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
3027         { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
3028         { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
3029 
3030         { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
3031         { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
3032         { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
3033 
3034         { "Stereo1 ADC Volume L", NULL, "Stereo1 ADC MIXL" },
3035         { "Stereo1 ADC Volume R", NULL, "Stereo1 ADC MIXR" },
3036 
3037         { "IF_ADC1", NULL, "Stereo1 ADC Volume L" },
3038         { "IF_ADC1", NULL, "Stereo1 ADC Volume R" },
3039         { "IF_ADC2", NULL, "Mono ADC MIXL" },
3040         { "IF_ADC2", NULL, "Mono ADC MIXR" },
3041 
3042         { "TDM AD1:AD2:DAC", NULL, "IF_ADC1" },
3043         { "TDM AD1:AD2:DAC", NULL, "IF_ADC2" },
3044         { "TDM AD1:AD2:DAC", NULL, "DAC_REF" },
3045         { "TDM AD2:DAC", NULL, "IF_ADC2" },
3046         { "TDM AD2:DAC", NULL, "DAC_REF" },
3047         { "TDM Data Mux", "AD1:AD2:DAC:NUL", "TDM AD1:AD2:DAC" },
3048         { "TDM Data Mux", "AD1:AD2:NUL:DAC", "TDM AD1:AD2:DAC" },
3049         { "TDM Data Mux", "AD1:DAC:AD2:NUL", "TDM AD1:AD2:DAC" },
3050         { "TDM Data Mux", "AD1:DAC:NUL:AD2", "TDM AD1:AD2:DAC" },
3051         { "TDM Data Mux", "AD1:NUL:DAC:AD2", "TDM AD1:AD2:DAC" },
3052         { "TDM Data Mux", "AD1:NUL:AD2:DAC", "TDM AD1:AD2:DAC" },
3053         { "TDM Data Mux", "AD2:AD1:DAC:NUL", "TDM AD1:AD2:DAC" },
3054         { "TDM Data Mux", "AD2:AD1:NUL:DAC", "TDM AD1:AD2:DAC" },
3055         { "TDM Data Mux", "AD2:DAC:AD1:NUL", "TDM AD1:AD2:DAC" },
3056         { "TDM Data Mux", "AD2:DAC:NUL:AD1", "TDM AD1:AD2:DAC" },
3057         { "TDM Data Mux", "AD2:NUL:DAC:AD1", "TDM AD1:AD2:DAC" },
3058         { "TDM Data Mux", "AD1:NUL:AD1:DAC", "TDM AD1:AD2:DAC" },
3059         { "TDM Data Mux", "DAC:AD1:AD2:NUL", "TDM AD1:AD2:DAC" },
3060         { "TDM Data Mux", "DAC:AD1:NUL:AD2", "TDM AD1:AD2:DAC" },
3061         { "TDM Data Mux", "DAC:AD2:AD1:NUL", "TDM AD1:AD2:DAC" },
3062         { "TDM Data Mux", "DAC:AD2:NUL:AD1", "TDM AD1:AD2:DAC" },
3063         { "TDM Data Mux", "DAC:NUL:DAC:AD2", "TDM AD2:DAC" },
3064         { "TDM Data Mux", "DAC:NUL:AD2:DAC", "TDM AD2:DAC" },
3065         { "TDM Data Mux", "NUL:AD1:AD2:DAC", "TDM AD1:AD2:DAC" },
3066         { "TDM Data Mux", "NUL:AD1:DAC:AD2", "TDM AD1:AD2:DAC" },
3067         { "TDM Data Mux", "NUL:AD2:AD1:DAC", "TDM AD1:AD2:DAC" },
3068         { "TDM Data Mux", "NUL:AD2:DAC:AD1", "TDM AD1:AD2:DAC" },
3069         { "TDM Data Mux", "NUL:DAC:DAC:AD2", "TDM AD2:DAC" },
3070         { "TDM Data Mux", "NUL:DAC:AD2:DAC", "TDM AD2:DAC" },
3071         { "IF1 01 ADC Swap Mux", "L/R", "TDM Data Mux" },
3072         { "IF1 01 ADC Swap Mux", "R/L", "TDM Data Mux" },
3073         { "IF1 01 ADC Swap Mux", "L/L", "TDM Data Mux" },
3074         { "IF1 01 ADC Swap Mux", "R/R", "TDM Data Mux" },
3075         { "IF1 23 ADC Swap Mux", "L/R", "TDM Data Mux" },
3076         { "IF1 23 ADC Swap Mux", "R/L", "TDM Data Mux" },
3077         { "IF1 23 ADC Swap Mux", "L/L", "TDM Data Mux" },
3078         { "IF1 23 ADC Swap Mux", "R/R", "TDM Data Mux" },
3079         { "IF1 45 ADC Swap Mux", "L/R", "TDM Data Mux" },
3080         { "IF1 45 ADC Swap Mux", "R/L", "TDM Data Mux" },
3081         { "IF1 45 ADC Swap Mux", "L/L", "TDM Data Mux" },
3082         { "IF1 45 ADC Swap Mux", "R/R", "TDM Data Mux" },
3083         { "IF1 67 ADC Swap Mux", "L/R", "TDM Data Mux" },
3084         { "IF1 67 ADC Swap Mux", "R/L", "TDM Data Mux" },
3085         { "IF1 67 ADC Swap Mux", "L/L", "TDM Data Mux" },
3086         { "IF1 67 ADC Swap Mux", "R/R", "TDM Data Mux" },
3087         { "IF1 ADC", NULL, "IF1 01 ADC Swap Mux" },
3088         { "IF1 ADC", NULL, "IF1 23 ADC Swap Mux" },
3089         { "IF1 ADC", NULL, "IF1 45 ADC Swap Mux" },
3090         { "IF1 ADC", NULL, "IF1 67 ADC Swap Mux" },
3091         { "IF1 ADC", NULL, "I2S1" },
3092 
3093         { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
3094         { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
3095         { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
3096         { "IF2 ADC Mux", "DAC_REF", "DAC_REF" },
3097         { "IF2 ADC", NULL, "IF2 ADC Mux"},
3098         { "IF2 ADC", NULL, "I2S2" },
3099 
3100         { "IF3 ADC Mux", "IF_ADC1", "IF_ADC1" },
3101         { "IF3 ADC Mux", "IF_ADC2", "IF_ADC2" },
3102         { "IF3 ADC Mux", "Stereo2_ADC_L/R", "Stereo2 ADC LR" },
3103         { "IF3 ADC Mux", "DAC_REF", "DAC_REF" },
3104         { "IF3 ADC", NULL, "IF3 ADC Mux"},
3105         { "IF3 ADC", NULL, "I2S3" },
3106 
3107         { "AIF1TX", NULL, "IF1 ADC" },
3108         { "IF2 ADC Swap Mux", "L/R", "IF2 ADC" },
3109         { "IF2 ADC Swap Mux", "R/L", "IF2 ADC" },
3110         { "IF2 ADC Swap Mux", "L/L", "IF2 ADC" },
3111         { "IF2 ADC Swap Mux", "R/R", "IF2 ADC" },
3112         { "AIF2TX", NULL, "IF2 ADC Swap Mux" },
3113         { "IF3 ADC Swap Mux", "L/R", "IF3 ADC" },
3114         { "IF3 ADC Swap Mux", "R/L", "IF3 ADC" },
3115         { "IF3 ADC Swap Mux", "L/L", "IF3 ADC" },
3116         { "IF3 ADC Swap Mux", "R/R", "IF3 ADC" },
3117         { "AIF3TX", NULL, "IF3 ADC Swap Mux" },
3118 
3119         { "IF1 DAC1", NULL, "AIF1RX" },
3120         { "IF1 DAC2", NULL, "AIF1RX" },
3121         { "IF2 DAC Swap Mux", "L/R", "AIF2RX" },
3122         { "IF2 DAC Swap Mux", "R/L", "AIF2RX" },
3123         { "IF2 DAC Swap Mux", "L/L", "AIF2RX" },
3124         { "IF2 DAC Swap Mux", "R/R", "AIF2RX" },
3125         { "IF2 DAC", NULL, "IF2 DAC Swap Mux" },
3126         { "IF3 DAC Swap Mux", "L/R", "AIF3RX" },
3127         { "IF3 DAC Swap Mux", "R/L", "AIF3RX" },
3128         { "IF3 DAC Swap Mux", "L/L", "AIF3RX" },
3129         { "IF3 DAC Swap Mux", "R/R", "AIF3RX" },
3130         { "IF3 DAC", NULL, "IF3 DAC Swap Mux" },
3131 
3132         { "IF1 DAC1", NULL, "I2S1" },
3133         { "IF1 DAC2", NULL, "I2S1" },
3134         { "IF2 DAC", NULL, "I2S2" },
3135         { "IF3 DAC", NULL, "I2S3" },
3136 
3137         { "IF1 DAC2 L", NULL, "IF1 DAC2" },
3138         { "IF1 DAC2 R", NULL, "IF1 DAC2" },
3139         { "IF1 DAC1 L", NULL, "IF1 DAC1" },
3140         { "IF1 DAC1 R", NULL, "IF1 DAC1" },
3141         { "IF2 DAC L", NULL, "IF2 DAC" },
3142         { "IF2 DAC R", NULL, "IF2 DAC" },
3143         { "IF3 DAC L", NULL, "IF3 DAC" },
3144         { "IF3 DAC R", NULL, "IF3 DAC" },
3145 
3146         { "DAC L1 Mux", "IF1 DAC1", "IF1 DAC1 L" },
3147         { "DAC L1 Mux", "IF2 DAC", "IF2 DAC L" },
3148         { "DAC L1 Mux", "IF3 DAC", "IF3 DAC L" },
3149         { "DAC L1 Mux", NULL, "DAC Stereo1 Filter" },
3150 
3151         { "DAC R1 Mux", "IF1 DAC1", "IF1 DAC1 R" },
3152         { "DAC R1 Mux", "IF2 DAC", "IF2 DAC R" },
3153         { "DAC R1 Mux", "IF3 DAC", "IF3 DAC R" },
3154         { "DAC R1 Mux", NULL, "DAC Stereo1 Filter" },
3155 
3156         { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC Volume L" },
3157         { "DAC1 MIXL", "DAC1 Switch", "DAC L1 Mux" },
3158         { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC Volume R" },
3159         { "DAC1 MIXR", "DAC1 Switch", "DAC R1 Mux" },
3160 
3161         { "DAC_REF", NULL, "DAC1 MIXL" },
3162         { "DAC_REF", NULL, "DAC1 MIXR" },
3163 
3164         { "DAC L2 Mux", "IF1 DAC2", "IF1 DAC2 L" },
3165         { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
3166         { "DAC L2 Mux", "IF3 DAC", "IF3 DAC L" },
3167         { "DAC L2 Mux", "Mono ADC MIX", "Mono ADC MIXL" },
3168         { "DAC L2 Mux", NULL, "DAC Mono Left Filter" },
3169 
3170         { "DAC R2 Mux", "IF1 DAC2", "IF1 DAC2 R" },
3171         { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
3172         { "DAC R2 Mux", "IF3 DAC", "IF3 DAC R" },
3173         { "DAC R2 Mux", "Mono ADC MIX", "Mono ADC MIXR" },
3174         { "DAC R2 Mux", NULL, "DAC Mono Right Filter" },
3175 
3176         { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
3177         { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
3178         { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux" },
3179         { "Stereo DAC MIXL", "DAC R2 Switch", "DAC R2 Mux" },
3180 
3181         { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
3182         { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
3183         { "Stereo DAC MIXR", "DAC L2 Switch", "DAC L2 Mux" },
3184         { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux" },
3185 
3186         { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
3187         { "Mono DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
3188         { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux" },
3189         { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux" },
3190         { "Mono DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
3191         { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
3192         { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux" },
3193         { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux" },
3194 
3195         { "DAC MIXL", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3196         { "DAC MIXL", "Mono DAC Mixer", "Mono DAC MIXL" },
3197         { "DAC MIXR", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3198         { "DAC MIXR", "Mono DAC Mixer", "Mono DAC MIXR" },
3199 
3200         { "DAC L1 Source", NULL, "DAC L1 Power" },
3201         { "DAC L1 Source", "DAC", "DAC1 MIXL" },
3202         { "DAC L1 Source", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3203         { "DAC R1 Source", NULL, "DAC R1 Power" },
3204         { "DAC R1 Source", "DAC", "DAC1 MIXR" },
3205         { "DAC R1 Source", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3206         { "DAC L2 Source", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3207         { "DAC L2 Source", "Mono DAC Mixer", "Mono DAC MIXL" },
3208         { "DAC L2 Source", NULL, "DAC L2 Power" },
3209         { "DAC R2 Source", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3210         { "DAC R2 Source", "Mono DAC Mixer", "Mono DAC MIXR" },
3211         { "DAC R2 Source", NULL, "DAC R2 Power" },
3212 
3213         { "DAC L1", NULL, "DAC L1 Source" },
3214         { "DAC R1", NULL, "DAC R1 Source" },
3215         { "DAC L2", NULL, "DAC L2 Source" },
3216         { "DAC R2", NULL, "DAC R2 Source" },
3217 
3218         { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
3219         { "SPK MIXL", "BST1 Switch", "BST1" },
3220         { "SPK MIXL", "INL Switch", "INL VOL" },
3221         { "SPK MIXL", "INR Switch", "INR VOL" },
3222         { "SPK MIXL", "BST3 Switch", "BST3" },
3223         { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
3224         { "SPK MIXR", "BST4 Switch", "BST4" },
3225         { "SPK MIXR", "INL Switch", "INL VOL" },
3226         { "SPK MIXR", "INR Switch", "INR VOL" },
3227         { "SPK MIXR", "BST3 Switch", "BST3" },
3228 
3229         { "MONOVOL MIX", "DAC L2 Switch", "DAC L2" },
3230         { "MONOVOL MIX", "DAC R2 Switch", "DAC R2" },
3231         { "MONOVOL MIX", "BST1 Switch", "BST1" },
3232         { "MONOVOL MIX", "BST2 Switch", "BST2" },
3233         { "MONOVOL MIX", "BST3 Switch", "BST3" },
3234 
3235         { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
3236         { "OUT MIXL", "INL Switch", "INL VOL" },
3237         { "OUT MIXL", "BST1 Switch", "BST1" },
3238         { "OUT MIXL", "BST2 Switch", "BST2" },
3239         { "OUT MIXL", "BST3 Switch", "BST3" },
3240         { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
3241         { "OUT MIXR", "INR Switch", "INR VOL" },
3242         { "OUT MIXR", "BST2 Switch", "BST2" },
3243         { "OUT MIXR", "BST3 Switch", "BST3" },
3244         { "OUT MIXR", "BST4 Switch", "BST4" },
3245 
3246         { "SPKVOL L", "Switch", "SPK MIXL" },
3247         { "SPKVOL R", "Switch", "SPK MIXR" },
3248         { "SPO L MIX", "DAC L2 Switch", "DAC L2" },
3249         { "SPO L MIX", "SPKVOL L Switch", "SPKVOL L" },
3250         { "SPO R MIX", "DAC R2 Switch", "DAC R2" },
3251         { "SPO R MIX", "SPKVOL R Switch", "SPKVOL R" },
3252         { "SPK Amp", NULL, "SPO L MIX" },
3253         { "SPK Amp", NULL, "SPO R MIX" },
3254         { "SPK Amp", NULL, "SYS CLK DET" },
3255         { "SPO Playback", "Switch", "SPK Amp" },
3256         { "SPOL", NULL, "SPO Playback" },
3257         { "SPOR", NULL, "SPO Playback" },
3258 
3259         { "MONOVOL", "Switch", "MONOVOL MIX" },
3260         { "Mono MIX", "DAC L2 Switch", "DAC L2" },
3261         { "Mono MIX", "MONOVOL Switch", "MONOVOL" },
3262         { "Mono Amp", NULL, "Mono MIX" },
3263         { "Mono Amp", NULL, "Mono Vref" },
3264         { "Mono Amp", NULL, "SYS CLK DET" },
3265         { "Mono Playback", "Switch", "Mono Amp" },
3266         { "MONOOUT", NULL, "Mono Playback" },
3267 
3268         { "HP Amp", NULL, "DAC L1" },
3269         { "HP Amp", NULL, "DAC R1" },
3270         { "HP Amp", NULL, "Charge Pump" },
3271         { "HP Amp", NULL, "SYS CLK DET" },
3272         { "HPO L Playback", "Switch", "HP Amp"},
3273         { "HPO R Playback", "Switch", "HP Amp"},
3274         { "HPOL", NULL, "HPO L Playback" },
3275         { "HPOR", NULL, "HPO R Playback" },
3276 
3277         { "OUTVOL L", "Switch", "OUT MIXL" },
3278         { "OUTVOL R", "Switch", "OUT MIXR" },
3279         { "LOUT L MIX", "DAC L2 Switch", "DAC L2" },
3280         { "LOUT L MIX", "OUTVOL L Switch", "OUTVOL L" },
3281         { "LOUT R MIX", "DAC R2 Switch", "DAC R2" },
3282         { "LOUT R MIX", "OUTVOL R Switch", "OUTVOL R" },
3283         { "LOUT Amp", NULL, "LOUT L MIX" },
3284         { "LOUT Amp", NULL, "LOUT R MIX" },
3285         { "LOUT Amp", NULL, "Charge Pump" },
3286         { "LOUT Amp", NULL, "SYS CLK DET" },
3287         { "LOUT L Playback", "Switch", "LOUT Amp" },
3288         { "LOUT R Playback", "Switch", "LOUT Amp" },
3289         { "LOUTL", NULL, "LOUT L Playback" },
3290         { "LOUTR", NULL, "LOUT R Playback" },
3291 
3292         { "PDM L Mux", "Mono DAC", "Mono DAC MIXL" },
3293         { "PDM L Mux", "Stereo DAC", "Stereo DAC MIXL" },
3294         { "PDM L Mux", NULL, "PDM Power" },
3295         { "PDM R Mux", "Mono DAC", "Mono DAC MIXR" },
3296         { "PDM R Mux", "Stereo DAC", "Stereo DAC MIXR" },
3297         { "PDM R Mux", NULL, "PDM Power" },
3298         { "PDM L Playback", "Switch", "PDM L Mux" },
3299         { "PDM R Playback", "Switch", "PDM R Mux" },
3300         { "PDML", NULL, "PDM L Playback" },
3301         { "PDMR", NULL, "PDM R Playback" },
3302 
3303         { "SPDIF Mux", "IF3_DAC", "IF3 DAC" },
3304         { "SPDIF Mux", "IF2_DAC", "IF2 DAC" },
3305         { "SPDIF Mux", "IF1_DAC2", "IF1 DAC2" },
3306         { "SPDIF Mux", "IF1_DAC1", "IF1 DAC1" },
3307         { "SPDIF", NULL, "SPDIF Mux" },
3308 };
3309 
3310 static int rt5659_hw_params(struct snd_pcm_substream *substream,
3311         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
3312 {
3313         struct snd_soc_component *component = dai->component;
3314         struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3315         unsigned int val_len = 0, val_clk, mask_clk;
3316         int pre_div, frame_size;
3317 
3318         rt5659->lrck[dai->id] = params_rate(params);
3319         pre_div = rl6231_get_clk_info(rt5659->sysclk, rt5659->lrck[dai->id]);
3320         if (pre_div < 0) {
3321                 dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n",
3322                         rt5659->lrck[dai->id], dai->id);
3323                 return -EINVAL;
3324         }
3325         frame_size = snd_soc_params_to_frame_size(params);
3326         if (frame_size < 0) {
3327                 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
3328                 return -EINVAL;
3329         }
3330 
3331         dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
3332                                 rt5659->lrck[dai->id], pre_div, dai->id);
3333 
3334         switch (params_width(params)) {
3335         case 16:
3336                 break;
3337         case 20:
3338                 val_len |= RT5659_I2S_DL_20;
3339                 break;
3340         case 24:
3341                 val_len |= RT5659_I2S_DL_24;
3342                 break;
3343         case 8:
3344                 val_len |= RT5659_I2S_DL_8;
3345                 break;
3346         default:
3347                 return -EINVAL;
3348         }
3349 
3350         switch (dai->id) {
3351         case RT5659_AIF1:
3352                 mask_clk = RT5659_I2S_PD1_MASK;
3353                 val_clk = pre_div << RT5659_I2S_PD1_SFT;
3354                 snd_soc_component_update_bits(component, RT5659_I2S1_SDP,
3355                         RT5659_I2S_DL_MASK, val_len);
3356                 break;
3357         case RT5659_AIF2:
3358                 mask_clk = RT5659_I2S_PD2_MASK;
3359                 val_clk = pre_div << RT5659_I2S_PD2_SFT;
3360                 snd_soc_component_update_bits(component, RT5659_I2S2_SDP,
3361                         RT5659_I2S_DL_MASK, val_len);
3362                 break;
3363         case RT5659_AIF3:
3364                 mask_clk = RT5659_I2S_PD3_MASK;
3365                 val_clk = pre_div << RT5659_I2S_PD3_SFT;
3366                 snd_soc_component_update_bits(component, RT5659_I2S3_SDP,
3367                         RT5659_I2S_DL_MASK, val_len);
3368                 break;
3369         default:
3370                 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
3371                 return -EINVAL;
3372         }
3373 
3374         snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1, mask_clk, val_clk);
3375 
3376         switch (rt5659->lrck[dai->id]) {
3377         case 192000:
3378                 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3379                         RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_32);
3380                 break;
3381         case 96000:
3382                 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3383                         RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_64);
3384                 break;
3385         default:
3386                 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3387                         RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_128);
3388                 break;
3389         }
3390 
3391         return 0;
3392 }
3393 
3394 static int rt5659_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
3395 {
3396         struct snd_soc_component *component = dai->component;
3397         struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3398         unsigned int reg_val = 0;
3399 
3400         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
3401         case SND_SOC_DAIFMT_CBM_CFM:
3402                 rt5659->master[dai->id] = 1;
3403                 break;
3404         case SND_SOC_DAIFMT_CBS_CFS:
3405                 reg_val |= RT5659_I2S_MS_S;
3406                 rt5659->master[dai->id] = 0;
3407                 break;
3408         default:
3409                 return -EINVAL;
3410         }
3411 
3412         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
3413         case SND_SOC_DAIFMT_NB_NF:
3414                 break;
3415         case SND_SOC_DAIFMT_IB_NF:
3416                 reg_val |= RT5659_I2S_BP_INV;
3417                 break;
3418         default:
3419                 return -EINVAL;
3420         }
3421 
3422         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
3423         case SND_SOC_DAIFMT_I2S:
3424                 break;
3425         case SND_SOC_DAIFMT_LEFT_J:
3426                 reg_val |= RT5659_I2S_DF_LEFT;
3427                 break;
3428         case SND_SOC_DAIFMT_DSP_A:
3429                 reg_val |= RT5659_I2S_DF_PCM_A;
3430                 break;
3431         case SND_SOC_DAIFMT_DSP_B:
3432                 reg_val |= RT5659_I2S_DF_PCM_B;
3433                 break;
3434         default:
3435                 return -EINVAL;
3436         }
3437 
3438         switch (dai->id) {
3439         case RT5659_AIF1:
3440                 snd_soc_component_update_bits(component, RT5659_I2S1_SDP,
3441                         RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3442                         RT5659_I2S_DF_MASK, reg_val);
3443                 break;
3444         case RT5659_AIF2:
3445                 snd_soc_component_update_bits(component, RT5659_I2S2_SDP,
3446                         RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3447                         RT5659_I2S_DF_MASK, reg_val);
3448                 break;
3449         case RT5659_AIF3:
3450                 snd_soc_component_update_bits(component, RT5659_I2S3_SDP,
3451                         RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3452                         RT5659_I2S_DF_MASK, reg_val);
3453                 break;
3454         default:
3455                 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
3456                 return -EINVAL;
3457         }
3458         return 0;
3459 }
3460 
3461 static int rt5659_set_component_sysclk(struct snd_soc_component *component, int clk_id,
3462                                    int source, unsigned int freq, int dir)
3463 {
3464         struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3465         unsigned int reg_val = 0;
3466 
3467         if (freq == rt5659->sysclk && clk_id == rt5659->sysclk_src)
3468                 return 0;
3469 
3470         switch (clk_id) {
3471         case RT5659_SCLK_S_MCLK:
3472                 reg_val |= RT5659_SCLK_SRC_MCLK;
3473                 break;
3474         case RT5659_SCLK_S_PLL1:
3475                 reg_val |= RT5659_SCLK_SRC_PLL1;
3476                 break;
3477         case RT5659_SCLK_S_RCCLK:
3478                 reg_val |= RT5659_SCLK_SRC_RCCLK;
3479                 break;
3480         default:
3481                 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
3482                 return -EINVAL;
3483         }
3484         snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3485                 RT5659_SCLK_SRC_MASK, reg_val);
3486         rt5659->sysclk = freq;
3487         rt5659->sysclk_src = clk_id;
3488 
3489         dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n",
3490                 freq, clk_id);
3491 
3492         return 0;
3493 }
3494 
3495 static int rt5659_set_component_pll(struct snd_soc_component *component, int pll_id,
3496                                 int source, unsigned int freq_in,
3497                                 unsigned int freq_out)
3498 {
3499         struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3500         struct rl6231_pll_code pll_code;
3501         int ret;
3502 
3503         if (source == rt5659->pll_src && freq_in == rt5659->pll_in &&
3504             freq_out == rt5659->pll_out)
3505                 return 0;
3506 
3507         if (!freq_in || !freq_out) {
3508                 dev_dbg(component->dev, "PLL disabled\n");
3509 
3510                 rt5659->pll_in = 0;
3511                 rt5659->pll_out = 0;
3512                 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3513                         RT5659_SCLK_SRC_MASK, RT5659_SCLK_SRC_MCLK);
3514                 return 0;
3515         }
3516 
3517         switch (source) {
3518         case RT5659_PLL1_S_MCLK:
3519                 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3520                         RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_MCLK);
3521                 break;
3522         case RT5659_PLL1_S_BCLK1:
3523                 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3524                                 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK1);
3525                 break;
3526         case RT5659_PLL1_S_BCLK2:
3527                 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3528                                 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK2);
3529                 break;
3530         case RT5659_PLL1_S_BCLK3:
3531                 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3532                                 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK3);
3533                 break;
3534         default:
3535                 dev_err(component->dev, "Unknown PLL source %d\n", source);
3536                 return -EINVAL;
3537         }
3538 
3539         ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
3540         if (ret < 0) {
3541                 dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
3542                 return ret;
3543         }
3544 
3545         dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
3546                 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
3547                 pll_code.n_code, pll_code.k_code);
3548 
3549         snd_soc_component_write(component, RT5659_PLL_CTRL_1,
3550                 pll_code.n_code << RT5659_PLL_N_SFT | pll_code.k_code);
3551         snd_soc_component_write(component, RT5659_PLL_CTRL_2,
3552                 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5659_PLL_M_SFT |
3553                 pll_code.m_bp << RT5659_PLL_M_BP_SFT);
3554 
3555         rt5659->pll_in = freq_in;
3556         rt5659->pll_out = freq_out;
3557         rt5659->pll_src = source;
3558 
3559         return 0;
3560 }
3561 
3562 static int rt5659_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
3563                         unsigned int rx_mask, int slots, int slot_width)
3564 {
3565         struct snd_soc_component *component = dai->component;
3566         unsigned int val = 0;
3567 
3568         if (rx_mask || tx_mask)
3569                 val |= (1 << 15);
3570 
3571         switch (slots) {
3572         case 4:
3573                 val |= (1 << 10);
3574                 val |= (1 << 8);
3575                 break;
3576         case 6:
3577                 val |= (2 << 10);
3578                 val |= (2 << 8);
3579                 break;
3580         case 8:
3581                 val |= (3 << 10);
3582                 val |= (3 << 8);
3583                 break;
3584         case 2:
3585                 break;
3586         default:
3587                 return -EINVAL;
3588         }
3589 
3590         switch (slot_width) {
3591         case 20:
3592                 val |= (1 << 6);
3593                 val |= (1 << 4);
3594                 break;
3595         case 24:
3596                 val |= (2 << 6);
3597                 val |= (2 << 4);
3598                 break;
3599         case 32:
3600                 val |= (3 << 6);
3601                 val |= (3 << 4);
3602                 break;
3603         case 16:
3604                 break;
3605         default:
3606                 return -EINVAL;
3607         }
3608 
3609         snd_soc_component_update_bits(component, RT5659_TDM_CTRL_1, 0x8ff0, val);
3610 
3611         return 0;
3612 }
3613 
3614 static int rt5659_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
3615 {
3616         struct snd_soc_component *component = dai->component;
3617         struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3618 
3619         dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio);
3620 
3621         rt5659->bclk[dai->id] = ratio;
3622 
3623         if (ratio == 64) {
3624                 switch (dai->id) {
3625                 case RT5659_AIF2:
3626                         snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3627                                 RT5659_I2S_BCLK_MS2_MASK,
3628                                 RT5659_I2S_BCLK_MS2_64);
3629                         break;
3630                 case RT5659_AIF3:
3631                         snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3632                                 RT5659_I2S_BCLK_MS3_MASK,
3633                                 RT5659_I2S_BCLK_MS3_64);
3634                         break;
3635                 }
3636         }
3637 
3638         return 0;
3639 }
3640 
3641 static int rt5659_set_bias_level(struct snd_soc_component *component,
3642                         enum snd_soc_bias_level level)
3643 {
3644         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3645         struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3646         int ret;
3647 
3648         switch (level) {
3649         case SND_SOC_BIAS_PREPARE:
3650                 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
3651                         RT5659_DIG_GATE_CTRL, RT5659_DIG_GATE_CTRL);
3652                 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
3653                         RT5659_PWR_LDO, RT5659_PWR_LDO);
3654                 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3655                         RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2,
3656                         RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2);
3657                 msleep(20);
3658                 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3659                         RT5659_PWR_FV1 | RT5659_PWR_FV2,
3660                         RT5659_PWR_FV1 | RT5659_PWR_FV2);
3661                 break;
3662 
3663         case SND_SOC_BIAS_STANDBY:
3664                 if (dapm->bias_level == SND_SOC_BIAS_OFF) {
3665                         ret = clk_prepare_enable(rt5659->mclk);
3666                         if (ret) {
3667                                 dev_err(component->dev,
3668                                         "failed to enable MCLK: %d\n", ret);
3669                                 return ret;
3670                         }
3671                 }
3672                 break;
3673 
3674         case SND_SOC_BIAS_OFF:
3675                 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
3676                         RT5659_PWR_LDO, 0);
3677                 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3678                         RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2
3679                         | RT5659_PWR_FV1 | RT5659_PWR_FV2,
3680                         RT5659_PWR_MB | RT5659_PWR_VREF2);
3681                 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
3682                         RT5659_DIG_GATE_CTRL, 0);
3683                 clk_disable_unprepare(rt5659->mclk);
3684                 break;
3685 
3686         default:
3687                 break;
3688         }
3689 
3690         return 0;
3691 }
3692 
3693 static int rt5659_probe(struct snd_soc_component *component)
3694 {
3695         struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3696 
3697         rt5659->component = component;
3698 
3699         return 0;
3700 }
3701 
3702 static void rt5659_remove(struct snd_soc_component *component)
3703 {
3704         struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3705 
3706         regmap_write(rt5659->regmap, RT5659_RESET, 0);
3707 }
3708 
3709 #ifdef CONFIG_PM
3710 static int rt5659_suspend(struct snd_soc_component *component)
3711 {
3712         struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3713 
3714         regcache_cache_only(rt5659->regmap, true);
3715         regcache_mark_dirty(rt5659->regmap);
3716         return 0;
3717 }
3718 
3719 static int rt5659_resume(struct snd_soc_component *component)
3720 {
3721         struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3722 
3723         regcache_cache_only(rt5659->regmap, false);
3724         regcache_sync(rt5659->regmap);
3725 
3726         return 0;
3727 }
3728 #else
3729 #define rt5659_suspend NULL
3730 #define rt5659_resume NULL
3731 #endif
3732 
3733 #define RT5659_STEREO_RATES SNDRV_PCM_RATE_8000_192000
3734 #define RT5659_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3735                 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3736 
3737 static const struct snd_soc_dai_ops rt5659_aif_dai_ops = {
3738         .hw_params = rt5659_hw_params,
3739         .set_fmt = rt5659_set_dai_fmt,
3740         .set_tdm_slot = rt5659_set_tdm_slot,
3741         .set_bclk_ratio = rt5659_set_bclk_ratio,
3742 };
3743 
3744 static struct snd_soc_dai_driver rt5659_dai[] = {
3745         {
3746                 .name = "rt5659-aif1",
3747                 .id = RT5659_AIF1,
3748                 .playback = {
3749                         .stream_name = "AIF1 Playback",
3750                         .channels_min = 1,
3751                         .channels_max = 2,
3752                         .rates = RT5659_STEREO_RATES,
3753                         .formats = RT5659_FORMATS,
3754                 },
3755                 .capture = {
3756                         .stream_name = "AIF1 Capture",
3757                         .channels_min = 1,
3758                         .channels_max = 2,
3759                         .rates = RT5659_STEREO_RATES,
3760                         .formats = RT5659_FORMATS,
3761                 },
3762                 .ops = &rt5659_aif_dai_ops,
3763         },
3764         {
3765                 .name = "rt5659-aif2",
3766                 .id = RT5659_AIF2,
3767                 .playback = {
3768                         .stream_name = "AIF2 Playback",
3769                         .channels_min = 1,
3770                         .channels_max = 2,
3771                         .rates = RT5659_STEREO_RATES,
3772                         .formats = RT5659_FORMATS,
3773                 },
3774                 .capture = {
3775                         .stream_name = "AIF2 Capture",
3776                         .channels_min = 1,
3777                         .channels_max = 2,
3778                         .rates = RT5659_STEREO_RATES,
3779                         .formats = RT5659_FORMATS,
3780                 },
3781                 .ops = &rt5659_aif_dai_ops,
3782         },
3783         {
3784                 .name = "rt5659-aif3",
3785                 .id = RT5659_AIF3,
3786                 .playback = {
3787                         .stream_name = "AIF3 Playback",
3788                         .channels_min = 1,
3789                         .channels_max = 2,
3790                         .rates = RT5659_STEREO_RATES,
3791                         .formats = RT5659_FORMATS,
3792                 },
3793                 .capture = {
3794                         .stream_name = "AIF3 Capture",
3795                         .channels_min = 1,
3796                         .channels_max = 2,
3797                         .rates = RT5659_STEREO_RATES,
3798                         .formats = RT5659_FORMATS,
3799                 },
3800                 .ops = &rt5659_aif_dai_ops,
3801         },
3802 };
3803 
3804 static const struct snd_soc_component_driver soc_component_dev_rt5659 = {
3805         .probe                  = rt5659_probe,
3806         .remove                 = rt5659_remove,
3807         .suspend                = rt5659_suspend,
3808         .resume                 = rt5659_resume,
3809         .set_bias_level         = rt5659_set_bias_level,
3810         .controls               = rt5659_snd_controls,
3811         .num_controls           = ARRAY_SIZE(rt5659_snd_controls),
3812         .dapm_widgets           = rt5659_dapm_widgets,
3813         .num_dapm_widgets       = ARRAY_SIZE(rt5659_dapm_widgets),
3814         .dapm_routes            = rt5659_dapm_routes,
3815         .num_dapm_routes        = ARRAY_SIZE(rt5659_dapm_routes),
3816         .set_sysclk             = rt5659_set_component_sysclk,
3817         .set_pll                = rt5659_set_component_pll,
3818         .use_pmdown_time        = 1,
3819         .endianness             = 1,
3820         .non_legacy_dai_naming  = 1,
3821 };
3822 
3823 
3824 static const struct regmap_config rt5659_regmap = {
3825         .reg_bits = 16,
3826         .val_bits = 16,
3827         .max_register = 0x0400,
3828         .volatile_reg = rt5659_volatile_register,
3829         .readable_reg = rt5659_readable_register,
3830         .cache_type = REGCACHE_RBTREE,
3831         .reg_defaults = rt5659_reg,
3832         .num_reg_defaults = ARRAY_SIZE(rt5659_reg),
3833 };
3834 
3835 static const struct i2c_device_id rt5659_i2c_id[] = {
3836         { "rt5658", 0 },
3837         { "rt5659", 0 },
3838         { }
3839 };
3840 MODULE_DEVICE_TABLE(i2c, rt5659_i2c_id);
3841 
3842 static int rt5659_parse_dt(struct rt5659_priv *rt5659, struct device *dev)
3843 {
3844         rt5659->pdata.in1_diff = device_property_read_bool(dev,
3845                                         "realtek,in1-differential");
3846         rt5659->pdata.in3_diff = device_property_read_bool(dev,
3847                                         "realtek,in3-differential");
3848         rt5659->pdata.in4_diff = device_property_read_bool(dev,
3849                                         "realtek,in4-differential");
3850 
3851 
3852         device_property_read_u32(dev, "realtek,dmic1-data-pin",
3853                 &rt5659->pdata.dmic1_data_pin);
3854         device_property_read_u32(dev, "realtek,dmic2-data-pin",
3855                 &rt5659->pdata.dmic2_data_pin);
3856         device_property_read_u32(dev, "realtek,jd-src",
3857                 &rt5659->pdata.jd_src);
3858 
3859         return 0;
3860 }
3861 
3862 static void rt5659_calibrate(struct rt5659_priv *rt5659)
3863 {
3864         int value, count;
3865 
3866         /* Calibrate HPO Start */
3867         /* Fine tune HP Performance */
3868         regmap_write(rt5659->regmap, RT5659_BIAS_CUR_CTRL_8, 0xa502);
3869         regmap_write(rt5659->regmap, RT5659_CHOP_DAC, 0x3030);
3870 
3871         regmap_write(rt5659->regmap, RT5659_PRE_DIV_1, 0xef00);
3872         regmap_write(rt5659->regmap, RT5659_PRE_DIV_2, 0xeffc);
3873         regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0280);
3874         regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0001);
3875         regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x8000);
3876 
3877         regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xaa7e);
3878         msleep(60);
3879         regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe7e);
3880         msleep(50);
3881         regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0004);
3882         regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0400);
3883         msleep(50);
3884         regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0080);
3885         usleep_range(10000, 10005);
3886         regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0009);
3887         msleep(50);
3888         regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0f80);
3889         msleep(50);
3890         regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0e16);
3891         msleep(50);
3892 
3893         /* Enalbe K ADC Power And Clock */
3894         regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0505);
3895         msleep(50);
3896         regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0184);
3897         regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x3c05);
3898         regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c1);
3899 
3900         /* K Headphone */
3901         regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3902         regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x5100);
3903         regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0014);
3904         regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0xd100);
3905         msleep(60);
3906 
3907         /* Manual K ADC Offset */
3908         regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3909         regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4900);
3910         regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0016);
3911         regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
3912                 0x8000, 0x8000);
3913 
3914         count = 0;
3915         while (true) {
3916                 regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
3917                 if (value & 0x8000)
3918                         usleep_range(10000, 10005);
3919                 else
3920                         break;
3921 
3922                 if (count > 30) {
3923                         dev_err(rt5659->component->dev,
3924                                 "HP Calibration 1 Failure\n");
3925                         return;
3926                 }
3927 
3928                 count++;
3929         }
3930 
3931         /* Manual K Internal Path Offset */
3932         regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3933         regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x0000);
3934         regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4500);
3935         regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x001f);
3936         regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
3937                 0x8000, 0x8000);
3938 
3939         count = 0;
3940         while (true) {
3941                 regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
3942                 if (value & 0x8000)
3943                         usleep_range(10000, 10005);
3944                 else
3945                         break;
3946 
3947                 if (count > 85) {
3948                         dev_err(rt5659->component->dev,
3949                                 "HP Calibration 2 Failure\n");
3950                         return;
3951                 }
3952 
3953                 count++;
3954         }
3955 
3956         regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0000);
3957         regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
3958         /* Calibrate HPO End */
3959 
3960         /* Calibrate SPO Start */
3961         regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
3962         regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0260);
3963         regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x3000);
3964         regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0xc000);
3965         regmap_write(rt5659->regmap, RT5659_A_DAC_MUX, 0x000c);
3966         regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x8000);
3967         regmap_write(rt5659->regmap, RT5659_SPO_VOL, 0x0808);
3968         regmap_write(rt5659->regmap, RT5659_SPK_L_MIXER, 0x001e);
3969         regmap_write(rt5659->regmap, RT5659_SPK_R_MIXER, 0x001e);
3970         regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0803);
3971         regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0554);
3972         regmap_write(rt5659->regmap, RT5659_SPO_AMP_GAIN, 0x1103);
3973 
3974         /* Enalbe K ADC Power And Clock */
3975         regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0909);
3976         regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x0001,
3977                 0x0001);
3978 
3979         /* Start Calibration */
3980         regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000);
3981         regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x0021);
3982         regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1, 0x3e80);
3983         regmap_update_bits(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1,
3984                 0x8000, 0x8000);
3985 
3986         count = 0;
3987         while (true) {
3988                 regmap_read(rt5659->regmap,
3989                                 RT5659_SPK_DC_CAILB_CTRL_1, &value);
3990                 if (value & 0x8000)
3991                         usleep_range(10000, 10005);
3992                 else
3993                         break;
3994 
3995                 if (count > 10) {
3996                         dev_err(rt5659->component->dev,
3997                                 "SPK Calibration Failure\n");
3998                         return;
3999                 }
4000 
4001                 count++;
4002         }
4003         /* Calibrate SPO End */
4004 
4005         /* Calibrate MONO Start */
4006         regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0000);
4007         regmap_write(rt5659->regmap, RT5659_MONOMIX_IN_GAIN, 0x021f);
4008         regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0x480a);
4009         /* MONO NG2 GAIN 5dB */
4010         regmap_write(rt5659->regmap, RT5659_MONO_GAIN, 0x0003);
4011         regmap_write(rt5659->regmap, RT5659_MONO_NG2_CTRL_5, 0x0009);
4012 
4013         /* Start Calibration */
4014         regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x000f);
4015         regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00);
4016         regmap_update_bits(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
4017                 0x8000, 0x8000);
4018 
4019         count = 0;
4020         while (true) {
4021                 regmap_read(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
4022                         &value);
4023                 if (value & 0x8000)
4024                         usleep_range(10000, 10005);
4025                 else
4026                         break;
4027 
4028                 if (count > 35) {
4029                         dev_err(rt5659->component->dev,
4030                                 "Mono Calibration Failure\n");
4031                         return;
4032                 }
4033 
4034                 count++;
4035         }
4036 
4037         regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003);
4038         /* Calibrate MONO End */
4039 
4040         /* Power Off */
4041         regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0808);
4042         regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0000);
4043         regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x2005);
4044         regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
4045         regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0000);
4046         regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0011);
4047         regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0150);
4048         regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe3e);
4049         regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0xc80a);
4050         regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04);
4051         regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x0000);
4052         regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0x0000);
4053         regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0000);
4054         regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0000);
4055         regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0x003e);
4056         regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0060);
4057         regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
4058         regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x0000);
4059         regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0080);
4060         regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x8080);
4061         regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0c16);
4062 }
4063 
4064 static void rt5659_intel_hd_header_probe_setup(struct rt5659_priv *rt5659)
4065 {
4066         int value;
4067 
4068         regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value);
4069         if (!(value & 0x8)) {
4070                 rt5659->hda_hp_plugged = true;
4071                 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
4072                         0x10, 0x0);
4073         } else {
4074                 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
4075                         0x10, 0x10);
4076         }
4077 
4078         regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4079                 RT5659_PWR_VREF2 | RT5659_PWR_MB,
4080                 RT5659_PWR_VREF2 | RT5659_PWR_MB);
4081         msleep(20);
4082         regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4083                 RT5659_PWR_FV2, RT5659_PWR_FV2);
4084 
4085         regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_3, RT5659_PWR_LDO2,
4086                 RT5659_PWR_LDO2);
4087         regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_2, RT5659_PWR_MB1,
4088                 RT5659_PWR_MB1);
4089         regmap_update_bits(rt5659->regmap, RT5659_PWR_VOL, RT5659_PWR_MIC_DET,
4090                 RT5659_PWR_MIC_DET);
4091         msleep(20);
4092 
4093         regmap_update_bits(rt5659->regmap, RT5659_4BTN_IL_CMD_2,
4094                 RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_EN);
4095         regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
4096         regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value);
4097         regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
4098 
4099         if (value & 0x2000) {
4100                 rt5659->hda_mic_plugged = true;
4101                 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4102                         0x2, 0x2);
4103         } else {
4104                 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4105                         0x2, 0x0);
4106         }
4107 
4108         regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4109                 RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_EN);
4110 }
4111 
4112 static int rt5659_i2c_probe(struct i2c_client *i2c,
4113                     const struct i2c_device_id *id)
4114 {
4115         struct rt5659_platform_data *pdata = dev_get_platdata(&i2c->dev);
4116         struct rt5659_priv *rt5659;
4117         int ret;
4118         unsigned int val;
4119 
4120         rt5659 = devm_kzalloc(&i2c->dev, sizeof(struct rt5659_priv),
4121                 GFP_KERNEL);
4122 
4123         if (rt5659 == NULL)
4124                 return -ENOMEM;
4125 
4126         i2c_set_clientdata(i2c, rt5659);
4127 
4128         if (pdata)
4129                 rt5659->pdata = *pdata;
4130         else
4131                 rt5659_parse_dt(rt5659, &i2c->dev);
4132 
4133         rt5659->gpiod_ldo1_en = devm_gpiod_get_optional(&i2c->dev, "ldo1-en",
4134                                                         GPIOD_OUT_HIGH);
4135         if (IS_ERR(rt5659->gpiod_ldo1_en))
4136                 dev_warn(&i2c->dev, "Request ldo1-en GPIO failed\n");
4137 
4138         rt5659->gpiod_reset = devm_gpiod_get_optional(&i2c->dev, "reset",
4139                                                         GPIOD_OUT_HIGH);
4140 
4141         /* Sleep for 300 ms miniumum */
4142         msleep(300);
4143 
4144         rt5659->regmap = devm_regmap_init_i2c(i2c, &rt5659_regmap);
4145         if (IS_ERR(rt5659->regmap)) {
4146                 ret = PTR_ERR(rt5659->regmap);
4147                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
4148                         ret);
4149                 return ret;
4150         }
4151 
4152         regmap_read(rt5659->regmap, RT5659_DEVICE_ID, &val);
4153         if (val != DEVICE_ID) {
4154                 dev_err(&i2c->dev,
4155                         "Device with ID register %x is not rt5659\n", val);
4156                 return -ENODEV;
4157         }
4158 
4159         regmap_write(rt5659->regmap, RT5659_RESET, 0);
4160 
4161         /* Check if MCLK provided */
4162         rt5659->mclk = devm_clk_get(&i2c->dev, "mclk");
4163         if (IS_ERR(rt5659->mclk)) {
4164                 if (PTR_ERR(rt5659->mclk) != -ENOENT)
4165                         return PTR_ERR(rt5659->mclk);
4166                 /* Otherwise mark the mclk pointer to NULL */
4167                 rt5659->mclk = NULL;
4168         }
4169 
4170         rt5659_calibrate(rt5659);
4171 
4172         /* line in diff mode*/
4173         if (rt5659->pdata.in1_diff)
4174                 regmap_update_bits(rt5659->regmap, RT5659_IN1_IN2,
4175                         RT5659_IN1_DF_MASK, RT5659_IN1_DF_MASK);
4176         if (rt5659->pdata.in3_diff)
4177                 regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
4178                         RT5659_IN3_DF_MASK, RT5659_IN3_DF_MASK);
4179         if (rt5659->pdata.in4_diff)
4180                 regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
4181                         RT5659_IN4_DF_MASK, RT5659_IN4_DF_MASK);
4182 
4183         /* DMIC pin*/
4184         if (rt5659->pdata.dmic1_data_pin != RT5659_DMIC1_NULL ||
4185                 rt5659->pdata.dmic2_data_pin != RT5659_DMIC2_NULL) {
4186                 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4187                         RT5659_GP2_PIN_MASK, RT5659_GP2_PIN_DMIC1_SCL);
4188 
4189                 switch (rt5659->pdata.dmic1_data_pin) {
4190                 case RT5659_DMIC1_DATA_IN2N:
4191                         regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4192                                 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_IN2N);
4193                         break;
4194 
4195                 case RT5659_DMIC1_DATA_GPIO5:
4196                         regmap_update_bits(rt5659->regmap,
4197                                 RT5659_GPIO_CTRL_3,
4198                                 RT5659_I2S2_PIN_MASK,
4199                                 RT5659_I2S2_PIN_GPIO);
4200                         regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4201                                 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO5);
4202                         regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4203                                 RT5659_GP5_PIN_MASK, RT5659_GP5_PIN_DMIC1_SDA);
4204                         break;
4205 
4206                 case RT5659_DMIC1_DATA_GPIO9:
4207                         regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4208                                 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO9);
4209                         regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4210                                 RT5659_GP9_PIN_MASK, RT5659_GP9_PIN_DMIC1_SDA);
4211                         break;
4212 
4213                 case RT5659_DMIC1_DATA_GPIO11:
4214                         regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4215                                 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO11);
4216                         regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4217                                 RT5659_GP11_PIN_MASK,
4218                                 RT5659_GP11_PIN_DMIC1_SDA);
4219                         break;
4220 
4221                 default:
4222                         dev_dbg(&i2c->dev, "no DMIC1\n");
4223                         break;
4224                 }
4225 
4226                 switch (rt5659->pdata.dmic2_data_pin) {
4227                 case RT5659_DMIC2_DATA_IN2P:
4228                         regmap_update_bits(rt5659->regmap,
4229                                 RT5659_DMIC_CTRL_1,
4230                                 RT5659_DMIC_2_DP_MASK,
4231                                 RT5659_DMIC_2_DP_IN2P);
4232                         break;
4233 
4234                 case RT5659_DMIC2_DATA_GPIO6:
4235                         regmap_update_bits(rt5659->regmap,
4236                                 RT5659_DMIC_CTRL_1,
4237                                 RT5659_DMIC_2_DP_MASK,
4238                                 RT5659_DMIC_2_DP_GPIO6);
4239                         regmap_update_bits(rt5659->regmap,
4240                                 RT5659_GPIO_CTRL_1,
4241                                 RT5659_GP6_PIN_MASK,
4242                                 RT5659_GP6_PIN_DMIC2_SDA);
4243                         break;
4244 
4245                 case RT5659_DMIC2_DATA_GPIO10:
4246                         regmap_update_bits(rt5659->regmap,
4247                                 RT5659_DMIC_CTRL_1,
4248                                 RT5659_DMIC_2_DP_MASK,
4249                                 RT5659_DMIC_2_DP_GPIO10);
4250                         regmap_update_bits(rt5659->regmap,
4251                                 RT5659_GPIO_CTRL_1,
4252                                 RT5659_GP10_PIN_MASK,
4253                                 RT5659_GP10_PIN_DMIC2_SDA);
4254                         break;
4255 
4256                 case RT5659_DMIC2_DATA_GPIO12:
4257                         regmap_update_bits(rt5659->regmap,
4258                                 RT5659_DMIC_CTRL_1,
4259                                 RT5659_DMIC_2_DP_MASK,
4260                                 RT5659_DMIC_2_DP_GPIO12);
4261                         regmap_update_bits(rt5659->regmap,
4262                                 RT5659_GPIO_CTRL_1,
4263                                 RT5659_GP12_PIN_MASK,
4264                                 RT5659_GP12_PIN_DMIC2_SDA);
4265                         break;
4266 
4267                 default:
4268                         dev_dbg(&i2c->dev, "no DMIC2\n");
4269                         break;
4270 
4271                 }
4272         } else {
4273                 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4274                         RT5659_GP2_PIN_MASK | RT5659_GP5_PIN_MASK |
4275                         RT5659_GP9_PIN_MASK | RT5659_GP11_PIN_MASK |
4276                         RT5659_GP6_PIN_MASK | RT5659_GP10_PIN_MASK |
4277                         RT5659_GP12_PIN_MASK,
4278                         RT5659_GP2_PIN_GPIO2 | RT5659_GP5_PIN_GPIO5 |
4279                         RT5659_GP9_PIN_GPIO9 | RT5659_GP11_PIN_GPIO11 |
4280                         RT5659_GP6_PIN_GPIO6 | RT5659_GP10_PIN_GPIO10 |
4281                         RT5659_GP12_PIN_GPIO12);
4282                 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4283                         RT5659_DMIC_1_DP_MASK | RT5659_DMIC_2_DP_MASK,
4284                         RT5659_DMIC_1_DP_IN2N | RT5659_DMIC_2_DP_IN2P);
4285         }
4286 
4287         switch (rt5659->pdata.jd_src) {
4288         case RT5659_JD3:
4289                 regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1, 0xa880);
4290                 regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x9000);
4291                 regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_1, 0xc800);
4292                 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4293                                 RT5659_PWR_MB, RT5659_PWR_MB);
4294                 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_2, 0x0001);
4295                 regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_2, 0x0040);
4296                 INIT_DELAYED_WORK(&rt5659->jack_detect_work,
4297                         rt5659_jack_detect_work);
4298                 break;
4299         case RT5659_JD_HDA_HEADER:
4300                 regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_3, 0x8000);
4301                 regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x0900);
4302                 regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1,  0x70c0);
4303                 regmap_write(rt5659->regmap, RT5659_JD_CTRL_1,   0x2000);
4304                 regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_1,  0x0040);
4305                 INIT_DELAYED_WORK(&rt5659->jack_detect_work,
4306                         rt5659_jack_detect_intel_hd_header);
4307                 rt5659_intel_hd_header_probe_setup(rt5659);
4308                 break;
4309         default:
4310                 break;
4311         }
4312 
4313         if (i2c->irq) {
4314                 ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL,
4315                         rt5659_irq, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
4316                         | IRQF_ONESHOT, "rt5659", rt5659);
4317                 if (ret)
4318                         dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
4319 
4320                 /* Enable IRQ output for GPIO1 pin any way */
4321                 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4322                                    RT5659_GP1_PIN_MASK, RT5659_GP1_PIN_IRQ);
4323         }
4324 
4325         return devm_snd_soc_register_component(&i2c->dev,
4326                         &soc_component_dev_rt5659,
4327                         rt5659_dai, ARRAY_SIZE(rt5659_dai));
4328 }
4329 
4330 static void rt5659_i2c_shutdown(struct i2c_client *client)
4331 {
4332         struct rt5659_priv *rt5659 = i2c_get_clientdata(client);
4333 
4334         regmap_write(rt5659->regmap, RT5659_RESET, 0);
4335 }
4336 
4337 #ifdef CONFIG_OF
4338 static const struct of_device_id rt5659_of_match[] = {
4339         { .compatible = "realtek,rt5658", },
4340         { .compatible = "realtek,rt5659", },
4341         { },
4342 };
4343 MODULE_DEVICE_TABLE(of, rt5659_of_match);
4344 #endif
4345 
4346 #ifdef CONFIG_ACPI
4347 static const struct acpi_device_id rt5659_acpi_match[] = {
4348         { "10EC5658", 0, },
4349         { "10EC5659", 0, },
4350         { },
4351 };
4352 MODULE_DEVICE_TABLE(acpi, rt5659_acpi_match);
4353 #endif
4354 
4355 static struct i2c_driver rt5659_i2c_driver = {
4356         .driver = {
4357                 .name = "rt5659",
4358                 .of_match_table = of_match_ptr(rt5659_of_match),
4359                 .acpi_match_table = ACPI_PTR(rt5659_acpi_match),
4360         },
4361         .probe = rt5659_i2c_probe,
4362         .shutdown = rt5659_i2c_shutdown,
4363         .id_table = rt5659_i2c_id,
4364 };
4365 module_i2c_driver(rt5659_i2c_driver);
4366 
4367 MODULE_DESCRIPTION("ASoC RT5659 driver");
4368 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
4369 MODULE_LICENSE("GPL v2");
4370 

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