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TOMOYO Linux Cross Reference
Linux/sound/soc/codecs/twl4030.c

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  1 /*
  2  * ALSA SoC TWL4030 codec driver
  3  *
  4  * Author:      Steve Sakoman, <steve@sakoman.com>
  5  *
  6  * This program is free software; you can redistribute it and/or
  7  * modify it under the terms of the GNU General Public License
  8  * version 2 as published by the Free Software Foundation.
  9  *
 10  * This program is distributed in the hope that it will be useful, but
 11  * WITHOUT ANY WARRANTY; without even the implied warranty of
 12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 13  * General Public License for more details.
 14  *
 15  * You should have received a copy of the GNU General Public License
 16  * along with this program; if not, write to the Free Software
 17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 18  * 02110-1301 USA
 19  *
 20  */
 21 
 22 #include <linux/module.h>
 23 #include <linux/moduleparam.h>
 24 #include <linux/init.h>
 25 #include <linux/delay.h>
 26 #include <linux/pm.h>
 27 #include <linux/i2c.h>
 28 #include <linux/platform_device.h>
 29 #include <linux/i2c/twl.h>
 30 #include <linux/slab.h>
 31 #include <sound/core.h>
 32 #include <sound/pcm.h>
 33 #include <sound/pcm_params.h>
 34 #include <sound/soc.h>
 35 #include <sound/initval.h>
 36 #include <sound/tlv.h>
 37 
 38 /* Register descriptions are here */
 39 #include <linux/mfd/twl4030-audio.h>
 40 
 41 /* Shadow register used by the audio driver */
 42 #define TWL4030_REG_SW_SHADOW           0x4A
 43 #define TWL4030_CACHEREGNUM     (TWL4030_REG_SW_SHADOW + 1)
 44 
 45 /* TWL4030_REG_SW_SHADOW (0x4A) Fields */
 46 #define TWL4030_HFL_EN                  0x01
 47 #define TWL4030_HFR_EN                  0x02
 48 
 49 /*
 50  * twl4030 register cache & default register settings
 51  */
 52 static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
 53         0x00, /* this register not used         */
 54         0x00, /* REG_CODEC_MODE         (0x1)   */
 55         0x00, /* REG_OPTION             (0x2)   */
 56         0x00, /* REG_UNKNOWN            (0x3)   */
 57         0x00, /* REG_MICBIAS_CTL        (0x4)   */
 58         0x00, /* REG_ANAMICL            (0x5)   */
 59         0x00, /* REG_ANAMICR            (0x6)   */
 60         0x00, /* REG_AVADC_CTL          (0x7)   */
 61         0x00, /* REG_ADCMICSEL          (0x8)   */
 62         0x00, /* REG_DIGMIXING          (0x9)   */
 63         0x0f, /* REG_ATXL1PGA           (0xA)   */
 64         0x0f, /* REG_ATXR1PGA           (0xB)   */
 65         0x0f, /* REG_AVTXL2PGA          (0xC)   */
 66         0x0f, /* REG_AVTXR2PGA          (0xD)   */
 67         0x00, /* REG_AUDIO_IF           (0xE)   */
 68         0x00, /* REG_VOICE_IF           (0xF)   */
 69         0x3f, /* REG_ARXR1PGA           (0x10)  */
 70         0x3f, /* REG_ARXL1PGA           (0x11)  */
 71         0x3f, /* REG_ARXR2PGA           (0x12)  */
 72         0x3f, /* REG_ARXL2PGA           (0x13)  */
 73         0x25, /* REG_VRXPGA             (0x14)  */
 74         0x00, /* REG_VSTPGA             (0x15)  */
 75         0x00, /* REG_VRX2ARXPGA         (0x16)  */
 76         0x00, /* REG_AVDAC_CTL          (0x17)  */
 77         0x00, /* REG_ARX2VTXPGA         (0x18)  */
 78         0x32, /* REG_ARXL1_APGA_CTL     (0x19)  */
 79         0x32, /* REG_ARXR1_APGA_CTL     (0x1A)  */
 80         0x32, /* REG_ARXL2_APGA_CTL     (0x1B)  */
 81         0x32, /* REG_ARXR2_APGA_CTL     (0x1C)  */
 82         0x00, /* REG_ATX2ARXPGA         (0x1D)  */
 83         0x00, /* REG_BT_IF              (0x1E)  */
 84         0x55, /* REG_BTPGA              (0x1F)  */
 85         0x00, /* REG_BTSTPGA            (0x20)  */
 86         0x00, /* REG_EAR_CTL            (0x21)  */
 87         0x00, /* REG_HS_SEL             (0x22)  */
 88         0x00, /* REG_HS_GAIN_SET        (0x23)  */
 89         0x00, /* REG_HS_POPN_SET        (0x24)  */
 90         0x00, /* REG_PREDL_CTL          (0x25)  */
 91         0x00, /* REG_PREDR_CTL          (0x26)  */
 92         0x00, /* REG_PRECKL_CTL         (0x27)  */
 93         0x00, /* REG_PRECKR_CTL         (0x28)  */
 94         0x00, /* REG_HFL_CTL            (0x29)  */
 95         0x00, /* REG_HFR_CTL            (0x2A)  */
 96         0x05, /* REG_ALC_CTL            (0x2B)  */
 97         0x00, /* REG_ALC_SET1           (0x2C)  */
 98         0x00, /* REG_ALC_SET2           (0x2D)  */
 99         0x00, /* REG_BOOST_CTL          (0x2E)  */
100         0x00, /* REG_SOFTVOL_CTL        (0x2F)  */
101         0x13, /* REG_DTMF_FREQSEL       (0x30)  */
102         0x00, /* REG_DTMF_TONEXT1H      (0x31)  */
103         0x00, /* REG_DTMF_TONEXT1L      (0x32)  */
104         0x00, /* REG_DTMF_TONEXT2H      (0x33)  */
105         0x00, /* REG_DTMF_TONEXT2L      (0x34)  */
106         0x79, /* REG_DTMF_TONOFF        (0x35)  */
107         0x11, /* REG_DTMF_WANONOFF      (0x36)  */
108         0x00, /* REG_I2S_RX_SCRAMBLE_H  (0x37)  */
109         0x00, /* REG_I2S_RX_SCRAMBLE_M  (0x38)  */
110         0x00, /* REG_I2S_RX_SCRAMBLE_L  (0x39)  */
111         0x06, /* REG_APLL_CTL           (0x3A)  */
112         0x00, /* REG_DTMF_CTL           (0x3B)  */
113         0x44, /* REG_DTMF_PGA_CTL2      (0x3C)  */
114         0x69, /* REG_DTMF_PGA_CTL1      (0x3D)  */
115         0x00, /* REG_MISC_SET_1         (0x3E)  */
116         0x00, /* REG_PCMBTMUX           (0x3F)  */
117         0x00, /* not used               (0x40)  */
118         0x00, /* not used               (0x41)  */
119         0x00, /* not used               (0x42)  */
120         0x00, /* REG_RX_PATH_SEL        (0x43)  */
121         0x32, /* REG_VDL_APGA_CTL       (0x44)  */
122         0x00, /* REG_VIBRA_CTL          (0x45)  */
123         0x00, /* REG_VIBRA_SET          (0x46)  */
124         0x00, /* REG_VIBRA_PWM_SET      (0x47)  */
125         0x00, /* REG_ANAMIC_GAIN        (0x48)  */
126         0x00, /* REG_MISC_SET_2         (0x49)  */
127         0x00, /* REG_SW_SHADOW          (0x4A)  - Shadow, non HW register */
128 };
129 
130 /* codec private data */
131 struct twl4030_priv {
132         struct snd_soc_codec codec;
133 
134         unsigned int codec_powered;
135 
136         /* reference counts of AIF/APLL users */
137         unsigned int apll_enabled;
138 
139         struct snd_pcm_substream *master_substream;
140         struct snd_pcm_substream *slave_substream;
141 
142         unsigned int configured;
143         unsigned int rate;
144         unsigned int sample_bits;
145         unsigned int channels;
146 
147         unsigned int sysclk;
148 
149         /* Output (with associated amp) states */
150         u8 hsl_enabled, hsr_enabled;
151         u8 earpiece_enabled;
152         u8 predrivel_enabled, predriver_enabled;
153         u8 carkitl_enabled, carkitr_enabled;
154 
155         /* Delay needed after enabling the digimic interface */
156         unsigned int digimic_delay;
157 };
158 
159 /*
160  * read twl4030 register cache
161  */
162 static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
163         unsigned int reg)
164 {
165         u8 *cache = codec->reg_cache;
166 
167         if (reg >= TWL4030_CACHEREGNUM)
168                 return -EIO;
169 
170         return cache[reg];
171 }
172 
173 /*
174  * write twl4030 register cache
175  */
176 static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
177                                                 u8 reg, u8 value)
178 {
179         u8 *cache = codec->reg_cache;
180 
181         if (reg >= TWL4030_CACHEREGNUM)
182                 return;
183         cache[reg] = value;
184 }
185 
186 /*
187  * write to the twl4030 register space
188  */
189 static int twl4030_write(struct snd_soc_codec *codec,
190                         unsigned int reg, unsigned int value)
191 {
192         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
193         int write_to_reg = 0;
194 
195         twl4030_write_reg_cache(codec, reg, value);
196         if (likely(reg < TWL4030_REG_SW_SHADOW)) {
197                 /* Decide if the given register can be written */
198                 switch (reg) {
199                 case TWL4030_REG_EAR_CTL:
200                         if (twl4030->earpiece_enabled)
201                                 write_to_reg = 1;
202                         break;
203                 case TWL4030_REG_PREDL_CTL:
204                         if (twl4030->predrivel_enabled)
205                                 write_to_reg = 1;
206                         break;
207                 case TWL4030_REG_PREDR_CTL:
208                         if (twl4030->predriver_enabled)
209                                 write_to_reg = 1;
210                         break;
211                 case TWL4030_REG_PRECKL_CTL:
212                         if (twl4030->carkitl_enabled)
213                                 write_to_reg = 1;
214                         break;
215                 case TWL4030_REG_PRECKR_CTL:
216                         if (twl4030->carkitr_enabled)
217                                 write_to_reg = 1;
218                         break;
219                 case TWL4030_REG_HS_GAIN_SET:
220                         if (twl4030->hsl_enabled || twl4030->hsr_enabled)
221                                 write_to_reg = 1;
222                         break;
223                 default:
224                         /* All other register can be written */
225                         write_to_reg = 1;
226                         break;
227                 }
228                 if (write_to_reg)
229                         return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
230                                                     value, reg);
231         }
232         return 0;
233 }
234 
235 static inline void twl4030_wait_ms(int time)
236 {
237         if (time < 60) {
238                 time *= 1000;
239                 usleep_range(time, time + 500);
240         } else {
241                 msleep(time);
242         }
243 }
244 
245 static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
246 {
247         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
248         int mode;
249 
250         if (enable == twl4030->codec_powered)
251                 return;
252 
253         if (enable)
254                 mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
255         else
256                 mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
257 
258         if (mode >= 0) {
259                 twl4030_write_reg_cache(codec, TWL4030_REG_CODEC_MODE, mode);
260                 twl4030->codec_powered = enable;
261         }
262 
263         /* REVISIT: this delay is present in TI sample drivers */
264         /* but there seems to be no TRM requirement for it     */
265         udelay(10);
266 }
267 
268 static inline void twl4030_check_defaults(struct snd_soc_codec *codec)
269 {
270         int i, difference = 0;
271         u8 val;
272 
273         dev_dbg(codec->dev, "Checking TWL audio default configuration\n");
274         for (i = 1; i <= TWL4030_REG_MISC_SET_2; i++) {
275                 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &val, i);
276                 if (val != twl4030_reg[i]) {
277                         difference++;
278                         dev_dbg(codec->dev,
279                                  "Reg 0x%02x: chip: 0x%02x driver: 0x%02x\n",
280                                  i, val, twl4030_reg[i]);
281                 }
282         }
283         dev_dbg(codec->dev, "Found %d non-matching registers. %s\n",
284                  difference, difference ? "Not OK" : "OK");
285 }
286 
287 static inline void twl4030_reset_registers(struct snd_soc_codec *codec)
288 {
289         int i;
290 
291         /* set all audio section registers to reasonable defaults */
292         for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
293                 if (i != TWL4030_REG_APLL_CTL)
294                         twl4030_write(codec, i, twl4030_reg[i]);
295 
296 }
297 
298 static void twl4030_init_chip(struct snd_soc_codec *codec)
299 {
300         struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
301         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
302         u8 reg, byte;
303         int i = 0;
304 
305         /* Check defaults, if instructed before anything else */
306         if (pdata && pdata->check_defaults)
307                 twl4030_check_defaults(codec);
308 
309         /* Reset registers, if no setup data or if instructed to do so */
310         if (!pdata || (pdata && pdata->reset_registers))
311                 twl4030_reset_registers(codec);
312 
313         /* Refresh APLL_CTL register from HW */
314         twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
315                             TWL4030_REG_APLL_CTL);
316         twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, byte);
317 
318         /* anti-pop when changing analog gain */
319         reg = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
320         twl4030_write(codec, TWL4030_REG_MISC_SET_1,
321                 reg | TWL4030_SMOOTH_ANAVOL_EN);
322 
323         twl4030_write(codec, TWL4030_REG_OPTION,
324                 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
325                 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
326 
327         /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
328         twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
329 
330         /* Machine dependent setup */
331         if (!pdata)
332                 return;
333 
334         twl4030->digimic_delay = pdata->digimic_delay;
335 
336         reg = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
337         reg &= ~TWL4030_RAMP_DELAY;
338         reg |= (pdata->ramp_delay_value << 2);
339         twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, reg);
340 
341         /* initiate offset cancellation */
342         twl4030_codec_enable(codec, 1);
343 
344         reg = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
345         reg &= ~TWL4030_OFFSET_CNCL_SEL;
346         reg |= pdata->offset_cncl_path;
347         twl4030_write(codec, TWL4030_REG_ANAMICL,
348                 reg | TWL4030_CNCL_OFFSET_START);
349 
350         /*
351          * Wait for offset cancellation to complete.
352          * Since this takes a while, do not slam the i2c.
353          * Start polling the status after ~20ms.
354          */
355         msleep(20);
356         do {
357                 usleep_range(1000, 2000);
358                 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
359                                     TWL4030_REG_ANAMICL);
360         } while ((i++ < 100) &&
361                  ((byte & TWL4030_CNCL_OFFSET_START) ==
362                   TWL4030_CNCL_OFFSET_START));
363 
364         /* Make sure that the reg_cache has the same value as the HW */
365         twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
366 
367         twl4030_codec_enable(codec, 0);
368 }
369 
370 static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
371 {
372         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
373         int status = -1;
374 
375         if (enable) {
376                 twl4030->apll_enabled++;
377                 if (twl4030->apll_enabled == 1)
378                         status = twl4030_audio_enable_resource(
379                                                         TWL4030_AUDIO_RES_APLL);
380         } else {
381                 twl4030->apll_enabled--;
382                 if (!twl4030->apll_enabled)
383                         status = twl4030_audio_disable_resource(
384                                                         TWL4030_AUDIO_RES_APLL);
385         }
386 
387         if (status >= 0)
388                 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status);
389 }
390 
391 /* Earpiece */
392 static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
393         SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
394         SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
395         SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
396         SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
397 };
398 
399 /* PreDrive Left */
400 static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
401         SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
402         SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
403         SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
404         SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
405 };
406 
407 /* PreDrive Right */
408 static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
409         SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
410         SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
411         SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
412         SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
413 };
414 
415 /* Headset Left */
416 static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
417         SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
418         SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
419         SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
420 };
421 
422 /* Headset Right */
423 static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
424         SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
425         SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
426         SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
427 };
428 
429 /* Carkit Left */
430 static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
431         SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
432         SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
433         SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
434 };
435 
436 /* Carkit Right */
437 static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
438         SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
439         SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
440         SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
441 };
442 
443 /* Handsfree Left */
444 static const char *twl4030_handsfreel_texts[] =
445                 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
446 
447 static const struct soc_enum twl4030_handsfreel_enum =
448         SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
449                         ARRAY_SIZE(twl4030_handsfreel_texts),
450                         twl4030_handsfreel_texts);
451 
452 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
453 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
454 
455 /* Handsfree Left virtual mute */
456 static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
457         SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0);
458 
459 /* Handsfree Right */
460 static const char *twl4030_handsfreer_texts[] =
461                 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
462 
463 static const struct soc_enum twl4030_handsfreer_enum =
464         SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
465                         ARRAY_SIZE(twl4030_handsfreer_texts),
466                         twl4030_handsfreer_texts);
467 
468 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
469 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
470 
471 /* Handsfree Right virtual mute */
472 static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
473         SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0);
474 
475 /* Vibra */
476 /* Vibra audio path selection */
477 static const char *twl4030_vibra_texts[] =
478                 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
479 
480 static const struct soc_enum twl4030_vibra_enum =
481         SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
482                         ARRAY_SIZE(twl4030_vibra_texts),
483                         twl4030_vibra_texts);
484 
485 static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
486 SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
487 
488 /* Vibra path selection: local vibrator (PWM) or audio driven */
489 static const char *twl4030_vibrapath_texts[] =
490                 {"Local vibrator", "Audio"};
491 
492 static const struct soc_enum twl4030_vibrapath_enum =
493         SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
494                         ARRAY_SIZE(twl4030_vibrapath_texts),
495                         twl4030_vibrapath_texts);
496 
497 static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
498 SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
499 
500 /* Left analog microphone selection */
501 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
502         SOC_DAPM_SINGLE("Main Mic Capture Switch",
503                         TWL4030_REG_ANAMICL, 0, 1, 0),
504         SOC_DAPM_SINGLE("Headset Mic Capture Switch",
505                         TWL4030_REG_ANAMICL, 1, 1, 0),
506         SOC_DAPM_SINGLE("AUXL Capture Switch",
507                         TWL4030_REG_ANAMICL, 2, 1, 0),
508         SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
509                         TWL4030_REG_ANAMICL, 3, 1, 0),
510 };
511 
512 /* Right analog microphone selection */
513 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
514         SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
515         SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
516 };
517 
518 /* TX1 L/R Analog/Digital microphone selection */
519 static const char *twl4030_micpathtx1_texts[] =
520                 {"Analog", "Digimic0"};
521 
522 static const struct soc_enum twl4030_micpathtx1_enum =
523         SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
524                         ARRAY_SIZE(twl4030_micpathtx1_texts),
525                         twl4030_micpathtx1_texts);
526 
527 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
528 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
529 
530 /* TX2 L/R Analog/Digital microphone selection */
531 static const char *twl4030_micpathtx2_texts[] =
532                 {"Analog", "Digimic1"};
533 
534 static const struct soc_enum twl4030_micpathtx2_enum =
535         SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
536                         ARRAY_SIZE(twl4030_micpathtx2_texts),
537                         twl4030_micpathtx2_texts);
538 
539 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
540 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
541 
542 /* Analog bypass for AudioR1 */
543 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
544         SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
545 
546 /* Analog bypass for AudioL1 */
547 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
548         SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
549 
550 /* Analog bypass for AudioR2 */
551 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
552         SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
553 
554 /* Analog bypass for AudioL2 */
555 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
556         SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
557 
558 /* Analog bypass for Voice */
559 static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
560         SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
561 
562 /* Digital bypass gain, mute instead of -30dB */
563 static const unsigned int twl4030_dapm_dbypass_tlv[] = {
564         TLV_DB_RANGE_HEAD(3),
565         0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
566         2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
567         4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
568 };
569 
570 /* Digital bypass left (TX1L -> RX2L) */
571 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
572         SOC_DAPM_SINGLE_TLV("Volume",
573                         TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
574                         twl4030_dapm_dbypass_tlv);
575 
576 /* Digital bypass right (TX1R -> RX2R) */
577 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
578         SOC_DAPM_SINGLE_TLV("Volume",
579                         TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
580                         twl4030_dapm_dbypass_tlv);
581 
582 /*
583  * Voice Sidetone GAIN volume control:
584  * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
585  */
586 static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
587 
588 /* Digital bypass voice: sidetone (VUL -> VDL)*/
589 static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
590         SOC_DAPM_SINGLE_TLV("Volume",
591                         TWL4030_REG_VSTPGA, 0, 0x29, 0,
592                         twl4030_dapm_dbypassv_tlv);
593 
594 /*
595  * Output PGA builder:
596  * Handle the muting and unmuting of the given output (turning off the
597  * amplifier associated with the output pin)
598  * On mute bypass the reg_cache and write 0 to the register
599  * On unmute: restore the register content from the reg_cache
600  * Outputs handled in this way:  Earpiece, PreDrivL/R, CarkitL/R
601  */
602 #define TWL4030_OUTPUT_PGA(pin_name, reg, mask)                         \
603 static int pin_name##pga_event(struct snd_soc_dapm_widget *w,           \
604                 struct snd_kcontrol *kcontrol, int event)               \
605 {                                                                       \
606         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
607                                                                         \
608         switch (event) {                                                \
609         case SND_SOC_DAPM_POST_PMU:                                     \
610                 twl4030->pin_name##_enabled = 1;                        \
611                 twl4030_write(w->codec, reg,                            \
612                         twl4030_read_reg_cache(w->codec, reg));         \
613                 break;                                                  \
614         case SND_SOC_DAPM_POST_PMD:                                     \
615                 twl4030->pin_name##_enabled = 0;                        \
616                 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,            \
617                                         0, reg);                        \
618                 break;                                                  \
619         }                                                               \
620         return 0;                                                       \
621 }
622 
623 TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
624 TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
625 TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
626 TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
627 TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
628 
629 static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
630 {
631         unsigned char hs_ctl;
632 
633         hs_ctl = twl4030_read_reg_cache(codec, reg);
634 
635         if (ramp) {
636                 /* HF ramp-up */
637                 hs_ctl |= TWL4030_HF_CTL_REF_EN;
638                 twl4030_write(codec, reg, hs_ctl);
639                 udelay(10);
640                 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
641                 twl4030_write(codec, reg, hs_ctl);
642                 udelay(40);
643                 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
644                 hs_ctl |= TWL4030_HF_CTL_HB_EN;
645                 twl4030_write(codec, reg, hs_ctl);
646         } else {
647                 /* HF ramp-down */
648                 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
649                 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
650                 twl4030_write(codec, reg, hs_ctl);
651                 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
652                 twl4030_write(codec, reg, hs_ctl);
653                 udelay(40);
654                 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
655                 twl4030_write(codec, reg, hs_ctl);
656         }
657 }
658 
659 static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
660                 struct snd_kcontrol *kcontrol, int event)
661 {
662         switch (event) {
663         case SND_SOC_DAPM_POST_PMU:
664                 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
665                 break;
666         case SND_SOC_DAPM_POST_PMD:
667                 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
668                 break;
669         }
670         return 0;
671 }
672 
673 static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
674                 struct snd_kcontrol *kcontrol, int event)
675 {
676         switch (event) {
677         case SND_SOC_DAPM_POST_PMU:
678                 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
679                 break;
680         case SND_SOC_DAPM_POST_PMD:
681                 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
682                 break;
683         }
684         return 0;
685 }
686 
687 static int vibramux_event(struct snd_soc_dapm_widget *w,
688                 struct snd_kcontrol *kcontrol, int event)
689 {
690         twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
691         return 0;
692 }
693 
694 static int apll_event(struct snd_soc_dapm_widget *w,
695                 struct snd_kcontrol *kcontrol, int event)
696 {
697         switch (event) {
698         case SND_SOC_DAPM_PRE_PMU:
699                 twl4030_apll_enable(w->codec, 1);
700                 break;
701         case SND_SOC_DAPM_POST_PMD:
702                 twl4030_apll_enable(w->codec, 0);
703                 break;
704         }
705         return 0;
706 }
707 
708 static int aif_event(struct snd_soc_dapm_widget *w,
709                 struct snd_kcontrol *kcontrol, int event)
710 {
711         u8 audio_if;
712 
713         audio_if = twl4030_read_reg_cache(w->codec, TWL4030_REG_AUDIO_IF);
714         switch (event) {
715         case SND_SOC_DAPM_PRE_PMU:
716                 /* Enable AIF */
717                 /* enable the PLL before we use it to clock the DAI */
718                 twl4030_apll_enable(w->codec, 1);
719 
720                 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
721                                                 audio_if | TWL4030_AIF_EN);
722                 break;
723         case SND_SOC_DAPM_POST_PMD:
724                 /* disable the DAI before we stop it's source PLL */
725                 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
726                                                 audio_if &  ~TWL4030_AIF_EN);
727                 twl4030_apll_enable(w->codec, 0);
728                 break;
729         }
730         return 0;
731 }
732 
733 static void headset_ramp(struct snd_soc_codec *codec, int ramp)
734 {
735         struct twl4030_codec_data *pdata = codec->dev->platform_data;
736         unsigned char hs_gain, hs_pop;
737         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
738         /* Base values for ramp delay calculation: 2^19 - 2^26 */
739         unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
740                                     8388608, 16777216, 33554432, 67108864};
741         unsigned int delay;
742 
743         hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET);
744         hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
745         delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
746                 twl4030->sysclk) + 1;
747 
748         /* Enable external mute control, this dramatically reduces
749          * the pop-noise */
750         if (pdata && pdata->hs_extmute) {
751                 if (pdata->set_hs_extmute) {
752                         pdata->set_hs_extmute(1);
753                 } else {
754                         hs_pop |= TWL4030_EXTMUTE;
755                         twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
756                 }
757         }
758 
759         if (ramp) {
760                 /* Headset ramp-up according to the TRM */
761                 hs_pop |= TWL4030_VMID_EN;
762                 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
763                 /* Actually write to the register */
764                 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
765                                         hs_gain,
766                                         TWL4030_REG_HS_GAIN_SET);
767                 hs_pop |= TWL4030_RAMP_EN;
768                 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
769                 /* Wait ramp delay time + 1, so the VMID can settle */
770                 twl4030_wait_ms(delay);
771         } else {
772                 /* Headset ramp-down _not_ according to
773                  * the TRM, but in a way that it is working */
774                 hs_pop &= ~TWL4030_RAMP_EN;
775                 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
776                 /* Wait ramp delay time + 1, so the VMID can settle */
777                 twl4030_wait_ms(delay);
778                 /* Bypass the reg_cache to mute the headset */
779                 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
780                                         hs_gain & (~0x0f),
781                                         TWL4030_REG_HS_GAIN_SET);
782 
783                 hs_pop &= ~TWL4030_VMID_EN;
784                 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
785         }
786 
787         /* Disable external mute */
788         if (pdata && pdata->hs_extmute) {
789                 if (pdata->set_hs_extmute) {
790                         pdata->set_hs_extmute(0);
791                 } else {
792                         hs_pop &= ~TWL4030_EXTMUTE;
793                         twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
794                 }
795         }
796 }
797 
798 static int headsetlpga_event(struct snd_soc_dapm_widget *w,
799                 struct snd_kcontrol *kcontrol, int event)
800 {
801         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
802 
803         switch (event) {
804         case SND_SOC_DAPM_POST_PMU:
805                 /* Do the ramp-up only once */
806                 if (!twl4030->hsr_enabled)
807                         headset_ramp(w->codec, 1);
808 
809                 twl4030->hsl_enabled = 1;
810                 break;
811         case SND_SOC_DAPM_POST_PMD:
812                 /* Do the ramp-down only if both headsetL/R is disabled */
813                 if (!twl4030->hsr_enabled)
814                         headset_ramp(w->codec, 0);
815 
816                 twl4030->hsl_enabled = 0;
817                 break;
818         }
819         return 0;
820 }
821 
822 static int headsetrpga_event(struct snd_soc_dapm_widget *w,
823                 struct snd_kcontrol *kcontrol, int event)
824 {
825         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
826 
827         switch (event) {
828         case SND_SOC_DAPM_POST_PMU:
829                 /* Do the ramp-up only once */
830                 if (!twl4030->hsl_enabled)
831                         headset_ramp(w->codec, 1);
832 
833                 twl4030->hsr_enabled = 1;
834                 break;
835         case SND_SOC_DAPM_POST_PMD:
836                 /* Do the ramp-down only if both headsetL/R is disabled */
837                 if (!twl4030->hsl_enabled)
838                         headset_ramp(w->codec, 0);
839 
840                 twl4030->hsr_enabled = 0;
841                 break;
842         }
843         return 0;
844 }
845 
846 static int digimic_event(struct snd_soc_dapm_widget *w,
847                 struct snd_kcontrol *kcontrol, int event)
848 {
849         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
850 
851         if (twl4030->digimic_delay)
852                 twl4030_wait_ms(twl4030->digimic_delay);
853         return 0;
854 }
855 
856 /*
857  * Some of the gain controls in TWL (mostly those which are associated with
858  * the outputs) are implemented in an interesting way:
859  * 0x0 : Power down (mute)
860  * 0x1 : 6dB
861  * 0x2 : 0 dB
862  * 0x3 : -6 dB
863  * Inverting not going to help with these.
864  * Custom volsw and volsw_2r get/put functions to handle these gain bits.
865  */
866 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
867         struct snd_ctl_elem_value *ucontrol)
868 {
869         struct soc_mixer_control *mc =
870                 (struct soc_mixer_control *)kcontrol->private_value;
871         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
872         unsigned int reg = mc->reg;
873         unsigned int shift = mc->shift;
874         unsigned int rshift = mc->rshift;
875         int max = mc->max;
876         int mask = (1 << fls(max)) - 1;
877 
878         ucontrol->value.integer.value[0] =
879                 (snd_soc_read(codec, reg) >> shift) & mask;
880         if (ucontrol->value.integer.value[0])
881                 ucontrol->value.integer.value[0] =
882                         max + 1 - ucontrol->value.integer.value[0];
883 
884         if (shift != rshift) {
885                 ucontrol->value.integer.value[1] =
886                         (snd_soc_read(codec, reg) >> rshift) & mask;
887                 if (ucontrol->value.integer.value[1])
888                         ucontrol->value.integer.value[1] =
889                                 max + 1 - ucontrol->value.integer.value[1];
890         }
891 
892         return 0;
893 }
894 
895 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
896         struct snd_ctl_elem_value *ucontrol)
897 {
898         struct soc_mixer_control *mc =
899                 (struct soc_mixer_control *)kcontrol->private_value;
900         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
901         unsigned int reg = mc->reg;
902         unsigned int shift = mc->shift;
903         unsigned int rshift = mc->rshift;
904         int max = mc->max;
905         int mask = (1 << fls(max)) - 1;
906         unsigned short val, val2, val_mask;
907 
908         val = (ucontrol->value.integer.value[0] & mask);
909 
910         val_mask = mask << shift;
911         if (val)
912                 val = max + 1 - val;
913         val = val << shift;
914         if (shift != rshift) {
915                 val2 = (ucontrol->value.integer.value[1] & mask);
916                 val_mask |= mask << rshift;
917                 if (val2)
918                         val2 = max + 1 - val2;
919                 val |= val2 << rshift;
920         }
921         return snd_soc_update_bits(codec, reg, val_mask, val);
922 }
923 
924 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
925         struct snd_ctl_elem_value *ucontrol)
926 {
927         struct soc_mixer_control *mc =
928                 (struct soc_mixer_control *)kcontrol->private_value;
929         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
930         unsigned int reg = mc->reg;
931         unsigned int reg2 = mc->rreg;
932         unsigned int shift = mc->shift;
933         int max = mc->max;
934         int mask = (1<<fls(max))-1;
935 
936         ucontrol->value.integer.value[0] =
937                 (snd_soc_read(codec, reg) >> shift) & mask;
938         ucontrol->value.integer.value[1] =
939                 (snd_soc_read(codec, reg2) >> shift) & mask;
940 
941         if (ucontrol->value.integer.value[0])
942                 ucontrol->value.integer.value[0] =
943                         max + 1 - ucontrol->value.integer.value[0];
944         if (ucontrol->value.integer.value[1])
945                 ucontrol->value.integer.value[1] =
946                         max + 1 - ucontrol->value.integer.value[1];
947 
948         return 0;
949 }
950 
951 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
952         struct snd_ctl_elem_value *ucontrol)
953 {
954         struct soc_mixer_control *mc =
955                 (struct soc_mixer_control *)kcontrol->private_value;
956         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
957         unsigned int reg = mc->reg;
958         unsigned int reg2 = mc->rreg;
959         unsigned int shift = mc->shift;
960         int max = mc->max;
961         int mask = (1 << fls(max)) - 1;
962         int err;
963         unsigned short val, val2, val_mask;
964 
965         val_mask = mask << shift;
966         val = (ucontrol->value.integer.value[0] & mask);
967         val2 = (ucontrol->value.integer.value[1] & mask);
968 
969         if (val)
970                 val = max + 1 - val;
971         if (val2)
972                 val2 = max + 1 - val2;
973 
974         val = val << shift;
975         val2 = val2 << shift;
976 
977         err = snd_soc_update_bits(codec, reg, val_mask, val);
978         if (err < 0)
979                 return err;
980 
981         err = snd_soc_update_bits(codec, reg2, val_mask, val2);
982         return err;
983 }
984 
985 /* Codec operation modes */
986 static const char *twl4030_op_modes_texts[] = {
987         "Option 2 (voice/audio)", "Option 1 (audio)"
988 };
989 
990 static const struct soc_enum twl4030_op_modes_enum =
991         SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
992                         ARRAY_SIZE(twl4030_op_modes_texts),
993                         twl4030_op_modes_texts);
994 
995 static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
996         struct snd_ctl_elem_value *ucontrol)
997 {
998         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
999         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1000         struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1001         unsigned short val;
1002         unsigned short mask, bitmask;
1003 
1004         if (twl4030->configured) {
1005                 dev_err(codec->dev,
1006                         "operation mode cannot be changed on-the-fly\n");
1007                 return -EBUSY;
1008         }
1009 
1010         for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
1011                 ;
1012         if (ucontrol->value.enumerated.item[0] > e->max - 1)
1013                 return -EINVAL;
1014 
1015         val = ucontrol->value.enumerated.item[0] << e->shift_l;
1016         mask = (bitmask - 1) << e->shift_l;
1017         if (e->shift_l != e->shift_r) {
1018                 if (ucontrol->value.enumerated.item[1] > e->max - 1)
1019                         return -EINVAL;
1020                 val |= ucontrol->value.enumerated.item[1] << e->shift_r;
1021                 mask |= (bitmask - 1) << e->shift_r;
1022         }
1023 
1024         return snd_soc_update_bits(codec, e->reg, mask, val);
1025 }
1026 
1027 /*
1028  * FGAIN volume control:
1029  * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
1030  */
1031 static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
1032 
1033 /*
1034  * CGAIN volume control:
1035  * 0 dB to 12 dB in 6 dB steps
1036  * value 2 and 3 means 12 dB
1037  */
1038 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
1039 
1040 /*
1041  * Voice Downlink GAIN volume control:
1042  * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
1043  */
1044 static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
1045 
1046 /*
1047  * Analog playback gain
1048  * -24 dB to 12 dB in 2 dB steps
1049  */
1050 static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
1051 
1052 /*
1053  * Gain controls tied to outputs
1054  * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1055  */
1056 static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1057 
1058 /*
1059  * Gain control for earpiece amplifier
1060  * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1061  */
1062 static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1063 
1064 /*
1065  * Capture gain after the ADCs
1066  * from 0 dB to 31 dB in 1 dB steps
1067  */
1068 static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1069 
1070 /*
1071  * Gain control for input amplifiers
1072  * 0 dB to 30 dB in 6 dB steps
1073  */
1074 static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1075 
1076 /* AVADC clock priority */
1077 static const char *twl4030_avadc_clk_priority_texts[] = {
1078         "Voice high priority", "HiFi high priority"
1079 };
1080 
1081 static const struct soc_enum twl4030_avadc_clk_priority_enum =
1082         SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
1083                         ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
1084                         twl4030_avadc_clk_priority_texts);
1085 
1086 static const char *twl4030_rampdelay_texts[] = {
1087         "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1088         "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1089         "3495/2581/1748 ms"
1090 };
1091 
1092 static const struct soc_enum twl4030_rampdelay_enum =
1093         SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
1094                         ARRAY_SIZE(twl4030_rampdelay_texts),
1095                         twl4030_rampdelay_texts);
1096 
1097 /* Vibra H-bridge direction mode */
1098 static const char *twl4030_vibradirmode_texts[] = {
1099         "Vibra H-bridge direction", "Audio data MSB",
1100 };
1101 
1102 static const struct soc_enum twl4030_vibradirmode_enum =
1103         SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
1104                         ARRAY_SIZE(twl4030_vibradirmode_texts),
1105                         twl4030_vibradirmode_texts);
1106 
1107 /* Vibra H-bridge direction */
1108 static const char *twl4030_vibradir_texts[] = {
1109         "Positive polarity", "Negative polarity",
1110 };
1111 
1112 static const struct soc_enum twl4030_vibradir_enum =
1113         SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
1114                         ARRAY_SIZE(twl4030_vibradir_texts),
1115                         twl4030_vibradir_texts);
1116 
1117 /* Digimic Left and right swapping */
1118 static const char *twl4030_digimicswap_texts[] = {
1119         "Not swapped", "Swapped",
1120 };
1121 
1122 static const struct soc_enum twl4030_digimicswap_enum =
1123         SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1, 0,
1124                         ARRAY_SIZE(twl4030_digimicswap_texts),
1125                         twl4030_digimicswap_texts);
1126 
1127 static const struct snd_kcontrol_new twl4030_snd_controls[] = {
1128         /* Codec operation mode control */
1129         SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1130                 snd_soc_get_enum_double,
1131                 snd_soc_put_twl4030_opmode_enum_double),
1132 
1133         /* Common playback gain controls */
1134         SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1135                 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1136                 0, 0x3f, 0, digital_fine_tlv),
1137         SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1138                 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1139                 0, 0x3f, 0, digital_fine_tlv),
1140 
1141         SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1142                 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1143                 6, 0x2, 0, digital_coarse_tlv),
1144         SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1145                 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1146                 6, 0x2, 0, digital_coarse_tlv),
1147 
1148         SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1149                 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1150                 3, 0x12, 1, analog_tlv),
1151         SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1152                 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1153                 3, 0x12, 1, analog_tlv),
1154         SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1155                 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1156                 1, 1, 0),
1157         SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1158                 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1159                 1, 1, 0),
1160 
1161         /* Common voice downlink gain controls */
1162         SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1163                 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1164 
1165         SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1166                 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1167 
1168         SOC_SINGLE("DAC Voice Analog Downlink Switch",
1169                 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1170 
1171         /* Separate output gain controls */
1172         SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
1173                 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
1174                 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1175                 snd_soc_put_volsw_r2_twl4030, output_tvl),
1176 
1177         SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
1178                 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
1179                 snd_soc_put_volsw_twl4030, output_tvl),
1180 
1181         SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
1182                 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
1183                 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1184                 snd_soc_put_volsw_r2_twl4030, output_tvl),
1185 
1186         SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
1187                 TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
1188                 snd_soc_put_volsw_twl4030, output_ear_tvl),
1189 
1190         /* Common capture gain controls */
1191         SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
1192                 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1193                 0, 0x1f, 0, digital_capture_tlv),
1194         SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1195                 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1196                 0, 0x1f, 0, digital_capture_tlv),
1197 
1198         SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
1199                 0, 3, 5, 0, input_gain_tlv),
1200 
1201         SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1202 
1203         SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
1204 
1205         SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1206         SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
1207 
1208         SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
1209 };
1210 
1211 static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
1212         /* Left channel inputs */
1213         SND_SOC_DAPM_INPUT("MAINMIC"),
1214         SND_SOC_DAPM_INPUT("HSMIC"),
1215         SND_SOC_DAPM_INPUT("AUXL"),
1216         SND_SOC_DAPM_INPUT("CARKITMIC"),
1217         /* Right channel inputs */
1218         SND_SOC_DAPM_INPUT("SUBMIC"),
1219         SND_SOC_DAPM_INPUT("AUXR"),
1220         /* Digital microphones (Stereo) */
1221         SND_SOC_DAPM_INPUT("DIGIMIC0"),
1222         SND_SOC_DAPM_INPUT("DIGIMIC1"),
1223 
1224         /* Outputs */
1225         SND_SOC_DAPM_OUTPUT("EARPIECE"),
1226         SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1227         SND_SOC_DAPM_OUTPUT("PREDRIVER"),
1228         SND_SOC_DAPM_OUTPUT("HSOL"),
1229         SND_SOC_DAPM_OUTPUT("HSOR"),
1230         SND_SOC_DAPM_OUTPUT("CARKITL"),
1231         SND_SOC_DAPM_OUTPUT("CARKITR"),
1232         SND_SOC_DAPM_OUTPUT("HFL"),
1233         SND_SOC_DAPM_OUTPUT("HFR"),
1234         SND_SOC_DAPM_OUTPUT("VIBRA"),
1235 
1236         /* AIF and APLL clocks for running DAIs (including loopback) */
1237         SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1238         SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1239         SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1240 
1241         /* DACs */
1242         SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
1243                         SND_SOC_NOPM, 0, 0),
1244         SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
1245                         SND_SOC_NOPM, 0, 0),
1246         SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
1247                         SND_SOC_NOPM, 0, 0),
1248         SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
1249                         SND_SOC_NOPM, 0, 0),
1250         SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
1251                         SND_SOC_NOPM, 0, 0),
1252 
1253         /* Analog bypasses */
1254         SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1255                         &twl4030_dapm_abypassr1_control),
1256         SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1257                         &twl4030_dapm_abypassl1_control),
1258         SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1259                         &twl4030_dapm_abypassr2_control),
1260         SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1261                         &twl4030_dapm_abypassl2_control),
1262         SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1263                         &twl4030_dapm_abypassv_control),
1264 
1265         /* Master analog loopback switch */
1266         SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1267                             NULL, 0),
1268 
1269         /* Digital bypasses */
1270         SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1271                         &twl4030_dapm_dbypassl_control),
1272         SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1273                         &twl4030_dapm_dbypassr_control),
1274         SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1275                         &twl4030_dapm_dbypassv_control),
1276 
1277         /* Digital mixers, power control for the physical DACs */
1278         SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1279                         TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1280         SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1281                         TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1282         SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1283                         TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1284         SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1285                         TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1286         SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1287                         TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1288 
1289         /* Analog mixers, power control for the physical PGAs */
1290         SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1291                         TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1292         SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1293                         TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1294         SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1295                         TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1296         SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1297                         TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1298         SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1299                         TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
1300 
1301         SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1302                             SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1303 
1304         SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1305                             SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1306 
1307         /* Output MIXER controls */
1308         /* Earpiece */
1309         SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1310                         &twl4030_dapm_earpiece_controls[0],
1311                         ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
1312         SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1313                         0, 0, NULL, 0, earpiecepga_event,
1314                         SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1315         /* PreDrivL/R */
1316         SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1317                         &twl4030_dapm_predrivel_controls[0],
1318                         ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
1319         SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1320                         0, 0, NULL, 0, predrivelpga_event,
1321                         SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1322         SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1323                         &twl4030_dapm_predriver_controls[0],
1324                         ARRAY_SIZE(twl4030_dapm_predriver_controls)),
1325         SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1326                         0, 0, NULL, 0, predriverpga_event,
1327                         SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1328         /* HeadsetL/R */
1329         SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
1330                         &twl4030_dapm_hsol_controls[0],
1331                         ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1332         SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1333                         0, 0, NULL, 0, headsetlpga_event,
1334                         SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1335         SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1336                         &twl4030_dapm_hsor_controls[0],
1337                         ARRAY_SIZE(twl4030_dapm_hsor_controls)),
1338         SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1339                         0, 0, NULL, 0, headsetrpga_event,
1340                         SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1341         /* CarkitL/R */
1342         SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1343                         &twl4030_dapm_carkitl_controls[0],
1344                         ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
1345         SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1346                         0, 0, NULL, 0, carkitlpga_event,
1347                         SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1348         SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1349                         &twl4030_dapm_carkitr_controls[0],
1350                         ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
1351         SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1352                         0, 0, NULL, 0, carkitrpga_event,
1353                         SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1354 
1355         /* Output MUX controls */
1356         /* HandsfreeL/R */
1357         SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1358                 &twl4030_dapm_handsfreel_control),
1359         SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
1360                         &twl4030_dapm_handsfreelmute_control),
1361         SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1362                         0, 0, NULL, 0, handsfreelpga_event,
1363                         SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1364         SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1365                 &twl4030_dapm_handsfreer_control),
1366         SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
1367                         &twl4030_dapm_handsfreermute_control),
1368         SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1369                         0, 0, NULL, 0, handsfreerpga_event,
1370                         SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1371         /* Vibra */
1372         SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1373                            &twl4030_dapm_vibra_control, vibramux_event,
1374                            SND_SOC_DAPM_PRE_PMU),
1375         SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1376                 &twl4030_dapm_vibrapath_control),
1377 
1378         /* Introducing four virtual ADC, since TWL4030 have four channel for
1379            capture */
1380         SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1381                 SND_SOC_NOPM, 0, 0),
1382         SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1383                 SND_SOC_NOPM, 0, 0),
1384         SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1385                 SND_SOC_NOPM, 0, 0),
1386         SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1387                 SND_SOC_NOPM, 0, 0),
1388 
1389         /* Analog/Digital mic path selection.
1390            TX1 Left/Right: either analog Left/Right or Digimic0
1391            TX2 Left/Right: either analog Left/Right or Digimic1 */
1392         SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1393                 &twl4030_dapm_micpathtx1_control),
1394         SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1395                 &twl4030_dapm_micpathtx2_control),
1396 
1397         /* Analog input mixers for the capture amplifiers */
1398         SND_SOC_DAPM_MIXER("Analog Left",
1399                 TWL4030_REG_ANAMICL, 4, 0,
1400                 &twl4030_dapm_analoglmic_controls[0],
1401                 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
1402         SND_SOC_DAPM_MIXER("Analog Right",
1403                 TWL4030_REG_ANAMICR, 4, 0,
1404                 &twl4030_dapm_analogrmic_controls[0],
1405                 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
1406 
1407         SND_SOC_DAPM_PGA("ADC Physical Left",
1408                 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1409         SND_SOC_DAPM_PGA("ADC Physical Right",
1410                 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
1411 
1412         SND_SOC_DAPM_PGA_E("Digimic0 Enable",
1413                 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
1414                 digimic_event, SND_SOC_DAPM_POST_PMU),
1415         SND_SOC_DAPM_PGA_E("Digimic1 Enable",
1416                 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
1417                 digimic_event, SND_SOC_DAPM_POST_PMU),
1418 
1419         SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
1420                             NULL, 0),
1421         SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
1422                             NULL, 0),
1423 
1424         SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
1425         SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
1426         SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
1427 
1428 };
1429 
1430 static const struct snd_soc_dapm_route intercon[] = {
1431         {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1432         {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1433         {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1434         {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1435         {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
1436 
1437         /* Supply for the digital part (APLL) */
1438         {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1439 
1440         {"DAC Left1", NULL, "AIF Enable"},
1441         {"DAC Right1", NULL, "AIF Enable"},
1442         {"DAC Left2", NULL, "AIF Enable"},
1443         {"DAC Right1", NULL, "AIF Enable"},
1444 
1445         {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1446         {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1447 
1448         {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1449         {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1450         {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1451         {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1452         {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
1453 
1454         /* Internal playback routings */
1455         /* Earpiece */
1456         {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1457         {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1458         {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1459         {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1460         {"Earpiece PGA", NULL, "Earpiece Mixer"},
1461         /* PreDrivL */
1462         {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1463         {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1464         {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1465         {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1466         {"PredriveL PGA", NULL, "PredriveL Mixer"},
1467         /* PreDrivR */
1468         {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1469         {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1470         {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1471         {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1472         {"PredriveR PGA", NULL, "PredriveR Mixer"},
1473         /* HeadsetL */
1474         {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1475         {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1476         {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1477         {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
1478         /* HeadsetR */
1479         {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1480         {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1481         {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1482         {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
1483         /* CarkitL */
1484         {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1485         {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1486         {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1487         {"CarkitL PGA", NULL, "CarkitL Mixer"},
1488         /* CarkitR */
1489         {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1490         {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1491         {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1492         {"CarkitR PGA", NULL, "CarkitR Mixer"},
1493         /* HandsfreeL */
1494         {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1495         {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1496         {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1497         {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
1498         {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1499         {"HandsfreeL PGA", NULL, "HandsfreeL"},
1500         /* HandsfreeR */
1501         {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1502         {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1503         {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1504         {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
1505         {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1506         {"HandsfreeR PGA", NULL, "HandsfreeR"},
1507         /* Vibra */
1508         {"Vibra Mux", "AudioL1", "DAC Left1"},
1509         {"Vibra Mux", "AudioR1", "DAC Right1"},
1510         {"Vibra Mux", "AudioL2", "DAC Left2"},
1511         {"Vibra Mux", "AudioR2", "DAC Right2"},
1512 
1513         /* outputs */
1514         /* Must be always connected (for AIF and APLL) */
1515         {"Virtual HiFi OUT", NULL, "DAC Left1"},
1516         {"Virtual HiFi OUT", NULL, "DAC Right1"},
1517         {"Virtual HiFi OUT", NULL, "DAC Left2"},
1518         {"Virtual HiFi OUT", NULL, "DAC Right2"},
1519         /* Must be always connected (for APLL) */
1520         {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1521         /* Physical outputs */
1522         {"EARPIECE", NULL, "Earpiece PGA"},
1523         {"PREDRIVEL", NULL, "PredriveL PGA"},
1524         {"PREDRIVER", NULL, "PredriveR PGA"},
1525         {"HSOL", NULL, "HeadsetL PGA"},
1526         {"HSOR", NULL, "HeadsetR PGA"},
1527         {"CARKITL", NULL, "CarkitL PGA"},
1528         {"CARKITR", NULL, "CarkitR PGA"},
1529         {"HFL", NULL, "HandsfreeL PGA"},
1530         {"HFR", NULL, "HandsfreeR PGA"},
1531         {"Vibra Route", "Audio", "Vibra Mux"},
1532         {"VIBRA", NULL, "Vibra Route"},
1533 
1534         /* Capture path */
1535         /* Must be always connected (for AIF and APLL) */
1536         {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1537         {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1538         {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1539         {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1540         /* Physical inputs */
1541         {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1542         {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1543         {"Analog Left", "AUXL Capture Switch", "AUXL"},
1544         {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
1545 
1546         {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1547         {"Analog Right", "AUXR Capture Switch", "AUXR"},
1548 
1549         {"ADC Physical Left", NULL, "Analog Left"},
1550         {"ADC Physical Right", NULL, "Analog Right"},
1551 
1552         {"Digimic0 Enable", NULL, "DIGIMIC0"},
1553         {"Digimic1 Enable", NULL, "DIGIMIC1"},
1554 
1555         {"DIGIMIC0", NULL, "micbias1 select"},
1556         {"DIGIMIC1", NULL, "micbias2 select"},
1557 
1558         /* TX1 Left capture path */
1559         {"TX1 Capture Route", "Analog", "ADC Physical Left"},
1560         {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1561         /* TX1 Right capture path */
1562         {"TX1 Capture Route", "Analog", "ADC Physical Right"},
1563         {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1564         /* TX2 Left capture path */
1565         {"TX2 Capture Route", "Analog", "ADC Physical Left"},
1566         {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1567         /* TX2 Right capture path */
1568         {"TX2 Capture Route", "Analog", "ADC Physical Right"},
1569         {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1570 
1571         {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1572         {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1573         {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1574         {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1575 
1576         {"ADC Virtual Left1", NULL, "AIF Enable"},
1577         {"ADC Virtual Right1", NULL, "AIF Enable"},
1578         {"ADC Virtual Left2", NULL, "AIF Enable"},
1579         {"ADC Virtual Right2", NULL, "AIF Enable"},
1580 
1581         /* Analog bypass routes */
1582         {"Right1 Analog Loopback", "Switch", "Analog Right"},
1583         {"Left1 Analog Loopback", "Switch", "Analog Left"},
1584         {"Right2 Analog Loopback", "Switch", "Analog Right"},
1585         {"Left2 Analog Loopback", "Switch", "Analog Left"},
1586         {"Voice Analog Loopback", "Switch", "Analog Left"},
1587 
1588         /* Supply for the Analog loopbacks */
1589         {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1590         {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1591         {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1592         {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1593         {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1594 
1595         {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1596         {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1597         {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1598         {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
1599         {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
1600 
1601         /* Digital bypass routes */
1602         {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1603         {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
1604         {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
1605 
1606         {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1607         {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1608         {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
1609 
1610 };
1611 
1612 static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1613                                   enum snd_soc_bias_level level)
1614 {
1615         switch (level) {
1616         case SND_SOC_BIAS_ON:
1617                 break;
1618         case SND_SOC_BIAS_PREPARE:
1619                 break;
1620         case SND_SOC_BIAS_STANDBY:
1621                 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
1622                         twl4030_codec_enable(codec, 1);
1623                 break;
1624         case SND_SOC_BIAS_OFF:
1625                 twl4030_codec_enable(codec, 0);
1626                 break;
1627         }
1628         codec->dapm.bias_level = level;
1629 
1630         return 0;
1631 }
1632 
1633 static void twl4030_constraints(struct twl4030_priv *twl4030,
1634                                 struct snd_pcm_substream *mst_substream)
1635 {
1636         struct snd_pcm_substream *slv_substream;
1637 
1638         /* Pick the stream, which need to be constrained */
1639         if (mst_substream == twl4030->master_substream)
1640                 slv_substream = twl4030->slave_substream;
1641         else if (mst_substream == twl4030->slave_substream)
1642                 slv_substream = twl4030->master_substream;
1643         else /* This should not happen.. */
1644                 return;
1645 
1646         /* Set the constraints according to the already configured stream */
1647         snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1648                                 SNDRV_PCM_HW_PARAM_RATE,
1649                                 twl4030->rate,
1650                                 twl4030->rate);
1651 
1652         snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1653                                 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1654                                 twl4030->sample_bits,
1655                                 twl4030->sample_bits);
1656 
1657         snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1658                                 SNDRV_PCM_HW_PARAM_CHANNELS,
1659                                 twl4030->channels,
1660                                 twl4030->channels);
1661 }
1662 
1663 /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1664  * capture has to be enabled/disabled. */
1665 static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
1666                                 int enable)
1667 {
1668         u8 reg, mask;
1669 
1670         reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1671 
1672         if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1673                 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1674         else
1675                 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1676 
1677         if (enable)
1678                 reg |= mask;
1679         else
1680                 reg &= ~mask;
1681 
1682         twl4030_write(codec, TWL4030_REG_OPTION, reg);
1683 }
1684 
1685 static int twl4030_startup(struct snd_pcm_substream *substream,
1686                            struct snd_soc_dai *dai)
1687 {
1688         struct snd_soc_codec *codec = dai->codec;
1689         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1690 
1691         if (twl4030->master_substream) {
1692                 twl4030->slave_substream = substream;
1693                 /* The DAI has one configuration for playback and capture, so
1694                  * if the DAI has been already configured then constrain this
1695                  * substream to match it. */
1696                 if (twl4030->configured)
1697                         twl4030_constraints(twl4030, twl4030->master_substream);
1698         } else {
1699                 if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
1700                         TWL4030_OPTION_1)) {
1701                         /* In option2 4 channel is not supported, set the
1702                          * constraint for the first stream for channels, the
1703                          * second stream will 'inherit' this cosntraint */
1704                         snd_pcm_hw_constraint_minmax(substream->runtime,
1705                                                 SNDRV_PCM_HW_PARAM_CHANNELS,
1706                                                 2, 2);
1707                 }
1708                 twl4030->master_substream = substream;
1709         }
1710 
1711         return 0;
1712 }
1713 
1714 static void twl4030_shutdown(struct snd_pcm_substream *substream,
1715                              struct snd_soc_dai *dai)
1716 {
1717         struct snd_soc_codec *codec = dai->codec;
1718         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1719 
1720         if (twl4030->master_substream == substream)
1721                 twl4030->master_substream = twl4030->slave_substream;
1722 
1723         twl4030->slave_substream = NULL;
1724 
1725         /* If all streams are closed, or the remaining stream has not yet
1726          * been configured than set the DAI as not configured. */
1727         if (!twl4030->master_substream)
1728                 twl4030->configured = 0;
1729          else if (!twl4030->master_substream->runtime->channels)
1730                 twl4030->configured = 0;
1731 
1732          /* If the closing substream had 4 channel, do the necessary cleanup */
1733         if (substream->runtime->channels == 4)
1734                 twl4030_tdm_enable(codec, substream->stream, 0);
1735 }
1736 
1737 static int twl4030_hw_params(struct snd_pcm_substream *substream,
1738                            struct snd_pcm_hw_params *params,
1739                            struct snd_soc_dai *dai)
1740 {
1741         struct snd_soc_codec *codec = dai->codec;
1742         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1743         u8 mode, old_mode, format, old_format;
1744 
1745          /* If the substream has 4 channel, do the necessary setup */
1746         if (params_channels(params) == 4) {
1747                 format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1748                 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
1749 
1750                 /* Safety check: are we in the correct operating mode and
1751                  * the interface is in TDM mode? */
1752                 if ((mode & TWL4030_OPTION_1) &&
1753                     ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
1754                         twl4030_tdm_enable(codec, substream->stream, 1);
1755                 else
1756                         return -EINVAL;
1757         }
1758 
1759         if (twl4030->configured)
1760                 /* Ignoring hw_params for already configured DAI */
1761                 return 0;
1762 
1763         /* bit rate */
1764         old_mode = twl4030_read_reg_cache(codec,
1765                         TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1766         mode = old_mode & ~TWL4030_APLL_RATE;
1767 
1768         switch (params_rate(params)) {
1769         case 8000:
1770                 mode |= TWL4030_APLL_RATE_8000;
1771                 break;
1772         case 11025:
1773                 mode |= TWL4030_APLL_RATE_11025;
1774                 break;
1775         case 12000:
1776                 mode |= TWL4030_APLL_RATE_12000;
1777                 break;
1778         case 16000:
1779                 mode |= TWL4030_APLL_RATE_16000;
1780                 break;
1781         case 22050:
1782                 mode |= TWL4030_APLL_RATE_22050;
1783                 break;
1784         case 24000:
1785                 mode |= TWL4030_APLL_RATE_24000;
1786                 break;
1787         case 32000:
1788                 mode |= TWL4030_APLL_RATE_32000;
1789                 break;
1790         case 44100:
1791                 mode |= TWL4030_APLL_RATE_44100;
1792                 break;
1793         case 48000:
1794                 mode |= TWL4030_APLL_RATE_48000;
1795                 break;
1796         case 96000:
1797                 mode |= TWL4030_APLL_RATE_96000;
1798                 break;
1799         default:
1800                 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
1801                         params_rate(params));
1802                 return -EINVAL;
1803         }
1804 
1805         /* sample size */
1806         old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1807         format = old_format;
1808         format &= ~TWL4030_DATA_WIDTH;
1809         switch (params_format(params)) {
1810         case SNDRV_PCM_FORMAT_S16_LE:
1811                 format |= TWL4030_DATA_WIDTH_16S_16W;
1812                 break;
1813         case SNDRV_PCM_FORMAT_S32_LE:
1814                 format |= TWL4030_DATA_WIDTH_32S_24W;
1815                 break;
1816         default:
1817                 dev_err(codec->dev, "%s: unknown format %d\n", __func__,
1818                         params_format(params));
1819                 return -EINVAL;
1820         }
1821 
1822         if (format != old_format || mode != old_mode) {
1823                 if (twl4030->codec_powered) {
1824                         /*
1825                          * If the codec is powered, than we need to toggle the
1826                          * codec power.
1827                          */
1828                         twl4030_codec_enable(codec, 0);
1829                         twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1830                         twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1831                         twl4030_codec_enable(codec, 1);
1832                 } else {
1833                         twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1834                         twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1835                 }
1836         }
1837 
1838         /* Store the important parameters for the DAI configuration and set
1839          * the DAI as configured */
1840         twl4030->configured = 1;
1841         twl4030->rate = params_rate(params);
1842         twl4030->sample_bits = hw_param_interval(params,
1843                                         SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1844         twl4030->channels = params_channels(params);
1845 
1846         /* If both playback and capture streams are open, and one of them
1847          * is setting the hw parameters right now (since we are here), set
1848          * constraints to the other stream to match the current one. */
1849         if (twl4030->slave_substream)
1850                 twl4030_constraints(twl4030, substream);
1851 
1852         return 0;
1853 }
1854 
1855 static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1856                 int clk_id, unsigned int freq, int dir)
1857 {
1858         struct snd_soc_codec *codec = codec_dai->codec;
1859         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1860 
1861         switch (freq) {
1862         case 19200000:
1863         case 26000000:
1864         case 38400000:
1865                 break;
1866         default:
1867                 dev_err(codec->dev, "Unsupported HFCLKIN: %u\n", freq);
1868                 return -EINVAL;
1869         }
1870 
1871         if ((freq / 1000) != twl4030->sysclk) {
1872                 dev_err(codec->dev,
1873                         "Mismatch in HFCLKIN: %u (configured: %u)\n",
1874                         freq, twl4030->sysclk * 1000);
1875                 return -EINVAL;
1876         }
1877 
1878         return 0;
1879 }
1880 
1881 static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
1882                              unsigned int fmt)
1883 {
1884         struct snd_soc_codec *codec = codec_dai->codec;
1885         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1886         u8 old_format, format;
1887 
1888         /* get format */
1889         old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1890         format = old_format;
1891 
1892         /* set master/slave audio interface */
1893         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1894         case SND_SOC_DAIFMT_CBM_CFM:
1895                 format &= ~(TWL4030_AIF_SLAVE_EN);
1896                 format &= ~(TWL4030_CLK256FS_EN);
1897                 break;
1898         case SND_SOC_DAIFMT_CBS_CFS:
1899                 format |= TWL4030_AIF_SLAVE_EN;
1900                 format |= TWL4030_CLK256FS_EN;
1901                 break;
1902         default:
1903                 return -EINVAL;
1904         }
1905 
1906         /* interface format */
1907         format &= ~TWL4030_AIF_FORMAT;
1908         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1909         case SND_SOC_DAIFMT_I2S:
1910                 format |= TWL4030_AIF_FORMAT_CODEC;
1911                 break;
1912         case SND_SOC_DAIFMT_DSP_A:
1913                 format |= TWL4030_AIF_FORMAT_TDM;
1914                 break;
1915         default:
1916                 return -EINVAL;
1917         }
1918 
1919         if (format != old_format) {
1920                 if (twl4030->codec_powered) {
1921                         /*
1922                          * If the codec is powered, than we need to toggle the
1923                          * codec power.
1924                          */
1925                         twl4030_codec_enable(codec, 0);
1926                         twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1927                         twl4030_codec_enable(codec, 1);
1928                 } else {
1929                         twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1930                 }
1931         }
1932 
1933         return 0;
1934 }
1935 
1936 static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1937 {
1938         struct snd_soc_codec *codec = dai->codec;
1939         u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1940 
1941         if (tristate)
1942                 reg |= TWL4030_AIF_TRI_EN;
1943         else
1944                 reg &= ~TWL4030_AIF_TRI_EN;
1945 
1946         return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1947 }
1948 
1949 /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1950  * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1951 static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
1952                                 int enable)
1953 {
1954         u8 reg, mask;
1955 
1956         reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1957 
1958         if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1959                 mask = TWL4030_ARXL1_VRX_EN;
1960         else
1961                 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1962 
1963         if (enable)
1964                 reg |= mask;
1965         else
1966                 reg &= ~mask;
1967 
1968         twl4030_write(codec, TWL4030_REG_OPTION, reg);
1969 }
1970 
1971 static int twl4030_voice_startup(struct snd_pcm_substream *substream,
1972                 struct snd_soc_dai *dai)
1973 {
1974         struct snd_soc_codec *codec = dai->codec;
1975         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1976         u8 mode;
1977 
1978         /* If the system master clock is not 26MHz, the voice PCM interface is
1979          * not available.
1980          */
1981         if (twl4030->sysclk != 26000) {
1982                 dev_err(codec->dev,
1983                         "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
1984                         __func__, twl4030->sysclk);
1985                 return -EINVAL;
1986         }
1987 
1988         /* If the codec mode is not option2, the voice PCM interface is not
1989          * available.
1990          */
1991         mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
1992                 & TWL4030_OPT_MODE;
1993 
1994         if (mode != TWL4030_OPTION_2) {
1995                 dev_err(codec->dev, "%s: the codec mode is not option2\n",
1996                         __func__);
1997                 return -EINVAL;
1998         }
1999 
2000         return 0;
2001 }
2002 
2003 static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
2004                                 struct snd_soc_dai *dai)
2005 {
2006         struct snd_soc_codec *codec = dai->codec;
2007 
2008         /* Enable voice digital filters */
2009         twl4030_voice_enable(codec, substream->stream, 0);
2010 }
2011 
2012 static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
2013                 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2014 {
2015         struct snd_soc_codec *codec = dai->codec;
2016         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2017         u8 old_mode, mode;
2018 
2019         /* Enable voice digital filters */
2020         twl4030_voice_enable(codec, substream->stream, 1);
2021 
2022         /* bit rate */
2023         old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
2024                 & ~(TWL4030_CODECPDZ);
2025         mode = old_mode;
2026 
2027         switch (params_rate(params)) {
2028         case 8000:
2029                 mode &= ~(TWL4030_SEL_16K);
2030                 break;
2031         case 16000:
2032                 mode |= TWL4030_SEL_16K;
2033                 break;
2034         default:
2035                 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
2036                         params_rate(params));
2037                 return -EINVAL;
2038         }
2039 
2040         if (mode != old_mode) {
2041                 if (twl4030->codec_powered) {
2042                         /*
2043                          * If the codec is powered, than we need to toggle the
2044                          * codec power.
2045                          */
2046                         twl4030_codec_enable(codec, 0);
2047                         twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2048                         twl4030_codec_enable(codec, 1);
2049                 } else {
2050                         twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2051                 }
2052         }
2053 
2054         return 0;
2055 }
2056 
2057 static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
2058                 int clk_id, unsigned int freq, int dir)
2059 {
2060         struct snd_soc_codec *codec = codec_dai->codec;
2061         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2062 
2063         if (freq != 26000000) {
2064                 dev_err(codec->dev,
2065                         "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
2066                         __func__, freq / 1000);
2067                 return -EINVAL;
2068         }
2069         if ((freq / 1000) != twl4030->sysclk) {
2070                 dev_err(codec->dev,
2071                         "Mismatch in HFCLKIN: %u (configured: %u)\n",
2072                         freq, twl4030->sysclk * 1000);
2073                 return -EINVAL;
2074         }
2075         return 0;
2076 }
2077 
2078 static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
2079                 unsigned int fmt)
2080 {
2081         struct snd_soc_codec *codec = codec_dai->codec;
2082         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2083         u8 old_format, format;
2084 
2085         /* get format */
2086         old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2087         format = old_format;
2088 
2089         /* set master/slave audio interface */
2090         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2091         case SND_SOC_DAIFMT_CBM_CFM:
2092                 format &= ~(TWL4030_VIF_SLAVE_EN);
2093                 break;
2094         case SND_SOC_DAIFMT_CBS_CFS:
2095                 format |= TWL4030_VIF_SLAVE_EN;
2096                 break;
2097         default:
2098                 return -EINVAL;
2099         }
2100 
2101         /* clock inversion */
2102         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2103         case SND_SOC_DAIFMT_IB_NF:
2104                 format &= ~(TWL4030_VIF_FORMAT);
2105                 break;
2106         case SND_SOC_DAIFMT_NB_IF:
2107                 format |= TWL4030_VIF_FORMAT;
2108                 break;
2109         default:
2110                 return -EINVAL;
2111         }
2112 
2113         if (format != old_format) {
2114                 if (twl4030->codec_powered) {
2115                         /*
2116                          * If the codec is powered, than we need to toggle the
2117                          * codec power.
2118                          */
2119                         twl4030_codec_enable(codec, 0);
2120                         twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2121                         twl4030_codec_enable(codec, 1);
2122                 } else {
2123                         twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2124                 }
2125         }
2126 
2127         return 0;
2128 }
2129 
2130 static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2131 {
2132         struct snd_soc_codec *codec = dai->codec;
2133         u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2134 
2135         if (tristate)
2136                 reg |= TWL4030_VIF_TRI_EN;
2137         else
2138                 reg &= ~TWL4030_VIF_TRI_EN;
2139 
2140         return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2141 }
2142 
2143 #define TWL4030_RATES    (SNDRV_PCM_RATE_8000_48000)
2144 #define TWL4030_FORMATS  (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2145 
2146 static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
2147         .startup        = twl4030_startup,
2148         .shutdown       = twl4030_shutdown,
2149         .hw_params      = twl4030_hw_params,
2150         .set_sysclk     = twl4030_set_dai_sysclk,
2151         .set_fmt        = twl4030_set_dai_fmt,
2152         .set_tristate   = twl4030_set_tristate,
2153 };
2154 
2155 static const struct snd_soc_dai_ops twl4030_dai_voice_ops = {
2156         .startup        = twl4030_voice_startup,
2157         .shutdown       = twl4030_voice_shutdown,
2158         .hw_params      = twl4030_voice_hw_params,
2159         .set_sysclk     = twl4030_voice_set_dai_sysclk,
2160         .set_fmt        = twl4030_voice_set_dai_fmt,
2161         .set_tristate   = twl4030_voice_set_tristate,
2162 };
2163 
2164 static struct snd_soc_dai_driver twl4030_dai[] = {
2165 {
2166         .name = "twl4030-hifi",
2167         .playback = {
2168                 .stream_name = "HiFi Playback",
2169                 .channels_min = 2,
2170                 .channels_max = 4,
2171                 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
2172                 .formats = TWL4030_FORMATS,
2173                 .sig_bits = 24,},
2174         .capture = {
2175                 .stream_name = "Capture",
2176                 .channels_min = 2,
2177                 .channels_max = 4,
2178                 .rates = TWL4030_RATES,
2179                 .formats = TWL4030_FORMATS,
2180                 .sig_bits = 24,},
2181         .ops = &twl4030_dai_hifi_ops,
2182 },
2183 {
2184         .name = "twl4030-voice",
2185         .playback = {
2186                 .stream_name = "Voice Playback",
2187                 .channels_min = 1,
2188                 .channels_max = 1,
2189                 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2190                 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2191         .capture = {
2192                 .stream_name = "Capture",
2193                 .channels_min = 1,
2194                 .channels_max = 2,
2195                 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2196                 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2197         .ops = &twl4030_dai_voice_ops,
2198 },
2199 };
2200 
2201 static int twl4030_soc_suspend(struct snd_soc_codec *codec)
2202 {
2203         twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2204         return 0;
2205 }
2206 
2207 static int twl4030_soc_resume(struct snd_soc_codec *codec)
2208 {
2209         twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2210         return 0;
2211 }
2212 
2213 static int twl4030_soc_probe(struct snd_soc_codec *codec)
2214 {
2215         struct twl4030_priv *twl4030;
2216 
2217         twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
2218         if (twl4030 == NULL) {
2219                 dev_err(codec->dev, "Can not allocate memory\n");
2220                 return -ENOMEM;
2221         }
2222         snd_soc_codec_set_drvdata(codec, twl4030);
2223         /* Set the defaults, and power up the codec */
2224         twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
2225 
2226         twl4030_init_chip(codec);
2227 
2228         return 0;
2229 }
2230 
2231 static int twl4030_soc_remove(struct snd_soc_codec *codec)
2232 {
2233         struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2234 
2235         /* Reset registers to their chip default before leaving */
2236         twl4030_reset_registers(codec);
2237         twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2238         kfree(twl4030);
2239         return 0;
2240 }
2241 
2242 static struct snd_soc_codec_driver soc_codec_dev_twl4030 = {
2243         .probe = twl4030_soc_probe,
2244         .remove = twl4030_soc_remove,
2245         .suspend = twl4030_soc_suspend,
2246         .resume = twl4030_soc_resume,
2247         .read = twl4030_read_reg_cache,
2248         .write = twl4030_write,
2249         .set_bias_level = twl4030_set_bias_level,
2250         .idle_bias_off = true,
2251         .reg_cache_size = sizeof(twl4030_reg),
2252         .reg_word_size = sizeof(u8),
2253         .reg_cache_default = twl4030_reg,
2254 
2255         .controls = twl4030_snd_controls,
2256         .num_controls = ARRAY_SIZE(twl4030_snd_controls),
2257         .dapm_widgets = twl4030_dapm_widgets,
2258         .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets),
2259         .dapm_routes = intercon,
2260         .num_dapm_routes = ARRAY_SIZE(intercon),
2261 };
2262 
2263 static int __devinit twl4030_codec_probe(struct platform_device *pdev)
2264 {
2265         struct twl4030_codec_data *pdata = pdev->dev.platform_data;
2266 
2267         if (!pdata) {
2268                 dev_err(&pdev->dev, "platform_data is missing\n");
2269                 return -EINVAL;
2270         }
2271 
2272         return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030,
2273                         twl4030_dai, ARRAY_SIZE(twl4030_dai));
2274 }
2275 
2276 static int __devexit twl4030_codec_remove(struct platform_device *pdev)
2277 {
2278         snd_soc_unregister_codec(&pdev->dev);
2279         return 0;
2280 }
2281 
2282 MODULE_ALIAS("platform:twl4030-codec");
2283 
2284 static struct platform_driver twl4030_codec_driver = {
2285         .probe          = twl4030_codec_probe,
2286         .remove         = __devexit_p(twl4030_codec_remove),
2287         .driver         = {
2288                 .name   = "twl4030-codec",
2289                 .owner  = THIS_MODULE,
2290         },
2291 };
2292 
2293 module_platform_driver(twl4030_codec_driver);
2294 
2295 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2296 MODULE_AUTHOR("Steve Sakoman");
2297 MODULE_LICENSE("GPL");
2298 

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