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Linux/sound/soc/codecs/wm8737.c

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  1 // SPDX-License-Identifier: GPL-2.0-only
  2 /*
  3  * wm8737.c  --  WM8737 ALSA SoC Audio driver
  4  *
  5  * Copyright 2010 Wolfson Microelectronics plc
  6  *
  7  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  8  */
  9 
 10 #include <linux/module.h>
 11 #include <linux/moduleparam.h>
 12 #include <linux/init.h>
 13 #include <linux/delay.h>
 14 #include <linux/pm.h>
 15 #include <linux/i2c.h>
 16 #include <linux/regmap.h>
 17 #include <linux/regulator/consumer.h>
 18 #include <linux/spi/spi.h>
 19 #include <linux/slab.h>
 20 #include <linux/of_device.h>
 21 #include <sound/core.h>
 22 #include <sound/pcm.h>
 23 #include <sound/pcm_params.h>
 24 #include <sound/soc.h>
 25 #include <sound/soc-dapm.h>
 26 #include <sound/initval.h>
 27 #include <sound/tlv.h>
 28 
 29 #include "wm8737.h"
 30 
 31 #define WM8737_NUM_SUPPLIES 4
 32 static const char *wm8737_supply_names[WM8737_NUM_SUPPLIES] = {
 33         "DCVDD",
 34         "DBVDD",
 35         "AVDD",
 36         "MVDD",
 37 };
 38 
 39 /* codec private data */
 40 struct wm8737_priv {
 41         struct regmap *regmap;
 42         struct regulator_bulk_data supplies[WM8737_NUM_SUPPLIES];
 43         unsigned int mclk;
 44 };
 45 
 46 static const struct reg_default wm8737_reg_defaults[] = {
 47         {  0, 0x00C3 },     /* R0  - Left PGA volume */
 48         {  1, 0x00C3 },     /* R1  - Right PGA volume */
 49         {  2, 0x0007 },     /* R2  - AUDIO path L */
 50         {  3, 0x0007 },     /* R3  - AUDIO path R */
 51         {  4, 0x0000 },     /* R4  - 3D Enhance */
 52         {  5, 0x0000 },     /* R5  - ADC Control */
 53         {  6, 0x0000 },     /* R6  - Power Management */
 54         {  7, 0x000A },     /* R7  - Audio Format */
 55         {  8, 0x0000 },     /* R8  - Clocking */
 56         {  9, 0x000F },     /* R9  - MIC Preamp Control */
 57         { 10, 0x0003 },     /* R10 - Misc Bias Control */
 58         { 11, 0x0000 },     /* R11 - Noise Gate */
 59         { 12, 0x007C },     /* R12 - ALC1 */
 60         { 13, 0x0000 },     /* R13 - ALC2 */
 61         { 14, 0x0032 },     /* R14 - ALC3 */
 62 };
 63 
 64 static bool wm8737_volatile(struct device *dev, unsigned int reg)
 65 {
 66         switch (reg) {
 67         case WM8737_RESET:
 68                 return true;
 69         default:
 70                 return false;
 71         }
 72 }
 73 
 74 static int wm8737_reset(struct snd_soc_component *component)
 75 {
 76         return snd_soc_component_write(component, WM8737_RESET, 0);
 77 }
 78 
 79 static const DECLARE_TLV_DB_RANGE(micboost_tlv,
 80         0, 0, TLV_DB_SCALE_ITEM(1300, 0, 0),
 81         1, 1, TLV_DB_SCALE_ITEM(1800, 0, 0),
 82         2, 2, TLV_DB_SCALE_ITEM(2800, 0, 0),
 83         3, 3, TLV_DB_SCALE_ITEM(3300, 0, 0)
 84 );
 85 static const DECLARE_TLV_DB_SCALE(pga_tlv, -9750, 50, 1);
 86 static const DECLARE_TLV_DB_SCALE(adc_tlv, -600, 600, 0);
 87 static const DECLARE_TLV_DB_SCALE(ng_tlv, -7800, 600, 0);
 88 static const DECLARE_TLV_DB_SCALE(alc_max_tlv, -1200, 600, 0);
 89 static const DECLARE_TLV_DB_SCALE(alc_target_tlv, -1800, 100, 0);
 90 
 91 static const char *micbias_enum_text[] = {
 92         "25%",
 93         "50%",
 94         "75%",
 95         "100%",
 96 };
 97 
 98 static SOC_ENUM_SINGLE_DECL(micbias_enum,
 99                             WM8737_MIC_PREAMP_CONTROL, 0, micbias_enum_text);
100 
101 static const char *low_cutoff_text[] = {
102         "Low", "High"
103 };
104 
105 static SOC_ENUM_SINGLE_DECL(low_3d,
106                             WM8737_3D_ENHANCE, 6, low_cutoff_text);
107 
108 static const char *high_cutoff_text[] = {
109         "High", "Low"
110 };
111 
112 static SOC_ENUM_SINGLE_DECL(high_3d,
113                             WM8737_3D_ENHANCE, 5, high_cutoff_text);
114 
115 static const char *alc_fn_text[] = {
116         "Disabled", "Right", "Left", "Stereo"
117 };
118 
119 static SOC_ENUM_SINGLE_DECL(alc_fn,
120                             WM8737_ALC1, 7, alc_fn_text);
121 
122 static const char *alc_hold_text[] = {
123         "", "2.67ms", "5.33ms", "10.66ms", "21.32ms", "42.64ms", "85.28ms",
124         "170.56ms", "341.12ms", "682.24ms", "1.364s", "2.728s", "5.458s",
125         "10.916s", "21.832s", "43.691s"
126 };
127 
128 static SOC_ENUM_SINGLE_DECL(alc_hold,
129                             WM8737_ALC2, 0, alc_hold_text);
130 
131 static const char *alc_atk_text[] = {
132         "8.4ms", "16.8ms", "33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms",
133         "1.075s", "2.15s", "4.3s", "8.6s"
134 };
135 
136 static SOC_ENUM_SINGLE_DECL(alc_atk,
137                             WM8737_ALC3, 0, alc_atk_text);
138 
139 static const char *alc_dcy_text[] = {
140         "33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms", "1.075s", "2.15s",
141         "4.3s", "8.6s", "17.2s", "34.41s"
142 };
143 
144 static SOC_ENUM_SINGLE_DECL(alc_dcy,
145                             WM8737_ALC3, 4, alc_dcy_text);
146 
147 static const struct snd_kcontrol_new wm8737_snd_controls[] = {
148 SOC_DOUBLE_R_TLV("Mic Boost Volume", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
149                  6, 3, 0, micboost_tlv),
150 SOC_DOUBLE_R("Mic Boost Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
151              4, 1, 0),
152 SOC_DOUBLE("Mic ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
153            3, 1, 0),
154 
155 SOC_DOUBLE_R_TLV("Capture Volume", WM8737_LEFT_PGA_VOLUME,
156                  WM8737_RIGHT_PGA_VOLUME, 0, 255, 0, pga_tlv),
157 SOC_DOUBLE("Capture ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
158            2, 1, 0),
159 
160 SOC_DOUBLE("INPUT1 DC Bias Switch", WM8737_MISC_BIAS_CONTROL, 0, 1, 1, 0),
161 
162 SOC_ENUM("Mic PGA Bias", micbias_enum),
163 SOC_SINGLE("ADC Low Power Switch", WM8737_ADC_CONTROL, 2, 1, 0),
164 SOC_SINGLE("High Pass Filter Switch", WM8737_ADC_CONTROL, 0, 1, 1),
165 SOC_DOUBLE("Polarity Invert Switch", WM8737_ADC_CONTROL, 5, 6, 1, 0),
166 
167 SOC_SINGLE("3D Switch", WM8737_3D_ENHANCE, 0, 1, 0),
168 SOC_SINGLE("3D Depth", WM8737_3D_ENHANCE, 1, 15, 0),
169 SOC_ENUM("3D Low Cut-off", low_3d),
170 SOC_ENUM("3D High Cut-off", low_3d),
171 SOC_SINGLE_TLV("3D ADC Volume", WM8737_3D_ENHANCE, 7, 1, 1, adc_tlv),
172 
173 SOC_SINGLE("Noise Gate Switch", WM8737_NOISE_GATE, 0, 1, 0),
174 SOC_SINGLE_TLV("Noise Gate Threshold Volume", WM8737_NOISE_GATE, 2, 7, 0,
175                ng_tlv),
176 
177 SOC_ENUM("ALC", alc_fn),
178 SOC_SINGLE_TLV("ALC Max Gain Volume", WM8737_ALC1, 4, 7, 0, alc_max_tlv),
179 SOC_SINGLE_TLV("ALC Target Volume", WM8737_ALC1, 0, 15, 0, alc_target_tlv),
180 SOC_ENUM("ALC Hold Time", alc_hold),
181 SOC_SINGLE("ALC ZC Switch", WM8737_ALC2, 4, 1, 0),
182 SOC_ENUM("ALC Attack Time", alc_atk),
183 SOC_ENUM("ALC Decay Time", alc_dcy),
184 };
185 
186 static const char *linsel_text[] = {
187         "LINPUT1", "LINPUT2", "LINPUT3", "LINPUT1 DC",
188 };
189 
190 static SOC_ENUM_SINGLE_DECL(linsel_enum,
191                             WM8737_AUDIO_PATH_L, 7, linsel_text);
192 
193 static const struct snd_kcontrol_new linsel_mux =
194         SOC_DAPM_ENUM("LINSEL", linsel_enum);
195 
196 
197 static const char *rinsel_text[] = {
198         "RINPUT1", "RINPUT2", "RINPUT3", "RINPUT1 DC",
199 };
200 
201 static SOC_ENUM_SINGLE_DECL(rinsel_enum,
202                             WM8737_AUDIO_PATH_R, 7, rinsel_text);
203 
204 static const struct snd_kcontrol_new rinsel_mux =
205         SOC_DAPM_ENUM("RINSEL", rinsel_enum);
206 
207 static const char *bypass_text[] = {
208         "Direct", "Preamp"
209 };
210 
211 static SOC_ENUM_SINGLE_DECL(lbypass_enum,
212                             WM8737_MIC_PREAMP_CONTROL, 2, bypass_text);
213 
214 static const struct snd_kcontrol_new lbypass_mux =
215         SOC_DAPM_ENUM("Left Bypass", lbypass_enum);
216 
217 
218 static SOC_ENUM_SINGLE_DECL(rbypass_enum,
219                             WM8737_MIC_PREAMP_CONTROL, 3, bypass_text);
220 
221 static const struct snd_kcontrol_new rbypass_mux =
222         SOC_DAPM_ENUM("Left Bypass", rbypass_enum);
223 
224 static const struct snd_soc_dapm_widget wm8737_dapm_widgets[] = {
225 SND_SOC_DAPM_INPUT("LINPUT1"),
226 SND_SOC_DAPM_INPUT("LINPUT2"),
227 SND_SOC_DAPM_INPUT("LINPUT3"),
228 SND_SOC_DAPM_INPUT("RINPUT1"),
229 SND_SOC_DAPM_INPUT("RINPUT2"),
230 SND_SOC_DAPM_INPUT("RINPUT3"),
231 SND_SOC_DAPM_INPUT("LACIN"),
232 SND_SOC_DAPM_INPUT("RACIN"),
233 
234 SND_SOC_DAPM_MUX("LINSEL", SND_SOC_NOPM, 0, 0, &linsel_mux),
235 SND_SOC_DAPM_MUX("RINSEL", SND_SOC_NOPM, 0, 0, &rinsel_mux),
236 
237 SND_SOC_DAPM_MUX("Left Preamp Mux", SND_SOC_NOPM, 0, 0, &lbypass_mux),
238 SND_SOC_DAPM_MUX("Right Preamp Mux", SND_SOC_NOPM, 0, 0, &rbypass_mux),
239 
240 SND_SOC_DAPM_PGA("PGAL", WM8737_POWER_MANAGEMENT, 5, 0, NULL, 0),
241 SND_SOC_DAPM_PGA("PGAR", WM8737_POWER_MANAGEMENT, 4, 0, NULL, 0),
242 
243 SND_SOC_DAPM_DAC("ADCL", NULL, WM8737_POWER_MANAGEMENT, 3, 0),
244 SND_SOC_DAPM_DAC("ADCR", NULL, WM8737_POWER_MANAGEMENT, 2, 0),
245 
246 SND_SOC_DAPM_AIF_OUT("AIF", "Capture", 0, WM8737_POWER_MANAGEMENT, 6, 0),
247 };
248 
249 static const struct snd_soc_dapm_route intercon[] = {
250         { "LINSEL", "LINPUT1", "LINPUT1" },
251         { "LINSEL", "LINPUT2", "LINPUT2" },
252         { "LINSEL", "LINPUT3", "LINPUT3" },
253         { "LINSEL", "LINPUT1 DC", "LINPUT1" },
254 
255         { "RINSEL", "RINPUT1", "RINPUT1" },
256         { "RINSEL", "RINPUT2", "RINPUT2" },
257         { "RINSEL", "RINPUT3", "RINPUT3" },
258         { "RINSEL", "RINPUT1 DC", "RINPUT1" },
259 
260         { "Left Preamp Mux", "Preamp", "LINSEL" },
261         { "Left Preamp Mux", "Direct", "LACIN" },
262 
263         { "Right Preamp Mux", "Preamp", "RINSEL" },
264         { "Right Preamp Mux", "Direct", "RACIN" },
265 
266         { "PGAL", NULL, "Left Preamp Mux" },
267         { "PGAR", NULL, "Right Preamp Mux" },
268 
269         { "ADCL", NULL, "PGAL" },
270         { "ADCR", NULL, "PGAR" },
271 
272         { "AIF", NULL, "ADCL" },
273         { "AIF", NULL, "ADCR" },
274 };
275 
276 /* codec mclk clock divider coefficients */
277 static const struct {
278         u32 mclk;
279         u32 rate;
280         u8 usb;
281         u8 sr;
282 } coeff_div[] = {
283         { 12288000,  8000, 0,  0x4 },
284         { 12288000, 12000, 0,  0x8 },
285         { 12288000, 16000, 0,  0xa },
286         { 12288000, 24000, 0, 0x1c },
287         { 12288000, 32000, 0,  0xc },
288         { 12288000, 48000, 0,    0 },
289         { 12288000, 96000, 0,  0xe },
290 
291         { 11289600,  8000, 0, 0x14 },
292         { 11289600, 11025, 0, 0x18 },
293         { 11289600, 22050, 0, 0x1a },
294         { 11289600, 44100, 0, 0x10 },
295         { 11289600, 88200, 0, 0x1e },
296 
297         { 18432000,  8000, 0,  0x5 },
298         { 18432000, 12000, 0,  0x9 },
299         { 18432000, 16000, 0,  0xb },
300         { 18432000, 24000, 0, 0x1b },
301         { 18432000, 32000, 0,  0xd },
302         { 18432000, 48000, 0,  0x1 },
303         { 18432000, 96000, 0, 0x1f },
304 
305         { 16934400,  8000, 0, 0x15 },
306         { 16934400, 11025, 0, 0x19 },
307         { 16934400, 22050, 0, 0x1b },
308         { 16934400, 44100, 0, 0x11 },
309         { 16934400, 88200, 0, 0x1f },
310 
311         { 12000000,  8000, 1,  0x4 },
312         { 12000000, 11025, 1, 0x19 },
313         { 12000000, 12000, 1,  0x8 },
314         { 12000000, 16000, 1,  0xa },
315         { 12000000, 22050, 1, 0x1b },
316         { 12000000, 24000, 1, 0x1c },
317         { 12000000, 32000, 1,  0xc },
318         { 12000000, 44100, 1, 0x11 },
319         { 12000000, 48000, 1,  0x0 },
320         { 12000000, 88200, 1, 0x1f },
321         { 12000000, 96000, 1,  0xe },
322 };
323 
324 static int wm8737_hw_params(struct snd_pcm_substream *substream,
325                             struct snd_pcm_hw_params *params,
326                             struct snd_soc_dai *dai)
327 {
328         struct snd_soc_component *component = dai->component;
329         struct wm8737_priv *wm8737 = snd_soc_component_get_drvdata(component);
330         int i;
331         u16 clocking = 0;
332         u16 af = 0;
333 
334         for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
335                 if (coeff_div[i].rate != params_rate(params))
336                         continue;
337 
338                 if (coeff_div[i].mclk == wm8737->mclk)
339                         break;
340 
341                 if (coeff_div[i].mclk == wm8737->mclk * 2) {
342                         clocking |= WM8737_CLKDIV2;
343                         break;
344                 }
345         }
346 
347         if (i == ARRAY_SIZE(coeff_div)) {
348                 dev_err(component->dev, "%dHz MCLK can't support %dHz\n",
349                         wm8737->mclk, params_rate(params));
350                 return -EINVAL;
351         }
352 
353         clocking |= coeff_div[i].usb | (coeff_div[i].sr << WM8737_SR_SHIFT);
354 
355         switch (params_width(params)) {
356         case 16:
357                 break;
358         case 20:
359                 af |= 0x8;
360                 break;
361         case 24:
362                 af |= 0x10;
363                 break;
364         case 32:
365                 af |= 0x18;
366                 break;
367         default:
368                 return -EINVAL;
369         }
370 
371         snd_soc_component_update_bits(component, WM8737_AUDIO_FORMAT, WM8737_WL_MASK, af);
372         snd_soc_component_update_bits(component, WM8737_CLOCKING,
373                             WM8737_USB_MODE | WM8737_CLKDIV2 | WM8737_SR_MASK,
374                             clocking);
375 
376         return 0;
377 }
378 
379 static int wm8737_set_dai_sysclk(struct snd_soc_dai *codec_dai,
380                                  int clk_id, unsigned int freq, int dir)
381 {
382         struct snd_soc_component *component = codec_dai->component;
383         struct wm8737_priv *wm8737 = snd_soc_component_get_drvdata(component);
384         int i;
385 
386         for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
387                 if (freq == coeff_div[i].mclk ||
388                     freq == coeff_div[i].mclk * 2) {
389                         wm8737->mclk = freq;
390                         return 0;
391                 }
392         }
393 
394         dev_err(component->dev, "MCLK rate %dHz not supported\n", freq);
395 
396         return -EINVAL;
397 }
398 
399 
400 static int wm8737_set_dai_fmt(struct snd_soc_dai *codec_dai,
401                 unsigned int fmt)
402 {
403         struct snd_soc_component *component = codec_dai->component;
404         u16 af = 0;
405 
406         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
407         case SND_SOC_DAIFMT_CBM_CFM:
408                 af |= WM8737_MS;
409                 break;
410         case SND_SOC_DAIFMT_CBS_CFS:
411                 break;
412         default:
413                 return -EINVAL;
414         }
415 
416         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
417         case SND_SOC_DAIFMT_I2S:
418                 af |= 0x2;
419                 break;
420         case SND_SOC_DAIFMT_RIGHT_J:
421                 break;
422         case SND_SOC_DAIFMT_LEFT_J:
423                 af |= 0x1;
424                 break;
425         case SND_SOC_DAIFMT_DSP_A:
426                 af |= 0x3;
427                 break;
428         case SND_SOC_DAIFMT_DSP_B:
429                 af |= 0x13;
430                 break;
431         default:
432                 return -EINVAL;
433         }
434 
435         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
436         case SND_SOC_DAIFMT_NB_NF:
437                 break;
438         case SND_SOC_DAIFMT_NB_IF:
439                 af |= WM8737_LRP;
440                 break;
441         default:
442                 return -EINVAL;
443         }
444 
445         snd_soc_component_update_bits(component, WM8737_AUDIO_FORMAT,
446                             WM8737_FORMAT_MASK | WM8737_LRP | WM8737_MS, af);
447 
448         return 0;
449 }
450 
451 static int wm8737_set_bias_level(struct snd_soc_component *component,
452                                  enum snd_soc_bias_level level)
453 {
454         struct wm8737_priv *wm8737 = snd_soc_component_get_drvdata(component);
455         int ret;
456 
457         switch (level) {
458         case SND_SOC_BIAS_ON:
459                 break;
460 
461         case SND_SOC_BIAS_PREPARE:
462                 /* VMID at 2*75k */
463                 snd_soc_component_update_bits(component, WM8737_MISC_BIAS_CONTROL,
464                                     WM8737_VMIDSEL_MASK, 0);
465                 break;
466 
467         case SND_SOC_BIAS_STANDBY:
468                 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
469                         ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
470                                                     wm8737->supplies);
471                         if (ret != 0) {
472                                 dev_err(component->dev,
473                                         "Failed to enable supplies: %d\n",
474                                         ret);
475                                 return ret;
476                         }
477 
478                         regcache_sync(wm8737->regmap);
479 
480                         /* Fast VMID ramp at 2*2.5k */
481                         snd_soc_component_update_bits(component, WM8737_MISC_BIAS_CONTROL,
482                                             WM8737_VMIDSEL_MASK,
483                                             2 << WM8737_VMIDSEL_SHIFT);
484 
485                         /* Bring VMID up */
486                         snd_soc_component_update_bits(component, WM8737_POWER_MANAGEMENT,
487                                             WM8737_VMID_MASK |
488                                             WM8737_VREF_MASK,
489                                             WM8737_VMID_MASK |
490                                             WM8737_VREF_MASK);
491 
492                         msleep(500);
493                 }
494 
495                 /* VMID at 2*300k */
496                 snd_soc_component_update_bits(component, WM8737_MISC_BIAS_CONTROL,
497                                     WM8737_VMIDSEL_MASK,
498                                     1 << WM8737_VMIDSEL_SHIFT);
499 
500                 break;
501 
502         case SND_SOC_BIAS_OFF:
503                 snd_soc_component_update_bits(component, WM8737_POWER_MANAGEMENT,
504                                     WM8737_VMID_MASK | WM8737_VREF_MASK, 0);
505 
506                 regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies),
507                                        wm8737->supplies);
508                 break;
509         }
510 
511         return 0;
512 }
513 
514 #define WM8737_RATES SNDRV_PCM_RATE_8000_96000
515 
516 #define WM8737_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
517                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
518 
519 static const struct snd_soc_dai_ops wm8737_dai_ops = {
520         .hw_params      = wm8737_hw_params,
521         .set_sysclk     = wm8737_set_dai_sysclk,
522         .set_fmt        = wm8737_set_dai_fmt,
523 };
524 
525 static struct snd_soc_dai_driver wm8737_dai = {
526         .name = "wm8737",
527         .capture = {
528                 .stream_name = "Capture",
529                 .channels_min = 2,  /* Mono modes not yet supported */
530                 .channels_max = 2,
531                 .rates = WM8737_RATES,
532                 .formats = WM8737_FORMATS,
533         },
534         .ops = &wm8737_dai_ops,
535 };
536 
537 static int wm8737_probe(struct snd_soc_component *component)
538 {
539         struct wm8737_priv *wm8737 = snd_soc_component_get_drvdata(component);
540         int ret;
541 
542         ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
543                                     wm8737->supplies);
544         if (ret != 0) {
545                 dev_err(component->dev, "Failed to enable supplies: %d\n", ret);
546                 goto err_get;
547         }
548 
549         ret = wm8737_reset(component);
550         if (ret < 0) {
551                 dev_err(component->dev, "Failed to issue reset\n");
552                 goto err_enable;
553         }
554 
555         snd_soc_component_update_bits(component, WM8737_LEFT_PGA_VOLUME, WM8737_LVU,
556                             WM8737_LVU);
557         snd_soc_component_update_bits(component, WM8737_RIGHT_PGA_VOLUME, WM8737_RVU,
558                             WM8737_RVU);
559 
560         snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
561 
562         /* Bias level configuration will have done an extra enable */
563         regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
564 
565         return 0;
566 
567 err_enable:
568         regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
569 err_get:
570         return ret;
571 }
572 
573 static const struct snd_soc_component_driver soc_component_dev_wm8737 = {
574         .probe                  = wm8737_probe,
575         .set_bias_level         = wm8737_set_bias_level,
576         .controls               = wm8737_snd_controls,
577         .num_controls           = ARRAY_SIZE(wm8737_snd_controls),
578         .dapm_widgets           = wm8737_dapm_widgets,
579         .num_dapm_widgets       = ARRAY_SIZE(wm8737_dapm_widgets),
580         .dapm_routes            = intercon,
581         .num_dapm_routes        = ARRAY_SIZE(intercon),
582         .suspend_bias_off       = 1,
583         .idle_bias_on           = 1,
584         .use_pmdown_time        = 1,
585         .endianness             = 1,
586         .non_legacy_dai_naming  = 1,
587 };
588 
589 static const struct of_device_id wm8737_of_match[] = {
590         { .compatible = "wlf,wm8737", },
591         { }
592 };
593 
594 MODULE_DEVICE_TABLE(of, wm8737_of_match);
595 
596 static const struct regmap_config wm8737_regmap = {
597         .reg_bits = 7,
598         .val_bits = 9,
599         .max_register = WM8737_MAX_REGISTER,
600 
601         .reg_defaults = wm8737_reg_defaults,
602         .num_reg_defaults = ARRAY_SIZE(wm8737_reg_defaults),
603         .cache_type = REGCACHE_RBTREE,
604 
605         .volatile_reg = wm8737_volatile,
606 };
607 
608 #if IS_ENABLED(CONFIG_I2C)
609 static int wm8737_i2c_probe(struct i2c_client *i2c,
610                             const struct i2c_device_id *id)
611 {
612         struct wm8737_priv *wm8737;
613         int ret, i;
614 
615         wm8737 = devm_kzalloc(&i2c->dev, sizeof(struct wm8737_priv),
616                               GFP_KERNEL);
617         if (wm8737 == NULL)
618                 return -ENOMEM;
619 
620         for (i = 0; i < ARRAY_SIZE(wm8737->supplies); i++)
621                 wm8737->supplies[i].supply = wm8737_supply_names[i];
622 
623         ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8737->supplies),
624                                       wm8737->supplies);
625         if (ret != 0) {
626                 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
627                 return ret;
628         }
629 
630         wm8737->regmap = devm_regmap_init_i2c(i2c, &wm8737_regmap);
631         if (IS_ERR(wm8737->regmap))
632                 return PTR_ERR(wm8737->regmap);
633 
634         i2c_set_clientdata(i2c, wm8737);
635 
636         ret = devm_snd_soc_register_component(&i2c->dev,
637                                 &soc_component_dev_wm8737, &wm8737_dai, 1);
638 
639         return ret;
640 
641 }
642 
643 static const struct i2c_device_id wm8737_i2c_id[] = {
644         { "wm8737", 0 },
645         { }
646 };
647 MODULE_DEVICE_TABLE(i2c, wm8737_i2c_id);
648 
649 static struct i2c_driver wm8737_i2c_driver = {
650         .driver = {
651                 .name = "wm8737",
652                 .of_match_table = wm8737_of_match,
653         },
654         .probe =    wm8737_i2c_probe,
655         .id_table = wm8737_i2c_id,
656 };
657 #endif
658 
659 #if defined(CONFIG_SPI_MASTER)
660 static int wm8737_spi_probe(struct spi_device *spi)
661 {
662         struct wm8737_priv *wm8737;
663         int ret, i;
664 
665         wm8737 = devm_kzalloc(&spi->dev, sizeof(struct wm8737_priv),
666                               GFP_KERNEL);
667         if (wm8737 == NULL)
668                 return -ENOMEM;
669 
670         for (i = 0; i < ARRAY_SIZE(wm8737->supplies); i++)
671                 wm8737->supplies[i].supply = wm8737_supply_names[i];
672 
673         ret = devm_regulator_bulk_get(&spi->dev, ARRAY_SIZE(wm8737->supplies),
674                                       wm8737->supplies);
675         if (ret != 0) {
676                 dev_err(&spi->dev, "Failed to request supplies: %d\n", ret);
677                 return ret;
678         }
679 
680         wm8737->regmap = devm_regmap_init_spi(spi, &wm8737_regmap);
681         if (IS_ERR(wm8737->regmap))
682                 return PTR_ERR(wm8737->regmap);
683 
684         spi_set_drvdata(spi, wm8737);
685 
686         ret = devm_snd_soc_register_component(&spi->dev,
687                                 &soc_component_dev_wm8737, &wm8737_dai, 1);
688 
689         return ret;
690 }
691 
692 static struct spi_driver wm8737_spi_driver = {
693         .driver = {
694                 .name   = "wm8737",
695                 .of_match_table = wm8737_of_match,
696         },
697         .probe          = wm8737_spi_probe,
698 };
699 #endif /* CONFIG_SPI_MASTER */
700 
701 static int __init wm8737_modinit(void)
702 {
703         int ret;
704 #if IS_ENABLED(CONFIG_I2C)
705         ret = i2c_add_driver(&wm8737_i2c_driver);
706         if (ret != 0) {
707                 printk(KERN_ERR "Failed to register WM8737 I2C driver: %d\n",
708                        ret);
709         }
710 #endif
711 #if defined(CONFIG_SPI_MASTER)
712         ret = spi_register_driver(&wm8737_spi_driver);
713         if (ret != 0) {
714                 printk(KERN_ERR "Failed to register WM8737 SPI driver: %d\n",
715                        ret);
716         }
717 #endif
718         return 0;
719 }
720 module_init(wm8737_modinit);
721 
722 static void __exit wm8737_exit(void)
723 {
724 #if defined(CONFIG_SPI_MASTER)
725         spi_unregister_driver(&wm8737_spi_driver);
726 #endif
727 #if IS_ENABLED(CONFIG_I2C)
728         i2c_del_driver(&wm8737_i2c_driver);
729 #endif
730 }
731 module_exit(wm8737_exit);
732 
733 MODULE_DESCRIPTION("ASoC WM8737 driver");
734 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
735 MODULE_LICENSE("GPL");
736 

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