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TOMOYO Linux Cross Reference
Linux/sound/soc/codecs/wm8955.h

Version: ~ [ linux-5.3 ] ~ [ linux-5.2.15 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.73 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.144 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.193 ] ~ [ linux-4.8.17 ] ~ [ linux-4.7.10 ] ~ [ linux-4.6.7 ] ~ [ linux-4.5.7 ] ~ [ linux-4.4.193 ] ~ [ linux-4.3.6 ] ~ [ linux-4.2.8 ] ~ [ linux-4.1.52 ] ~ [ linux-4.0.9 ] ~ [ linux-3.19.8 ] ~ [ linux-3.18.140 ] ~ [ linux-3.17.8 ] ~ [ linux-3.16.73 ] ~ [ linux-3.15.10 ] ~ [ linux-3.14.79 ] ~ [ linux-3.13.11 ] ~ [ linux-3.12.74 ] ~ [ linux-3.11.10 ] ~ [ linux-3.10.108 ] ~ [ linux-3.9.11 ] ~ [ linux-3.8.13 ] ~ [ linux-3.7.10 ] ~ [ linux-3.6.11 ] ~ [ linux-3.5.7 ] ~ [ linux-3.4.113 ] ~ [ linux-3.3.8 ] ~ [ linux-3.2.102 ] ~ [ linux-3.1.10 ] ~ [ linux-3.0.101 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.5 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 /*
  2  * wm8955.h  --  WM8904 ASoC driver
  3  *
  4  * Copyright 2009 Wolfson Microelectronics, plc
  5  *
  6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7  *
  8  * This program is free software; you can redistribute it and/or modify
  9  * it under the terms of the GNU General Public License version 2 as
 10  * published by the Free Software Foundation.
 11  */
 12 
 13 #ifndef _WM8955_H
 14 #define _WM8955_H
 15 
 16 #define WM8955_CLK_MCLK 1
 17 
 18 /*
 19  * Register values.
 20  */
 21 #define WM8955_LOUT1_VOLUME                     0x02
 22 #define WM8955_ROUT1_VOLUME                     0x03
 23 #define WM8955_DAC_CONTROL                      0x05
 24 #define WM8955_AUDIO_INTERFACE                  0x07
 25 #define WM8955_SAMPLE_RATE                      0x08
 26 #define WM8955_LEFT_DAC_VOLUME                  0x0A
 27 #define WM8955_RIGHT_DAC_VOLUME                 0x0B
 28 #define WM8955_BASS_CONTROL                     0x0C
 29 #define WM8955_TREBLE_CONTROL                   0x0D
 30 #define WM8955_RESET                            0x0F
 31 #define WM8955_ADDITIONAL_CONTROL_1             0x17
 32 #define WM8955_ADDITIONAL_CONTROL_2             0x18
 33 #define WM8955_POWER_MANAGEMENT_1               0x19
 34 #define WM8955_POWER_MANAGEMENT_2               0x1A
 35 #define WM8955_ADDITIONAL_CONTROL_3             0x1B
 36 #define WM8955_LEFT_OUT_MIX_1                   0x22
 37 #define WM8955_LEFT_OUT_MIX_2                   0x23
 38 #define WM8955_RIGHT_OUT_MIX_1                  0x24
 39 #define WM8955_RIGHT_OUT_MIX_2                  0x25
 40 #define WM8955_MONO_OUT_MIX_1                   0x26
 41 #define WM8955_MONO_OUT_MIX_2                   0x27
 42 #define WM8955_LOUT2_VOLUME                     0x28
 43 #define WM8955_ROUT2_VOLUME                     0x29
 44 #define WM8955_MONOOUT_VOLUME                   0x2A
 45 #define WM8955_CLOCKING_PLL                     0x2B
 46 #define WM8955_PLL_CONTROL_1                    0x2C
 47 #define WM8955_PLL_CONTROL_2                    0x2D
 48 #define WM8955_PLL_CONTROL_3                    0x2E
 49 #define WM8955_PLL_CONTROL_4                    0x3B
 50 
 51 #define WM8955_REGISTER_COUNT                   29
 52 #define WM8955_MAX_REGISTER                     0x3B
 53 
 54 /*
 55  * Field Definitions.
 56  */
 57 
 58 /*
 59  * R2 (0x02) - LOUT1 volume
 60  */
 61 #define WM8955_LO1VU                            0x0100  /* LO1VU */
 62 #define WM8955_LO1VU_MASK                       0x0100  /* LO1VU */
 63 #define WM8955_LO1VU_SHIFT                           8  /* LO1VU */
 64 #define WM8955_LO1VU_WIDTH                           1  /* LO1VU */
 65 #define WM8955_LO1ZC                            0x0080  /* LO1ZC */
 66 #define WM8955_LO1ZC_MASK                       0x0080  /* LO1ZC */
 67 #define WM8955_LO1ZC_SHIFT                           7  /* LO1ZC */
 68 #define WM8955_LO1ZC_WIDTH                           1  /* LO1ZC */
 69 #define WM8955_LOUTVOL_MASK                     0x007F  /* LOUTVOL - [6:0] */
 70 #define WM8955_LOUTVOL_SHIFT                         0  /* LOUTVOL - [6:0] */
 71 #define WM8955_LOUTVOL_WIDTH                         7  /* LOUTVOL - [6:0] */
 72 
 73 /*
 74  * R3 (0x03) - ROUT1 volume
 75  */
 76 #define WM8955_RO1VU                            0x0100  /* RO1VU */
 77 #define WM8955_RO1VU_MASK                       0x0100  /* RO1VU */
 78 #define WM8955_RO1VU_SHIFT                           8  /* RO1VU */
 79 #define WM8955_RO1VU_WIDTH                           1  /* RO1VU */
 80 #define WM8955_RO1ZC                            0x0080  /* RO1ZC */
 81 #define WM8955_RO1ZC_MASK                       0x0080  /* RO1ZC */
 82 #define WM8955_RO1ZC_SHIFT                           7  /* RO1ZC */
 83 #define WM8955_RO1ZC_WIDTH                           1  /* RO1ZC */
 84 #define WM8955_ROUTVOL_MASK                     0x007F  /* ROUTVOL - [6:0] */
 85 #define WM8955_ROUTVOL_SHIFT                         0  /* ROUTVOL - [6:0] */
 86 #define WM8955_ROUTVOL_WIDTH                         7  /* ROUTVOL - [6:0] */
 87 
 88 /*
 89  * R5 (0x05) - DAC Control
 90  */
 91 #define WM8955_DAT                              0x0080  /* DAT */
 92 #define WM8955_DAT_MASK                         0x0080  /* DAT */
 93 #define WM8955_DAT_SHIFT                             7  /* DAT */
 94 #define WM8955_DAT_WIDTH                             1  /* DAT */
 95 #define WM8955_DACMU                            0x0008  /* DACMU */
 96 #define WM8955_DACMU_MASK                       0x0008  /* DACMU */
 97 #define WM8955_DACMU_SHIFT                           3  /* DACMU */
 98 #define WM8955_DACMU_WIDTH                           1  /* DACMU */
 99 #define WM8955_DEEMPH_MASK                      0x0006  /* DEEMPH - [2:1] */
100 #define WM8955_DEEMPH_SHIFT                          1  /* DEEMPH - [2:1] */
101 #define WM8955_DEEMPH_WIDTH                          2  /* DEEMPH - [2:1] */
102 
103 /*
104  * R7 (0x07) - Audio Interface
105  */
106 #define WM8955_BCLKINV                          0x0080  /* BCLKINV */
107 #define WM8955_BCLKINV_MASK                     0x0080  /* BCLKINV */
108 #define WM8955_BCLKINV_SHIFT                         7  /* BCLKINV */
109 #define WM8955_BCLKINV_WIDTH                         1  /* BCLKINV */
110 #define WM8955_MS                               0x0040  /* MS */
111 #define WM8955_MS_MASK                          0x0040  /* MS */
112 #define WM8955_MS_SHIFT                              6  /* MS */
113 #define WM8955_MS_WIDTH                              1  /* MS */
114 #define WM8955_LRSWAP                           0x0020  /* LRSWAP */
115 #define WM8955_LRSWAP_MASK                      0x0020  /* LRSWAP */
116 #define WM8955_LRSWAP_SHIFT                          5  /* LRSWAP */
117 #define WM8955_LRSWAP_WIDTH                          1  /* LRSWAP */
118 #define WM8955_LRP                              0x0010  /* LRP */
119 #define WM8955_LRP_MASK                         0x0010  /* LRP */
120 #define WM8955_LRP_SHIFT                             4  /* LRP */
121 #define WM8955_LRP_WIDTH                             1  /* LRP */
122 #define WM8955_WL_MASK                          0x000C  /* WL - [3:2] */
123 #define WM8955_WL_SHIFT                              2  /* WL - [3:2] */
124 #define WM8955_WL_WIDTH                              2  /* WL - [3:2] */
125 #define WM8955_FORMAT_MASK                      0x0003  /* FORMAT - [1:0] */
126 #define WM8955_FORMAT_SHIFT                          0  /* FORMAT - [1:0] */
127 #define WM8955_FORMAT_WIDTH                          2  /* FORMAT - [1:0] */
128 
129 /*
130  * R8 (0x08) - Sample Rate
131  */
132 #define WM8955_BCLKDIV2                         0x0080  /* BCLKDIV2 */
133 #define WM8955_BCLKDIV2_MASK                    0x0080  /* BCLKDIV2 */
134 #define WM8955_BCLKDIV2_SHIFT                        7  /* BCLKDIV2 */
135 #define WM8955_BCLKDIV2_WIDTH                        1  /* BCLKDIV2 */
136 #define WM8955_MCLKDIV2                         0x0040  /* MCLKDIV2 */
137 #define WM8955_MCLKDIV2_MASK                    0x0040  /* MCLKDIV2 */
138 #define WM8955_MCLKDIV2_SHIFT                        6  /* MCLKDIV2 */
139 #define WM8955_MCLKDIV2_WIDTH                        1  /* MCLKDIV2 */
140 #define WM8955_SR_MASK                          0x003E  /* SR - [5:1] */
141 #define WM8955_SR_SHIFT                              1  /* SR - [5:1] */
142 #define WM8955_SR_WIDTH                              5  /* SR - [5:1] */
143 #define WM8955_USB                              0x0001  /* USB */
144 #define WM8955_USB_MASK                         0x0001  /* USB */
145 #define WM8955_USB_SHIFT                             0  /* USB */
146 #define WM8955_USB_WIDTH                             1  /* USB */
147 
148 /*
149  * R10 (0x0A) - Left DAC volume
150  */
151 #define WM8955_LDVU                             0x0100  /* LDVU */
152 #define WM8955_LDVU_MASK                        0x0100  /* LDVU */
153 #define WM8955_LDVU_SHIFT                            8  /* LDVU */
154 #define WM8955_LDVU_WIDTH                            1  /* LDVU */
155 #define WM8955_LDACVOL_MASK                     0x00FF  /* LDACVOL - [7:0] */
156 #define WM8955_LDACVOL_SHIFT                         0  /* LDACVOL - [7:0] */
157 #define WM8955_LDACVOL_WIDTH                         8  /* LDACVOL - [7:0] */
158 
159 /*
160  * R11 (0x0B) - Right DAC volume
161  */
162 #define WM8955_RDVU                             0x0100  /* RDVU */
163 #define WM8955_RDVU_MASK                        0x0100  /* RDVU */
164 #define WM8955_RDVU_SHIFT                            8  /* RDVU */
165 #define WM8955_RDVU_WIDTH                            1  /* RDVU */
166 #define WM8955_RDACVOL_MASK                     0x00FF  /* RDACVOL - [7:0] */
167 #define WM8955_RDACVOL_SHIFT                         0  /* RDACVOL - [7:0] */
168 #define WM8955_RDACVOL_WIDTH                         8  /* RDACVOL - [7:0] */
169 
170 /*
171  * R12 (0x0C) - Bass control
172  */
173 #define WM8955_BB                               0x0080  /* BB */
174 #define WM8955_BB_MASK                          0x0080  /* BB */
175 #define WM8955_BB_SHIFT                              7  /* BB */
176 #define WM8955_BB_WIDTH                              1  /* BB */
177 #define WM8955_BC                               0x0040  /* BC */
178 #define WM8955_BC_MASK                          0x0040  /* BC */
179 #define WM8955_BC_SHIFT                              6  /* BC */
180 #define WM8955_BC_WIDTH                              1  /* BC */
181 #define WM8955_BASS_MASK                        0x000F  /* BASS - [3:0] */
182 #define WM8955_BASS_SHIFT                            0  /* BASS - [3:0] */
183 #define WM8955_BASS_WIDTH                            4  /* BASS - [3:0] */
184 
185 /*
186  * R13 (0x0D) - Treble control
187  */
188 #define WM8955_TC                               0x0040  /* TC */
189 #define WM8955_TC_MASK                          0x0040  /* TC */
190 #define WM8955_TC_SHIFT                              6  /* TC */
191 #define WM8955_TC_WIDTH                              1  /* TC */
192 #define WM8955_TRBL_MASK                        0x000F  /* TRBL - [3:0] */
193 #define WM8955_TRBL_SHIFT                            0  /* TRBL - [3:0] */
194 #define WM8955_TRBL_WIDTH                            4  /* TRBL - [3:0] */
195 
196 /*
197  * R15 (0x0F) - Reset
198  */
199 #define WM8955_RESET_MASK                       0x01FF  /* RESET - [8:0] */
200 #define WM8955_RESET_SHIFT                           0  /* RESET - [8:0] */
201 #define WM8955_RESET_WIDTH                           9  /* RESET - [8:0] */
202 
203 /*
204  * R23 (0x17) - Additional control (1)
205  */
206 #define WM8955_TSDEN                            0x0100  /* TSDEN */
207 #define WM8955_TSDEN_MASK                       0x0100  /* TSDEN */
208 #define WM8955_TSDEN_SHIFT                           8  /* TSDEN */
209 #define WM8955_TSDEN_WIDTH                           1  /* TSDEN */
210 #define WM8955_VSEL_MASK                        0x00C0  /* VSEL - [7:6] */
211 #define WM8955_VSEL_SHIFT                            6  /* VSEL - [7:6] */
212 #define WM8955_VSEL_WIDTH                            2  /* VSEL - [7:6] */
213 #define WM8955_DMONOMIX_MASK                    0x0030  /* DMONOMIX - [5:4] */
214 #define WM8955_DMONOMIX_SHIFT                        4  /* DMONOMIX - [5:4] */
215 #define WM8955_DMONOMIX_WIDTH                        2  /* DMONOMIX - [5:4] */
216 #define WM8955_DACINV                           0x0002  /* DACINV */
217 #define WM8955_DACINV_MASK                      0x0002  /* DACINV */
218 #define WM8955_DACINV_SHIFT                          1  /* DACINV */
219 #define WM8955_DACINV_WIDTH                          1  /* DACINV */
220 #define WM8955_TOEN                             0x0001  /* TOEN */
221 #define WM8955_TOEN_MASK                        0x0001  /* TOEN */
222 #define WM8955_TOEN_SHIFT                            0  /* TOEN */
223 #define WM8955_TOEN_WIDTH                            1  /* TOEN */
224 
225 /*
226  * R24 (0x18) - Additional control (2)
227  */
228 #define WM8955_OUT3SW_MASK                      0x0180  /* OUT3SW - [8:7] */
229 #define WM8955_OUT3SW_SHIFT                          7  /* OUT3SW - [8:7] */
230 #define WM8955_OUT3SW_WIDTH                          2  /* OUT3SW - [8:7] */
231 #define WM8955_ROUT2INV                         0x0010  /* ROUT2INV */
232 #define WM8955_ROUT2INV_MASK                    0x0010  /* ROUT2INV */
233 #define WM8955_ROUT2INV_SHIFT                        4  /* ROUT2INV */
234 #define WM8955_ROUT2INV_WIDTH                        1  /* ROUT2INV */
235 #define WM8955_DACOSR                           0x0001  /* DACOSR */
236 #define WM8955_DACOSR_MASK                      0x0001  /* DACOSR */
237 #define WM8955_DACOSR_SHIFT                          0  /* DACOSR */
238 #define WM8955_DACOSR_WIDTH                          1  /* DACOSR */
239 
240 /*
241  * R25 (0x19) - Power Management (1)
242  */
243 #define WM8955_VMIDSEL_MASK                     0x0180  /* VMIDSEL - [8:7] */
244 #define WM8955_VMIDSEL_SHIFT                         7  /* VMIDSEL - [8:7] */
245 #define WM8955_VMIDSEL_WIDTH                         2  /* VMIDSEL - [8:7] */
246 #define WM8955_VREF                             0x0040  /* VREF */
247 #define WM8955_VREF_MASK                        0x0040  /* VREF */
248 #define WM8955_VREF_SHIFT                            6  /* VREF */
249 #define WM8955_VREF_WIDTH                            1  /* VREF */
250 #define WM8955_DIGENB                           0x0001  /* DIGENB */
251 #define WM8955_DIGENB_MASK                      0x0001  /* DIGENB */
252 #define WM8955_DIGENB_SHIFT                          0  /* DIGENB */
253 #define WM8955_DIGENB_WIDTH                          1  /* DIGENB */
254 
255 /*
256  * R26 (0x1A) - Power Management (2)
257  */
258 #define WM8955_DACL                             0x0100  /* DACL */
259 #define WM8955_DACL_MASK                        0x0100  /* DACL */
260 #define WM8955_DACL_SHIFT                            8  /* DACL */
261 #define WM8955_DACL_WIDTH                            1  /* DACL */
262 #define WM8955_DACR                             0x0080  /* DACR */
263 #define WM8955_DACR_MASK                        0x0080  /* DACR */
264 #define WM8955_DACR_SHIFT                            7  /* DACR */
265 #define WM8955_DACR_WIDTH                            1  /* DACR */
266 #define WM8955_LOUT1                            0x0040  /* LOUT1 */
267 #define WM8955_LOUT1_MASK                       0x0040  /* LOUT1 */
268 #define WM8955_LOUT1_SHIFT                           6  /* LOUT1 */
269 #define WM8955_LOUT1_WIDTH                           1  /* LOUT1 */
270 #define WM8955_ROUT1                            0x0020  /* ROUT1 */
271 #define WM8955_ROUT1_MASK                       0x0020  /* ROUT1 */
272 #define WM8955_ROUT1_SHIFT                           5  /* ROUT1 */
273 #define WM8955_ROUT1_WIDTH                           1  /* ROUT1 */
274 #define WM8955_LOUT2                            0x0010  /* LOUT2 */
275 #define WM8955_LOUT2_MASK                       0x0010  /* LOUT2 */
276 #define WM8955_LOUT2_SHIFT                           4  /* LOUT2 */
277 #define WM8955_LOUT2_WIDTH                           1  /* LOUT2 */
278 #define WM8955_ROUT2                            0x0008  /* ROUT2 */
279 #define WM8955_ROUT2_MASK                       0x0008  /* ROUT2 */
280 #define WM8955_ROUT2_SHIFT                           3  /* ROUT2 */
281 #define WM8955_ROUT2_WIDTH                           1  /* ROUT2 */
282 #define WM8955_MONO                             0x0004  /* MONO */
283 #define WM8955_MONO_MASK                        0x0004  /* MONO */
284 #define WM8955_MONO_SHIFT                            2  /* MONO */
285 #define WM8955_MONO_WIDTH                            1  /* MONO */
286 #define WM8955_OUT3                             0x0002  /* OUT3 */
287 #define WM8955_OUT3_MASK                        0x0002  /* OUT3 */
288 #define WM8955_OUT3_SHIFT                            1  /* OUT3 */
289 #define WM8955_OUT3_WIDTH                            1  /* OUT3 */
290 
291 /*
292  * R27 (0x1B) - Additional Control (3)
293  */
294 #define WM8955_VROI                             0x0040  /* VROI */
295 #define WM8955_VROI_MASK                        0x0040  /* VROI */
296 #define WM8955_VROI_SHIFT                            6  /* VROI */
297 #define WM8955_VROI_WIDTH                            1  /* VROI */
298 
299 /*
300  * R34 (0x22) - Left out Mix (1)
301  */
302 #define WM8955_LD2LO                            0x0100  /* LD2LO */
303 #define WM8955_LD2LO_MASK                       0x0100  /* LD2LO */
304 #define WM8955_LD2LO_SHIFT                           8  /* LD2LO */
305 #define WM8955_LD2LO_WIDTH                           1  /* LD2LO */
306 #define WM8955_LI2LO                            0x0080  /* LI2LO */
307 #define WM8955_LI2LO_MASK                       0x0080  /* LI2LO */
308 #define WM8955_LI2LO_SHIFT                           7  /* LI2LO */
309 #define WM8955_LI2LO_WIDTH                           1  /* LI2LO */
310 #define WM8955_LI2LOVOL_MASK                    0x0070  /* LI2LOVOL - [6:4] */
311 #define WM8955_LI2LOVOL_SHIFT                        4  /* LI2LOVOL - [6:4] */
312 #define WM8955_LI2LOVOL_WIDTH                        3  /* LI2LOVOL - [6:4] */
313 
314 /*
315  * R35 (0x23) - Left out Mix (2)
316  */
317 #define WM8955_RD2LO                            0x0100  /* RD2LO */
318 #define WM8955_RD2LO_MASK                       0x0100  /* RD2LO */
319 #define WM8955_RD2LO_SHIFT                           8  /* RD2LO */
320 #define WM8955_RD2LO_WIDTH                           1  /* RD2LO */
321 #define WM8955_RI2LO                            0x0080  /* RI2LO */
322 #define WM8955_RI2LO_MASK                       0x0080  /* RI2LO */
323 #define WM8955_RI2LO_SHIFT                           7  /* RI2LO */
324 #define WM8955_RI2LO_WIDTH                           1  /* RI2LO */
325 #define WM8955_RI2LOVOL_MASK                    0x0070  /* RI2LOVOL - [6:4] */
326 #define WM8955_RI2LOVOL_SHIFT                        4  /* RI2LOVOL - [6:4] */
327 #define WM8955_RI2LOVOL_WIDTH                        3  /* RI2LOVOL - [6:4] */
328 
329 /*
330  * R36 (0x24) - Right out Mix (1)
331  */
332 #define WM8955_LD2RO                            0x0100  /* LD2RO */
333 #define WM8955_LD2RO_MASK                       0x0100  /* LD2RO */
334 #define WM8955_LD2RO_SHIFT                           8  /* LD2RO */
335 #define WM8955_LD2RO_WIDTH                           1  /* LD2RO */
336 #define WM8955_LI2RO                            0x0080  /* LI2RO */
337 #define WM8955_LI2RO_MASK                       0x0080  /* LI2RO */
338 #define WM8955_LI2RO_SHIFT                           7  /* LI2RO */
339 #define WM8955_LI2RO_WIDTH                           1  /* LI2RO */
340 #define WM8955_LI2ROVOL_MASK                    0x0070  /* LI2ROVOL - [6:4] */
341 #define WM8955_LI2ROVOL_SHIFT                        4  /* LI2ROVOL - [6:4] */
342 #define WM8955_LI2ROVOL_WIDTH                        3  /* LI2ROVOL - [6:4] */
343 
344 /*
345  * R37 (0x25) - Right Out Mix (2)
346  */
347 #define WM8955_RD2RO                            0x0100  /* RD2RO */
348 #define WM8955_RD2RO_MASK                       0x0100  /* RD2RO */
349 #define WM8955_RD2RO_SHIFT                           8  /* RD2RO */
350 #define WM8955_RD2RO_WIDTH                           1  /* RD2RO */
351 #define WM8955_RI2RO                            0x0080  /* RI2RO */
352 #define WM8955_RI2RO_MASK                       0x0080  /* RI2RO */
353 #define WM8955_RI2RO_SHIFT                           7  /* RI2RO */
354 #define WM8955_RI2RO_WIDTH                           1  /* RI2RO */
355 #define WM8955_RI2ROVOL_MASK                    0x0070  /* RI2ROVOL - [6:4] */
356 #define WM8955_RI2ROVOL_SHIFT                        4  /* RI2ROVOL - [6:4] */
357 #define WM8955_RI2ROVOL_WIDTH                        3  /* RI2ROVOL - [6:4] */
358 
359 /*
360  * R38 (0x26) - Mono out Mix (1)
361  */
362 #define WM8955_LD2MO                            0x0100  /* LD2MO */
363 #define WM8955_LD2MO_MASK                       0x0100  /* LD2MO */
364 #define WM8955_LD2MO_SHIFT                           8  /* LD2MO */
365 #define WM8955_LD2MO_WIDTH                           1  /* LD2MO */
366 #define WM8955_LI2MO                            0x0080  /* LI2MO */
367 #define WM8955_LI2MO_MASK                       0x0080  /* LI2MO */
368 #define WM8955_LI2MO_SHIFT                           7  /* LI2MO */
369 #define WM8955_LI2MO_WIDTH                           1  /* LI2MO */
370 #define WM8955_LI2MOVOL_MASK                    0x0070  /* LI2MOVOL - [6:4] */
371 #define WM8955_LI2MOVOL_SHIFT                        4  /* LI2MOVOL - [6:4] */
372 #define WM8955_LI2MOVOL_WIDTH                        3  /* LI2MOVOL - [6:4] */
373 #define WM8955_DMEN                             0x0001  /* DMEN */
374 #define WM8955_DMEN_MASK                        0x0001  /* DMEN */
375 #define WM8955_DMEN_SHIFT                            0  /* DMEN */
376 #define WM8955_DMEN_WIDTH                            1  /* DMEN */
377 
378 /*
379  * R39 (0x27) - Mono out Mix (2)
380  */
381 #define WM8955_RD2MO                            0x0100  /* RD2MO */
382 #define WM8955_RD2MO_MASK                       0x0100  /* RD2MO */
383 #define WM8955_RD2MO_SHIFT                           8  /* RD2MO */
384 #define WM8955_RD2MO_WIDTH                           1  /* RD2MO */
385 #define WM8955_RI2MO                            0x0080  /* RI2MO */
386 #define WM8955_RI2MO_MASK                       0x0080  /* RI2MO */
387 #define WM8955_RI2MO_SHIFT                           7  /* RI2MO */
388 #define WM8955_RI2MO_WIDTH                           1  /* RI2MO */
389 #define WM8955_RI2MOVOL_MASK                    0x0070  /* RI2MOVOL - [6:4] */
390 #define WM8955_RI2MOVOL_SHIFT                        4  /* RI2MOVOL - [6:4] */
391 #define WM8955_RI2MOVOL_WIDTH                        3  /* RI2MOVOL - [6:4] */
392 
393 /*
394  * R40 (0x28) - LOUT2 volume
395  */
396 #define WM8955_LO2VU                            0x0100  /* LO2VU */
397 #define WM8955_LO2VU_MASK                       0x0100  /* LO2VU */
398 #define WM8955_LO2VU_SHIFT                           8  /* LO2VU */
399 #define WM8955_LO2VU_WIDTH                           1  /* LO2VU */
400 #define WM8955_LO2ZC                            0x0080  /* LO2ZC */
401 #define WM8955_LO2ZC_MASK                       0x0080  /* LO2ZC */
402 #define WM8955_LO2ZC_SHIFT                           7  /* LO2ZC */
403 #define WM8955_LO2ZC_WIDTH                           1  /* LO2ZC */
404 #define WM8955_LOUT2VOL_MASK                    0x007F  /* LOUT2VOL - [6:0] */
405 #define WM8955_LOUT2VOL_SHIFT                        0  /* LOUT2VOL - [6:0] */
406 #define WM8955_LOUT2VOL_WIDTH                        7  /* LOUT2VOL - [6:0] */
407 
408 /*
409  * R41 (0x29) - ROUT2 volume
410  */
411 #define WM8955_RO2VU                            0x0100  /* RO2VU */
412 #define WM8955_RO2VU_MASK                       0x0100  /* RO2VU */
413 #define WM8955_RO2VU_SHIFT                           8  /* RO2VU */
414 #define WM8955_RO2VU_WIDTH                           1  /* RO2VU */
415 #define WM8955_RO2ZC                            0x0080  /* RO2ZC */
416 #define WM8955_RO2ZC_MASK                       0x0080  /* RO2ZC */
417 #define WM8955_RO2ZC_SHIFT                           7  /* RO2ZC */
418 #define WM8955_RO2ZC_WIDTH                           1  /* RO2ZC */
419 #define WM8955_ROUT2VOL_MASK                    0x007F  /* ROUT2VOL - [6:0] */
420 #define WM8955_ROUT2VOL_SHIFT                        0  /* ROUT2VOL - [6:0] */
421 #define WM8955_ROUT2VOL_WIDTH                        7  /* ROUT2VOL - [6:0] */
422 
423 /*
424  * R42 (0x2A) - MONOOUT volume
425  */
426 #define WM8955_MOZC                             0x0080  /* MOZC */
427 #define WM8955_MOZC_MASK                        0x0080  /* MOZC */
428 #define WM8955_MOZC_SHIFT                            7  /* MOZC */
429 #define WM8955_MOZC_WIDTH                            1  /* MOZC */
430 #define WM8955_MOUTVOL_MASK                     0x007F  /* MOUTVOL - [6:0] */
431 #define WM8955_MOUTVOL_SHIFT                         0  /* MOUTVOL - [6:0] */
432 #define WM8955_MOUTVOL_WIDTH                         7  /* MOUTVOL - [6:0] */
433 
434 /*
435  * R43 (0x2B) - Clocking / PLL
436  */
437 #define WM8955_MCLKSEL                          0x0100  /* MCLKSEL */
438 #define WM8955_MCLKSEL_MASK                     0x0100  /* MCLKSEL */
439 #define WM8955_MCLKSEL_SHIFT                         8  /* MCLKSEL */
440 #define WM8955_MCLKSEL_WIDTH                         1  /* MCLKSEL */
441 #define WM8955_PLLOUTDIV2                       0x0020  /* PLLOUTDIV2 */
442 #define WM8955_PLLOUTDIV2_MASK                  0x0020  /* PLLOUTDIV2 */
443 #define WM8955_PLLOUTDIV2_SHIFT                      5  /* PLLOUTDIV2 */
444 #define WM8955_PLLOUTDIV2_WIDTH                      1  /* PLLOUTDIV2 */
445 #define WM8955_PLL_RB                           0x0010  /* PLL_RB */
446 #define WM8955_PLL_RB_MASK                      0x0010  /* PLL_RB */
447 #define WM8955_PLL_RB_SHIFT                          4  /* PLL_RB */
448 #define WM8955_PLL_RB_WIDTH                          1  /* PLL_RB */
449 #define WM8955_PLLEN                            0x0008  /* PLLEN */
450 #define WM8955_PLLEN_MASK                       0x0008  /* PLLEN */
451 #define WM8955_PLLEN_SHIFT                           3  /* PLLEN */
452 #define WM8955_PLLEN_WIDTH                           1  /* PLLEN */
453 
454 /*
455  * R44 (0x2C) - PLL Control 1
456  */
457 #define WM8955_N_MASK                           0x01E0  /* N - [8:5] */
458 #define WM8955_N_SHIFT                               5  /* N - [8:5] */
459 #define WM8955_N_WIDTH                               4  /* N - [8:5] */
460 #define WM8955_K_21_18_MASK                     0x000F  /* K(21:18) - [3:0] */
461 #define WM8955_K_21_18_SHIFT                         0  /* K(21:18) - [3:0] */
462 #define WM8955_K_21_18_WIDTH                         4  /* K(21:18) - [3:0] */
463 
464 /*
465  * R45 (0x2D) - PLL Control 2
466  */
467 #define WM8955_K_17_9_MASK                      0x01FF  /* K(17:9) - [8:0] */
468 #define WM8955_K_17_9_SHIFT                          0  /* K(17:9) - [8:0] */
469 #define WM8955_K_17_9_WIDTH                          9  /* K(17:9) - [8:0] */
470 
471 /*
472  * R46 (0x2E) - PLL Control 3
473  */
474 #define WM8955_K_8_0_MASK                       0x01FF  /* K(8:0) - [8:0] */
475 #define WM8955_K_8_0_SHIFT                           0  /* K(8:0) - [8:0] */
476 #define WM8955_K_8_0_WIDTH                           9  /* K(8:0) - [8:0] */
477 
478 /*
479  * R59 (0x3B) - PLL Control 4
480  */
481 #define WM8955_KEN                              0x0080  /* KEN */
482 #define WM8955_KEN_MASK                         0x0080  /* KEN */
483 #define WM8955_KEN_SHIFT                             7  /* KEN */
484 #define WM8955_KEN_WIDTH                             1  /* KEN */
485 
486 #endif
487 

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