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TOMOYO Linux Cross Reference
Linux/sound/soc/codecs/wm8971.c

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  1 // SPDX-License-Identifier: GPL-2.0-or-later
  2 /*
  3  * wm8971.c  --  WM8971 ALSA SoC Audio driver
  4  *
  5  * Copyright 2005 Lab126, Inc.
  6  *
  7  * Author: Kenneth Kiraly <kiraly@lab126.com>
  8  *
  9  * Based on wm8753.c by Liam Girdwood
 10  */
 11 
 12 #include <linux/module.h>
 13 #include <linux/moduleparam.h>
 14 #include <linux/init.h>
 15 #include <linux/delay.h>
 16 #include <linux/pm.h>
 17 #include <linux/i2c.h>
 18 #include <linux/regmap.h>
 19 #include <linux/slab.h>
 20 #include <sound/core.h>
 21 #include <sound/pcm.h>
 22 #include <sound/pcm_params.h>
 23 #include <sound/soc.h>
 24 #include <sound/initval.h>
 25 
 26 #include "wm8971.h"
 27 
 28 #define WM8971_REG_COUNT                43
 29 
 30 /* codec private data */
 31 struct wm8971_priv {
 32         unsigned int sysclk;
 33         struct delayed_work charge_work;
 34         struct regmap *regmap;
 35 };
 36 
 37 /*
 38  * wm8971 register cache
 39  * We can't read the WM8971 register space when we
 40  * are using 2 wire for device control, so we cache them instead.
 41  */
 42 static const struct reg_default wm8971_reg_defaults[] = {
 43         {  0, 0x0097 },
 44         {  1, 0x0097 },
 45         {  2, 0x0079 },
 46         {  3, 0x0079 },
 47         {  4, 0x0000 },
 48         {  5, 0x0008 },
 49         {  6, 0x0000 },
 50         {  7, 0x000a },
 51         {  8, 0x0000 },
 52         {  9, 0x0000 },
 53         { 10, 0x00ff },
 54         { 11, 0x00ff },
 55         { 12, 0x000f },
 56         { 13, 0x000f },
 57         { 14, 0x0000 },
 58         { 15, 0x0000 },
 59         { 16, 0x0000 },
 60         { 17, 0x007b },
 61         { 18, 0x0000 },
 62         { 19, 0x0032 },
 63         { 20, 0x0000 },
 64         { 21, 0x00c3 },
 65         { 22, 0x00c3 },
 66         { 23, 0x00c0 },
 67         { 24, 0x0000 },
 68         { 25, 0x0000 },
 69         { 26, 0x0000 },
 70         { 27, 0x0000 },
 71         { 28, 0x0000 },
 72         { 29, 0x0000 },
 73         { 30, 0x0000 },
 74         { 31, 0x0000 },
 75         { 32, 0x0000 },
 76         { 33, 0x0000 },
 77         { 34, 0x0050 },
 78         { 35, 0x0050 },
 79         { 36, 0x0050 },
 80         { 37, 0x0050 },
 81         { 38, 0x0050 },
 82         { 39, 0x0050 },
 83         { 40, 0x0079 },
 84         { 41, 0x0079 },
 85         { 42, 0x0079 },
 86 };
 87 
 88 #define wm8971_reset(c) snd_soc_component_write(c, WM8971_RESET, 0)
 89 
 90 /* WM8971 Controls */
 91 static const char *wm8971_bass[] = { "Linear Control", "Adaptive Boost" };
 92 static const char *wm8971_bass_filter[] = { "130Hz @ 48kHz",
 93         "200Hz @ 48kHz" };
 94 static const char *wm8971_treble[] = { "8kHz", "4kHz" };
 95 static const char *wm8971_alc_func[] = { "Off", "Right", "Left", "Stereo" };
 96 static const char *wm8971_ng_type[] = { "Constant PGA Gain",
 97         "Mute ADC Output" };
 98 static const char *wm8971_deemp[] = { "None", "32kHz", "44.1kHz", "48kHz" };
 99 static const char *wm8971_mono_mux[] = {"Stereo", "Mono (Left)",
100         "Mono (Right)", "Digital Mono"};
101 static const char *wm8971_dac_phase[] = { "Non Inverted", "Inverted" };
102 static const char *wm8971_lline_mux[] = {"Line", "NC", "NC", "PGA",
103         "Differential"};
104 static const char *wm8971_rline_mux[] = {"Line", "Mic", "NC", "PGA",
105         "Differential"};
106 static const char *wm8971_lpga_sel[] = {"Line", "NC", "NC", "Differential"};
107 static const char *wm8971_rpga_sel[] = {"Line", "Mic", "NC", "Differential"};
108 static const char *wm8971_adcpol[] = {"Normal", "L Invert", "R Invert",
109         "L + R Invert"};
110 
111 static const struct soc_enum wm8971_enum[] = {
112         SOC_ENUM_SINGLE(WM8971_BASS, 7, 2, wm8971_bass),        /* 0 */
113         SOC_ENUM_SINGLE(WM8971_BASS, 6, 2, wm8971_bass_filter),
114         SOC_ENUM_SINGLE(WM8971_TREBLE, 6, 2, wm8971_treble),
115         SOC_ENUM_SINGLE(WM8971_ALC1, 7, 4, wm8971_alc_func),
116         SOC_ENUM_SINGLE(WM8971_NGATE, 1, 2, wm8971_ng_type),    /* 4 */
117         SOC_ENUM_SINGLE(WM8971_ADCDAC, 1, 4, wm8971_deemp),
118         SOC_ENUM_SINGLE(WM8971_ADCTL1, 4, 4, wm8971_mono_mux),
119         SOC_ENUM_SINGLE(WM8971_ADCTL1, 1, 2, wm8971_dac_phase),
120         SOC_ENUM_SINGLE(WM8971_LOUTM1, 0, 5, wm8971_lline_mux), /* 8 */
121         SOC_ENUM_SINGLE(WM8971_ROUTM1, 0, 5, wm8971_rline_mux),
122         SOC_ENUM_SINGLE(WM8971_LADCIN, 6, 4, wm8971_lpga_sel),
123         SOC_ENUM_SINGLE(WM8971_RADCIN, 6, 4, wm8971_rpga_sel),
124         SOC_ENUM_SINGLE(WM8971_ADCDAC, 5, 4, wm8971_adcpol),    /* 12 */
125         SOC_ENUM_SINGLE(WM8971_ADCIN, 6, 4, wm8971_mono_mux),
126 };
127 
128 static const struct snd_kcontrol_new wm8971_snd_controls[] = {
129         SOC_DOUBLE_R("Capture Volume", WM8971_LINVOL, WM8971_RINVOL, 0, 63, 0),
130         SOC_DOUBLE_R("Capture ZC Switch", WM8971_LINVOL, WM8971_RINVOL,
131                      6, 1, 0),
132         SOC_DOUBLE_R("Capture Switch", WM8971_LINVOL, WM8971_RINVOL, 7, 1, 1),
133 
134         SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8971_LOUT1V,
135                 WM8971_ROUT1V, 7, 1, 0),
136         SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8971_LOUT2V,
137                 WM8971_ROUT2V, 7, 1, 0),
138         SOC_SINGLE("Mono Playback ZC Switch", WM8971_MOUTV, 7, 1, 0),
139 
140         SOC_DOUBLE_R("PCM Volume", WM8971_LDAC, WM8971_RDAC, 0, 255, 0),
141 
142         SOC_DOUBLE_R("Bypass Left Playback Volume", WM8971_LOUTM1,
143                 WM8971_LOUTM2, 4, 7, 1),
144         SOC_DOUBLE_R("Bypass Right Playback Volume", WM8971_ROUTM1,
145                 WM8971_ROUTM2, 4, 7, 1),
146         SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8971_MOUTM1,
147                 WM8971_MOUTM2, 4, 7, 1),
148 
149         SOC_DOUBLE_R("Headphone Playback Volume", WM8971_LOUT1V,
150                 WM8971_ROUT1V, 0, 127, 0),
151         SOC_DOUBLE_R("Speaker Playback Volume", WM8971_LOUT2V,
152                 WM8971_ROUT2V, 0, 127, 0),
153 
154         SOC_ENUM("Bass Boost", wm8971_enum[0]),
155         SOC_ENUM("Bass Filter", wm8971_enum[1]),
156         SOC_SINGLE("Bass Volume", WM8971_BASS, 0, 7, 1),
157 
158         SOC_SINGLE("Treble Volume", WM8971_TREBLE, 0, 7, 0),
159         SOC_ENUM("Treble Cut-off", wm8971_enum[2]),
160 
161         SOC_SINGLE("Capture Filter Switch", WM8971_ADCDAC, 0, 1, 1),
162 
163         SOC_SINGLE("ALC Target Volume", WM8971_ALC1, 0, 7, 0),
164         SOC_SINGLE("ALC Max Volume", WM8971_ALC1, 4, 7, 0),
165 
166         SOC_SINGLE("ALC Capture Target Volume", WM8971_ALC1, 0, 7, 0),
167         SOC_SINGLE("ALC Capture Max Volume", WM8971_ALC1, 4, 7, 0),
168         SOC_ENUM("ALC Capture Function", wm8971_enum[3]),
169         SOC_SINGLE("ALC Capture ZC Switch", WM8971_ALC2, 7, 1, 0),
170         SOC_SINGLE("ALC Capture Hold Time", WM8971_ALC2, 0, 15, 0),
171         SOC_SINGLE("ALC Capture Decay Time", WM8971_ALC3, 4, 15, 0),
172         SOC_SINGLE("ALC Capture Attack Time", WM8971_ALC3, 0, 15, 0),
173         SOC_SINGLE("ALC Capture NG Threshold", WM8971_NGATE, 3, 31, 0),
174         SOC_ENUM("ALC Capture NG Type", wm8971_enum[4]),
175         SOC_SINGLE("ALC Capture NG Switch", WM8971_NGATE, 0, 1, 0),
176 
177         SOC_SINGLE("Capture 6dB Attenuate", WM8971_ADCDAC, 8, 1, 0),
178         SOC_SINGLE("Playback 6dB Attenuate", WM8971_ADCDAC, 7, 1, 0),
179 
180         SOC_ENUM("Playback De-emphasis", wm8971_enum[5]),
181         SOC_ENUM("Playback Function", wm8971_enum[6]),
182         SOC_ENUM("Playback Phase", wm8971_enum[7]),
183 
184         SOC_DOUBLE_R("Mic Boost", WM8971_LADCIN, WM8971_RADCIN, 4, 3, 0),
185 };
186 
187 /*
188  * DAPM Controls
189  */
190 
191 /* Left Mixer */
192 static const struct snd_kcontrol_new wm8971_left_mixer_controls[] = {
193 SOC_DAPM_SINGLE("Playback Switch", WM8971_LOUTM1, 8, 1, 0),
194 SOC_DAPM_SINGLE("Left Bypass Switch", WM8971_LOUTM1, 7, 1, 0),
195 SOC_DAPM_SINGLE("Right Playback Switch", WM8971_LOUTM2, 8, 1, 0),
196 SOC_DAPM_SINGLE("Right Bypass Switch", WM8971_LOUTM2, 7, 1, 0),
197 };
198 
199 /* Right Mixer */
200 static const struct snd_kcontrol_new wm8971_right_mixer_controls[] = {
201 SOC_DAPM_SINGLE("Left Playback Switch", WM8971_ROUTM1, 8, 1, 0),
202 SOC_DAPM_SINGLE("Left Bypass Switch", WM8971_ROUTM1, 7, 1, 0),
203 SOC_DAPM_SINGLE("Playback Switch", WM8971_ROUTM2, 8, 1, 0),
204 SOC_DAPM_SINGLE("Right Bypass Switch", WM8971_ROUTM2, 7, 1, 0),
205 };
206 
207 /* Mono Mixer */
208 static const struct snd_kcontrol_new wm8971_mono_mixer_controls[] = {
209 SOC_DAPM_SINGLE("Left Playback Switch", WM8971_MOUTM1, 8, 1, 0),
210 SOC_DAPM_SINGLE("Left Bypass Switch", WM8971_MOUTM1, 7, 1, 0),
211 SOC_DAPM_SINGLE("Right Playback Switch", WM8971_MOUTM2, 8, 1, 0),
212 SOC_DAPM_SINGLE("Right Bypass Switch", WM8971_MOUTM2, 7, 1, 0),
213 };
214 
215 /* Left Line Mux */
216 static const struct snd_kcontrol_new wm8971_left_line_controls =
217 SOC_DAPM_ENUM("Route", wm8971_enum[8]);
218 
219 /* Right Line Mux */
220 static const struct snd_kcontrol_new wm8971_right_line_controls =
221 SOC_DAPM_ENUM("Route", wm8971_enum[9]);
222 
223 /* Left PGA Mux */
224 static const struct snd_kcontrol_new wm8971_left_pga_controls =
225 SOC_DAPM_ENUM("Route", wm8971_enum[10]);
226 
227 /* Right PGA Mux */
228 static const struct snd_kcontrol_new wm8971_right_pga_controls =
229 SOC_DAPM_ENUM("Route", wm8971_enum[11]);
230 
231 /* Mono ADC Mux */
232 static const struct snd_kcontrol_new wm8971_monomux_controls =
233 SOC_DAPM_ENUM("Route", wm8971_enum[13]);
234 
235 static const struct snd_soc_dapm_widget wm8971_dapm_widgets[] = {
236         SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
237                 &wm8971_left_mixer_controls[0],
238                 ARRAY_SIZE(wm8971_left_mixer_controls)),
239         SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
240                 &wm8971_right_mixer_controls[0],
241                 ARRAY_SIZE(wm8971_right_mixer_controls)),
242         SND_SOC_DAPM_MIXER("Mono Mixer", WM8971_PWR2, 2, 0,
243                 &wm8971_mono_mixer_controls[0],
244                 ARRAY_SIZE(wm8971_mono_mixer_controls)),
245 
246         SND_SOC_DAPM_PGA("Right Out 2", WM8971_PWR2, 3, 0, NULL, 0),
247         SND_SOC_DAPM_PGA("Left Out 2", WM8971_PWR2, 4, 0, NULL, 0),
248         SND_SOC_DAPM_PGA("Right Out 1", WM8971_PWR2, 5, 0, NULL, 0),
249         SND_SOC_DAPM_PGA("Left Out 1", WM8971_PWR2, 6, 0, NULL, 0),
250         SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8971_PWR2, 7, 0),
251         SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8971_PWR2, 8, 0),
252         SND_SOC_DAPM_PGA("Mono Out 1", WM8971_PWR2, 2, 0, NULL, 0),
253 
254         SND_SOC_DAPM_SUPPLY("Mic Bias", WM8971_PWR1, 1, 0, NULL, 0),
255         SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8971_PWR1, 2, 0),
256         SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8971_PWR1, 3, 0),
257 
258         SND_SOC_DAPM_MUX("Left PGA Mux", WM8971_PWR1, 5, 0,
259                 &wm8971_left_pga_controls),
260         SND_SOC_DAPM_MUX("Right PGA Mux", WM8971_PWR1, 4, 0,
261                 &wm8971_right_pga_controls),
262         SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
263                 &wm8971_left_line_controls),
264         SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
265                 &wm8971_right_line_controls),
266 
267         SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
268                 &wm8971_monomux_controls),
269         SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
270                 &wm8971_monomux_controls),
271 
272         SND_SOC_DAPM_OUTPUT("LOUT1"),
273         SND_SOC_DAPM_OUTPUT("ROUT1"),
274         SND_SOC_DAPM_OUTPUT("LOUT2"),
275         SND_SOC_DAPM_OUTPUT("ROUT2"),
276         SND_SOC_DAPM_OUTPUT("MONO"),
277 
278         SND_SOC_DAPM_INPUT("LINPUT1"),
279         SND_SOC_DAPM_INPUT("RINPUT1"),
280         SND_SOC_DAPM_INPUT("MIC"),
281 };
282 
283 static const struct snd_soc_dapm_route wm8971_dapm_routes[] = {
284         /* left mixer */
285         {"Left Mixer", "Playback Switch", "Left DAC"},
286         {"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
287         {"Left Mixer", "Right Playback Switch", "Right DAC"},
288         {"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
289 
290         /* right mixer */
291         {"Right Mixer", "Left Playback Switch", "Left DAC"},
292         {"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
293         {"Right Mixer", "Playback Switch", "Right DAC"},
294         {"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
295 
296         /* left out 1 */
297         {"Left Out 1", NULL, "Left Mixer"},
298         {"LOUT1", NULL, "Left Out 1"},
299 
300         /* left out 2 */
301         {"Left Out 2", NULL, "Left Mixer"},
302         {"LOUT2", NULL, "Left Out 2"},
303 
304         /* right out 1 */
305         {"Right Out 1", NULL, "Right Mixer"},
306         {"ROUT1", NULL, "Right Out 1"},
307 
308         /* right out 2 */
309         {"Right Out 2", NULL, "Right Mixer"},
310         {"ROUT2", NULL, "Right Out 2"},
311 
312         /* mono mixer */
313         {"Mono Mixer", "Left Playback Switch", "Left DAC"},
314         {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
315         {"Mono Mixer", "Right Playback Switch", "Right DAC"},
316         {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
317 
318         /* mono out */
319         {"Mono Out", NULL, "Mono Mixer"},
320         {"MONO1", NULL, "Mono Out"},
321 
322         /* Left Line Mux */
323         {"Left Line Mux", "Line", "LINPUT1"},
324         {"Left Line Mux", "PGA", "Left PGA Mux"},
325         {"Left Line Mux", "Differential", "Differential Mux"},
326 
327         /* Right Line Mux */
328         {"Right Line Mux", "Line", "RINPUT1"},
329         {"Right Line Mux", "Mic", "MIC"},
330         {"Right Line Mux", "PGA", "Right PGA Mux"},
331         {"Right Line Mux", "Differential", "Differential Mux"},
332 
333         /* Left PGA Mux */
334         {"Left PGA Mux", "Line", "LINPUT1"},
335         {"Left PGA Mux", "Differential", "Differential Mux"},
336 
337         /* Right PGA Mux */
338         {"Right PGA Mux", "Line", "RINPUT1"},
339         {"Right PGA Mux", "Differential", "Differential Mux"},
340 
341         /* Differential Mux */
342         {"Differential Mux", "Line", "LINPUT1"},
343         {"Differential Mux", "Line", "RINPUT1"},
344 
345         /* Left ADC Mux */
346         {"Left ADC Mux", "Stereo", "Left PGA Mux"},
347         {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
348         {"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
349 
350         /* Right ADC Mux */
351         {"Right ADC Mux", "Stereo", "Right PGA Mux"},
352         {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
353         {"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
354 
355         /* ADC */
356         {"Left ADC", NULL, "Left ADC Mux"},
357         {"Right ADC", NULL, "Right ADC Mux"},
358 };
359 
360 struct _coeff_div {
361         u32 mclk;
362         u32 rate;
363         u16 fs;
364         u8 sr:5;
365         u8 usb:1;
366 };
367 
368 /* codec hifi mclk clock divider coefficients */
369 static const struct _coeff_div coeff_div[] = {
370         /* 8k */
371         {12288000, 8000, 1536, 0x6, 0x0},
372         {11289600, 8000, 1408, 0x16, 0x0},
373         {18432000, 8000, 2304, 0x7, 0x0},
374         {16934400, 8000, 2112, 0x17, 0x0},
375         {12000000, 8000, 1500, 0x6, 0x1},
376 
377         /* 11.025k */
378         {11289600, 11025, 1024, 0x18, 0x0},
379         {16934400, 11025, 1536, 0x19, 0x0},
380         {12000000, 11025, 1088, 0x19, 0x1},
381 
382         /* 16k */
383         {12288000, 16000, 768, 0xa, 0x0},
384         {18432000, 16000, 1152, 0xb, 0x0},
385         {12000000, 16000, 750, 0xa, 0x1},
386 
387         /* 22.05k */
388         {11289600, 22050, 512, 0x1a, 0x0},
389         {16934400, 22050, 768, 0x1b, 0x0},
390         {12000000, 22050, 544, 0x1b, 0x1},
391 
392         /* 32k */
393         {12288000, 32000, 384, 0xc, 0x0},
394         {18432000, 32000, 576, 0xd, 0x0},
395         {12000000, 32000, 375, 0xa, 0x1},
396 
397         /* 44.1k */
398         {11289600, 44100, 256, 0x10, 0x0},
399         {16934400, 44100, 384, 0x11, 0x0},
400         {12000000, 44100, 272, 0x11, 0x1},
401 
402         /* 48k */
403         {12288000, 48000, 256, 0x0, 0x0},
404         {18432000, 48000, 384, 0x1, 0x0},
405         {12000000, 48000, 250, 0x0, 0x1},
406 
407         /* 88.2k */
408         {11289600, 88200, 128, 0x1e, 0x0},
409         {16934400, 88200, 192, 0x1f, 0x0},
410         {12000000, 88200, 136, 0x1f, 0x1},
411 
412         /* 96k */
413         {12288000, 96000, 128, 0xe, 0x0},
414         {18432000, 96000, 192, 0xf, 0x0},
415         {12000000, 96000, 125, 0xe, 0x1},
416 };
417 
418 static int get_coeff(int mclk, int rate)
419 {
420         int i;
421 
422         for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
423                 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
424                         return i;
425         }
426         return -EINVAL;
427 }
428 
429 static int wm8971_set_dai_sysclk(struct snd_soc_dai *codec_dai,
430                 int clk_id, unsigned int freq, int dir)
431 {
432         struct snd_soc_component *component = codec_dai->component;
433         struct wm8971_priv *wm8971 = snd_soc_component_get_drvdata(component);
434 
435         switch (freq) {
436         case 11289600:
437         case 12000000:
438         case 12288000:
439         case 16934400:
440         case 18432000:
441                 wm8971->sysclk = freq;
442                 return 0;
443         }
444         return -EINVAL;
445 }
446 
447 static int wm8971_set_dai_fmt(struct snd_soc_dai *codec_dai,
448                 unsigned int fmt)
449 {
450         struct snd_soc_component *component = codec_dai->component;
451         u16 iface = 0;
452 
453         /* set master/slave audio interface */
454         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
455         case SND_SOC_DAIFMT_CBM_CFM:
456                 iface = 0x0040;
457                 break;
458         case SND_SOC_DAIFMT_CBS_CFS:
459                 break;
460         default:
461                 return -EINVAL;
462         }
463 
464         /* interface format */
465         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
466         case SND_SOC_DAIFMT_I2S:
467                 iface |= 0x0002;
468                 break;
469         case SND_SOC_DAIFMT_RIGHT_J:
470                 break;
471         case SND_SOC_DAIFMT_LEFT_J:
472                 iface |= 0x0001;
473                 break;
474         case SND_SOC_DAIFMT_DSP_A:
475                 iface |= 0x0003;
476                 break;
477         case SND_SOC_DAIFMT_DSP_B:
478                 iface |= 0x0013;
479                 break;
480         default:
481                 return -EINVAL;
482         }
483 
484         /* clock inversion */
485         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
486         case SND_SOC_DAIFMT_NB_NF:
487                 break;
488         case SND_SOC_DAIFMT_IB_IF:
489                 iface |= 0x0090;
490                 break;
491         case SND_SOC_DAIFMT_IB_NF:
492                 iface |= 0x0080;
493                 break;
494         case SND_SOC_DAIFMT_NB_IF:
495                 iface |= 0x0010;
496                 break;
497         default:
498                 return -EINVAL;
499         }
500 
501         snd_soc_component_write(component, WM8971_IFACE, iface);
502         return 0;
503 }
504 
505 static int wm8971_pcm_hw_params(struct snd_pcm_substream *substream,
506         struct snd_pcm_hw_params *params,
507         struct snd_soc_dai *dai)
508 {
509         struct snd_soc_component *component = dai->component;
510         struct wm8971_priv *wm8971 = snd_soc_component_get_drvdata(component);
511         u16 iface = snd_soc_component_read32(component, WM8971_IFACE) & 0x1f3;
512         u16 srate = snd_soc_component_read32(component, WM8971_SRATE) & 0x1c0;
513         int coeff = get_coeff(wm8971->sysclk, params_rate(params));
514 
515         /* bit size */
516         switch (params_width(params)) {
517         case 16:
518                 break;
519         case 20:
520                 iface |= 0x0004;
521                 break;
522         case 24:
523                 iface |= 0x0008;
524                 break;
525         case 32:
526                 iface |= 0x000c;
527                 break;
528         }
529 
530         /* set iface & srate */
531         snd_soc_component_write(component, WM8971_IFACE, iface);
532         if (coeff >= 0)
533                 snd_soc_component_write(component, WM8971_SRATE, srate |
534                         (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
535 
536         return 0;
537 }
538 
539 static int wm8971_mute(struct snd_soc_dai *dai, int mute)
540 {
541         struct snd_soc_component *component = dai->component;
542         u16 mute_reg = snd_soc_component_read32(component, WM8971_ADCDAC) & 0xfff7;
543 
544         if (mute)
545                 snd_soc_component_write(component, WM8971_ADCDAC, mute_reg | 0x8);
546         else
547                 snd_soc_component_write(component, WM8971_ADCDAC, mute_reg);
548         return 0;
549 }
550 
551 static void wm8971_charge_work(struct work_struct *work)
552 {
553         struct wm8971_priv *wm8971 =
554                 container_of(work, struct wm8971_priv, charge_work.work);
555 
556         /* Set to 500k */
557         regmap_update_bits(wm8971->regmap, WM8971_PWR1, 0x0180, 0x0100);
558 }
559 
560 static int wm8971_set_bias_level(struct snd_soc_component *component,
561         enum snd_soc_bias_level level)
562 {
563         struct wm8971_priv *wm8971 = snd_soc_component_get_drvdata(component);
564         u16 pwr_reg = snd_soc_component_read32(component, WM8971_PWR1) & 0xfe3e;
565 
566         switch (level) {
567         case SND_SOC_BIAS_ON:
568                 /* set vmid to 50k and unmute dac */
569                 snd_soc_component_write(component, WM8971_PWR1, pwr_reg | 0x00c1);
570                 break;
571         case SND_SOC_BIAS_PREPARE:
572                 /* Wait until fully charged */
573                 flush_delayed_work(&wm8971->charge_work);
574                 break;
575         case SND_SOC_BIAS_STANDBY:
576                 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
577                         snd_soc_component_cache_sync(component);
578                         /* charge output caps - set vmid to 5k for quick power up */
579                         snd_soc_component_write(component, WM8971_PWR1, pwr_reg | 0x01c0);
580                         queue_delayed_work(system_power_efficient_wq,
581                                 &wm8971->charge_work, msecs_to_jiffies(1000));
582                 } else {
583                         /* mute dac and set vmid to 500k, enable VREF */
584                         snd_soc_component_write(component, WM8971_PWR1, pwr_reg | 0x0140);
585                 }
586 
587                 break;
588         case SND_SOC_BIAS_OFF:
589                 cancel_delayed_work_sync(&wm8971->charge_work);
590                 snd_soc_component_write(component, WM8971_PWR1, 0x0001);
591                 break;
592         }
593         return 0;
594 }
595 
596 #define WM8971_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
597                 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
598                 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
599 
600 #define WM8971_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
601         SNDRV_PCM_FMTBIT_S24_LE)
602 
603 static const struct snd_soc_dai_ops wm8971_dai_ops = {
604         .hw_params      = wm8971_pcm_hw_params,
605         .digital_mute   = wm8971_mute,
606         .set_fmt        = wm8971_set_dai_fmt,
607         .set_sysclk     = wm8971_set_dai_sysclk,
608 };
609 
610 static struct snd_soc_dai_driver wm8971_dai = {
611         .name = "wm8971-hifi",
612         .playback = {
613                 .stream_name = "Playback",
614                 .channels_min = 1,
615                 .channels_max = 2,
616                 .rates = WM8971_RATES,
617                 .formats = WM8971_FORMATS,},
618         .capture = {
619                 .stream_name = "Capture",
620                 .channels_min = 1,
621                 .channels_max = 2,
622                 .rates = WM8971_RATES,
623                 .formats = WM8971_FORMATS,},
624         .ops = &wm8971_dai_ops,
625 };
626 
627 static int wm8971_probe(struct snd_soc_component *component)
628 {
629         struct wm8971_priv *wm8971 = snd_soc_component_get_drvdata(component);
630 
631         INIT_DELAYED_WORK(&wm8971->charge_work, wm8971_charge_work);
632 
633         wm8971_reset(component);
634 
635         /* set the update bits */
636         snd_soc_component_update_bits(component, WM8971_LDAC, 0x0100, 0x0100);
637         snd_soc_component_update_bits(component, WM8971_RDAC, 0x0100, 0x0100);
638         snd_soc_component_update_bits(component, WM8971_LOUT1V, 0x0100, 0x0100);
639         snd_soc_component_update_bits(component, WM8971_ROUT1V, 0x0100, 0x0100);
640         snd_soc_component_update_bits(component, WM8971_LOUT2V, 0x0100, 0x0100);
641         snd_soc_component_update_bits(component, WM8971_ROUT2V, 0x0100, 0x0100);
642         snd_soc_component_update_bits(component, WM8971_LINVOL, 0x0100, 0x0100);
643         snd_soc_component_update_bits(component, WM8971_RINVOL, 0x0100, 0x0100);
644 
645         return 0;
646 }
647 
648 static const struct snd_soc_component_driver soc_component_dev_wm8971 = {
649         .probe                  = wm8971_probe,
650         .set_bias_level         = wm8971_set_bias_level,
651         .controls               = wm8971_snd_controls,
652         .num_controls           = ARRAY_SIZE(wm8971_snd_controls),
653         .dapm_widgets           = wm8971_dapm_widgets,
654         .num_dapm_widgets       = ARRAY_SIZE(wm8971_dapm_widgets),
655         .dapm_routes            = wm8971_dapm_routes,
656         .num_dapm_routes        = ARRAY_SIZE(wm8971_dapm_routes),
657         .suspend_bias_off       = 1,
658         .idle_bias_on           = 1,
659         .use_pmdown_time        = 1,
660         .endianness             = 1,
661         .non_legacy_dai_naming  = 1,
662 };
663 
664 static const struct regmap_config wm8971_regmap = {
665         .reg_bits = 7,
666         .val_bits = 9,
667         .max_register = WM8971_MOUTV,
668 
669         .reg_defaults = wm8971_reg_defaults,
670         .num_reg_defaults = ARRAY_SIZE(wm8971_reg_defaults),
671         .cache_type = REGCACHE_RBTREE,
672 };
673 
674 static int wm8971_i2c_probe(struct i2c_client *i2c,
675                             const struct i2c_device_id *id)
676 {
677         struct wm8971_priv *wm8971;
678         int ret;
679 
680         wm8971 = devm_kzalloc(&i2c->dev, sizeof(struct wm8971_priv),
681                               GFP_KERNEL);
682         if (wm8971 == NULL)
683                 return -ENOMEM;
684 
685         wm8971->regmap = devm_regmap_init_i2c(i2c, &wm8971_regmap);
686         if (IS_ERR(wm8971->regmap))
687                 return PTR_ERR(wm8971->regmap);
688 
689         i2c_set_clientdata(i2c, wm8971);
690 
691         ret = devm_snd_soc_register_component(&i2c->dev,
692                         &soc_component_dev_wm8971, &wm8971_dai, 1);
693 
694         return ret;
695 }
696 
697 static const struct i2c_device_id wm8971_i2c_id[] = {
698         { "wm8971", 0 },
699         { }
700 };
701 MODULE_DEVICE_TABLE(i2c, wm8971_i2c_id);
702 
703 static struct i2c_driver wm8971_i2c_driver = {
704         .driver = {
705                 .name = "wm8971",
706         },
707         .probe =    wm8971_i2c_probe,
708         .id_table = wm8971_i2c_id,
709 };
710 
711 module_i2c_driver(wm8971_i2c_driver);
712 
713 MODULE_DESCRIPTION("ASoC WM8971 driver");
714 MODULE_AUTHOR("Lab126");
715 MODULE_LICENSE("GPL");
716 

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