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TOMOYO Linux Cross Reference
Linux/sound/soc/fsl/fsl_audmix.h

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  1 /* SPDX-License-Identifier: GPL-2.0 */
  2 /*
  3  * NXP AUDMIX ALSA SoC Digital Audio Interface (DAI) driver
  4  *
  5  * Copyright 2017 NXP
  6  */
  7 
  8 #ifndef __FSL_AUDMIX_H
  9 #define __FSL_AUDMIX_H
 10 
 11 #define FSL_AUDMIX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
 12                         SNDRV_PCM_FMTBIT_S24_LE |\
 13                         SNDRV_PCM_FMTBIT_S32_LE)
 14 /* AUDMIX Registers */
 15 #define FSL_AUDMIX_CTR          0x200 /* Control */
 16 #define FSL_AUDMIX_STR          0x204 /* Status */
 17 
 18 #define FSL_AUDMIX_ATCR0        0x208 /* Attenuation Control */
 19 #define FSL_AUDMIX_ATIVAL0      0x20c /* Attenuation Initial Value */
 20 #define FSL_AUDMIX_ATSTPUP0     0x210 /* Attenuation step up factor */
 21 #define FSL_AUDMIX_ATSTPDN0     0x214 /* Attenuation step down factor */
 22 #define FSL_AUDMIX_ATSTPTGT0    0x218 /* Attenuation step target */
 23 #define FSL_AUDMIX_ATTNVAL0     0x21c /* Attenuation Value */
 24 #define FSL_AUDMIX_ATSTP0       0x220 /* Attenuation step number */
 25 
 26 #define FSL_AUDMIX_ATCR1        0x228 /* Attenuation Control */
 27 #define FSL_AUDMIX_ATIVAL1      0x22c /* Attenuation Initial Value */
 28 #define FSL_AUDMIX_ATSTPUP1     0x230 /* Attenuation step up factor */
 29 #define FSL_AUDMIX_ATSTPDN1     0x234 /* Attenuation step down factor */
 30 #define FSL_AUDMIX_ATSTPTGT1    0x238 /* Attenuation step target */
 31 #define FSL_AUDMIX_ATTNVAL1     0x23c /* Attenuation Value */
 32 #define FSL_AUDMIX_ATSTP1       0x240 /* Attenuation step number */
 33 
 34 /* AUDMIX Control Register */
 35 #define FSL_AUDMIX_CTR_MIXCLK_SHIFT     0
 36 #define FSL_AUDMIX_CTR_MIXCLK_MASK      BIT(FSL_AUDMIX_CTR_MIXCLK_SHIFT)
 37 #define FSL_AUDMIX_CTR_MIXCLK(i)        ((i) << FSL_AUDMIX_CTR_MIXCLK_SHIFT)
 38 #define FSL_AUDMIX_CTR_OUTSRC_SHIFT     1
 39 #define FSL_AUDMIX_CTR_OUTSRC_MASK      (0x3 << FSL_AUDMIX_CTR_OUTSRC_SHIFT)
 40 #define FSL_AUDMIX_CTR_OUTSRC(i)        (((i) << FSL_AUDMIX_CTR_OUTSRC_SHIFT)\
 41                                               & FSL_AUDMIX_CTR_OUTSRC_MASK)
 42 #define FSL_AUDMIX_CTR_OUTWIDTH_SHIFT   3
 43 #define FSL_AUDMIX_CTR_OUTWIDTH_MASK    (0x7 << FSL_AUDMIX_CTR_OUTWIDTH_SHIFT)
 44 #define FSL_AUDMIX_CTR_OUTWIDTH(i)      (((i) << FSL_AUDMIX_CTR_OUTWIDTH_SHIFT)\
 45                                               & FSL_AUDMIX_CTR_OUTWIDTH_MASK)
 46 #define FSL_AUDMIX_CTR_OUTCKPOL_SHIFT   6
 47 #define FSL_AUDMIX_CTR_OUTCKPOL_MASK    BIT(FSL_AUDMIX_CTR_OUTCKPOL_SHIFT)
 48 #define FSL_AUDMIX_CTR_OUTCKPOL(i)      ((i) << FSL_AUDMIX_CTR_OUTCKPOL_SHIFT)
 49 #define FSL_AUDMIX_CTR_MASKRTDF_SHIFT   7
 50 #define FSL_AUDMIX_CTR_MASKRTDF_MASK    BIT(FSL_AUDMIX_CTR_MASKRTDF_SHIFT)
 51 #define FSL_AUDMIX_CTR_MASKRTDF(i)      ((i) << FSL_AUDMIX_CTR_MASKRTDF_SHIFT)
 52 #define FSL_AUDMIX_CTR_MASKCKDF_SHIFT   8
 53 #define FSL_AUDMIX_CTR_MASKCKDF_MASK    BIT(FSL_AUDMIX_CTR_MASKCKDF_SHIFT)
 54 #define FSL_AUDMIX_CTR_MASKCKDF(i)      ((i) << FSL_AUDMIX_CTR_MASKCKDF_SHIFT)
 55 #define FSL_AUDMIX_CTR_SYNCMODE_SHIFT   9
 56 #define FSL_AUDMIX_CTR_SYNCMODE_MASK    BIT(FSL_AUDMIX_CTR_SYNCMODE_SHIFT)
 57 #define FSL_AUDMIX_CTR_SYNCMODE(i)      ((i) << FSL_AUDMIX_CTR_SYNCMODE_SHIFT)
 58 #define FSL_AUDMIX_CTR_SYNCSRC_SHIFT    10
 59 #define FSL_AUDMIX_CTR_SYNCSRC_MASK     BIT(FSL_AUDMIX_CTR_SYNCSRC_SHIFT)
 60 #define FSL_AUDMIX_CTR_SYNCSRC(i)       ((i) << FSL_AUDMIX_CTR_SYNCSRC_SHIFT)
 61 
 62 /* AUDMIX Status Register */
 63 #define FSL_AUDMIX_STR_RATEDIFF         BIT(0)
 64 #define FSL_AUDMIX_STR_CLKDIFF          BIT(1)
 65 #define FSL_AUDMIX_STR_MIXSTAT_SHIFT    2
 66 #define FSL_AUDMIX_STR_MIXSTAT_MASK     (0x3 << FSL_AUDMIX_STR_MIXSTAT_SHIFT)
 67 #define FSL_AUDMIX_STR_MIXSTAT(i)       (((i) & FSL_AUDMIX_STR_MIXSTAT_MASK) \
 68                                            >> FSL_AUDMIX_STR_MIXSTAT_SHIFT)
 69 /* AUDMIX Attenuation Control Register */
 70 #define FSL_AUDMIX_ATCR_AT_EN           BIT(0)
 71 #define FSL_AUDMIX_ATCR_AT_UPDN         BIT(1)
 72 #define FSL_AUDMIX_ATCR_ATSTPDIF_SHIFT  2
 73 #define FSL_AUDMIX_ATCR_ATSTPDFI_MASK   \
 74                                 (0xfff << FSL_AUDMIX_ATCR_ATSTPDIF_SHIFT)
 75 
 76 /* AUDMIX Attenuation Initial Value Register */
 77 #define FSL_AUDMIX_ATIVAL_ATINVAL_MASK  0x3FFFF
 78 
 79 /* AUDMIX Attenuation Step Up Factor Register */
 80 #define FSL_AUDMIX_ATSTPUP_ATSTEPUP_MASK        0x3FFFF
 81 
 82 /* AUDMIX Attenuation Step Down Factor Register */
 83 #define FSL_AUDMIX_ATSTPDN_ATSTEPDN_MASK        0x3FFFF
 84 
 85 /* AUDMIX Attenuation Step Target Register */
 86 #define FSL_AUDMIX_ATSTPTGT_ATSTPTG_MASK        0x3FFFF
 87 
 88 /* AUDMIX Attenuation Value Register */
 89 #define FSL_AUDMIX_ATTNVAL_ATCURVAL_MASK        0x3FFFF
 90 
 91 /* AUDMIX Attenuation Step Number Register */
 92 #define FSL_AUDMIX_ATSTP_STPCTR_MASK    0x3FFFF
 93 
 94 #define FSL_AUDMIX_MAX_DAIS             2
 95 struct fsl_audmix {
 96         struct platform_device *pdev;
 97         struct regmap *regmap;
 98         struct clk *ipg_clk;
 99         u8 tdms;
100 };
101 
102 #endif /* __FSL_AUDMIX_H */
103 

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