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Linux/sound/soc/img/img-parallel-out.c

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  1 /*
  2  * IMG parallel output controller driver
  3  *
  4  * Copyright (C) 2015 Imagination Technologies Ltd.
  5  *
  6  * Author: Damien Horsley <Damien.Horsley@imgtec.com>
  7  *
  8  * This program is free software; you can redistribute it and/or modify it
  9  * under the terms and conditions of the GNU General Public License,
 10  * version 2, as published by the Free Software Foundation.
 11  */
 12 
 13 #include <linux/clk.h>
 14 #include <linux/init.h>
 15 #include <linux/kernel.h>
 16 #include <linux/module.h>
 17 #include <linux/of.h>
 18 #include <linux/platform_device.h>
 19 #include <linux/pm_runtime.h>
 20 #include <linux/reset.h>
 21 
 22 #include <sound/core.h>
 23 #include <sound/dmaengine_pcm.h>
 24 #include <sound/initval.h>
 25 #include <sound/pcm.h>
 26 #include <sound/pcm_params.h>
 27 #include <sound/soc.h>
 28 
 29 #define IMG_PRL_OUT_TX_FIFO             0
 30 
 31 #define IMG_PRL_OUT_CTL                 0x4
 32 #define IMG_PRL_OUT_CTL_CH_MASK         BIT(4)
 33 #define IMG_PRL_OUT_CTL_PACKH_MASK      BIT(3)
 34 #define IMG_PRL_OUT_CTL_EDGE_MASK       BIT(2)
 35 #define IMG_PRL_OUT_CTL_ME_MASK         BIT(1)
 36 #define IMG_PRL_OUT_CTL_SRST_MASK       BIT(0)
 37 
 38 struct img_prl_out {
 39         void __iomem *base;
 40         struct clk *clk_sys;
 41         struct clk *clk_ref;
 42         struct snd_dmaengine_dai_dma_data dma_data;
 43         struct device *dev;
 44         struct reset_control *rst;
 45 };
 46 
 47 static int img_prl_out_suspend(struct device *dev)
 48 {
 49         struct img_prl_out *prl = dev_get_drvdata(dev);
 50 
 51         clk_disable_unprepare(prl->clk_ref);
 52 
 53         return 0;
 54 }
 55 
 56 static int img_prl_out_resume(struct device *dev)
 57 {
 58         struct img_prl_out *prl = dev_get_drvdata(dev);
 59         int ret;
 60 
 61         ret = clk_prepare_enable(prl->clk_ref);
 62         if (ret) {
 63                 dev_err(dev, "clk_enable failed: %d\n", ret);
 64                 return ret;
 65         }
 66 
 67         return 0;
 68 }
 69 
 70 static inline void img_prl_out_writel(struct img_prl_out *prl,
 71                                 u32 val, u32 reg)
 72 {
 73         writel(val, prl->base + reg);
 74 }
 75 
 76 static inline u32 img_prl_out_readl(struct img_prl_out *prl, u32 reg)
 77 {
 78         return readl(prl->base + reg);
 79 }
 80 
 81 static void img_prl_out_reset(struct img_prl_out *prl)
 82 {
 83         u32 ctl;
 84 
 85         ctl = img_prl_out_readl(prl, IMG_PRL_OUT_CTL) &
 86                         ~IMG_PRL_OUT_CTL_ME_MASK;
 87 
 88         reset_control_assert(prl->rst);
 89         reset_control_deassert(prl->rst);
 90 
 91         img_prl_out_writel(prl, ctl, IMG_PRL_OUT_CTL);
 92 }
 93 
 94 static int img_prl_out_trigger(struct snd_pcm_substream *substream, int cmd,
 95                         struct snd_soc_dai *dai)
 96 {
 97         struct img_prl_out *prl = snd_soc_dai_get_drvdata(dai);
 98         u32 reg;
 99 
100         switch (cmd) {
101         case SNDRV_PCM_TRIGGER_START:
102         case SNDRV_PCM_TRIGGER_RESUME:
103         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
104                 reg = img_prl_out_readl(prl, IMG_PRL_OUT_CTL);
105                 reg |= IMG_PRL_OUT_CTL_ME_MASK;
106                 img_prl_out_writel(prl, reg, IMG_PRL_OUT_CTL);
107                 break;
108         case SNDRV_PCM_TRIGGER_STOP:
109         case SNDRV_PCM_TRIGGER_SUSPEND:
110         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
111                 img_prl_out_reset(prl);
112                 break;
113         default:
114                 return -EINVAL;
115         }
116 
117         return 0;
118 }
119 
120 static int img_prl_out_hw_params(struct snd_pcm_substream *substream,
121         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
122 {
123         struct img_prl_out *prl = snd_soc_dai_get_drvdata(dai);
124         unsigned int rate, channels;
125         u32 reg, control_set = 0;
126         snd_pcm_format_t format;
127 
128         rate = params_rate(params);
129         format = params_format(params);
130         channels = params_channels(params);
131 
132         switch (params_format(params)) {
133         case SNDRV_PCM_FORMAT_S32_LE:
134                 control_set |= IMG_PRL_OUT_CTL_PACKH_MASK;
135                 break;
136         case SNDRV_PCM_FORMAT_S24_LE:
137                 break;
138         default:
139                 return -EINVAL;
140         }
141 
142         if (channels != 2)
143                 return -EINVAL;
144 
145         clk_set_rate(prl->clk_ref, rate * 256);
146 
147         reg = img_prl_out_readl(prl, IMG_PRL_OUT_CTL);
148         reg = (reg & ~IMG_PRL_OUT_CTL_PACKH_MASK) | control_set;
149         img_prl_out_writel(prl, reg, IMG_PRL_OUT_CTL);
150 
151         return 0;
152 }
153 
154 static int img_prl_out_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
155 {
156         struct img_prl_out *prl = snd_soc_dai_get_drvdata(dai);
157         u32 reg, control_set = 0;
158 
159         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
160         case SND_SOC_DAIFMT_NB_NF:
161                 break;
162         case SND_SOC_DAIFMT_NB_IF:
163                 control_set |= IMG_PRL_OUT_CTL_EDGE_MASK;
164                 break;
165         default:
166                 return -EINVAL;
167         }
168 
169         reg = img_prl_out_readl(prl, IMG_PRL_OUT_CTL);
170         reg = (reg & ~IMG_PRL_OUT_CTL_EDGE_MASK) | control_set;
171         img_prl_out_writel(prl, reg, IMG_PRL_OUT_CTL);
172 
173         return 0;
174 }
175 
176 static const struct snd_soc_dai_ops img_prl_out_dai_ops = {
177         .trigger = img_prl_out_trigger,
178         .hw_params = img_prl_out_hw_params,
179         .set_fmt = img_prl_out_set_fmt
180 };
181 
182 static int img_prl_out_dai_probe(struct snd_soc_dai *dai)
183 {
184         struct img_prl_out *prl = snd_soc_dai_get_drvdata(dai);
185 
186         snd_soc_dai_init_dma_data(dai, &prl->dma_data, NULL);
187 
188         return 0;
189 }
190 
191 static struct snd_soc_dai_driver img_prl_out_dai = {
192         .probe = img_prl_out_dai_probe,
193         .playback = {
194                 .channels_min = 2,
195                 .channels_max = 2,
196                 .rates = SNDRV_PCM_RATE_8000_192000,
197                 .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S24_LE
198         },
199         .ops = &img_prl_out_dai_ops
200 };
201 
202 static const struct snd_soc_component_driver img_prl_out_component = {
203         .name = "img-prl-out"
204 };
205 
206 static int img_prl_out_probe(struct platform_device *pdev)
207 {
208         struct img_prl_out *prl;
209         struct resource *res;
210         void __iomem *base;
211         int ret;
212         struct device *dev = &pdev->dev;
213 
214         prl = devm_kzalloc(&pdev->dev, sizeof(*prl), GFP_KERNEL);
215         if (!prl)
216                 return -ENOMEM;
217 
218         platform_set_drvdata(pdev, prl);
219 
220         prl->dev = &pdev->dev;
221 
222         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
223         base = devm_ioremap_resource(&pdev->dev, res);
224         if (IS_ERR(base))
225                 return PTR_ERR(base);
226 
227         prl->base = base;
228 
229         prl->rst = devm_reset_control_get(&pdev->dev, "rst");
230         if (IS_ERR(prl->rst)) {
231                 if (PTR_ERR(prl->rst) != -EPROBE_DEFER)
232                         dev_err(&pdev->dev, "No top level reset found\n");
233                 return PTR_ERR(prl->rst);
234         }
235 
236         prl->clk_sys = devm_clk_get(&pdev->dev, "sys");
237         if (IS_ERR(prl->clk_sys)) {
238                 if (PTR_ERR(prl->clk_sys) != -EPROBE_DEFER)
239                         dev_err(dev, "Failed to acquire clock 'sys'\n");
240                 return PTR_ERR(prl->clk_sys);
241         }
242 
243         prl->clk_ref = devm_clk_get(&pdev->dev, "ref");
244         if (IS_ERR(prl->clk_ref)) {
245                 if (PTR_ERR(prl->clk_ref) != -EPROBE_DEFER)
246                         dev_err(dev, "Failed to acquire clock 'ref'\n");
247                 return PTR_ERR(prl->clk_ref);
248         }
249 
250         ret = clk_prepare_enable(prl->clk_sys);
251         if (ret)
252                 return ret;
253 
254         img_prl_out_writel(prl, IMG_PRL_OUT_CTL_EDGE_MASK, IMG_PRL_OUT_CTL);
255         img_prl_out_reset(prl);
256 
257         pm_runtime_enable(&pdev->dev);
258         if (!pm_runtime_enabled(&pdev->dev)) {
259                 ret = img_prl_out_resume(&pdev->dev);
260                 if (ret)
261                         goto err_pm_disable;
262         }
263 
264         prl->dma_data.addr = res->start + IMG_PRL_OUT_TX_FIFO;
265         prl->dma_data.addr_width = 4;
266         prl->dma_data.maxburst = 4;
267 
268         ret = devm_snd_soc_register_component(&pdev->dev,
269                         &img_prl_out_component,
270                         &img_prl_out_dai, 1);
271         if (ret)
272                 goto err_suspend;
273 
274         ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
275         if (ret)
276                 goto err_suspend;
277 
278         return 0;
279 
280 err_suspend:
281         if (!pm_runtime_status_suspended(&pdev->dev))
282                 img_prl_out_suspend(&pdev->dev);
283 err_pm_disable:
284         pm_runtime_disable(&pdev->dev);
285         clk_disable_unprepare(prl->clk_sys);
286 
287         return ret;
288 }
289 
290 static int img_prl_out_dev_remove(struct platform_device *pdev)
291 {
292         struct img_prl_out *prl = platform_get_drvdata(pdev);
293 
294         pm_runtime_disable(&pdev->dev);
295         if (!pm_runtime_status_suspended(&pdev->dev))
296                 img_prl_out_suspend(&pdev->dev);
297 
298         clk_disable_unprepare(prl->clk_sys);
299 
300         return 0;
301 }
302 
303 static const struct of_device_id img_prl_out_of_match[] = {
304         { .compatible = "img,parallel-out" },
305         {}
306 };
307 MODULE_DEVICE_TABLE(of, img_prl_out_of_match);
308 
309 static const struct dev_pm_ops img_prl_out_pm_ops = {
310         SET_RUNTIME_PM_OPS(img_prl_out_suspend,
311                            img_prl_out_resume, NULL)
312 };
313 
314 static struct platform_driver img_prl_out_driver = {
315         .driver = {
316                 .name = "img-parallel-out",
317                 .of_match_table = img_prl_out_of_match,
318                 .pm = &img_prl_out_pm_ops
319         },
320         .probe = img_prl_out_probe,
321         .remove = img_prl_out_dev_remove
322 };
323 module_platform_driver(img_prl_out_driver);
324 
325 MODULE_AUTHOR("Damien Horsley <Damien.Horsley@imgtec.com>");
326 MODULE_DESCRIPTION("IMG Parallel Output Driver");
327 MODULE_LICENSE("GPL v2");
328 

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