1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * cht_bsw_rt5672.c - ASoc Machine driver for Intel Cherryview-based platforms
4 * Cherrytrail and Braswell, with RT5672 codec.
5 *
6 * Copyright (C) 2014 Intel Corp
7 * Author: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
8 * Mengdong Lin <mengdong.lin@intel.com>
9 */
10
11 #include <linux/gpio/consumer.h>
12 #include <linux/input.h>
13 #include <linux/module.h>
14 #include <linux/platform_device.h>
15 #include <linux/slab.h>
16 #include <linux/clk.h>
17 #include <sound/pcm.h>
18 #include <sound/pcm_params.h>
19 #include <sound/soc.h>
20 #include <sound/jack.h>
21 #include <sound/soc-acpi.h>
22 #include "../../codecs/rt5670.h"
23 #include "../atom/sst-atom-controls.h"
24
25
26 /* The platform clock #3 outputs 19.2Mhz clock to codec as I2S MCLK */
27 #define CHT_PLAT_CLK_3_HZ 19200000
28 #define CHT_CODEC_DAI "rt5670-aif1"
29
30 struct cht_mc_private {
31 struct snd_soc_jack headset;
32 char codec_name[SND_ACPI_I2C_ID_LEN];
33 struct clk *mclk;
34 };
35
36 /* Headset jack detection DAPM pins */
37 static struct snd_soc_jack_pin cht_bsw_headset_pins[] = {
38 {
39 .pin = "Headset Mic",
40 .mask = SND_JACK_MICROPHONE,
41 },
42 {
43 .pin = "Headphone",
44 .mask = SND_JACK_HEADPHONE,
45 },
46 };
47
48 static int platform_clock_control(struct snd_soc_dapm_widget *w,
49 struct snd_kcontrol *k, int event)
50 {
51 struct snd_soc_dapm_context *dapm = w->dapm;
52 struct snd_soc_card *card = dapm->card;
53 struct snd_soc_dai *codec_dai;
54 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
55 int ret;
56
57 codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI);
58 if (!codec_dai) {
59 dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n");
60 return -EIO;
61 }
62
63 if (SND_SOC_DAPM_EVENT_ON(event)) {
64 if (ctx->mclk) {
65 ret = clk_prepare_enable(ctx->mclk);
66 if (ret < 0) {
67 dev_err(card->dev,
68 "could not configure MCLK state");
69 return ret;
70 }
71 }
72
73 /* set codec PLL source to the 19.2MHz platform clock (MCLK) */
74 ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
75 CHT_PLAT_CLK_3_HZ, 48000 * 512);
76 if (ret < 0) {
77 dev_err(card->dev, "can't set codec pll: %d\n", ret);
78 return ret;
79 }
80
81 /* set codec sysclk source to PLL */
82 ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
83 48000 * 512, SND_SOC_CLOCK_IN);
84 if (ret < 0) {
85 dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
86 return ret;
87 }
88 } else {
89 /* Set codec sysclk source to its internal clock because codec
90 * PLL will be off when idle and MCLK will also be off by ACPI
91 * when codec is runtime suspended. Codec needs clock for jack
92 * detection and button press.
93 */
94 snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_RCCLK,
95 48000 * 512, SND_SOC_CLOCK_IN);
96
97 if (ctx->mclk)
98 clk_disable_unprepare(ctx->mclk);
99 }
100 return 0;
101 }
102
103 static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
104 SND_SOC_DAPM_HP("Headphone", NULL),
105 SND_SOC_DAPM_MIC("Headset Mic", NULL),
106 SND_SOC_DAPM_MIC("Int Mic", NULL),
107 SND_SOC_DAPM_SPK("Ext Spk", NULL),
108 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
109 platform_clock_control, SND_SOC_DAPM_PRE_PMU |
110 SND_SOC_DAPM_POST_PMD),
111 };
112
113 static const struct snd_soc_dapm_route cht_audio_map[] = {
114 {"IN1P", NULL, "Headset Mic"},
115 {"IN1N", NULL, "Headset Mic"},
116 {"DMIC L1", NULL, "Int Mic"},
117 {"DMIC R1", NULL, "Int Mic"},
118 {"Headphone", NULL, "HPOL"},
119 {"Headphone", NULL, "HPOR"},
120 {"Ext Spk", NULL, "SPOLP"},
121 {"Ext Spk", NULL, "SPOLN"},
122 {"Ext Spk", NULL, "SPORP"},
123 {"Ext Spk", NULL, "SPORN"},
124 {"AIF1 Playback", NULL, "ssp2 Tx"},
125 {"ssp2 Tx", NULL, "codec_out0"},
126 {"ssp2 Tx", NULL, "codec_out1"},
127 {"codec_in0", NULL, "ssp2 Rx"},
128 {"codec_in1", NULL, "ssp2 Rx"},
129 {"ssp2 Rx", NULL, "AIF1 Capture"},
130 {"Headphone", NULL, "Platform Clock"},
131 {"Headset Mic", NULL, "Platform Clock"},
132 {"Int Mic", NULL, "Platform Clock"},
133 {"Ext Spk", NULL, "Platform Clock"},
134 };
135
136 static const struct snd_kcontrol_new cht_mc_controls[] = {
137 SOC_DAPM_PIN_SWITCH("Headphone"),
138 SOC_DAPM_PIN_SWITCH("Headset Mic"),
139 SOC_DAPM_PIN_SWITCH("Int Mic"),
140 SOC_DAPM_PIN_SWITCH("Ext Spk"),
141 };
142
143 static int cht_aif1_hw_params(struct snd_pcm_substream *substream,
144 struct snd_pcm_hw_params *params)
145 {
146 struct snd_soc_pcm_runtime *rtd = substream->private_data;
147 struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
148 int ret;
149
150 /* set codec PLL source to the 19.2MHz platform clock (MCLK) */
151 ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
152 CHT_PLAT_CLK_3_HZ, params_rate(params) * 512);
153 if (ret < 0) {
154 dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
155 return ret;
156 }
157
158 /* set codec sysclk source to PLL */
159 ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
160 params_rate(params) * 512,
161 SND_SOC_CLOCK_IN);
162 if (ret < 0) {
163 dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret);
164 return ret;
165 }
166 return 0;
167 }
168
169 static const struct acpi_gpio_params headset_gpios = { 0, 0, false };
170
171 static const struct acpi_gpio_mapping cht_rt5672_gpios[] = {
172 { "headset-gpios", &headset_gpios, 1 },
173 {},
174 };
175
176 static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
177 {
178 int ret;
179 struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(runtime, 0);
180 struct snd_soc_component *component = codec_dai->component;
181 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
182
183 if (devm_acpi_dev_add_driver_gpios(component->dev, cht_rt5672_gpios))
184 dev_warn(runtime->dev, "Unable to add GPIO mapping table\n");
185
186 /* Select codec ASRC clock source to track I2S1 clock, because codec
187 * is in slave mode and 100fs I2S format (BCLK = 100 * LRCLK) cannot
188 * be supported by RT5672. Otherwise, ASRC will be disabled and cause
189 * noise.
190 */
191 rt5670_sel_asrc_clk_src(component,
192 RT5670_DA_STEREO_FILTER
193 | RT5670_DA_MONO_L_FILTER
194 | RT5670_DA_MONO_R_FILTER
195 | RT5670_AD_STEREO_FILTER
196 | RT5670_AD_MONO_L_FILTER
197 | RT5670_AD_MONO_R_FILTER,
198 RT5670_CLK_SEL_I2S1_ASRC);
199
200 ret = snd_soc_card_jack_new(runtime->card, "Headset",
201 SND_JACK_HEADSET | SND_JACK_BTN_0 |
202 SND_JACK_BTN_1 | SND_JACK_BTN_2,
203 &ctx->headset,
204 cht_bsw_headset_pins,
205 ARRAY_SIZE(cht_bsw_headset_pins));
206 if (ret)
207 return ret;
208
209 snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
210 snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_1, KEY_VOLUMEUP);
211 snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN);
212
213 rt5670_set_jack_detect(component, &ctx->headset);
214 if (ctx->mclk) {
215 /*
216 * The firmware might enable the clock at
217 * boot (this information may or may not
218 * be reflected in the enable clock register).
219 * To change the rate we must disable the clock
220 * first to cover these cases. Due to common
221 * clock framework restrictions that do not allow
222 * to disable a clock that has not been enabled,
223 * we need to enable the clock first.
224 */
225 ret = clk_prepare_enable(ctx->mclk);
226 if (!ret)
227 clk_disable_unprepare(ctx->mclk);
228
229 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
230
231 if (ret) {
232 dev_err(runtime->dev, "unable to set MCLK rate\n");
233 return ret;
234 }
235 }
236 return 0;
237 }
238
239 static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
240 struct snd_pcm_hw_params *params)
241 {
242 struct snd_interval *rate = hw_param_interval(params,
243 SNDRV_PCM_HW_PARAM_RATE);
244 struct snd_interval *channels = hw_param_interval(params,
245 SNDRV_PCM_HW_PARAM_CHANNELS);
246 int ret;
247
248 /* The DSP will covert the FE rate to 48k, stereo, 24bits */
249 rate->min = rate->max = 48000;
250 channels->min = channels->max = 2;
251
252 /* set SSP2 to 24-bit */
253 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
254
255 /*
256 * Default mode for SSP configuration is TDM 4 slot. One board/design,
257 * the Lenovo Miix 2 10 uses not 1 but 2 codecs connected to SSP2. The
258 * second piggy-backed, output-only codec is inside the keyboard-dock
259 * (which has extra speakers). Unlike the main rt5672 codec, we cannot
260 * configure this codec, it is hard coded to use 2 channel 24 bit I2S.
261 * Since we only support 2 channels anyways, there is no need for TDM
262 * on any cht-bsw-rt5672 designs. So we simply use I2S 2ch everywhere.
263 */
264 ret = snd_soc_dai_set_fmt(asoc_rtd_to_cpu(rtd, 0),
265 SND_SOC_DAIFMT_I2S |
266 SND_SOC_DAIFMT_NB_NF |
267 SND_SOC_DAIFMT_CBS_CFS);
268 if (ret < 0) {
269 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
270 return ret;
271 }
272
273 return 0;
274 }
275
276 static int cht_aif1_startup(struct snd_pcm_substream *substream)
277 {
278 return snd_pcm_hw_constraint_single(substream->runtime,
279 SNDRV_PCM_HW_PARAM_RATE, 48000);
280 }
281
282 static const struct snd_soc_ops cht_aif1_ops = {
283 .startup = cht_aif1_startup,
284 };
285
286 static const struct snd_soc_ops cht_be_ssp2_ops = {
287 .hw_params = cht_aif1_hw_params,
288 };
289
290 SND_SOC_DAILINK_DEF(dummy,
291 DAILINK_COMP_ARRAY(COMP_DUMMY()));
292
293 SND_SOC_DAILINK_DEF(media,
294 DAILINK_COMP_ARRAY(COMP_CPU("media-cpu-dai")));
295
296 SND_SOC_DAILINK_DEF(deepbuffer,
297 DAILINK_COMP_ARRAY(COMP_CPU("deepbuffer-cpu-dai")));
298
299 SND_SOC_DAILINK_DEF(ssp2_port,
300 DAILINK_COMP_ARRAY(COMP_CPU("ssp2-port")));
301 SND_SOC_DAILINK_DEF(ssp2_codec,
302 DAILINK_COMP_ARRAY(COMP_CODEC("i2c-10EC5670:00",
303 "rt5670-aif1")));
304
305 SND_SOC_DAILINK_DEF(platform,
306 DAILINK_COMP_ARRAY(COMP_PLATFORM("sst-mfld-platform")));
307
308 static struct snd_soc_dai_link cht_dailink[] = {
309 /* Front End DAI links */
310 [MERR_DPCM_AUDIO] = {
311 .name = "Audio Port",
312 .stream_name = "Audio",
313 .nonatomic = true,
314 .dynamic = 1,
315 .dpcm_playback = 1,
316 .dpcm_capture = 1,
317 .ops = &cht_aif1_ops,
318 SND_SOC_DAILINK_REG(media, dummy, platform),
319 },
320 [MERR_DPCM_DEEP_BUFFER] = {
321 .name = "Deep-Buffer Audio Port",
322 .stream_name = "Deep-Buffer Audio",
323 .nonatomic = true,
324 .dynamic = 1,
325 .dpcm_playback = 1,
326 .ops = &cht_aif1_ops,
327 SND_SOC_DAILINK_REG(deepbuffer, dummy, platform),
328 },
329
330 /* Back End DAI links */
331 {
332 /* SSP2 - Codec */
333 .name = "SSP2-Codec",
334 .id = 0,
335 .no_pcm = 1,
336 .nonatomic = true,
337 .init = cht_codec_init,
338 .be_hw_params_fixup = cht_codec_fixup,
339 .dpcm_playback = 1,
340 .dpcm_capture = 1,
341 .ops = &cht_be_ssp2_ops,
342 SND_SOC_DAILINK_REG(ssp2_port, ssp2_codec, platform),
343 },
344 };
345
346 static int cht_suspend_pre(struct snd_soc_card *card)
347 {
348 struct snd_soc_component *component;
349 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
350
351 for_each_card_components(card, component) {
352 if (!strncmp(component->name,
353 ctx->codec_name, sizeof(ctx->codec_name))) {
354
355 dev_dbg(component->dev, "disabling jack detect before going to suspend.\n");
356 rt5670_jack_suspend(component);
357 break;
358 }
359 }
360 return 0;
361 }
362
363 static int cht_resume_post(struct snd_soc_card *card)
364 {
365 struct snd_soc_component *component;
366 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
367
368 for_each_card_components(card, component) {
369 if (!strncmp(component->name,
370 ctx->codec_name, sizeof(ctx->codec_name))) {
371
372 dev_dbg(component->dev, "enabling jack detect for resume.\n");
373 rt5670_jack_resume(component);
374 break;
375 }
376 }
377
378 return 0;
379 }
380
381 /* SoC card */
382 static struct snd_soc_card snd_soc_card_cht = {
383 .name = "cht-bsw-rt5672",
384 .owner = THIS_MODULE,
385 .dai_link = cht_dailink,
386 .num_links = ARRAY_SIZE(cht_dailink),
387 .dapm_widgets = cht_dapm_widgets,
388 .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
389 .dapm_routes = cht_audio_map,
390 .num_dapm_routes = ARRAY_SIZE(cht_audio_map),
391 .controls = cht_mc_controls,
392 .num_controls = ARRAY_SIZE(cht_mc_controls),
393 .suspend_pre = cht_suspend_pre,
394 .resume_post = cht_resume_post,
395 };
396
397 #define RT5672_I2C_DEFAULT "i2c-10EC5670:00"
398
399 static int snd_cht_mc_probe(struct platform_device *pdev)
400 {
401 int ret_val = 0;
402 struct cht_mc_private *drv;
403 struct snd_soc_acpi_mach *mach = pdev->dev.platform_data;
404 const char *platform_name;
405 struct acpi_device *adev;
406 int i;
407
408 drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL);
409 if (!drv)
410 return -ENOMEM;
411
412 strcpy(drv->codec_name, RT5672_I2C_DEFAULT);
413
414 /* fixup codec name based on HID */
415 adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1);
416 if (adev) {
417 snprintf(drv->codec_name, sizeof(drv->codec_name),
418 "i2c-%s", acpi_dev_name(adev));
419 put_device(&adev->dev);
420 for (i = 0; i < ARRAY_SIZE(cht_dailink); i++) {
421 if (!strcmp(cht_dailink[i].codecs->name,
422 RT5672_I2C_DEFAULT)) {
423 cht_dailink[i].codecs->name = drv->codec_name;
424 break;
425 }
426 }
427 }
428
429 /* override plaform name, if required */
430 snd_soc_card_cht.dev = &pdev->dev;
431 platform_name = mach->mach_params.platform;
432
433 ret_val = snd_soc_fixup_dai_links_platform_name(&snd_soc_card_cht,
434 platform_name);
435 if (ret_val)
436 return ret_val;
437
438 drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
439 if (IS_ERR(drv->mclk)) {
440 dev_err(&pdev->dev,
441 "Failed to get MCLK from pmc_plt_clk_3: %ld\n",
442 PTR_ERR(drv->mclk));
443 return PTR_ERR(drv->mclk);
444 }
445 snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
446
447 /* register the soc card */
448 ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_cht);
449 if (ret_val) {
450 dev_err(&pdev->dev,
451 "snd_soc_register_card failed %d\n", ret_val);
452 return ret_val;
453 }
454 platform_set_drvdata(pdev, &snd_soc_card_cht);
455 return ret_val;
456 }
457
458 static struct platform_driver snd_cht_mc_driver = {
459 .driver = {
460 .name = "cht-bsw-rt5672",
461 #if IS_ENABLED(CONFIG_SND_SOC_SOF_BAYTRAIL)
462 .pm = &snd_soc_pm_ops,
463 #endif
464 },
465 .probe = snd_cht_mc_probe,
466 };
467
468 module_platform_driver(snd_cht_mc_driver);
469
470 MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver");
471 MODULE_AUTHOR("Subhransu S. Prusty, Mengdong Lin");
472 MODULE_LICENSE("GPL v2");
473 MODULE_ALIAS("platform:cht-bsw-rt5672");
474
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