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Linux/sound/soc/samsung/i2s.c

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  1 /* sound/soc/samsung/i2s.c
  2  *
  3  * ALSA SoC Audio Layer - Samsung I2S Controller driver
  4  *
  5  * Copyright (c) 2010 Samsung Electronics Co. Ltd.
  6  *      Jaswinder Singh <jassisinghbrar@gmail.com>
  7  *
  8  * This program is free software; you can redistribute it and/or modify
  9  * it under the terms of the GNU General Public License version 2 as
 10  * published by the Free Software Foundation.
 11  */
 12 
 13 #include <dt-bindings/sound/samsung-i2s.h>
 14 #include <linux/delay.h>
 15 #include <linux/slab.h>
 16 #include <linux/clk.h>
 17 #include <linux/clk-provider.h>
 18 #include <linux/io.h>
 19 #include <linux/module.h>
 20 #include <linux/of.h>
 21 #include <linux/of_gpio.h>
 22 #include <linux/pm_runtime.h>
 23 
 24 #include <sound/soc.h>
 25 #include <sound/pcm_params.h>
 26 
 27 #include <linux/platform_data/asoc-s3c.h>
 28 
 29 #include "dma.h"
 30 #include "idma.h"
 31 #include "i2s.h"
 32 #include "i2s-regs.h"
 33 
 34 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
 35 
 36 enum samsung_dai_type {
 37         TYPE_PRI,
 38         TYPE_SEC,
 39 };
 40 
 41 struct samsung_i2s_variant_regs {
 42         unsigned int    bfs_off;
 43         unsigned int    rfs_off;
 44         unsigned int    sdf_off;
 45         unsigned int    txr_off;
 46         unsigned int    rclksrc_off;
 47         unsigned int    mss_off;
 48         unsigned int    cdclkcon_off;
 49         unsigned int    lrp_off;
 50         unsigned int    bfs_mask;
 51         unsigned int    rfs_mask;
 52         unsigned int    ftx0cnt_off;
 53 };
 54 
 55 struct samsung_i2s_dai_data {
 56         int dai_type;
 57         u32 quirks;
 58         const struct samsung_i2s_variant_regs *i2s_variant_regs;
 59 };
 60 
 61 struct i2s_dai {
 62         /* Platform device for this DAI */
 63         struct platform_device *pdev;
 64         /* Memory mapped SFR region */
 65         void __iomem    *addr;
 66         /* Rate of RCLK source clock */
 67         unsigned long rclk_srcrate;
 68         /* Frame Clock */
 69         unsigned frmclk;
 70         /*
 71          * Specifically requested RCLK,BCLK by MACHINE Driver.
 72          * 0 indicates CPU driver is free to choose any value.
 73          */
 74         unsigned rfs, bfs;
 75         /* I2S Controller's core clock */
 76         struct clk *clk;
 77         /* Clock for generating I2S signals */
 78         struct clk *op_clk;
 79         /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
 80         struct i2s_dai *pri_dai;
 81         /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
 82         struct i2s_dai *sec_dai;
 83 #define DAI_OPENED      (1 << 0) /* Dai is opened */
 84 #define DAI_MANAGER     (1 << 1) /* Dai is the manager */
 85         unsigned mode;
 86         /* Driver for this DAI */
 87         struct snd_soc_dai_driver i2s_dai_drv;
 88         /* DMA parameters */
 89         struct s3c_dma_params dma_playback;
 90         struct s3c_dma_params dma_capture;
 91         struct s3c_dma_params idma_playback;
 92         u32     quirks;
 93         u32     suspend_i2smod;
 94         u32     suspend_i2scon;
 95         u32     suspend_i2spsr;
 96         const struct samsung_i2s_variant_regs *variant_regs;
 97 
 98         /* Spinlock protecting access to the device's registers */
 99         spinlock_t spinlock;
100         spinlock_t *lock;
101 
102         /* Below fields are only valid if this is the primary FIFO */
103         struct clk *clk_table[3];
104         struct clk_onecell_data clk_data;
105 };
106 
107 /* Lock for cross i/f checks */
108 static DEFINE_SPINLOCK(lock);
109 
110 /* If this is the 'overlay' stereo DAI */
111 static inline bool is_secondary(struct i2s_dai *i2s)
112 {
113         return i2s->pri_dai ? true : false;
114 }
115 
116 /* If operating in SoC-Slave mode */
117 static inline bool is_slave(struct i2s_dai *i2s)
118 {
119         u32 mod = readl(i2s->addr + I2SMOD);
120         return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
121 }
122 
123 /* If this interface of the controller is transmitting data */
124 static inline bool tx_active(struct i2s_dai *i2s)
125 {
126         u32 active;
127 
128         if (!i2s)
129                 return false;
130 
131         active = readl(i2s->addr + I2SCON);
132 
133         if (is_secondary(i2s))
134                 active &= CON_TXSDMA_ACTIVE;
135         else
136                 active &= CON_TXDMA_ACTIVE;
137 
138         return active ? true : false;
139 }
140 
141 /* Return pointer to the other DAI */
142 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
143 {
144         return i2s->pri_dai ? : i2s->sec_dai;
145 }
146 
147 /* If the other interface of the controller is transmitting data */
148 static inline bool other_tx_active(struct i2s_dai *i2s)
149 {
150         struct i2s_dai *other = get_other_dai(i2s);
151 
152         return tx_active(other);
153 }
154 
155 /* If any interface of the controller is transmitting data */
156 static inline bool any_tx_active(struct i2s_dai *i2s)
157 {
158         return tx_active(i2s) || other_tx_active(i2s);
159 }
160 
161 /* If this interface of the controller is receiving data */
162 static inline bool rx_active(struct i2s_dai *i2s)
163 {
164         u32 active;
165 
166         if (!i2s)
167                 return false;
168 
169         active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
170 
171         return active ? true : false;
172 }
173 
174 /* If the other interface of the controller is receiving data */
175 static inline bool other_rx_active(struct i2s_dai *i2s)
176 {
177         struct i2s_dai *other = get_other_dai(i2s);
178 
179         return rx_active(other);
180 }
181 
182 /* If any interface of the controller is receiving data */
183 static inline bool any_rx_active(struct i2s_dai *i2s)
184 {
185         return rx_active(i2s) || other_rx_active(i2s);
186 }
187 
188 /* If the other DAI is transmitting or receiving data */
189 static inline bool other_active(struct i2s_dai *i2s)
190 {
191         return other_rx_active(i2s) || other_tx_active(i2s);
192 }
193 
194 /* If this DAI is transmitting or receiving data */
195 static inline bool this_active(struct i2s_dai *i2s)
196 {
197         return tx_active(i2s) || rx_active(i2s);
198 }
199 
200 /* If the controller is active anyway */
201 static inline bool any_active(struct i2s_dai *i2s)
202 {
203         return this_active(i2s) || other_active(i2s);
204 }
205 
206 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
207 {
208         return snd_soc_dai_get_drvdata(dai);
209 }
210 
211 static inline bool is_opened(struct i2s_dai *i2s)
212 {
213         if (i2s && (i2s->mode & DAI_OPENED))
214                 return true;
215         else
216                 return false;
217 }
218 
219 static inline bool is_manager(struct i2s_dai *i2s)
220 {
221         if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
222                 return true;
223         else
224                 return false;
225 }
226 
227 /* Read RCLK of I2S (in multiples of LRCLK) */
228 static inline unsigned get_rfs(struct i2s_dai *i2s)
229 {
230         u32 rfs;
231         rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
232         rfs &= i2s->variant_regs->rfs_mask;
233 
234         switch (rfs) {
235         case 7: return 192;
236         case 6: return 96;
237         case 5: return 128;
238         case 4: return 64;
239         case 3: return 768;
240         case 2: return 384;
241         case 1: return 512;
242         default: return 256;
243         }
244 }
245 
246 /* Write RCLK of I2S (in multiples of LRCLK) */
247 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
248 {
249         u32 mod = readl(i2s->addr + I2SMOD);
250         int rfs_shift = i2s->variant_regs->rfs_off;
251 
252         mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
253 
254         switch (rfs) {
255         case 192:
256                 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
257                 break;
258         case 96:
259                 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
260                 break;
261         case 128:
262                 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
263                 break;
264         case 64:
265                 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
266                 break;
267         case 768:
268                 mod |= (MOD_RCLK_768FS << rfs_shift);
269                 break;
270         case 512:
271                 mod |= (MOD_RCLK_512FS << rfs_shift);
272                 break;
273         case 384:
274                 mod |= (MOD_RCLK_384FS << rfs_shift);
275                 break;
276         default:
277                 mod |= (MOD_RCLK_256FS << rfs_shift);
278                 break;
279         }
280 
281         writel(mod, i2s->addr + I2SMOD);
282 }
283 
284 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
285 static inline unsigned get_bfs(struct i2s_dai *i2s)
286 {
287         u32 bfs;
288         bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
289         bfs &= i2s->variant_regs->bfs_mask;
290 
291         switch (bfs) {
292         case 8: return 256;
293         case 7: return 192;
294         case 6: return 128;
295         case 5: return 96;
296         case 4: return 64;
297         case 3: return 24;
298         case 2: return 16;
299         case 1: return 48;
300         default: return 32;
301         }
302 }
303 
304 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
305 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
306 {
307         u32 mod = readl(i2s->addr + I2SMOD);
308         int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
309         int bfs_shift = i2s->variant_regs->bfs_off;
310 
311         /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
312         if (!tdm && bfs > 48) {
313                 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
314                 return;
315         }
316 
317         mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
318 
319         switch (bfs) {
320         case 48:
321                 mod |= (MOD_BCLK_48FS << bfs_shift);
322                 break;
323         case 32:
324                 mod |= (MOD_BCLK_32FS << bfs_shift);
325                 break;
326         case 24:
327                 mod |= (MOD_BCLK_24FS << bfs_shift);
328                 break;
329         case 16:
330                 mod |= (MOD_BCLK_16FS << bfs_shift);
331                 break;
332         case 64:
333                 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
334                 break;
335         case 96:
336                 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
337                 break;
338         case 128:
339                 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
340                 break;
341         case 192:
342                 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
343                 break;
344         case 256:
345                 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
346                 break;
347         default:
348                 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
349                 return;
350         }
351 
352         writel(mod, i2s->addr + I2SMOD);
353 }
354 
355 /* Sample-Size */
356 static inline int get_blc(struct i2s_dai *i2s)
357 {
358         int blc = readl(i2s->addr + I2SMOD);
359 
360         blc = (blc >> 13) & 0x3;
361 
362         switch (blc) {
363         case 2: return 24;
364         case 1: return 8;
365         default: return 16;
366         }
367 }
368 
369 /* TX Channel Control */
370 static void i2s_txctrl(struct i2s_dai *i2s, int on)
371 {
372         void __iomem *addr = i2s->addr;
373         int txr_off = i2s->variant_regs->txr_off;
374         u32 con = readl(addr + I2SCON);
375         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
376 
377         if (on) {
378                 con |= CON_ACTIVE;
379                 con &= ~CON_TXCH_PAUSE;
380 
381                 if (is_secondary(i2s)) {
382                         con |= CON_TXSDMA_ACTIVE;
383                         con &= ~CON_TXSDMA_PAUSE;
384                 } else {
385                         con |= CON_TXDMA_ACTIVE;
386                         con &= ~CON_TXDMA_PAUSE;
387                 }
388 
389                 if (any_rx_active(i2s))
390                         mod |= 2 << txr_off;
391                 else
392                         mod |= 0 << txr_off;
393         } else {
394                 if (is_secondary(i2s)) {
395                         con |=  CON_TXSDMA_PAUSE;
396                         con &= ~CON_TXSDMA_ACTIVE;
397                 } else {
398                         con |=  CON_TXDMA_PAUSE;
399                         con &= ~CON_TXDMA_ACTIVE;
400                 }
401 
402                 if (other_tx_active(i2s)) {
403                         writel(con, addr + I2SCON);
404                         return;
405                 }
406 
407                 con |=  CON_TXCH_PAUSE;
408 
409                 if (any_rx_active(i2s))
410                         mod |= 1 << txr_off;
411                 else
412                         con &= ~CON_ACTIVE;
413         }
414 
415         writel(mod, addr + I2SMOD);
416         writel(con, addr + I2SCON);
417 }
418 
419 /* RX Channel Control */
420 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
421 {
422         void __iomem *addr = i2s->addr;
423         int txr_off = i2s->variant_regs->txr_off;
424         u32 con = readl(addr + I2SCON);
425         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
426 
427         if (on) {
428                 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
429                 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
430 
431                 if (any_tx_active(i2s))
432                         mod |= 2 << txr_off;
433                 else
434                         mod |= 1 << txr_off;
435         } else {
436                 con |=  CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
437                 con &= ~CON_RXDMA_ACTIVE;
438 
439                 if (any_tx_active(i2s))
440                         mod |= 0 << txr_off;
441                 else
442                         con &= ~CON_ACTIVE;
443         }
444 
445         writel(mod, addr + I2SMOD);
446         writel(con, addr + I2SCON);
447 }
448 
449 /* Flush FIFO of an interface */
450 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
451 {
452         void __iomem *fic;
453         u32 val;
454 
455         if (!i2s)
456                 return;
457 
458         if (is_secondary(i2s))
459                 fic = i2s->addr + I2SFICS;
460         else
461                 fic = i2s->addr + I2SFIC;
462 
463         /* Flush the FIFO */
464         writel(readl(fic) | flush, fic);
465 
466         /* Be patient */
467         val = msecs_to_loops(1) / 1000; /* 1 usec */
468         while (--val)
469                 cpu_relax();
470 
471         writel(readl(fic) & ~flush, fic);
472 }
473 
474 static int i2s_set_sysclk(struct snd_soc_dai *dai,
475           int clk_id, unsigned int rfs, int dir)
476 {
477         struct i2s_dai *i2s = to_info(dai);
478         struct i2s_dai *other = get_other_dai(i2s);
479         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
480         unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
481         unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
482         u32 mod, mask, val = 0;
483         unsigned long flags;
484 
485         spin_lock_irqsave(i2s->lock, flags);
486         mod = readl(i2s->addr + I2SMOD);
487         spin_unlock_irqrestore(i2s->lock, flags);
488 
489         switch (clk_id) {
490         case SAMSUNG_I2S_OPCLK:
491                 mask = MOD_OPCLK_MASK;
492                 val = dir;
493                 break;
494         case SAMSUNG_I2S_CDCLK:
495                 mask = 1 << i2s_regs->cdclkcon_off;
496                 /* Shouldn't matter in GATING(CLOCK_IN) mode */
497                 if (dir == SND_SOC_CLOCK_IN)
498                         rfs = 0;
499 
500                 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
501                                 (any_active(i2s) &&
502                                 (((dir == SND_SOC_CLOCK_IN)
503                                         && !(mod & cdcon_mask)) ||
504                                 ((dir == SND_SOC_CLOCK_OUT)
505                                         && (mod & cdcon_mask))))) {
506                         dev_err(&i2s->pdev->dev,
507                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
508                         return -EAGAIN;
509                 }
510 
511                 if (dir == SND_SOC_CLOCK_IN)
512                         val = 1 << i2s_regs->cdclkcon_off;
513 
514                 i2s->rfs = rfs;
515                 break;
516 
517         case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
518         case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
519                 mask = 1 << i2s_regs->rclksrc_off;
520 
521                 if ((i2s->quirks & QUIRK_NO_MUXPSR)
522                                 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
523                         clk_id = 0;
524                 else
525                         clk_id = 1;
526 
527                 if (!any_active(i2s)) {
528                         if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
529                                 if ((clk_id && !(mod & rsrc_mask)) ||
530                                         (!clk_id && (mod & rsrc_mask))) {
531                                         clk_disable_unprepare(i2s->op_clk);
532                                         clk_put(i2s->op_clk);
533                                 } else {
534                                         i2s->rclk_srcrate =
535                                                 clk_get_rate(i2s->op_clk);
536                                         return 0;
537                                 }
538                         }
539 
540                         if (clk_id)
541                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
542                                                 "i2s_opclk1");
543                         else
544                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
545                                                 "i2s_opclk0");
546 
547                         if (WARN_ON(IS_ERR(i2s->op_clk)))
548                                 return PTR_ERR(i2s->op_clk);
549 
550                         clk_prepare_enable(i2s->op_clk);
551                         i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
552 
553                         /* Over-ride the other's */
554                         if (other) {
555                                 other->op_clk = i2s->op_clk;
556                                 other->rclk_srcrate = i2s->rclk_srcrate;
557                         }
558                 } else if ((!clk_id && (mod & rsrc_mask))
559                                 || (clk_id && !(mod & rsrc_mask))) {
560                         dev_err(&i2s->pdev->dev,
561                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
562                         return -EAGAIN;
563                 } else {
564                         /* Call can't be on the active DAI */
565                         i2s->op_clk = other->op_clk;
566                         i2s->rclk_srcrate = other->rclk_srcrate;
567                         return 0;
568                 }
569 
570                 if (clk_id == 1)
571                         val = 1 << i2s_regs->rclksrc_off;
572                 break;
573         default:
574                 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
575                 return -EINVAL;
576         }
577 
578         spin_lock_irqsave(i2s->lock, flags);
579         mod = readl(i2s->addr + I2SMOD);
580         mod = (mod & ~mask) | val;
581         writel(mod, i2s->addr + I2SMOD);
582         spin_unlock_irqrestore(i2s->lock, flags);
583 
584         return 0;
585 }
586 
587 static int i2s_set_fmt(struct snd_soc_dai *dai,
588         unsigned int fmt)
589 {
590         struct i2s_dai *i2s = to_info(dai);
591         int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
592         u32 mod, tmp = 0;
593         unsigned long flags;
594 
595         lrp_shift = i2s->variant_regs->lrp_off;
596         sdf_shift = i2s->variant_regs->sdf_off;
597         mod_slave = 1 << i2s->variant_regs->mss_off;
598 
599         sdf_mask = MOD_SDF_MASK << sdf_shift;
600         lrp_rlow = MOD_LR_RLOW << lrp_shift;
601 
602         /* Format is priority */
603         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
604         case SND_SOC_DAIFMT_RIGHT_J:
605                 tmp |= lrp_rlow;
606                 tmp |= (MOD_SDF_MSB << sdf_shift);
607                 break;
608         case SND_SOC_DAIFMT_LEFT_J:
609                 tmp |= lrp_rlow;
610                 tmp |= (MOD_SDF_LSB << sdf_shift);
611                 break;
612         case SND_SOC_DAIFMT_I2S:
613                 tmp |= (MOD_SDF_IIS << sdf_shift);
614                 break;
615         default:
616                 dev_err(&i2s->pdev->dev, "Format not supported\n");
617                 return -EINVAL;
618         }
619 
620         /*
621          * INV flag is relative to the FORMAT flag - if set it simply
622          * flips the polarity specified by the Standard
623          */
624         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
625         case SND_SOC_DAIFMT_NB_NF:
626                 break;
627         case SND_SOC_DAIFMT_NB_IF:
628                 if (tmp & lrp_rlow)
629                         tmp &= ~lrp_rlow;
630                 else
631                         tmp |= lrp_rlow;
632                 break;
633         default:
634                 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
635                 return -EINVAL;
636         }
637 
638         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
639         case SND_SOC_DAIFMT_CBM_CFM:
640                 tmp |= mod_slave;
641                 break;
642         case SND_SOC_DAIFMT_CBS_CFS:
643                 /* Set default source clock in Master mode */
644                 if (i2s->rclk_srcrate == 0)
645                         i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
646                                                         0, SND_SOC_CLOCK_IN);
647                 break;
648         default:
649                 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
650                 return -EINVAL;
651         }
652 
653         spin_lock_irqsave(i2s->lock, flags);
654         mod = readl(i2s->addr + I2SMOD);
655         /*
656          * Don't change the I2S mode if any controller is active on this
657          * channel.
658          */
659         if (any_active(i2s) &&
660                 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
661                 spin_unlock_irqrestore(i2s->lock, flags);
662                 dev_err(&i2s->pdev->dev,
663                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
664                 return -EAGAIN;
665         }
666 
667         mod &= ~(sdf_mask | lrp_rlow | mod_slave);
668         mod |= tmp;
669         writel(mod, i2s->addr + I2SMOD);
670         spin_unlock_irqrestore(i2s->lock, flags);
671 
672         return 0;
673 }
674 
675 static int i2s_hw_params(struct snd_pcm_substream *substream,
676         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
677 {
678         struct i2s_dai *i2s = to_info(dai);
679         u32 mod, mask = 0, val = 0;
680         unsigned long flags;
681 
682         if (!is_secondary(i2s))
683                 mask |= (MOD_DC2_EN | MOD_DC1_EN);
684 
685         switch (params_channels(params)) {
686         case 6:
687                 val |= MOD_DC2_EN;
688         case 4:
689                 val |= MOD_DC1_EN;
690                 break;
691         case 2:
692                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
693                         i2s->dma_playback.dma_size = 4;
694                 else
695                         i2s->dma_capture.dma_size = 4;
696                 break;
697         case 1:
698                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
699                         i2s->dma_playback.dma_size = 2;
700                 else
701                         i2s->dma_capture.dma_size = 2;
702 
703                 break;
704         default:
705                 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
706                                 params_channels(params));
707                 return -EINVAL;
708         }
709 
710         if (is_secondary(i2s))
711                 mask |= MOD_BLCS_MASK;
712         else
713                 mask |= MOD_BLCP_MASK;
714 
715         if (is_manager(i2s))
716                 mask |= MOD_BLC_MASK;
717 
718         switch (params_width(params)) {
719         case 8:
720                 if (is_secondary(i2s))
721                         val |= MOD_BLCS_8BIT;
722                 else
723                         val |= MOD_BLCP_8BIT;
724                 if (is_manager(i2s))
725                         val |= MOD_BLC_8BIT;
726                 break;
727         case 16:
728                 if (is_secondary(i2s))
729                         val |= MOD_BLCS_16BIT;
730                 else
731                         val |= MOD_BLCP_16BIT;
732                 if (is_manager(i2s))
733                         val |= MOD_BLC_16BIT;
734                 break;
735         case 24:
736                 if (is_secondary(i2s))
737                         val |= MOD_BLCS_24BIT;
738                 else
739                         val |= MOD_BLCP_24BIT;
740                 if (is_manager(i2s))
741                         val |= MOD_BLC_24BIT;
742                 break;
743         default:
744                 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
745                                 params_format(params));
746                 return -EINVAL;
747         }
748 
749         spin_lock_irqsave(i2s->lock, flags);
750         mod = readl(i2s->addr + I2SMOD);
751         mod = (mod & ~mask) | val;
752         writel(mod, i2s->addr + I2SMOD);
753         spin_unlock_irqrestore(i2s->lock, flags);
754 
755         samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
756 
757         i2s->frmclk = params_rate(params);
758 
759         return 0;
760 }
761 
762 /* We set constraints on the substream acc to the version of I2S */
763 static int i2s_startup(struct snd_pcm_substream *substream,
764           struct snd_soc_dai *dai)
765 {
766         struct i2s_dai *i2s = to_info(dai);
767         struct i2s_dai *other = get_other_dai(i2s);
768         unsigned long flags;
769 
770         spin_lock_irqsave(&lock, flags);
771 
772         i2s->mode |= DAI_OPENED;
773 
774         if (is_manager(other))
775                 i2s->mode &= ~DAI_MANAGER;
776         else
777                 i2s->mode |= DAI_MANAGER;
778 
779         if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
780                 writel(CON_RSTCLR, i2s->addr + I2SCON);
781 
782         spin_unlock_irqrestore(&lock, flags);
783 
784         return 0;
785 }
786 
787 static void i2s_shutdown(struct snd_pcm_substream *substream,
788         struct snd_soc_dai *dai)
789 {
790         struct i2s_dai *i2s = to_info(dai);
791         struct i2s_dai *other = get_other_dai(i2s);
792         unsigned long flags;
793 
794         spin_lock_irqsave(&lock, flags);
795 
796         i2s->mode &= ~DAI_OPENED;
797         i2s->mode &= ~DAI_MANAGER;
798 
799         if (is_opened(other))
800                 other->mode |= DAI_MANAGER;
801 
802         /* Reset any constraint on RFS and BFS */
803         i2s->rfs = 0;
804         i2s->bfs = 0;
805 
806         spin_unlock_irqrestore(&lock, flags);
807 }
808 
809 static int config_setup(struct i2s_dai *i2s)
810 {
811         struct i2s_dai *other = get_other_dai(i2s);
812         unsigned rfs, bfs, blc;
813         u32 psr;
814 
815         blc = get_blc(i2s);
816 
817         bfs = i2s->bfs;
818 
819         if (!bfs && other)
820                 bfs = other->bfs;
821 
822         /* Select least possible multiple(2) if no constraint set */
823         if (!bfs)
824                 bfs = blc * 2;
825 
826         rfs = i2s->rfs;
827 
828         if (!rfs && other)
829                 rfs = other->rfs;
830 
831         if ((rfs == 256 || rfs == 512) && (blc == 24)) {
832                 dev_err(&i2s->pdev->dev,
833                         "%d-RFS not supported for 24-blc\n", rfs);
834                 return -EINVAL;
835         }
836 
837         if (!rfs) {
838                 if (bfs == 16 || bfs == 32)
839                         rfs = 256;
840                 else
841                         rfs = 384;
842         }
843 
844         /* If already setup and running */
845         if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
846                 dev_err(&i2s->pdev->dev,
847                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
848                 return -EAGAIN;
849         }
850 
851         set_bfs(i2s, bfs);
852         set_rfs(i2s, rfs);
853 
854         /* Don't bother with PSR in Slave mode */
855         if (is_slave(i2s))
856                 return 0;
857 
858         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
859                 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
860                 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
861                 dev_dbg(&i2s->pdev->dev,
862                         "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
863                                 i2s->rclk_srcrate, psr, rfs, bfs);
864         }
865 
866         return 0;
867 }
868 
869 static int i2s_trigger(struct snd_pcm_substream *substream,
870         int cmd, struct snd_soc_dai *dai)
871 {
872         int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
873         struct snd_soc_pcm_runtime *rtd = substream->private_data;
874         struct i2s_dai *i2s = to_info(rtd->cpu_dai);
875         unsigned long flags;
876 
877         switch (cmd) {
878         case SNDRV_PCM_TRIGGER_START:
879         case SNDRV_PCM_TRIGGER_RESUME:
880         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
881                 spin_lock_irqsave(i2s->lock, flags);
882 
883                 if (config_setup(i2s)) {
884                         spin_unlock_irqrestore(i2s->lock, flags);
885                         return -EINVAL;
886                 }
887 
888                 if (capture)
889                         i2s_rxctrl(i2s, 1);
890                 else
891                         i2s_txctrl(i2s, 1);
892 
893                 spin_unlock_irqrestore(i2s->lock, flags);
894                 break;
895         case SNDRV_PCM_TRIGGER_STOP:
896         case SNDRV_PCM_TRIGGER_SUSPEND:
897         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
898                 spin_lock_irqsave(i2s->lock, flags);
899 
900                 if (capture) {
901                         i2s_rxctrl(i2s, 0);
902                         i2s_fifo(i2s, FIC_RXFLUSH);
903                 } else {
904                         i2s_txctrl(i2s, 0);
905                         i2s_fifo(i2s, FIC_TXFLUSH);
906                 }
907 
908                 spin_unlock_irqrestore(i2s->lock, flags);
909                 break;
910         }
911 
912         return 0;
913 }
914 
915 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
916         int div_id, int div)
917 {
918         struct i2s_dai *i2s = to_info(dai);
919         struct i2s_dai *other = get_other_dai(i2s);
920 
921         switch (div_id) {
922         case SAMSUNG_I2S_DIV_BCLK:
923                 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
924                         || (other && other->bfs && (other->bfs != div))) {
925                         dev_err(&i2s->pdev->dev,
926                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
927                         return -EAGAIN;
928                 }
929                 i2s->bfs = div;
930                 break;
931         default:
932                 dev_err(&i2s->pdev->dev,
933                         "Invalid clock divider(%d)\n", div_id);
934                 return -EINVAL;
935         }
936 
937         return 0;
938 }
939 
940 static snd_pcm_sframes_t
941 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
942 {
943         struct i2s_dai *i2s = to_info(dai);
944         u32 reg = readl(i2s->addr + I2SFIC);
945         snd_pcm_sframes_t delay;
946         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
947 
948         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
949                 delay = FIC_RXCOUNT(reg);
950         else if (is_secondary(i2s))
951                 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
952         else
953                 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
954 
955         return delay;
956 }
957 
958 #ifdef CONFIG_PM
959 static int i2s_suspend(struct snd_soc_dai *dai)
960 {
961         struct i2s_dai *i2s = to_info(dai);
962 
963         i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
964         i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
965         i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
966 
967         return 0;
968 }
969 
970 static int i2s_resume(struct snd_soc_dai *dai)
971 {
972         struct i2s_dai *i2s = to_info(dai);
973 
974         writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
975         writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
976         writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
977 
978         return 0;
979 }
980 #else
981 #define i2s_suspend NULL
982 #define i2s_resume  NULL
983 #endif
984 
985 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
986 {
987         struct i2s_dai *i2s = to_info(dai);
988         struct i2s_dai *other = get_other_dai(i2s);
989         unsigned long flags;
990 
991         if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
992                 samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback,
993                                            NULL);
994         } else {
995                 samsung_asoc_init_dma_data(dai, &i2s->dma_playback,
996                                            &i2s->dma_capture);
997 
998                 if (i2s->quirks & QUIRK_NEED_RSTCLR)
999                         writel(CON_RSTCLR, i2s->addr + I2SCON);
1000 
1001                 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
1002                         idma_reg_addr_init(i2s->addr,
1003                                         i2s->sec_dai->idma_playback.dma_addr);
1004         }
1005 
1006         /* Reset any constraint on RFS and BFS */
1007         i2s->rfs = 0;
1008         i2s->bfs = 0;
1009         i2s->rclk_srcrate = 0;
1010 
1011         spin_lock_irqsave(i2s->lock, flags);
1012         i2s_txctrl(i2s, 0);
1013         i2s_rxctrl(i2s, 0);
1014         i2s_fifo(i2s, FIC_TXFLUSH);
1015         i2s_fifo(other, FIC_TXFLUSH);
1016         i2s_fifo(i2s, FIC_RXFLUSH);
1017         spin_unlock_irqrestore(i2s->lock, flags);
1018 
1019         /* Gate CDCLK by default */
1020         if (!is_opened(other))
1021                 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1022                                 0, SND_SOC_CLOCK_IN);
1023 
1024         return 0;
1025 }
1026 
1027 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1028 {
1029         struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1030 
1031         if (!is_secondary(i2s)) {
1032                 if (i2s->quirks & QUIRK_NEED_RSTCLR) {
1033                         spin_lock(i2s->lock);
1034                         writel(0, i2s->addr + I2SCON);
1035                         spin_unlock(i2s->lock);
1036                 }
1037         }
1038 
1039         return 0;
1040 }
1041 
1042 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1043         .trigger = i2s_trigger,
1044         .hw_params = i2s_hw_params,
1045         .set_fmt = i2s_set_fmt,
1046         .set_clkdiv = i2s_set_clkdiv,
1047         .set_sysclk = i2s_set_sysclk,
1048         .startup = i2s_startup,
1049         .shutdown = i2s_shutdown,
1050         .delay = i2s_delay,
1051 };
1052 
1053 static const struct snd_soc_component_driver samsung_i2s_component = {
1054         .name           = "samsung-i2s",
1055 };
1056 
1057 #define SAMSUNG_I2S_RATES       SNDRV_PCM_RATE_8000_96000
1058 
1059 #define SAMSUNG_I2S_FMTS        (SNDRV_PCM_FMTBIT_S8 | \
1060                                         SNDRV_PCM_FMTBIT_S16_LE | \
1061                                         SNDRV_PCM_FMTBIT_S24_LE)
1062 
1063 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
1064 {
1065         struct i2s_dai *i2s;
1066         int ret;
1067 
1068         i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1069         if (i2s == NULL)
1070                 return NULL;
1071 
1072         i2s->pdev = pdev;
1073         i2s->pri_dai = NULL;
1074         i2s->sec_dai = NULL;
1075         i2s->i2s_dai_drv.symmetric_rates = 1;
1076         i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1077         i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1078         i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1079         i2s->i2s_dai_drv.suspend = i2s_suspend;
1080         i2s->i2s_dai_drv.resume = i2s_resume;
1081         i2s->i2s_dai_drv.playback.channels_min = 1;
1082         i2s->i2s_dai_drv.playback.channels_max = 2;
1083         i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
1084         i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1085 
1086         if (!sec) {
1087                 i2s->i2s_dai_drv.capture.channels_min = 1;
1088                 i2s->i2s_dai_drv.capture.channels_max = 2;
1089                 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
1090                 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
1091                 dev_set_drvdata(&i2s->pdev->dev, i2s);
1092         } else {        /* Create a new platform_device for Secondary */
1093                 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
1094                 if (!i2s->pdev)
1095                         return NULL;
1096 
1097                 i2s->pdev->dev.parent = &pdev->dev;
1098 
1099                 platform_set_drvdata(i2s->pdev, i2s);
1100                 ret = platform_device_add(i2s->pdev);
1101                 if (ret < 0)
1102                         return NULL;
1103         }
1104 
1105         return i2s;
1106 }
1107 
1108 static const struct of_device_id exynos_i2s_match[];
1109 
1110 static inline const struct samsung_i2s_dai_data *samsung_i2s_get_driver_data(
1111                                                 struct platform_device *pdev)
1112 {
1113         if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
1114                 const struct of_device_id *match;
1115                 match = of_match_node(exynos_i2s_match, pdev->dev.of_node);
1116                 return match ? match->data : NULL;
1117         } else {
1118                 return (struct samsung_i2s_dai_data *)
1119                                 platform_get_device_id(pdev)->driver_data;
1120         }
1121 }
1122 
1123 #ifdef CONFIG_PM
1124 static int i2s_runtime_suspend(struct device *dev)
1125 {
1126         struct i2s_dai *i2s = dev_get_drvdata(dev);
1127 
1128         clk_disable_unprepare(i2s->clk);
1129 
1130         return 0;
1131 }
1132 
1133 static int i2s_runtime_resume(struct device *dev)
1134 {
1135         struct i2s_dai *i2s = dev_get_drvdata(dev);
1136 
1137         clk_prepare_enable(i2s->clk);
1138 
1139         return 0;
1140 }
1141 #endif /* CONFIG_PM */
1142 
1143 static void i2s_unregister_clocks(struct i2s_dai *i2s)
1144 {
1145         int i;
1146 
1147         for (i = 0; i < i2s->clk_data.clk_num; i++) {
1148                 if (!IS_ERR(i2s->clk_table[i]))
1149                         clk_unregister(i2s->clk_table[i]);
1150         }
1151 }
1152 
1153 static void i2s_unregister_clock_provider(struct platform_device *pdev)
1154 {
1155         struct i2s_dai *i2s = dev_get_drvdata(&pdev->dev);
1156 
1157         of_clk_del_provider(pdev->dev.of_node);
1158         i2s_unregister_clocks(i2s);
1159 }
1160 
1161 static int i2s_register_clock_provider(struct platform_device *pdev)
1162 {
1163         struct device *dev = &pdev->dev;
1164         struct i2s_dai *i2s = dev_get_drvdata(dev);
1165         const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1166         const char *p_names[2] = { NULL };
1167         const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
1168         struct clk *rclksrc;
1169         int ret, i;
1170 
1171         /* Register the clock provider only if it's expected in the DTB */
1172         if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1173                 return 0;
1174 
1175         /* Get the RCLKSRC mux clock parent clock names */
1176         for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1177                 rclksrc = clk_get(dev, clk_name[i]);
1178                 if (IS_ERR(rclksrc))
1179                         continue;
1180                 p_names[i] = __clk_get_name(rclksrc);
1181                 clk_put(rclksrc);
1182         }
1183 
1184         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
1185                 /* Activate the prescaler */
1186                 u32 val = readl(i2s->addr + I2SPSR);
1187                 writel(val | PSR_PSREN, i2s->addr + I2SPSR);
1188 
1189                 i2s->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(NULL,
1190                                 "i2s_rclksrc", p_names, ARRAY_SIZE(p_names),
1191                                 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1192                                 i2s->addr + I2SMOD, reg_info->rclksrc_off,
1193                                 1, 0, i2s->lock);
1194 
1195                 i2s->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(NULL,
1196                                 "i2s_presc", "i2s_rclksrc",
1197                                 CLK_SET_RATE_PARENT,
1198                                 i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
1199 
1200                 p_names[0] = "i2s_presc";
1201                 i2s->clk_data.clk_num = 2;
1202         }
1203         of_property_read_string_index(dev->of_node,
1204                                 "clock-output-names", 0, &clk_name[0]);
1205 
1206         i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(NULL, clk_name[0],
1207                                 p_names[0], CLK_SET_RATE_PARENT,
1208                                 i2s->addr + I2SMOD, reg_info->cdclkcon_off,
1209                                 CLK_GATE_SET_TO_DISABLE, i2s->lock);
1210 
1211         i2s->clk_data.clk_num += 1;
1212         i2s->clk_data.clks = i2s->clk_table;
1213 
1214         ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1215                                   &i2s->clk_data);
1216         if (ret < 0) {
1217                 dev_err(dev, "failed to add clock provider: %d\n", ret);
1218                 i2s_unregister_clocks(i2s);
1219         }
1220 
1221         return ret;
1222 }
1223 
1224 static int samsung_i2s_probe(struct platform_device *pdev)
1225 {
1226         struct i2s_dai *pri_dai, *sec_dai = NULL;
1227         struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1228         struct samsung_i2s *i2s_cfg = NULL;
1229         struct resource *res;
1230         u32 regs_base, quirks = 0, idma_addr = 0;
1231         struct device_node *np = pdev->dev.of_node;
1232         const struct samsung_i2s_dai_data *i2s_dai_data;
1233         int ret;
1234 
1235         /* Call during Seconday interface registration */
1236         i2s_dai_data = samsung_i2s_get_driver_data(pdev);
1237 
1238         if (i2s_dai_data->dai_type == TYPE_SEC) {
1239                 sec_dai = dev_get_drvdata(&pdev->dev);
1240                 if (!sec_dai) {
1241                         dev_err(&pdev->dev, "Unable to get drvdata\n");
1242                         return -EFAULT;
1243                 }
1244                 ret = devm_snd_soc_register_component(&sec_dai->pdev->dev,
1245                                                 &samsung_i2s_component,
1246                                                 &sec_dai->i2s_dai_drv, 1);
1247                 if (ret != 0)
1248                         return ret;
1249 
1250                 return samsung_asoc_dma_platform_register(&pdev->dev);
1251         }
1252 
1253         pri_dai = i2s_alloc_dai(pdev, false);
1254         if (!pri_dai) {
1255                 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1256                 return -ENOMEM;
1257         }
1258 
1259         spin_lock_init(&pri_dai->spinlock);
1260         pri_dai->lock = &pri_dai->spinlock;
1261 
1262         if (!np) {
1263                 if (i2s_pdata == NULL) {
1264                         dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1265                         return -EINVAL;
1266                 }
1267 
1268                 pri_dai->dma_playback.slave = i2s_pdata->dma_playback;
1269                 pri_dai->dma_capture.slave = i2s_pdata->dma_capture;
1270 
1271                 if (&i2s_pdata->type)
1272                         i2s_cfg = &i2s_pdata->type.i2s;
1273 
1274                 if (i2s_cfg) {
1275                         quirks = i2s_cfg->quirks;
1276                         idma_addr = i2s_cfg->idma_addr;
1277                 }
1278         } else {
1279                 quirks = i2s_dai_data->quirks;
1280                 if (of_property_read_u32(np, "samsung,idma-addr",
1281                                          &idma_addr)) {
1282                         if (quirks & QUIRK_SUPPORTS_IDMA) {
1283                                 dev_info(&pdev->dev, "idma address is not"\
1284                                                 "specified");
1285                         }
1286                 }
1287         }
1288 
1289         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1290         pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
1291         if (IS_ERR(pri_dai->addr))
1292                 return PTR_ERR(pri_dai->addr);
1293 
1294         regs_base = res->start;
1295 
1296         pri_dai->clk = devm_clk_get(&pdev->dev, "iis");
1297         if (IS_ERR(pri_dai->clk)) {
1298                 dev_err(&pdev->dev, "Failed to get iis clock\n");
1299                 return PTR_ERR(pri_dai->clk);
1300         }
1301 
1302         ret = clk_prepare_enable(pri_dai->clk);
1303         if (ret != 0) {
1304                 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1305                 return ret;
1306         }
1307         pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
1308         pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
1309         pri_dai->dma_playback.ch_name = "tx";
1310         pri_dai->dma_capture.ch_name = "rx";
1311         pri_dai->dma_playback.dma_size = 4;
1312         pri_dai->dma_capture.dma_size = 4;
1313         pri_dai->quirks = quirks;
1314         pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1315 
1316         if (quirks & QUIRK_PRI_6CHAN)
1317                 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1318 
1319         if (quirks & QUIRK_SEC_DAI) {
1320                 sec_dai = i2s_alloc_dai(pdev, true);
1321                 if (!sec_dai) {
1322                         dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1323                         return -ENOMEM;
1324                 }
1325 
1326                 sec_dai->lock = &pri_dai->spinlock;
1327                 sec_dai->variant_regs = pri_dai->variant_regs;
1328                 sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
1329                 sec_dai->dma_playback.ch_name = "tx-sec";
1330 
1331                 if (!np)
1332                         sec_dai->dma_playback.slave = i2s_pdata->dma_play_sec;
1333 
1334                 sec_dai->dma_playback.dma_size = 4;
1335                 sec_dai->addr = pri_dai->addr;
1336                 sec_dai->clk = pri_dai->clk;
1337                 sec_dai->quirks = quirks;
1338                 sec_dai->idma_playback.dma_addr = idma_addr;
1339                 sec_dai->pri_dai = pri_dai;
1340                 pri_dai->sec_dai = sec_dai;
1341         }
1342 
1343         if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1344                 dev_err(&pdev->dev, "Unable to configure gpio\n");
1345                 return -EINVAL;
1346         }
1347 
1348         devm_snd_soc_register_component(&pri_dai->pdev->dev,
1349                                         &samsung_i2s_component,
1350                                         &pri_dai->i2s_dai_drv, 1);
1351 
1352         pm_runtime_enable(&pdev->dev);
1353 
1354         ret = samsung_asoc_dma_platform_register(&pdev->dev);
1355         if (ret != 0)
1356                 return ret;
1357 
1358         return i2s_register_clock_provider(pdev);
1359 }
1360 
1361 static int samsung_i2s_remove(struct platform_device *pdev)
1362 {
1363         struct i2s_dai *i2s, *other;
1364 
1365         i2s = dev_get_drvdata(&pdev->dev);
1366         other = get_other_dai(i2s);
1367 
1368         if (other) {
1369                 other->pri_dai = NULL;
1370                 other->sec_dai = NULL;
1371         } else {
1372                 pm_runtime_disable(&pdev->dev);
1373         }
1374 
1375         if (!is_secondary(i2s)) {
1376                 i2s_unregister_clock_provider(pdev);
1377                 clk_disable_unprepare(i2s->clk);
1378         }
1379 
1380         i2s->pri_dai = NULL;
1381         i2s->sec_dai = NULL;
1382 
1383         return 0;
1384 }
1385 
1386 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1387         .bfs_off = 1,
1388         .rfs_off = 3,
1389         .sdf_off = 5,
1390         .txr_off = 8,
1391         .rclksrc_off = 10,
1392         .mss_off = 11,
1393         .cdclkcon_off = 12,
1394         .lrp_off = 7,
1395         .bfs_mask = 0x3,
1396         .rfs_mask = 0x3,
1397         .ftx0cnt_off = 8,
1398 };
1399 
1400 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1401         .bfs_off = 0,
1402         .rfs_off = 4,
1403         .sdf_off = 6,
1404         .txr_off = 8,
1405         .rclksrc_off = 10,
1406         .mss_off = 11,
1407         .cdclkcon_off = 12,
1408         .lrp_off = 15,
1409         .bfs_mask = 0xf,
1410         .rfs_mask = 0x3,
1411         .ftx0cnt_off = 8,
1412 };
1413 
1414 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1415         .bfs_off = 0,
1416         .rfs_off = 4,
1417         .sdf_off = 7,
1418         .txr_off = 9,
1419         .rclksrc_off = 11,
1420         .mss_off = 12,
1421         .cdclkcon_off = 22,
1422         .lrp_off = 15,
1423         .bfs_mask = 0xf,
1424         .rfs_mask = 0x7,
1425         .ftx0cnt_off = 0,
1426 };
1427 
1428 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1429         .bfs_off = 0,
1430         .rfs_off = 3,
1431         .sdf_off = 6,
1432         .txr_off = 8,
1433         .rclksrc_off = 10,
1434         .mss_off = 11,
1435         .cdclkcon_off = 12,
1436         .lrp_off = 15,
1437         .bfs_mask = 0x7,
1438         .rfs_mask = 0x7,
1439         .ftx0cnt_off = 8,
1440 };
1441 
1442 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1443         .dai_type = TYPE_PRI,
1444         .quirks = QUIRK_NO_MUXPSR,
1445         .i2s_variant_regs = &i2sv3_regs,
1446 };
1447 
1448 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1449         .dai_type = TYPE_PRI,
1450         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1451                         QUIRK_SUPPORTS_IDMA,
1452         .i2s_variant_regs = &i2sv3_regs,
1453 };
1454 
1455 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1456         .dai_type = TYPE_PRI,
1457         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1458                         QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1459         .i2s_variant_regs = &i2sv6_regs,
1460 };
1461 
1462 static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1463         .dai_type = TYPE_PRI,
1464         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1465                         QUIRK_SUPPORTS_TDM,
1466         .i2s_variant_regs = &i2sv7_regs,
1467 };
1468 
1469 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1470         .dai_type = TYPE_PRI,
1471         .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1472         .i2s_variant_regs = &i2sv5_i2s1_regs,
1473 };
1474 
1475 static const struct samsung_i2s_dai_data samsung_dai_type_pri = {
1476         .dai_type = TYPE_PRI,
1477 };
1478 
1479 static const struct samsung_i2s_dai_data samsung_dai_type_sec = {
1480         .dai_type = TYPE_SEC,
1481 };
1482 
1483 static struct platform_device_id samsung_i2s_driver_ids[] = {
1484         {
1485                 .name           = "samsung-i2s",
1486                 .driver_data    = (kernel_ulong_t)&i2sv3_dai_type,
1487         }, {
1488                 .name           = "samsung-i2s-sec",
1489                 .driver_data    = (kernel_ulong_t)&samsung_dai_type_sec,
1490         }, {
1491                 .name           = "samsung-i2sv4",
1492                 .driver_data    = (kernel_ulong_t)&i2sv5_dai_type,
1493         },
1494         {},
1495 };
1496 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1497 
1498 #ifdef CONFIG_OF
1499 static const struct of_device_id exynos_i2s_match[] = {
1500         {
1501                 .compatible = "samsung,s3c6410-i2s",
1502                 .data = &i2sv3_dai_type,
1503         }, {
1504                 .compatible = "samsung,s5pv210-i2s",
1505                 .data = &i2sv5_dai_type,
1506         }, {
1507                 .compatible = "samsung,exynos5420-i2s",
1508                 .data = &i2sv6_dai_type,
1509         }, {
1510                 .compatible = "samsung,exynos7-i2s",
1511                 .data = &i2sv7_dai_type,
1512         }, {
1513                 .compatible = "samsung,exynos7-i2s1",
1514                 .data = &i2sv5_dai_type_i2s1,
1515         },
1516         {},
1517 };
1518 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1519 #endif
1520 
1521 static const struct dev_pm_ops samsung_i2s_pm = {
1522         SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1523                                 i2s_runtime_resume, NULL)
1524 };
1525 
1526 static struct platform_driver samsung_i2s_driver = {
1527         .probe  = samsung_i2s_probe,
1528         .remove = samsung_i2s_remove,
1529         .id_table = samsung_i2s_driver_ids,
1530         .driver = {
1531                 .name = "samsung-i2s",
1532                 .of_match_table = of_match_ptr(exynos_i2s_match),
1533                 .pm = &samsung_i2s_pm,
1534         },
1535 };
1536 
1537 module_platform_driver(samsung_i2s_driver);
1538 
1539 /* Module information */
1540 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1541 MODULE_DESCRIPTION("Samsung I2S Interface");
1542 MODULE_ALIAS("platform:samsung-i2s");
1543 MODULE_LICENSE("GPL");
1544 

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