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Linux/sound/soc/sh/fsi.c

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  1 /*
  2  * Fifo-attached Serial Interface (FSI) support for SH7724
  3  *
  4  * Copyright (C) 2009 Renesas Solutions Corp.
  5  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  6  *
  7  * Based on ssi.c
  8  * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
  9  *
 10  * This program is free software; you can redistribute it and/or modify
 11  * it under the terms of the GNU General Public License version 2 as
 12  * published by the Free Software Foundation.
 13  */
 14 
 15 #include <linux/delay.h>
 16 #include <linux/dma-mapping.h>
 17 #include <linux/pm_runtime.h>
 18 #include <linux/io.h>
 19 #include <linux/of.h>
 20 #include <linux/of_device.h>
 21 #include <linux/scatterlist.h>
 22 #include <linux/sh_dma.h>
 23 #include <linux/slab.h>
 24 #include <linux/module.h>
 25 #include <linux/workqueue.h>
 26 #include <sound/soc.h>
 27 #include <sound/pcm_params.h>
 28 #include <sound/sh_fsi.h>
 29 
 30 /* PortA/PortB register */
 31 #define REG_DO_FMT      0x0000
 32 #define REG_DOFF_CTL    0x0004
 33 #define REG_DOFF_ST     0x0008
 34 #define REG_DI_FMT      0x000C
 35 #define REG_DIFF_CTL    0x0010
 36 #define REG_DIFF_ST     0x0014
 37 #define REG_CKG1        0x0018
 38 #define REG_CKG2        0x001C
 39 #define REG_DIDT        0x0020
 40 #define REG_DODT        0x0024
 41 #define REG_MUTE_ST     0x0028
 42 #define REG_OUT_DMAC    0x002C
 43 #define REG_OUT_SEL     0x0030
 44 #define REG_IN_DMAC     0x0038
 45 
 46 /* master register */
 47 #define MST_CLK_RST     0x0210
 48 #define MST_SOFT_RST    0x0214
 49 #define MST_FIFO_SZ     0x0218
 50 
 51 /* core register (depend on FSI version) */
 52 #define A_MST_CTLR      0x0180
 53 #define B_MST_CTLR      0x01A0
 54 #define CPU_INT_ST      0x01F4
 55 #define CPU_IEMSK       0x01F8
 56 #define CPU_IMSK        0x01FC
 57 #define INT_ST          0x0200
 58 #define IEMSK           0x0204
 59 #define IMSK            0x0208
 60 
 61 /* DO_FMT */
 62 /* DI_FMT */
 63 #define CR_BWS_MASK     (0x3 << 20) /* FSI2 */
 64 #define CR_BWS_24       (0x0 << 20) /* FSI2 */
 65 #define CR_BWS_16       (0x1 << 20) /* FSI2 */
 66 #define CR_BWS_20       (0x2 << 20) /* FSI2 */
 67 
 68 #define CR_DTMD_PCM             (0x0 << 8) /* FSI2 */
 69 #define CR_DTMD_SPDIF_PCM       (0x1 << 8) /* FSI2 */
 70 #define CR_DTMD_SPDIF_STREAM    (0x2 << 8) /* FSI2 */
 71 
 72 #define CR_MONO         (0x0 << 4)
 73 #define CR_MONO_D       (0x1 << 4)
 74 #define CR_PCM          (0x2 << 4)
 75 #define CR_I2S          (0x3 << 4)
 76 #define CR_TDM          (0x4 << 4)
 77 #define CR_TDM_D        (0x5 << 4)
 78 
 79 /* OUT_DMAC */
 80 /* IN_DMAC */
 81 #define VDMD_MASK       (0x3 << 4)
 82 #define VDMD_FRONT      (0x0 << 4) /* Package in front */
 83 #define VDMD_BACK       (0x1 << 4) /* Package in back */
 84 #define VDMD_STREAM     (0x2 << 4) /* Stream mode(16bit * 2) */
 85 
 86 #define DMA_ON          (0x1 << 0)
 87 
 88 /* DOFF_CTL */
 89 /* DIFF_CTL */
 90 #define IRQ_HALF        0x00100000
 91 #define FIFO_CLR        0x00000001
 92 
 93 /* DOFF_ST */
 94 #define ERR_OVER        0x00000010
 95 #define ERR_UNDER       0x00000001
 96 #define ST_ERR          (ERR_OVER | ERR_UNDER)
 97 
 98 /* CKG1 */
 99 #define ACKMD_MASK      0x00007000
100 #define BPFMD_MASK      0x00000700
101 #define DIMD            (1 << 4)
102 #define DOMD            (1 << 0)
103 
104 /* A/B MST_CTLR */
105 #define BP      (1 << 4)        /* Fix the signal of Biphase output */
106 #define SE      (1 << 0)        /* Fix the master clock */
107 
108 /* CLK_RST */
109 #define CRB     (1 << 4)
110 #define CRA     (1 << 0)
111 
112 /* IO SHIFT / MACRO */
113 #define BI_SHIFT        12
114 #define BO_SHIFT        8
115 #define AI_SHIFT        4
116 #define AO_SHIFT        0
117 #define AB_IO(param, shift)     (param << shift)
118 
119 /* SOFT_RST */
120 #define PBSR            (1 << 12) /* Port B Software Reset */
121 #define PASR            (1 <<  8) /* Port A Software Reset */
122 #define IR              (1 <<  4) /* Interrupt Reset */
123 #define FSISR           (1 <<  0) /* Software Reset */
124 
125 /* OUT_SEL (FSI2) */
126 #define DMMD            (1 << 4) /* SPDIF output timing 0: Biphase only */
127                                  /*                     1: Biphase and serial */
128 
129 /* FIFO_SZ */
130 #define FIFO_SZ_MASK    0x7
131 
132 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
133 
134 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
135 
136 /*
137  * bus options
138  *
139  * 0x000000BA
140  *
141  * A : sample widtht 16bit setting
142  * B : sample widtht 24bit setting
143  */
144 
145 #define SHIFT_16DATA            0
146 #define SHIFT_24DATA            4
147 
148 #define PACKAGE_24BITBUS_BACK           0
149 #define PACKAGE_24BITBUS_FRONT          1
150 #define PACKAGE_16BITBUS_STREAM         2
151 
152 #define BUSOP_SET(s, a) ((a) << SHIFT_ ## s ## DATA)
153 #define BUSOP_GET(s, a) (((a) >> SHIFT_ ## s ## DATA) & 0xF)
154 
155 /*
156  * FSI driver use below type name for variable
157  *
158  * xxx_num      : number of data
159  * xxx_pos      : position of data
160  * xxx_capa     : capacity of data
161  */
162 
163 /*
164  *      period/frame/sample image
165  *
166  * ex) PCM (2ch)
167  *
168  * period pos                                      period pos
169  *   [n]                                             [n + 1]
170  *   |<-------------------- period--------------------->|
171  * ==|============================================ ... =|==
172  *   |                                                  |
173  *   ||<-----  frame ----->|<------ frame ----->|  ...  |
174  *   |+--------------------+--------------------+- ...  |
175  *   ||[ sample ][ sample ]|[ sample ][ sample ]|  ...  |
176  *   |+--------------------+--------------------+- ...  |
177  * ==|============================================ ... =|==
178  */
179 
180 /*
181  *      FSI FIFO image
182  *
183  *      |            |
184  *      |            |
185  *      | [ sample ] |
186  *      | [ sample ] |
187  *      | [ sample ] |
188  *      | [ sample ] |
189  *              --> go to codecs
190  */
191 
192 /*
193  *      FSI clock
194  *
195  * FSIxCLK [CPG] (ick) -------> |
196  *                              |-> FSI_DIV (div)-> FSI2
197  * FSIxCK [external] (xck) ---> |
198  */
199 
200 /*
201  *              struct
202  */
203 
204 struct fsi_stream_handler;
205 struct fsi_stream {
206 
207         /*
208          * these are initialized by fsi_stream_init()
209          */
210         struct snd_pcm_substream *substream;
211         int fifo_sample_capa;   /* sample capacity of FSI FIFO */
212         int buff_sample_capa;   /* sample capacity of ALSA buffer */
213         int buff_sample_pos;    /* sample position of ALSA buffer */
214         int period_samples;     /* sample number / 1 period */
215         int period_pos;         /* current period position */
216         int sample_width;       /* sample width */
217         int uerr_num;
218         int oerr_num;
219 
220         /*
221          * bus options
222          */
223         u32 bus_option;
224 
225         /*
226          * thse are initialized by fsi_handler_init()
227          */
228         struct fsi_stream_handler *handler;
229         struct fsi_priv         *priv;
230 
231         /*
232          * these are for DMAEngine
233          */
234         struct dma_chan         *chan;
235         struct sh_dmae_slave    slave; /* see fsi_handler_init() */
236         struct work_struct      work;
237         dma_addr_t              dma;
238 };
239 
240 struct fsi_clk {
241         /* see [FSI clock] */
242         struct clk *own;
243         struct clk *xck;
244         struct clk *ick;
245         struct clk *div;
246         int (*set_rate)(struct device *dev,
247                         struct fsi_priv *fsi);
248 
249         unsigned long rate;
250         unsigned int count;
251 };
252 
253 struct fsi_priv {
254         void __iomem *base;
255         struct fsi_master *master;
256 
257         struct fsi_stream playback;
258         struct fsi_stream capture;
259 
260         struct fsi_clk clock;
261 
262         u32 fmt;
263 
264         int chan_num:16;
265         int clk_master:1;
266         int clk_cpg:1;
267         int spdif:1;
268         int enable_stream:1;
269         int bit_clk_inv:1;
270         int lr_clk_inv:1;
271 };
272 
273 struct fsi_stream_handler {
274         int (*init)(struct fsi_priv *fsi, struct fsi_stream *io);
275         int (*quit)(struct fsi_priv *fsi, struct fsi_stream *io);
276         int (*probe)(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev);
277         int (*transfer)(struct fsi_priv *fsi, struct fsi_stream *io);
278         int (*remove)(struct fsi_priv *fsi, struct fsi_stream *io);
279         void (*start_stop)(struct fsi_priv *fsi, struct fsi_stream *io,
280                            int enable);
281 };
282 #define fsi_stream_handler_call(io, func, args...)      \
283         (!(io) ? -ENODEV :                              \
284          !((io)->handler->func) ? 0 :                   \
285          (io)->handler->func(args))
286 
287 struct fsi_core {
288         int ver;
289 
290         u32 int_st;
291         u32 iemsk;
292         u32 imsk;
293         u32 a_mclk;
294         u32 b_mclk;
295 };
296 
297 struct fsi_master {
298         void __iomem *base;
299         struct fsi_priv fsia;
300         struct fsi_priv fsib;
301         const struct fsi_core *core;
302         spinlock_t lock;
303 };
304 
305 static int fsi_stream_is_play(struct fsi_priv *fsi, struct fsi_stream *io);
306 
307 /*
308  *              basic read write function
309  */
310 
311 static void __fsi_reg_write(u32 __iomem *reg, u32 data)
312 {
313         /* valid data area is 24bit */
314         data &= 0x00ffffff;
315 
316         __raw_writel(data, reg);
317 }
318 
319 static u32 __fsi_reg_read(u32 __iomem *reg)
320 {
321         return __raw_readl(reg);
322 }
323 
324 static void __fsi_reg_mask_set(u32 __iomem *reg, u32 mask, u32 data)
325 {
326         u32 val = __fsi_reg_read(reg);
327 
328         val &= ~mask;
329         val |= data & mask;
330 
331         __fsi_reg_write(reg, val);
332 }
333 
334 #define fsi_reg_write(p, r, d)\
335         __fsi_reg_write((p->base + REG_##r), d)
336 
337 #define fsi_reg_read(p, r)\
338         __fsi_reg_read((p->base + REG_##r))
339 
340 #define fsi_reg_mask_set(p, r, m, d)\
341         __fsi_reg_mask_set((p->base + REG_##r), m, d)
342 
343 #define fsi_master_read(p, r) _fsi_master_read(p, MST_##r)
344 #define fsi_core_read(p, r)   _fsi_master_read(p, p->core->r)
345 static u32 _fsi_master_read(struct fsi_master *master, u32 reg)
346 {
347         u32 ret;
348         unsigned long flags;
349 
350         spin_lock_irqsave(&master->lock, flags);
351         ret = __fsi_reg_read(master->base + reg);
352         spin_unlock_irqrestore(&master->lock, flags);
353 
354         return ret;
355 }
356 
357 #define fsi_master_mask_set(p, r, m, d) _fsi_master_mask_set(p, MST_##r, m, d)
358 #define fsi_core_mask_set(p, r, m, d)  _fsi_master_mask_set(p, p->core->r, m, d)
359 static void _fsi_master_mask_set(struct fsi_master *master,
360                                u32 reg, u32 mask, u32 data)
361 {
362         unsigned long flags;
363 
364         spin_lock_irqsave(&master->lock, flags);
365         __fsi_reg_mask_set(master->base + reg, mask, data);
366         spin_unlock_irqrestore(&master->lock, flags);
367 }
368 
369 /*
370  *              basic function
371  */
372 static int fsi_version(struct fsi_master *master)
373 {
374         return master->core->ver;
375 }
376 
377 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
378 {
379         return fsi->master;
380 }
381 
382 static int fsi_is_clk_master(struct fsi_priv *fsi)
383 {
384         return fsi->clk_master;
385 }
386 
387 static int fsi_is_port_a(struct fsi_priv *fsi)
388 {
389         return fsi->master->base == fsi->base;
390 }
391 
392 static int fsi_is_spdif(struct fsi_priv *fsi)
393 {
394         return fsi->spdif;
395 }
396 
397 static int fsi_is_enable_stream(struct fsi_priv *fsi)
398 {
399         return fsi->enable_stream;
400 }
401 
402 static int fsi_is_play(struct snd_pcm_substream *substream)
403 {
404         return substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
405 }
406 
407 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
408 {
409         struct snd_soc_pcm_runtime *rtd = substream->private_data;
410 
411         return  rtd->cpu_dai;
412 }
413 
414 static struct fsi_priv *fsi_get_priv_frm_dai(struct snd_soc_dai *dai)
415 {
416         struct fsi_master *master = snd_soc_dai_get_drvdata(dai);
417 
418         if (dai->id == 0)
419                 return &master->fsia;
420         else
421                 return &master->fsib;
422 }
423 
424 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
425 {
426         return fsi_get_priv_frm_dai(fsi_get_dai(substream));
427 }
428 
429 static u32 fsi_get_port_shift(struct fsi_priv *fsi, struct fsi_stream *io)
430 {
431         int is_play = fsi_stream_is_play(fsi, io);
432         int is_porta = fsi_is_port_a(fsi);
433         u32 shift;
434 
435         if (is_porta)
436                 shift = is_play ? AO_SHIFT : AI_SHIFT;
437         else
438                 shift = is_play ? BO_SHIFT : BI_SHIFT;
439 
440         return shift;
441 }
442 
443 static int fsi_frame2sample(struct fsi_priv *fsi, int frames)
444 {
445         return frames * fsi->chan_num;
446 }
447 
448 static int fsi_sample2frame(struct fsi_priv *fsi, int samples)
449 {
450         return samples / fsi->chan_num;
451 }
452 
453 static int fsi_get_current_fifo_samples(struct fsi_priv *fsi,
454                                         struct fsi_stream *io)
455 {
456         int is_play = fsi_stream_is_play(fsi, io);
457         u32 status;
458         int frames;
459 
460         status = is_play ?
461                 fsi_reg_read(fsi, DOFF_ST) :
462                 fsi_reg_read(fsi, DIFF_ST);
463 
464         frames = 0x1ff & (status >> 8);
465 
466         return fsi_frame2sample(fsi, frames);
467 }
468 
469 static void fsi_count_fifo_err(struct fsi_priv *fsi)
470 {
471         u32 ostatus = fsi_reg_read(fsi, DOFF_ST);
472         u32 istatus = fsi_reg_read(fsi, DIFF_ST);
473 
474         if (ostatus & ERR_OVER)
475                 fsi->playback.oerr_num++;
476 
477         if (ostatus & ERR_UNDER)
478                 fsi->playback.uerr_num++;
479 
480         if (istatus & ERR_OVER)
481                 fsi->capture.oerr_num++;
482 
483         if (istatus & ERR_UNDER)
484                 fsi->capture.uerr_num++;
485 
486         fsi_reg_write(fsi, DOFF_ST, 0);
487         fsi_reg_write(fsi, DIFF_ST, 0);
488 }
489 
490 /*
491  *              fsi_stream_xx() function
492  */
493 static inline int fsi_stream_is_play(struct fsi_priv *fsi,
494                                      struct fsi_stream *io)
495 {
496         return &fsi->playback == io;
497 }
498 
499 static inline struct fsi_stream *fsi_stream_get(struct fsi_priv *fsi,
500                                         struct snd_pcm_substream *substream)
501 {
502         return fsi_is_play(substream) ? &fsi->playback : &fsi->capture;
503 }
504 
505 static int fsi_stream_is_working(struct fsi_priv *fsi,
506                                  struct fsi_stream *io)
507 {
508         struct fsi_master *master = fsi_get_master(fsi);
509         unsigned long flags;
510         int ret;
511 
512         spin_lock_irqsave(&master->lock, flags);
513         ret = !!(io->substream && io->substream->runtime);
514         spin_unlock_irqrestore(&master->lock, flags);
515 
516         return ret;
517 }
518 
519 static struct fsi_priv *fsi_stream_to_priv(struct fsi_stream *io)
520 {
521         return io->priv;
522 }
523 
524 static void fsi_stream_init(struct fsi_priv *fsi,
525                             struct fsi_stream *io,
526                             struct snd_pcm_substream *substream)
527 {
528         struct snd_pcm_runtime *runtime = substream->runtime;
529         struct fsi_master *master = fsi_get_master(fsi);
530         unsigned long flags;
531 
532         spin_lock_irqsave(&master->lock, flags);
533         io->substream   = substream;
534         io->buff_sample_capa    = fsi_frame2sample(fsi, runtime->buffer_size);
535         io->buff_sample_pos     = 0;
536         io->period_samples      = fsi_frame2sample(fsi, runtime->period_size);
537         io->period_pos          = 0;
538         io->sample_width        = samples_to_bytes(runtime, 1);
539         io->bus_option          = 0;
540         io->oerr_num    = -1; /* ignore 1st err */
541         io->uerr_num    = -1; /* ignore 1st err */
542         fsi_stream_handler_call(io, init, fsi, io);
543         spin_unlock_irqrestore(&master->lock, flags);
544 }
545 
546 static void fsi_stream_quit(struct fsi_priv *fsi, struct fsi_stream *io)
547 {
548         struct snd_soc_dai *dai = fsi_get_dai(io->substream);
549         struct fsi_master *master = fsi_get_master(fsi);
550         unsigned long flags;
551 
552         spin_lock_irqsave(&master->lock, flags);
553 
554         if (io->oerr_num > 0)
555                 dev_err(dai->dev, "over_run = %d\n", io->oerr_num);
556 
557         if (io->uerr_num > 0)
558                 dev_err(dai->dev, "under_run = %d\n", io->uerr_num);
559 
560         fsi_stream_handler_call(io, quit, fsi, io);
561         io->substream   = NULL;
562         io->buff_sample_capa    = 0;
563         io->buff_sample_pos     = 0;
564         io->period_samples      = 0;
565         io->period_pos          = 0;
566         io->sample_width        = 0;
567         io->bus_option          = 0;
568         io->oerr_num    = 0;
569         io->uerr_num    = 0;
570         spin_unlock_irqrestore(&master->lock, flags);
571 }
572 
573 static int fsi_stream_transfer(struct fsi_stream *io)
574 {
575         struct fsi_priv *fsi = fsi_stream_to_priv(io);
576         if (!fsi)
577                 return -EIO;
578 
579         return fsi_stream_handler_call(io, transfer, fsi, io);
580 }
581 
582 #define fsi_stream_start(fsi, io)\
583         fsi_stream_handler_call(io, start_stop, fsi, io, 1)
584 
585 #define fsi_stream_stop(fsi, io)\
586         fsi_stream_handler_call(io, start_stop, fsi, io, 0)
587 
588 static int fsi_stream_probe(struct fsi_priv *fsi, struct device *dev)
589 {
590         struct fsi_stream *io;
591         int ret1, ret2;
592 
593         io = &fsi->playback;
594         ret1 = fsi_stream_handler_call(io, probe, fsi, io, dev);
595 
596         io = &fsi->capture;
597         ret2 = fsi_stream_handler_call(io, probe, fsi, io, dev);
598 
599         if (ret1 < 0)
600                 return ret1;
601         if (ret2 < 0)
602                 return ret2;
603 
604         return 0;
605 }
606 
607 static int fsi_stream_remove(struct fsi_priv *fsi)
608 {
609         struct fsi_stream *io;
610         int ret1, ret2;
611 
612         io = &fsi->playback;
613         ret1 = fsi_stream_handler_call(io, remove, fsi, io);
614 
615         io = &fsi->capture;
616         ret2 = fsi_stream_handler_call(io, remove, fsi, io);
617 
618         if (ret1 < 0)
619                 return ret1;
620         if (ret2 < 0)
621                 return ret2;
622 
623         return 0;
624 }
625 
626 /*
627  *      format/bus/dma setting
628  */
629 static void fsi_format_bus_setup(struct fsi_priv *fsi, struct fsi_stream *io,
630                                  u32 bus, struct device *dev)
631 {
632         struct fsi_master *master = fsi_get_master(fsi);
633         int is_play = fsi_stream_is_play(fsi, io);
634         u32 fmt = fsi->fmt;
635 
636         if (fsi_version(master) >= 2) {
637                 u32 dma = 0;
638 
639                 /*
640                  * FSI2 needs DMA/Bus setting
641                  */
642                 switch (bus) {
643                 case PACKAGE_24BITBUS_FRONT:
644                         fmt |= CR_BWS_24;
645                         dma |= VDMD_FRONT;
646                         dev_dbg(dev, "24bit bus / package in front\n");
647                         break;
648                 case PACKAGE_16BITBUS_STREAM:
649                         fmt |= CR_BWS_16;
650                         dma |= VDMD_STREAM;
651                         dev_dbg(dev, "16bit bus / stream mode\n");
652                         break;
653                 case PACKAGE_24BITBUS_BACK:
654                 default:
655                         fmt |= CR_BWS_24;
656                         dma |= VDMD_BACK;
657                         dev_dbg(dev, "24bit bus / package in back\n");
658                         break;
659                 }
660 
661                 if (is_play)
662                         fsi_reg_write(fsi, OUT_DMAC,    dma);
663                 else
664                         fsi_reg_write(fsi, IN_DMAC,     dma);
665         }
666 
667         if (is_play)
668                 fsi_reg_write(fsi, DO_FMT, fmt);
669         else
670                 fsi_reg_write(fsi, DI_FMT, fmt);
671 }
672 
673 /*
674  *              irq function
675  */
676 
677 static void fsi_irq_enable(struct fsi_priv *fsi, struct fsi_stream *io)
678 {
679         u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
680         struct fsi_master *master = fsi_get_master(fsi);
681 
682         fsi_core_mask_set(master, imsk,  data, data);
683         fsi_core_mask_set(master, iemsk, data, data);
684 }
685 
686 static void fsi_irq_disable(struct fsi_priv *fsi, struct fsi_stream *io)
687 {
688         u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
689         struct fsi_master *master = fsi_get_master(fsi);
690 
691         fsi_core_mask_set(master, imsk,  data, 0);
692         fsi_core_mask_set(master, iemsk, data, 0);
693 }
694 
695 static u32 fsi_irq_get_status(struct fsi_master *master)
696 {
697         return fsi_core_read(master, int_st);
698 }
699 
700 static void fsi_irq_clear_status(struct fsi_priv *fsi)
701 {
702         u32 data = 0;
703         struct fsi_master *master = fsi_get_master(fsi);
704 
705         data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->playback));
706         data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->capture));
707 
708         /* clear interrupt factor */
709         fsi_core_mask_set(master, int_st, data, 0);
710 }
711 
712 /*
713  *              SPDIF master clock function
714  *
715  * These functions are used later FSI2
716  */
717 static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable)
718 {
719         struct fsi_master *master = fsi_get_master(fsi);
720         u32 mask, val;
721 
722         mask = BP | SE;
723         val = enable ? mask : 0;
724 
725         fsi_is_port_a(fsi) ?
726                 fsi_core_mask_set(master, a_mclk, mask, val) :
727                 fsi_core_mask_set(master, b_mclk, mask, val);
728 }
729 
730 /*
731  *              clock function
732  */
733 static int fsi_clk_init(struct device *dev,
734                         struct fsi_priv *fsi,
735                         int xck,
736                         int ick,
737                         int div,
738                         int (*set_rate)(struct device *dev,
739                                         struct fsi_priv *fsi))
740 {
741         struct fsi_clk *clock = &fsi->clock;
742         int is_porta = fsi_is_port_a(fsi);
743 
744         clock->xck      = NULL;
745         clock->ick      = NULL;
746         clock->div      = NULL;
747         clock->rate     = 0;
748         clock->count    = 0;
749         clock->set_rate = set_rate;
750 
751         clock->own = devm_clk_get(dev, NULL);
752         if (IS_ERR(clock->own))
753                 return -EINVAL;
754 
755         /* external clock */
756         if (xck) {
757                 clock->xck = devm_clk_get(dev, is_porta ? "xcka" : "xckb");
758                 if (IS_ERR(clock->xck)) {
759                         dev_err(dev, "can't get xck clock\n");
760                         return -EINVAL;
761                 }
762                 if (clock->xck == clock->own) {
763                         dev_err(dev, "cpu doesn't support xck clock\n");
764                         return -EINVAL;
765                 }
766         }
767 
768         /* FSIACLK/FSIBCLK */
769         if (ick) {
770                 clock->ick = devm_clk_get(dev,  is_porta ? "icka" : "ickb");
771                 if (IS_ERR(clock->ick)) {
772                         dev_err(dev, "can't get ick clock\n");
773                         return -EINVAL;
774                 }
775                 if (clock->ick == clock->own) {
776                         dev_err(dev, "cpu doesn't support ick clock\n");
777                         return -EINVAL;
778                 }
779         }
780 
781         /* FSI-DIV */
782         if (div) {
783                 clock->div = devm_clk_get(dev,  is_porta ? "diva" : "divb");
784                 if (IS_ERR(clock->div)) {
785                         dev_err(dev, "can't get div clock\n");
786                         return -EINVAL;
787                 }
788                 if (clock->div == clock->own) {
789                         dev_err(dev, "cpu doens't support div clock\n");
790                         return -EINVAL;
791                 }
792         }
793 
794         return 0;
795 }
796 
797 #define fsi_clk_invalid(fsi) fsi_clk_valid(fsi, 0)
798 static void fsi_clk_valid(struct fsi_priv *fsi, unsigned long rate)
799 {
800         fsi->clock.rate = rate;
801 }
802 
803 static int fsi_clk_is_valid(struct fsi_priv *fsi)
804 {
805         return  fsi->clock.set_rate &&
806                 fsi->clock.rate;
807 }
808 
809 static int fsi_clk_enable(struct device *dev,
810                           struct fsi_priv *fsi)
811 {
812         struct fsi_clk *clock = &fsi->clock;
813         int ret = -EINVAL;
814 
815         if (!fsi_clk_is_valid(fsi))
816                 return ret;
817 
818         if (0 == clock->count) {
819                 ret = clock->set_rate(dev, fsi);
820                 if (ret < 0) {
821                         fsi_clk_invalid(fsi);
822                         return ret;
823                 }
824 
825                 if (clock->xck)
826                         clk_enable(clock->xck);
827                 if (clock->ick)
828                         clk_enable(clock->ick);
829                 if (clock->div)
830                         clk_enable(clock->div);
831 
832                 clock->count++;
833         }
834 
835         return ret;
836 }
837 
838 static int fsi_clk_disable(struct device *dev,
839                             struct fsi_priv *fsi)
840 {
841         struct fsi_clk *clock = &fsi->clock;
842 
843         if (!fsi_clk_is_valid(fsi))
844                 return -EINVAL;
845 
846         if (1 == clock->count--) {
847                 if (clock->xck)
848                         clk_disable(clock->xck);
849                 if (clock->ick)
850                         clk_disable(clock->ick);
851                 if (clock->div)
852                         clk_disable(clock->div);
853         }
854 
855         return 0;
856 }
857 
858 static int fsi_clk_set_ackbpf(struct device *dev,
859                               struct fsi_priv *fsi,
860                               int ackmd, int bpfmd)
861 {
862         u32 data = 0;
863 
864         /* check ackmd/bpfmd relationship */
865         if (bpfmd > ackmd) {
866                 dev_err(dev, "unsupported rate (%d/%d)\n", ackmd, bpfmd);
867                 return -EINVAL;
868         }
869 
870         /*  ACKMD */
871         switch (ackmd) {
872         case 512:
873                 data |= (0x0 << 12);
874                 break;
875         case 256:
876                 data |= (0x1 << 12);
877                 break;
878         case 128:
879                 data |= (0x2 << 12);
880                 break;
881         case 64:
882                 data |= (0x3 << 12);
883                 break;
884         case 32:
885                 data |= (0x4 << 12);
886                 break;
887         default:
888                 dev_err(dev, "unsupported ackmd (%d)\n", ackmd);
889                 return -EINVAL;
890         }
891 
892         /* BPFMD */
893         switch (bpfmd) {
894         case 32:
895                 data |= (0x0 << 8);
896                 break;
897         case 64:
898                 data |= (0x1 << 8);
899                 break;
900         case 128:
901                 data |= (0x2 << 8);
902                 break;
903         case 256:
904                 data |= (0x3 << 8);
905                 break;
906         case 512:
907                 data |= (0x4 << 8);
908                 break;
909         case 16:
910                 data |= (0x7 << 8);
911                 break;
912         default:
913                 dev_err(dev, "unsupported bpfmd (%d)\n", bpfmd);
914                 return -EINVAL;
915         }
916 
917         dev_dbg(dev, "ACKMD/BPFMD = %d/%d\n", ackmd, bpfmd);
918 
919         fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
920         udelay(10);
921 
922         return 0;
923 }
924 
925 static int fsi_clk_set_rate_external(struct device *dev,
926                                      struct fsi_priv *fsi)
927 {
928         struct clk *xck = fsi->clock.xck;
929         struct clk *ick = fsi->clock.ick;
930         unsigned long rate = fsi->clock.rate;
931         unsigned long xrate;
932         int ackmd, bpfmd;
933         int ret = 0;
934 
935         /* check clock rate */
936         xrate = clk_get_rate(xck);
937         if (xrate % rate) {
938                 dev_err(dev, "unsupported clock rate\n");
939                 return -EINVAL;
940         }
941 
942         clk_set_parent(ick, xck);
943         clk_set_rate(ick, xrate);
944 
945         bpfmd = fsi->chan_num * 32;
946         ackmd = xrate / rate;
947 
948         dev_dbg(dev, "external/rate = %ld/%ld\n", xrate, rate);
949 
950         ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
951         if (ret < 0)
952                 dev_err(dev, "%s failed", __func__);
953 
954         return ret;
955 }
956 
957 static int fsi_clk_set_rate_cpg(struct device *dev,
958                                 struct fsi_priv *fsi)
959 {
960         struct clk *ick = fsi->clock.ick;
961         struct clk *div = fsi->clock.div;
962         unsigned long rate = fsi->clock.rate;
963         unsigned long target = 0; /* 12288000 or 11289600 */
964         unsigned long actual, cout;
965         unsigned long diff, min;
966         unsigned long best_cout, best_act;
967         int adj;
968         int ackmd, bpfmd;
969         int ret = -EINVAL;
970 
971         if (!(12288000 % rate))
972                 target = 12288000;
973         if (!(11289600 % rate))
974                 target = 11289600;
975         if (!target) {
976                 dev_err(dev, "unsupported rate\n");
977                 return ret;
978         }
979 
980         bpfmd = fsi->chan_num * 32;
981         ackmd = target / rate;
982         ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
983         if (ret < 0) {
984                 dev_err(dev, "%s failed", __func__);
985                 return ret;
986         }
987 
988         /*
989          * The clock flow is
990          *
991          * [CPG] = cout => [FSI_DIV] = audio => [FSI] => [codec]
992          *
993          * But, it needs to find best match of CPG and FSI_DIV
994          * combination, since it is difficult to generate correct
995          * frequency of audio clock from ick clock only.
996          * Because ick is created from its parent clock.
997          *
998          * target       = rate x [512/256/128/64]fs
999          * cout         = round(target x adjustment)
1000          * actual       = cout / adjustment (by FSI-DIV) ~= target
1001          * audio        = actual
1002          */
1003         min = ~0;
1004         best_cout = 0;
1005         best_act = 0;
1006         for (adj = 1; adj < 0xffff; adj++) {
1007 
1008                 cout = target * adj;
1009                 if (cout > 100000000) /* max clock = 100MHz */
1010                         break;
1011 
1012                 /* cout/actual audio clock */
1013                 cout    = clk_round_rate(ick, cout);
1014                 actual  = cout / adj;
1015 
1016                 /* find best frequency */
1017                 diff = abs(actual - target);
1018                 if (diff < min) {
1019                         min             = diff;
1020                         best_cout       = cout;
1021                         best_act        = actual;
1022                 }
1023         }
1024 
1025         ret = clk_set_rate(ick, best_cout);
1026         if (ret < 0) {
1027                 dev_err(dev, "ick clock failed\n");
1028                 return -EIO;
1029         }
1030 
1031         ret = clk_set_rate(div, clk_round_rate(div, best_act));
1032         if (ret < 0) {
1033                 dev_err(dev, "div clock failed\n");
1034                 return -EIO;
1035         }
1036 
1037         dev_dbg(dev, "ick/div = %ld/%ld\n",
1038                 clk_get_rate(ick), clk_get_rate(div));
1039 
1040         return ret;
1041 }
1042 
1043 /*
1044  *              pio data transfer handler
1045  */
1046 static void fsi_pio_push16(struct fsi_priv *fsi, u8 *_buf, int samples)
1047 {
1048         int i;
1049 
1050         if (fsi_is_enable_stream(fsi)) {
1051                 /*
1052                  * stream mode
1053                  * see
1054                  *      fsi_pio_push_init()
1055                  */
1056                 u32 *buf = (u32 *)_buf;
1057 
1058                 for (i = 0; i < samples / 2; i++)
1059                         fsi_reg_write(fsi, DODT, buf[i]);
1060         } else {
1061                 /* normal mode */
1062                 u16 *buf = (u16 *)_buf;
1063 
1064                 for (i = 0; i < samples; i++)
1065                         fsi_reg_write(fsi, DODT, ((u32)*(buf + i) << 8));
1066         }
1067 }
1068 
1069 static void fsi_pio_pop16(struct fsi_priv *fsi, u8 *_buf, int samples)
1070 {
1071         u16 *buf = (u16 *)_buf;
1072         int i;
1073 
1074         for (i = 0; i < samples; i++)
1075                 *(buf + i) = (u16)(fsi_reg_read(fsi, DIDT) >> 8);
1076 }
1077 
1078 static void fsi_pio_push32(struct fsi_priv *fsi, u8 *_buf, int samples)
1079 {
1080         u32 *buf = (u32 *)_buf;
1081         int i;
1082 
1083         for (i = 0; i < samples; i++)
1084                 fsi_reg_write(fsi, DODT, *(buf + i));
1085 }
1086 
1087 static void fsi_pio_pop32(struct fsi_priv *fsi, u8 *_buf, int samples)
1088 {
1089         u32 *buf = (u32 *)_buf;
1090         int i;
1091 
1092         for (i = 0; i < samples; i++)
1093                 *(buf + i) = fsi_reg_read(fsi, DIDT);
1094 }
1095 
1096 static u8 *fsi_pio_get_area(struct fsi_priv *fsi, struct fsi_stream *io)
1097 {
1098         struct snd_pcm_runtime *runtime = io->substream->runtime;
1099 
1100         return runtime->dma_area +
1101                 samples_to_bytes(runtime, io->buff_sample_pos);
1102 }
1103 
1104 static int fsi_pio_transfer(struct fsi_priv *fsi, struct fsi_stream *io,
1105                 void (*run16)(struct fsi_priv *fsi, u8 *buf, int samples),
1106                 void (*run32)(struct fsi_priv *fsi, u8 *buf, int samples),
1107                 int samples)
1108 {
1109         struct snd_pcm_runtime *runtime;
1110         struct snd_pcm_substream *substream;
1111         u8 *buf;
1112         int over_period;
1113 
1114         if (!fsi_stream_is_working(fsi, io))
1115                 return -EINVAL;
1116 
1117         over_period     = 0;
1118         substream       = io->substream;
1119         runtime         = substream->runtime;
1120 
1121         /* FSI FIFO has limit.
1122          * So, this driver can not send periods data at a time
1123          */
1124         if (io->buff_sample_pos >=
1125             io->period_samples * (io->period_pos + 1)) {
1126 
1127                 over_period = 1;
1128                 io->period_pos = (io->period_pos + 1) % runtime->periods;
1129 
1130                 if (0 == io->period_pos)
1131                         io->buff_sample_pos = 0;
1132         }
1133 
1134         buf = fsi_pio_get_area(fsi, io);
1135 
1136         switch (io->sample_width) {
1137         case 2:
1138                 run16(fsi, buf, samples);
1139                 break;
1140         case 4:
1141                 run32(fsi, buf, samples);
1142                 break;
1143         default:
1144                 return -EINVAL;
1145         }
1146 
1147         /* update buff_sample_pos */
1148         io->buff_sample_pos += samples;
1149 
1150         if (over_period)
1151                 snd_pcm_period_elapsed(substream);
1152 
1153         return 0;
1154 }
1155 
1156 static int fsi_pio_pop(struct fsi_priv *fsi, struct fsi_stream *io)
1157 {
1158         int sample_residues;    /* samples in FSI fifo */
1159         int sample_space;       /* ALSA free samples space */
1160         int samples;
1161 
1162         sample_residues = fsi_get_current_fifo_samples(fsi, io);
1163         sample_space    = io->buff_sample_capa - io->buff_sample_pos;
1164 
1165         samples = min(sample_residues, sample_space);
1166 
1167         return fsi_pio_transfer(fsi, io,
1168                                   fsi_pio_pop16,
1169                                   fsi_pio_pop32,
1170                                   samples);
1171 }
1172 
1173 static int fsi_pio_push(struct fsi_priv *fsi, struct fsi_stream *io)
1174 {
1175         int sample_residues;    /* ALSA residue samples */
1176         int sample_space;       /* FSI fifo free samples space */
1177         int samples;
1178 
1179         sample_residues = io->buff_sample_capa - io->buff_sample_pos;
1180         sample_space    = io->fifo_sample_capa -
1181                 fsi_get_current_fifo_samples(fsi, io);
1182 
1183         samples = min(sample_residues, sample_space);
1184 
1185         return fsi_pio_transfer(fsi, io,
1186                                   fsi_pio_push16,
1187                                   fsi_pio_push32,
1188                                   samples);
1189 }
1190 
1191 static void fsi_pio_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1192                                int enable)
1193 {
1194         struct fsi_master *master = fsi_get_master(fsi);
1195         u32 clk  = fsi_is_port_a(fsi) ? CRA  : CRB;
1196 
1197         if (enable)
1198                 fsi_irq_enable(fsi, io);
1199         else
1200                 fsi_irq_disable(fsi, io);
1201 
1202         if (fsi_is_clk_master(fsi))
1203                 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
1204 }
1205 
1206 static int fsi_pio_push_init(struct fsi_priv *fsi, struct fsi_stream *io)
1207 {
1208         /*
1209          * we can use 16bit stream mode
1210          * when "playback" and "16bit data"
1211          * and platform allows "stream mode"
1212          * see
1213          *      fsi_pio_push16()
1214          */
1215         if (fsi_is_enable_stream(fsi))
1216                 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1217                                  BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
1218         else
1219                 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1220                                  BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
1221         return 0;
1222 }
1223 
1224 static int fsi_pio_pop_init(struct fsi_priv *fsi, struct fsi_stream *io)
1225 {
1226         /*
1227          * always 24bit bus, package back when "capture"
1228          */
1229         io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1230                          BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
1231         return 0;
1232 }
1233 
1234 static struct fsi_stream_handler fsi_pio_push_handler = {
1235         .init           = fsi_pio_push_init,
1236         .transfer       = fsi_pio_push,
1237         .start_stop     = fsi_pio_start_stop,
1238 };
1239 
1240 static struct fsi_stream_handler fsi_pio_pop_handler = {
1241         .init           = fsi_pio_pop_init,
1242         .transfer       = fsi_pio_pop,
1243         .start_stop     = fsi_pio_start_stop,
1244 };
1245 
1246 static irqreturn_t fsi_interrupt(int irq, void *data)
1247 {
1248         struct fsi_master *master = data;
1249         u32 int_st = fsi_irq_get_status(master);
1250 
1251         /* clear irq status */
1252         fsi_master_mask_set(master, SOFT_RST, IR, 0);
1253         fsi_master_mask_set(master, SOFT_RST, IR, IR);
1254 
1255         if (int_st & AB_IO(1, AO_SHIFT))
1256                 fsi_stream_transfer(&master->fsia.playback);
1257         if (int_st & AB_IO(1, BO_SHIFT))
1258                 fsi_stream_transfer(&master->fsib.playback);
1259         if (int_st & AB_IO(1, AI_SHIFT))
1260                 fsi_stream_transfer(&master->fsia.capture);
1261         if (int_st & AB_IO(1, BI_SHIFT))
1262                 fsi_stream_transfer(&master->fsib.capture);
1263 
1264         fsi_count_fifo_err(&master->fsia);
1265         fsi_count_fifo_err(&master->fsib);
1266 
1267         fsi_irq_clear_status(&master->fsia);
1268         fsi_irq_clear_status(&master->fsib);
1269 
1270         return IRQ_HANDLED;
1271 }
1272 
1273 /*
1274  *              dma data transfer handler
1275  */
1276 static int fsi_dma_init(struct fsi_priv *fsi, struct fsi_stream *io)
1277 {
1278         struct snd_pcm_runtime *runtime = io->substream->runtime;
1279         struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1280         enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1281                                 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1282 
1283         /*
1284          * 24bit data : 24bit bus / package in back
1285          * 16bit data : 16bit bus / stream mode
1286          */
1287         io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1288                          BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
1289 
1290         io->dma = dma_map_single(dai->dev, runtime->dma_area,
1291                                  snd_pcm_lib_buffer_bytes(io->substream), dir);
1292         return 0;
1293 }
1294 
1295 static int fsi_dma_quit(struct fsi_priv *fsi, struct fsi_stream *io)
1296 {
1297         struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1298         enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1299                 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1300 
1301         dma_unmap_single(dai->dev, io->dma,
1302                          snd_pcm_lib_buffer_bytes(io->substream), dir);
1303         return 0;
1304 }
1305 
1306 static dma_addr_t fsi_dma_get_area(struct fsi_stream *io)
1307 {
1308         struct snd_pcm_runtime *runtime = io->substream->runtime;
1309 
1310         return io->dma + samples_to_bytes(runtime, io->buff_sample_pos);
1311 }
1312 
1313 static void fsi_dma_complete(void *data)
1314 {
1315         struct fsi_stream *io = (struct fsi_stream *)data;
1316         struct fsi_priv *fsi = fsi_stream_to_priv(io);
1317         struct snd_pcm_runtime *runtime = io->substream->runtime;
1318         struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1319         enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
1320                 DMA_TO_DEVICE : DMA_FROM_DEVICE;
1321 
1322         dma_sync_single_for_cpu(dai->dev, fsi_dma_get_area(io),
1323                         samples_to_bytes(runtime, io->period_samples), dir);
1324 
1325         io->buff_sample_pos += io->period_samples;
1326         io->period_pos++;
1327 
1328         if (io->period_pos >= runtime->periods) {
1329                 io->period_pos = 0;
1330                 io->buff_sample_pos = 0;
1331         }
1332 
1333         fsi_count_fifo_err(fsi);
1334         fsi_stream_transfer(io);
1335 
1336         snd_pcm_period_elapsed(io->substream);
1337 }
1338 
1339 static void fsi_dma_do_work(struct work_struct *work)
1340 {
1341         struct fsi_stream *io = container_of(work, struct fsi_stream, work);
1342         struct fsi_priv *fsi = fsi_stream_to_priv(io);
1343         struct snd_soc_dai *dai;
1344         struct dma_async_tx_descriptor *desc;
1345         struct snd_pcm_runtime *runtime;
1346         enum dma_data_direction dir;
1347         int is_play = fsi_stream_is_play(fsi, io);
1348         int len;
1349         dma_addr_t buf;
1350 
1351         if (!fsi_stream_is_working(fsi, io))
1352                 return;
1353 
1354         dai     = fsi_get_dai(io->substream);
1355         runtime = io->substream->runtime;
1356         dir     = is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
1357         len     = samples_to_bytes(runtime, io->period_samples);
1358         buf     = fsi_dma_get_area(io);
1359 
1360         dma_sync_single_for_device(dai->dev, buf, len, dir);
1361 
1362         desc = dmaengine_prep_slave_single(io->chan, buf, len, dir,
1363                                            DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
1364         if (!desc) {
1365                 dev_err(dai->dev, "dmaengine_prep_slave_sg() fail\n");
1366                 return;
1367         }
1368 
1369         desc->callback          = fsi_dma_complete;
1370         desc->callback_param    = io;
1371 
1372         if (dmaengine_submit(desc) < 0) {
1373                 dev_err(dai->dev, "tx_submit() fail\n");
1374                 return;
1375         }
1376 
1377         dma_async_issue_pending(io->chan);
1378 
1379         /*
1380          * FIXME
1381          *
1382          * In DMAEngine case, codec and FSI cannot be started simultaneously
1383          * since FSI is using the scheduler work queue.
1384          * Therefore, in capture case, probably FSI FIFO will have got
1385          * overflow error in this point.
1386          * in that case, DMA cannot start transfer until error was cleared.
1387          */
1388         if (!is_play) {
1389                 if (ERR_OVER & fsi_reg_read(fsi, DIFF_ST)) {
1390                         fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1391                         fsi_reg_write(fsi, DIFF_ST, 0);
1392                 }
1393         }
1394 }
1395 
1396 static bool fsi_dma_filter(struct dma_chan *chan, void *param)
1397 {
1398         struct sh_dmae_slave *slave = param;
1399 
1400         chan->private = slave;
1401 
1402         return true;
1403 }
1404 
1405 static int fsi_dma_transfer(struct fsi_priv *fsi, struct fsi_stream *io)
1406 {
1407         schedule_work(&io->work);
1408 
1409         return 0;
1410 }
1411 
1412 static void fsi_dma_push_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1413                                  int start)
1414 {
1415         struct fsi_master *master = fsi_get_master(fsi);
1416         u32 clk  = fsi_is_port_a(fsi) ? CRA  : CRB;
1417         u32 enable = start ? DMA_ON : 0;
1418 
1419         fsi_reg_mask_set(fsi, OUT_DMAC, DMA_ON, enable);
1420 
1421         dmaengine_terminate_all(io->chan);
1422 
1423         if (fsi_is_clk_master(fsi))
1424                 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
1425 }
1426 
1427 static int fsi_dma_probe(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev)
1428 {
1429         dma_cap_mask_t mask;
1430 
1431         dma_cap_zero(mask);
1432         dma_cap_set(DMA_SLAVE, mask);
1433 
1434         io->chan = dma_request_channel(mask, fsi_dma_filter, &io->slave);
1435         if (!io->chan) {
1436 
1437                 /* switch to PIO handler */
1438                 if (fsi_stream_is_play(fsi, io))
1439                         fsi->playback.handler   = &fsi_pio_push_handler;
1440                 else
1441                         fsi->capture.handler    = &fsi_pio_pop_handler;
1442 
1443                 dev_info(dev, "switch handler (dma => pio)\n");
1444 
1445                 /* probe again */
1446                 return fsi_stream_probe(fsi, dev);
1447         }
1448 
1449         INIT_WORK(&io->work, fsi_dma_do_work);
1450 
1451         return 0;
1452 }
1453 
1454 static int fsi_dma_remove(struct fsi_priv *fsi, struct fsi_stream *io)
1455 {
1456         cancel_work_sync(&io->work);
1457 
1458         fsi_stream_stop(fsi, io);
1459 
1460         if (io->chan)
1461                 dma_release_channel(io->chan);
1462 
1463         io->chan = NULL;
1464         return 0;
1465 }
1466 
1467 static struct fsi_stream_handler fsi_dma_push_handler = {
1468         .init           = fsi_dma_init,
1469         .quit           = fsi_dma_quit,
1470         .probe          = fsi_dma_probe,
1471         .transfer       = fsi_dma_transfer,
1472         .remove         = fsi_dma_remove,
1473         .start_stop     = fsi_dma_push_start_stop,
1474 };
1475 
1476 /*
1477  *              dai ops
1478  */
1479 static void fsi_fifo_init(struct fsi_priv *fsi,
1480                           struct fsi_stream *io,
1481                           struct device *dev)
1482 {
1483         struct fsi_master *master = fsi_get_master(fsi);
1484         int is_play = fsi_stream_is_play(fsi, io);
1485         u32 shift, i;
1486         int frame_capa;
1487 
1488         /* get on-chip RAM capacity */
1489         shift = fsi_master_read(master, FIFO_SZ);
1490         shift >>= fsi_get_port_shift(fsi, io);
1491         shift &= FIFO_SZ_MASK;
1492         frame_capa = 256 << shift;
1493         dev_dbg(dev, "fifo = %d words\n", frame_capa);
1494 
1495         /*
1496          * The maximum number of sample data varies depending
1497          * on the number of channels selected for the format.
1498          *
1499          * FIFOs are used in 4-channel units in 3-channel mode
1500          * and in 8-channel units in 5- to 7-channel mode
1501          * meaning that more FIFOs than the required size of DPRAM
1502          * are used.
1503          *
1504          * ex) if 256 words of DP-RAM is connected
1505          * 1 channel:  256 (256 x 1 = 256)
1506          * 2 channels: 128 (128 x 2 = 256)
1507          * 3 channels:  64 ( 64 x 3 = 192)
1508          * 4 channels:  64 ( 64 x 4 = 256)
1509          * 5 channels:  32 ( 32 x 5 = 160)
1510          * 6 channels:  32 ( 32 x 6 = 192)
1511          * 7 channels:  32 ( 32 x 7 = 224)
1512          * 8 channels:  32 ( 32 x 8 = 256)
1513          */
1514         for (i = 1; i < fsi->chan_num; i <<= 1)
1515                 frame_capa >>= 1;
1516         dev_dbg(dev, "%d channel %d store\n",
1517                 fsi->chan_num, frame_capa);
1518 
1519         io->fifo_sample_capa = fsi_frame2sample(fsi, frame_capa);
1520 
1521         /*
1522          * set interrupt generation factor
1523          * clear FIFO
1524          */
1525         if (is_play) {
1526                 fsi_reg_write(fsi,      DOFF_CTL, IRQ_HALF);
1527                 fsi_reg_mask_set(fsi,   DOFF_CTL, FIFO_CLR, FIFO_CLR);
1528         } else {
1529                 fsi_reg_write(fsi,      DIFF_CTL, IRQ_HALF);
1530                 fsi_reg_mask_set(fsi,   DIFF_CTL, FIFO_CLR, FIFO_CLR);
1531         }
1532 }
1533 
1534 static int fsi_hw_startup(struct fsi_priv *fsi,
1535                           struct fsi_stream *io,
1536                           struct device *dev)
1537 {
1538         u32 data = 0;
1539 
1540         /* clock setting */
1541         if (fsi_is_clk_master(fsi))
1542                 data = DIMD | DOMD;
1543 
1544         fsi_reg_mask_set(fsi, CKG1, (DIMD | DOMD), data);
1545 
1546         /* clock inversion (CKG2) */
1547         data = 0;
1548         if (fsi->bit_clk_inv)
1549                 data |= (1 << 0);
1550         if (fsi->lr_clk_inv)
1551                 data |= (1 << 4);
1552         if (fsi_is_clk_master(fsi))
1553                 data <<= 8;
1554         fsi_reg_write(fsi, CKG2, data);
1555 
1556         /* spdif ? */
1557         if (fsi_is_spdif(fsi)) {
1558                 fsi_spdif_clk_ctrl(fsi, 1);
1559                 fsi_reg_mask_set(fsi, OUT_SEL, DMMD, DMMD);
1560         }
1561 
1562         /*
1563          * get bus settings
1564          */
1565         data = 0;
1566         switch (io->sample_width) {
1567         case 2:
1568                 data = BUSOP_GET(16, io->bus_option);
1569                 break;
1570         case 4:
1571                 data = BUSOP_GET(24, io->bus_option);
1572                 break;
1573         }
1574         fsi_format_bus_setup(fsi, io, data, dev);
1575 
1576         /* irq clear */
1577         fsi_irq_disable(fsi, io);
1578         fsi_irq_clear_status(fsi);
1579 
1580         /* fifo init */
1581         fsi_fifo_init(fsi, io, dev);
1582 
1583         /* start master clock */
1584         if (fsi_is_clk_master(fsi))
1585                 return fsi_clk_enable(dev, fsi);
1586 
1587         return 0;
1588 }
1589 
1590 static int fsi_hw_shutdown(struct fsi_priv *fsi,
1591                             struct device *dev)
1592 {
1593         /* stop master clock */
1594         if (fsi_is_clk_master(fsi))
1595                 return fsi_clk_disable(dev, fsi);
1596 
1597         return 0;
1598 }
1599 
1600 static int fsi_dai_startup(struct snd_pcm_substream *substream,
1601                            struct snd_soc_dai *dai)
1602 {
1603         struct fsi_priv *fsi = fsi_get_priv(substream);
1604 
1605         fsi_clk_invalid(fsi);
1606 
1607         return 0;
1608 }
1609 
1610 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
1611                              struct snd_soc_dai *dai)
1612 {
1613         struct fsi_priv *fsi = fsi_get_priv(substream);
1614 
1615         fsi_clk_invalid(fsi);
1616 }
1617 
1618 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
1619                            struct snd_soc_dai *dai)
1620 {
1621         struct fsi_priv *fsi = fsi_get_priv(substream);
1622         struct fsi_stream *io = fsi_stream_get(fsi, substream);
1623         int ret = 0;
1624 
1625         switch (cmd) {
1626         case SNDRV_PCM_TRIGGER_START:
1627                 fsi_stream_init(fsi, io, substream);
1628                 if (!ret)
1629                         ret = fsi_hw_startup(fsi, io, dai->dev);
1630                 if (!ret)
1631                         ret = fsi_stream_transfer(io);
1632                 if (!ret)
1633                         fsi_stream_start(fsi, io);
1634                 break;
1635         case SNDRV_PCM_TRIGGER_STOP:
1636                 if (!ret)
1637                         ret = fsi_hw_shutdown(fsi, dai->dev);
1638                 fsi_stream_stop(fsi, io);
1639                 fsi_stream_quit(fsi, io);
1640                 break;
1641         }
1642 
1643         return ret;
1644 }
1645 
1646 static int fsi_set_fmt_dai(struct fsi_priv *fsi, unsigned int fmt)
1647 {
1648         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1649         case SND_SOC_DAIFMT_I2S:
1650                 fsi->fmt = CR_I2S;
1651                 fsi->chan_num = 2;
1652                 break;
1653         case SND_SOC_DAIFMT_LEFT_J:
1654                 fsi->fmt = CR_PCM;
1655                 fsi->chan_num = 2;
1656                 break;
1657         default:
1658                 return -EINVAL;
1659         }
1660 
1661         return 0;
1662 }
1663 
1664 static int fsi_set_fmt_spdif(struct fsi_priv *fsi)
1665 {
1666         struct fsi_master *master = fsi_get_master(fsi);
1667 
1668         if (fsi_version(master) < 2)
1669                 return -EINVAL;
1670 
1671         fsi->fmt = CR_DTMD_SPDIF_PCM | CR_PCM;
1672         fsi->chan_num = 2;
1673 
1674         return 0;
1675 }
1676 
1677 static int fsi_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1678 {
1679         struct fsi_priv *fsi = fsi_get_priv_frm_dai(dai);
1680         int ret;
1681 
1682         /* set master/slave audio interface */
1683         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1684         case SND_SOC_DAIFMT_CBM_CFM:
1685                 fsi->clk_master = 1;
1686                 break;
1687         case SND_SOC_DAIFMT_CBS_CFS:
1688                 break;
1689         default:
1690                 return -EINVAL;
1691         }
1692 
1693         /* set clock inversion */
1694         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1695         case SND_SOC_DAIFMT_NB_IF:
1696                 fsi->bit_clk_inv = 0;
1697                 fsi->lr_clk_inv = 1;
1698                 break;
1699         case SND_SOC_DAIFMT_IB_NF:
1700                 fsi->bit_clk_inv = 1;
1701                 fsi->lr_clk_inv = 0;
1702                 break;
1703         case SND_SOC_DAIFMT_IB_IF:
1704                 fsi->bit_clk_inv = 1;
1705                 fsi->lr_clk_inv = 1;
1706                 break;
1707         case SND_SOC_DAIFMT_NB_NF:
1708         default:
1709                 fsi->bit_clk_inv = 0;
1710                 fsi->lr_clk_inv = 0;
1711                 break;
1712         }
1713 
1714         if (fsi_is_clk_master(fsi)) {
1715                 if (fsi->clk_cpg)
1716                         fsi_clk_init(dai->dev, fsi, 0, 1, 1,
1717                                      fsi_clk_set_rate_cpg);
1718                 else
1719                         fsi_clk_init(dai->dev, fsi, 1, 1, 0,
1720                                      fsi_clk_set_rate_external);
1721         }
1722 
1723         /* set format */
1724         if (fsi_is_spdif(fsi))
1725                 ret = fsi_set_fmt_spdif(fsi);
1726         else
1727                 ret = fsi_set_fmt_dai(fsi, fmt & SND_SOC_DAIFMT_FORMAT_MASK);
1728 
1729         return ret;
1730 }
1731 
1732 static int fsi_dai_hw_params(struct snd_pcm_substream *substream,
1733                              struct snd_pcm_hw_params *params,
1734                              struct snd_soc_dai *dai)
1735 {
1736         struct fsi_priv *fsi = fsi_get_priv(substream);
1737 
1738         if (fsi_is_clk_master(fsi))
1739                 fsi_clk_valid(fsi, params_rate(params));
1740 
1741         return 0;
1742 }
1743 
1744 static const struct snd_soc_dai_ops fsi_dai_ops = {
1745         .startup        = fsi_dai_startup,
1746         .shutdown       = fsi_dai_shutdown,
1747         .trigger        = fsi_dai_trigger,
1748         .set_fmt        = fsi_dai_set_fmt,
1749         .hw_params      = fsi_dai_hw_params,
1750 };
1751 
1752 /*
1753  *              pcm ops
1754  */
1755 
1756 static struct snd_pcm_hardware fsi_pcm_hardware = {
1757         .info =         SNDRV_PCM_INFO_INTERLEAVED      |
1758                         SNDRV_PCM_INFO_MMAP             |
1759                         SNDRV_PCM_INFO_MMAP_VALID       |
1760                         SNDRV_PCM_INFO_PAUSE,
1761         .formats                = FSI_FMTS,
1762         .rates                  = FSI_RATES,
1763         .rate_min               = 8000,
1764         .rate_max               = 192000,
1765         .channels_min           = 2,
1766         .channels_max           = 2,
1767         .buffer_bytes_max       = 64 * 1024,
1768         .period_bytes_min       = 32,
1769         .period_bytes_max       = 8192,
1770         .periods_min            = 1,
1771         .periods_max            = 32,
1772         .fifo_size              = 256,
1773 };
1774 
1775 static int fsi_pcm_open(struct snd_pcm_substream *substream)
1776 {
1777         struct snd_pcm_runtime *runtime = substream->runtime;
1778         int ret = 0;
1779 
1780         snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
1781 
1782         ret = snd_pcm_hw_constraint_integer(runtime,
1783                                             SNDRV_PCM_HW_PARAM_PERIODS);
1784 
1785         return ret;
1786 }
1787 
1788 static int fsi_hw_params(struct snd_pcm_substream *substream,
1789                          struct snd_pcm_hw_params *hw_params)
1790 {
1791         return snd_pcm_lib_malloc_pages(substream,
1792                                         params_buffer_bytes(hw_params));
1793 }
1794 
1795 static int fsi_hw_free(struct snd_pcm_substream *substream)
1796 {
1797         return snd_pcm_lib_free_pages(substream);
1798 }
1799 
1800 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
1801 {
1802         struct fsi_priv *fsi = fsi_get_priv(substream);
1803         struct fsi_stream *io = fsi_stream_get(fsi, substream);
1804 
1805         return fsi_sample2frame(fsi, io->buff_sample_pos);
1806 }
1807 
1808 static struct snd_pcm_ops fsi_pcm_ops = {
1809         .open           = fsi_pcm_open,
1810         .ioctl          = snd_pcm_lib_ioctl,
1811         .hw_params      = fsi_hw_params,
1812         .hw_free        = fsi_hw_free,
1813         .pointer        = fsi_pointer,
1814 };
1815 
1816 /*
1817  *              snd_soc_platform
1818  */
1819 
1820 #define PREALLOC_BUFFER         (32 * 1024)
1821 #define PREALLOC_BUFFER_MAX     (32 * 1024)
1822 
1823 static void fsi_pcm_free(struct snd_pcm *pcm)
1824 {
1825         snd_pcm_lib_preallocate_free_for_all(pcm);
1826 }
1827 
1828 static int fsi_pcm_new(struct snd_soc_pcm_runtime *rtd)
1829 {
1830         struct snd_pcm *pcm = rtd->pcm;
1831 
1832         /*
1833          * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
1834          * in MMAP mode (i.e. aplay -M)
1835          */
1836         return snd_pcm_lib_preallocate_pages_for_all(
1837                 pcm,
1838                 SNDRV_DMA_TYPE_CONTINUOUS,
1839                 snd_dma_continuous_data(GFP_KERNEL),
1840                 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
1841 }
1842 
1843 /*
1844  *              alsa struct
1845  */
1846 
1847 static struct snd_soc_dai_driver fsi_soc_dai[] = {
1848         {
1849                 .name                   = "fsia-dai",
1850                 .playback = {
1851                         .rates          = FSI_RATES,
1852                         .formats        = FSI_FMTS,
1853                         .channels_min   = 2,
1854                         .channels_max   = 2,
1855                 },
1856                 .capture = {
1857                         .rates          = FSI_RATES,
1858                         .formats        = FSI_FMTS,
1859                         .channels_min   = 2,
1860                         .channels_max   = 2,
1861                 },
1862                 .ops = &fsi_dai_ops,
1863         },
1864         {
1865                 .name                   = "fsib-dai",
1866                 .playback = {
1867                         .rates          = FSI_RATES,
1868                         .formats        = FSI_FMTS,
1869                         .channels_min   = 2,
1870                         .channels_max   = 2,
1871                 },
1872                 .capture = {
1873                         .rates          = FSI_RATES,
1874                         .formats        = FSI_FMTS,
1875                         .channels_min   = 2,
1876                         .channels_max   = 2,
1877                 },
1878                 .ops = &fsi_dai_ops,
1879         },
1880 };
1881 
1882 static struct snd_soc_platform_driver fsi_soc_platform = {
1883         .ops            = &fsi_pcm_ops,
1884         .pcm_new        = fsi_pcm_new,
1885         .pcm_free       = fsi_pcm_free,
1886 };
1887 
1888 static const struct snd_soc_component_driver fsi_soc_component = {
1889         .name           = "fsi",
1890 };
1891 
1892 /*
1893  *              platform function
1894  */
1895 static void fsi_of_parse(char *name,
1896                          struct device_node *np,
1897                          struct sh_fsi_port_info *info,
1898                          struct device *dev)
1899 {
1900         int i;
1901         char prop[128];
1902         unsigned long flags = 0;
1903         struct {
1904                 char *name;
1905                 unsigned int val;
1906         } of_parse_property[] = {
1907                 { "spdif-connection",           SH_FSI_FMT_SPDIF },
1908                 { "stream-mode-support",        SH_FSI_ENABLE_STREAM_MODE },
1909                 { "use-internal-clock",         SH_FSI_CLK_CPG },
1910         };
1911 
1912         for (i = 0; i < ARRAY_SIZE(of_parse_property); i++) {
1913                 sprintf(prop, "%s,%s", name, of_parse_property[i].name);
1914                 if (of_get_property(np, prop, NULL))
1915                         flags |= of_parse_property[i].val;
1916         }
1917         info->flags = flags;
1918 
1919         dev_dbg(dev, "%s flags : %lx\n", name, info->flags);
1920 }
1921 
1922 static void fsi_port_info_init(struct fsi_priv *fsi,
1923                                struct sh_fsi_port_info *info)
1924 {
1925         if (info->flags & SH_FSI_FMT_SPDIF)
1926                 fsi->spdif = 1;
1927 
1928         if (info->flags & SH_FSI_CLK_CPG)
1929                 fsi->clk_cpg = 1;
1930 
1931         if (info->flags & SH_FSI_ENABLE_STREAM_MODE)
1932                 fsi->enable_stream = 1;
1933 }
1934 
1935 static void fsi_handler_init(struct fsi_priv *fsi,
1936                              struct sh_fsi_port_info *info)
1937 {
1938         fsi->playback.handler   = &fsi_pio_push_handler; /* default PIO */
1939         fsi->playback.priv      = fsi;
1940         fsi->capture.handler    = &fsi_pio_pop_handler;  /* default PIO */
1941         fsi->capture.priv       = fsi;
1942 
1943         if (info->tx_id) {
1944                 fsi->playback.slave.shdma_slave.slave_id = info->tx_id;
1945                 fsi->playback.handler = &fsi_dma_push_handler;
1946         }
1947 }
1948 
1949 static struct of_device_id fsi_of_match[];
1950 static int fsi_probe(struct platform_device *pdev)
1951 {
1952         struct fsi_master *master;
1953         struct device_node *np = pdev->dev.of_node;
1954         struct sh_fsi_platform_info info;
1955         const struct fsi_core *core;
1956         struct fsi_priv *fsi;
1957         struct resource *res;
1958         unsigned int irq;
1959         int ret;
1960 
1961         memset(&info, 0, sizeof(info));
1962 
1963         core = NULL;
1964         if (np) {
1965                 const struct of_device_id *of_id;
1966 
1967                 of_id = of_match_device(fsi_of_match, &pdev->dev);
1968                 if (of_id) {
1969                         core = of_id->data;
1970                         fsi_of_parse("fsia", np, &info.port_a, &pdev->dev);
1971                         fsi_of_parse("fsib", np, &info.port_b, &pdev->dev);
1972                 }
1973         } else {
1974                 const struct platform_device_id *id_entry = pdev->id_entry;
1975                 if (id_entry)
1976                         core = (struct fsi_core *)id_entry->driver_data;
1977 
1978                 if (pdev->dev.platform_data)
1979                         memcpy(&info, pdev->dev.platform_data, sizeof(info));
1980         }
1981 
1982         if (!core) {
1983                 dev_err(&pdev->dev, "unknown fsi device\n");
1984                 return -ENODEV;
1985         }
1986 
1987         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1988         irq = platform_get_irq(pdev, 0);
1989         if (!res || (int)irq <= 0) {
1990                 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
1991                 return -ENODEV;
1992         }
1993 
1994         master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL);
1995         if (!master) {
1996                 dev_err(&pdev->dev, "Could not allocate master\n");
1997                 return -ENOMEM;
1998         }
1999 
2000         master->base = devm_ioremap_nocache(&pdev->dev,
2001                                             res->start, resource_size(res));
2002         if (!master->base) {
2003                 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
2004                 return -ENXIO;
2005         }
2006 
2007         /* master setting */
2008         master->core            = core;
2009         spin_lock_init(&master->lock);
2010 
2011         /* FSI A setting */
2012         fsi             = &master->fsia;
2013         fsi->base       = master->base;
2014         fsi->master     = master;
2015         fsi_port_info_init(fsi, &info.port_a);
2016         fsi_handler_init(fsi, &info.port_a);
2017         ret = fsi_stream_probe(fsi, &pdev->dev);
2018         if (ret < 0) {
2019                 dev_err(&pdev->dev, "FSIA stream probe failed\n");
2020                 return ret;
2021         }
2022 
2023         /* FSI B setting */
2024         fsi             = &master->fsib;
2025         fsi->base       = master->base + 0x40;
2026         fsi->master     = master;
2027         fsi_port_info_init(fsi, &info.port_b);
2028         fsi_handler_init(fsi, &info.port_b);
2029         ret = fsi_stream_probe(fsi, &pdev->dev);
2030         if (ret < 0) {
2031                 dev_err(&pdev->dev, "FSIB stream probe failed\n");
2032                 goto exit_fsia;
2033         }
2034 
2035         pm_runtime_enable(&pdev->dev);
2036         dev_set_drvdata(&pdev->dev, master);
2037 
2038         ret = devm_request_irq(&pdev->dev, irq, &fsi_interrupt, 0,
2039                                dev_name(&pdev->dev), master);
2040         if (ret) {
2041                 dev_err(&pdev->dev, "irq request err\n");
2042                 goto exit_fsib;
2043         }
2044 
2045         ret = snd_soc_register_platform(&pdev->dev, &fsi_soc_platform);
2046         if (ret < 0) {
2047                 dev_err(&pdev->dev, "cannot snd soc register\n");
2048                 goto exit_fsib;
2049         }
2050 
2051         ret = snd_soc_register_component(&pdev->dev, &fsi_soc_component,
2052                                     fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
2053         if (ret < 0) {
2054                 dev_err(&pdev->dev, "cannot snd component register\n");
2055                 goto exit_snd_soc;
2056         }
2057 
2058         return ret;
2059 
2060 exit_snd_soc:
2061         snd_soc_unregister_platform(&pdev->dev);
2062 exit_fsib:
2063         pm_runtime_disable(&pdev->dev);
2064         fsi_stream_remove(&master->fsib);
2065 exit_fsia:
2066         fsi_stream_remove(&master->fsia);
2067 
2068         return ret;
2069 }
2070 
2071 static int fsi_remove(struct platform_device *pdev)
2072 {
2073         struct fsi_master *master;
2074 
2075         master = dev_get_drvdata(&pdev->dev);
2076 
2077         pm_runtime_disable(&pdev->dev);
2078 
2079         snd_soc_unregister_component(&pdev->dev);
2080         snd_soc_unregister_platform(&pdev->dev);
2081 
2082         fsi_stream_remove(&master->fsia);
2083         fsi_stream_remove(&master->fsib);
2084 
2085         return 0;
2086 }
2087 
2088 static void __fsi_suspend(struct fsi_priv *fsi,
2089                           struct fsi_stream *io,
2090                           struct device *dev)
2091 {
2092         if (!fsi_stream_is_working(fsi, io))
2093                 return;
2094 
2095         fsi_stream_stop(fsi, io);
2096         fsi_hw_shutdown(fsi, dev);
2097 }
2098 
2099 static void __fsi_resume(struct fsi_priv *fsi,
2100                          struct fsi_stream *io,
2101                          struct device *dev)
2102 {
2103         if (!fsi_stream_is_working(fsi, io))
2104                 return;
2105 
2106         fsi_hw_startup(fsi, io, dev);
2107         fsi_stream_start(fsi, io);
2108 }
2109 
2110 static int fsi_suspend(struct device *dev)
2111 {
2112         struct fsi_master *master = dev_get_drvdata(dev);
2113         struct fsi_priv *fsia = &master->fsia;
2114         struct fsi_priv *fsib = &master->fsib;
2115 
2116         __fsi_suspend(fsia, &fsia->playback, dev);
2117         __fsi_suspend(fsia, &fsia->capture, dev);
2118 
2119         __fsi_suspend(fsib, &fsib->playback, dev);
2120         __fsi_suspend(fsib, &fsib->capture, dev);
2121 
2122         return 0;
2123 }
2124 
2125 static int fsi_resume(struct device *dev)
2126 {
2127         struct fsi_master *master = dev_get_drvdata(dev);
2128         struct fsi_priv *fsia = &master->fsia;
2129         struct fsi_priv *fsib = &master->fsib;
2130 
2131         __fsi_resume(fsia, &fsia->playback, dev);
2132         __fsi_resume(fsia, &fsia->capture, dev);
2133 
2134         __fsi_resume(fsib, &fsib->playback, dev);
2135         __fsi_resume(fsib, &fsib->capture, dev);
2136 
2137         return 0;
2138 }
2139 
2140 static struct dev_pm_ops fsi_pm_ops = {
2141         .suspend                = fsi_suspend,
2142         .resume                 = fsi_resume,
2143 };
2144 
2145 static struct fsi_core fsi1_core = {
2146         .ver    = 1,
2147 
2148         /* Interrupt */
2149         .int_st = INT_ST,
2150         .iemsk  = IEMSK,
2151         .imsk   = IMSK,
2152 };
2153 
2154 static struct fsi_core fsi2_core = {
2155         .ver    = 2,
2156 
2157         /* Interrupt */
2158         .int_st = CPU_INT_ST,
2159         .iemsk  = CPU_IEMSK,
2160         .imsk   = CPU_IMSK,
2161         .a_mclk = A_MST_CTLR,
2162         .b_mclk = B_MST_CTLR,
2163 };
2164 
2165 static struct of_device_id fsi_of_match[] = {
2166         { .compatible = "renesas,sh_fsi",       .data = &fsi1_core},
2167         { .compatible = "renesas,sh_fsi2",      .data = &fsi2_core},
2168         {},
2169 };
2170 MODULE_DEVICE_TABLE(of, fsi_of_match);
2171 
2172 static struct platform_device_id fsi_id_table[] = {
2173         { "sh_fsi",     (kernel_ulong_t)&fsi1_core },
2174         { "sh_fsi2",    (kernel_ulong_t)&fsi2_core },
2175         {},
2176 };
2177 MODULE_DEVICE_TABLE(platform, fsi_id_table);
2178 
2179 static struct platform_driver fsi_driver = {
2180         .driver         = {
2181                 .name   = "fsi-pcm-audio",
2182                 .pm     = &fsi_pm_ops,
2183                 .of_match_table = fsi_of_match,
2184         },
2185         .probe          = fsi_probe,
2186         .remove         = fsi_remove,
2187         .id_table       = fsi_id_table,
2188 };
2189 
2190 module_platform_driver(fsi_driver);
2191 
2192 MODULE_LICENSE("GPL");
2193 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
2194 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
2195 MODULE_ALIAS("platform:fsi-pcm-audio");
2196 

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