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TOMOYO Linux Cross Reference
Linux/sound/soc/sunxi/sun4i-codec.c

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  1 /*
  2  * Copyright 2014 Emilio López <emilio@elopez.com.ar>
  3  * Copyright 2014 Jon Smirl <jonsmirl@gmail.com>
  4  * Copyright 2015 Maxime Ripard <maxime.ripard@free-electrons.com>
  5  * Copyright 2015 Adam Sampson <ats@offog.org>
  6  * Copyright 2016 Chen-Yu Tsai <wens@csie.org>
  7  *
  8  * Based on the Allwinner SDK driver, released under the GPL.
  9  *
 10  * This program is free software; you can redistribute it and/or modify
 11  * it under the terms of the GNU General Public License as published by
 12  * the Free Software Foundation; either version 2 of the License, or
 13  * (at your option) any later version.
 14  *
 15  * This program is distributed in the hope that it will be useful,
 16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 18  * GNU General Public License for more details.
 19  */
 20 
 21 #include <linux/init.h>
 22 #include <linux/kernel.h>
 23 #include <linux/module.h>
 24 #include <linux/platform_device.h>
 25 #include <linux/delay.h>
 26 #include <linux/slab.h>
 27 #include <linux/of.h>
 28 #include <linux/of_address.h>
 29 #include <linux/of_device.h>
 30 #include <linux/of_platform.h>
 31 #include <linux/clk.h>
 32 #include <linux/regmap.h>
 33 #include <linux/reset.h>
 34 #include <linux/gpio/consumer.h>
 35 
 36 #include <sound/core.h>
 37 #include <sound/pcm.h>
 38 #include <sound/pcm_params.h>
 39 #include <sound/soc.h>
 40 #include <sound/tlv.h>
 41 #include <sound/initval.h>
 42 #include <sound/dmaengine_pcm.h>
 43 
 44 /* Codec DAC digital controls and FIFO registers */
 45 #define SUN4I_CODEC_DAC_DPC                     (0x00)
 46 #define SUN4I_CODEC_DAC_DPC_EN_DA                       (31)
 47 #define SUN4I_CODEC_DAC_DPC_DVOL                        (12)
 48 #define SUN4I_CODEC_DAC_FIFOC                   (0x04)
 49 #define SUN4I_CODEC_DAC_FIFOC_DAC_FS                    (29)
 50 #define SUN4I_CODEC_DAC_FIFOC_FIR_VERSION               (28)
 51 #define SUN4I_CODEC_DAC_FIFOC_SEND_LASAT                (26)
 52 #define SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE              (24)
 53 #define SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT               (21)
 54 #define SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL             (8)
 55 #define SUN4I_CODEC_DAC_FIFOC_MONO_EN                   (6)
 56 #define SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS            (5)
 57 #define SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN                (4)
 58 #define SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH                (0)
 59 #define SUN4I_CODEC_DAC_FIFOS                   (0x08)
 60 #define SUN4I_CODEC_DAC_TXDATA                  (0x0c)
 61 
 62 /* Codec DAC side analog signal controls */
 63 #define SUN4I_CODEC_DAC_ACTL                    (0x10)
 64 #define SUN4I_CODEC_DAC_ACTL_DACAENR                    (31)
 65 #define SUN4I_CODEC_DAC_ACTL_DACAENL                    (30)
 66 #define SUN4I_CODEC_DAC_ACTL_MIXEN                      (29)
 67 #define SUN4I_CODEC_DAC_ACTL_LDACLMIXS                  (15)
 68 #define SUN4I_CODEC_DAC_ACTL_RDACRMIXS                  (14)
 69 #define SUN4I_CODEC_DAC_ACTL_LDACRMIXS                  (13)
 70 #define SUN4I_CODEC_DAC_ACTL_DACPAS                     (8)
 71 #define SUN4I_CODEC_DAC_ACTL_MIXPAS                     (7)
 72 #define SUN4I_CODEC_DAC_ACTL_PA_MUTE                    (6)
 73 #define SUN4I_CODEC_DAC_ACTL_PA_VOL                     (0)
 74 #define SUN4I_CODEC_DAC_TUNE                    (0x14)
 75 #define SUN4I_CODEC_DAC_DEBUG                   (0x18)
 76 
 77 /* Codec ADC digital controls and FIFO registers */
 78 #define SUN4I_CODEC_ADC_FIFOC                   (0x1c)
 79 #define SUN4I_CODEC_ADC_FIFOC_ADC_FS                    (29)
 80 #define SUN4I_CODEC_ADC_FIFOC_EN_AD                     (28)
 81 #define SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE              (24)
 82 #define SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL             (8)
 83 #define SUN4I_CODEC_ADC_FIFOC_MONO_EN                   (7)
 84 #define SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS            (6)
 85 #define SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN                (4)
 86 #define SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH                (0)
 87 #define SUN4I_CODEC_ADC_FIFOS                   (0x20)
 88 #define SUN4I_CODEC_ADC_RXDATA                  (0x24)
 89 
 90 /* Codec ADC side analog signal controls */
 91 #define SUN4I_CODEC_ADC_ACTL                    (0x28)
 92 #define SUN4I_CODEC_ADC_ACTL_ADC_R_EN                   (31)
 93 #define SUN4I_CODEC_ADC_ACTL_ADC_L_EN                   (30)
 94 #define SUN4I_CODEC_ADC_ACTL_PREG1EN                    (29)
 95 #define SUN4I_CODEC_ADC_ACTL_PREG2EN                    (28)
 96 #define SUN4I_CODEC_ADC_ACTL_VMICEN                     (27)
 97 #define SUN4I_CODEC_ADC_ACTL_VADCG                      (20)
 98 #define SUN4I_CODEC_ADC_ACTL_ADCIS                      (17)
 99 #define SUN4I_CODEC_ADC_ACTL_PA_EN                      (4)
100 #define SUN4I_CODEC_ADC_ACTL_DDE                        (3)
101 #define SUN4I_CODEC_ADC_DEBUG                   (0x2c)
102 
103 /* FIFO counters */
104 #define SUN4I_CODEC_DAC_TXCNT                   (0x30)
105 #define SUN4I_CODEC_ADC_RXCNT                   (0x34)
106 
107 /* Calibration register (sun7i only) */
108 #define SUN7I_CODEC_AC_DAC_CAL                  (0x38)
109 
110 /* Microphone controls (sun7i only) */
111 #define SUN7I_CODEC_AC_MIC_PHONE_CAL            (0x3c)
112 
113 /*
114  * sun6i specific registers
115  *
116  * sun6i shares the same digital control and FIFO registers as sun4i,
117  * but only the DAC digital controls are at the same offset. The others
118  * have been moved around to accommodate extra analog controls.
119  */
120 
121 /* Codec DAC digital controls and FIFO registers */
122 #define SUN6I_CODEC_ADC_FIFOC                   (0x10)
123 #define SUN6I_CODEC_ADC_FIFOC_EN_AD                     (28)
124 #define SUN6I_CODEC_ADC_FIFOS                   (0x14)
125 #define SUN6I_CODEC_ADC_RXDATA                  (0x18)
126 
127 /* Output mixer and gain controls */
128 #define SUN6I_CODEC_OM_DACA_CTRL                (0x20)
129 #define SUN6I_CODEC_OM_DACA_CTRL_DACAREN                (31)
130 #define SUN6I_CODEC_OM_DACA_CTRL_DACALEN                (30)
131 #define SUN6I_CODEC_OM_DACA_CTRL_RMIXEN                 (29)
132 #define SUN6I_CODEC_OM_DACA_CTRL_LMIXEN                 (28)
133 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC1              (23)
134 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC2              (22)
135 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_PHONE             (21)
136 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_PHONEP            (20)
137 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_LINEINR           (19)
138 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACR              (18)
139 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACL              (17)
140 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC1              (16)
141 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC2              (15)
142 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_PHONE             (14)
143 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_PHONEN            (13)
144 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_LINEINL           (12)
145 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACL              (11)
146 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACR              (10)
147 #define SUN6I_CODEC_OM_DACA_CTRL_RHPIS                  (9)
148 #define SUN6I_CODEC_OM_DACA_CTRL_LHPIS                  (8)
149 #define SUN6I_CODEC_OM_DACA_CTRL_RHPPAMUTE              (7)
150 #define SUN6I_CODEC_OM_DACA_CTRL_LHPPAMUTE              (6)
151 #define SUN6I_CODEC_OM_DACA_CTRL_HPVOL                  (0)
152 #define SUN6I_CODEC_OM_PA_CTRL                  (0x24)
153 #define SUN6I_CODEC_OM_PA_CTRL_HPPAEN                   (31)
154 #define SUN6I_CODEC_OM_PA_CTRL_HPCOM_CTL                (29)
155 #define SUN6I_CODEC_OM_PA_CTRL_COMPTEN                  (28)
156 #define SUN6I_CODEC_OM_PA_CTRL_MIC1G                    (15)
157 #define SUN6I_CODEC_OM_PA_CTRL_MIC2G                    (12)
158 #define SUN6I_CODEC_OM_PA_CTRL_LINEING                  (9)
159 #define SUN6I_CODEC_OM_PA_CTRL_PHONEG                   (6)
160 #define SUN6I_CODEC_OM_PA_CTRL_PHONEPG                  (3)
161 #define SUN6I_CODEC_OM_PA_CTRL_PHONENG                  (0)
162 
163 /* Microphone, line out and phone out controls */
164 #define SUN6I_CODEC_MIC_CTRL                    (0x28)
165 #define SUN6I_CODEC_MIC_CTRL_HBIASEN                    (31)
166 #define SUN6I_CODEC_MIC_CTRL_MBIASEN                    (30)
167 #define SUN6I_CODEC_MIC_CTRL_MIC1AMPEN                  (28)
168 #define SUN6I_CODEC_MIC_CTRL_MIC1BOOST                  (25)
169 #define SUN6I_CODEC_MIC_CTRL_MIC2AMPEN                  (24)
170 #define SUN6I_CODEC_MIC_CTRL_MIC2BOOST                  (21)
171 #define SUN6I_CODEC_MIC_CTRL_MIC2SLT                    (20)
172 #define SUN6I_CODEC_MIC_CTRL_LINEOUTLEN                 (19)
173 #define SUN6I_CODEC_MIC_CTRL_LINEOUTREN                 (18)
174 #define SUN6I_CODEC_MIC_CTRL_LINEOUTLSRC                (17)
175 #define SUN6I_CODEC_MIC_CTRL_LINEOUTRSRC                (16)
176 #define SUN6I_CODEC_MIC_CTRL_LINEOUTVC                  (11)
177 #define SUN6I_CODEC_MIC_CTRL_PHONEPREG                  (8)
178 
179 /* ADC mixer controls */
180 #define SUN6I_CODEC_ADC_ACTL                    (0x2c)
181 #define SUN6I_CODEC_ADC_ACTL_ADCREN                     (31)
182 #define SUN6I_CODEC_ADC_ACTL_ADCLEN                     (30)
183 #define SUN6I_CODEC_ADC_ACTL_ADCRG                      (27)
184 #define SUN6I_CODEC_ADC_ACTL_ADCLG                      (24)
185 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC1               (13)
186 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC2               (12)
187 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_PHONE              (11)
188 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_PHONEP             (10)
189 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_LINEINR            (9)
190 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXR              (8)
191 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXL              (7)
192 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC1               (6)
193 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC2               (5)
194 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_PHONE              (4)
195 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_PHONEN             (3)
196 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_LINEINL            (2)
197 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXL              (1)
198 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXR              (0)
199 
200 /* Analog performance tuning controls */
201 #define SUN6I_CODEC_ADDA_TUNE                   (0x30)
202 
203 /* Calibration controls */
204 #define SUN6I_CODEC_CALIBRATION                 (0x34)
205 
206 /* FIFO counters */
207 #define SUN6I_CODEC_DAC_TXCNT                   (0x40)
208 #define SUN6I_CODEC_ADC_RXCNT                   (0x44)
209 
210 /* headset jack detection and button support registers */
211 #define SUN6I_CODEC_HMIC_CTL                    (0x50)
212 #define SUN6I_CODEC_HMIC_DATA                   (0x54)
213 
214 /* TODO sun6i DAP (Digital Audio Processing) bits */
215 
216 /* FIFO counters moved on A23 */
217 #define SUN8I_A23_CODEC_DAC_TXCNT               (0x1c)
218 #define SUN8I_A23_CODEC_ADC_RXCNT               (0x20)
219 
220 /* TX FIFO moved on H3 */
221 #define SUN8I_H3_CODEC_DAC_TXDATA               (0x20)
222 #define SUN8I_H3_CODEC_DAC_DBG                  (0x48)
223 #define SUN8I_H3_CODEC_ADC_DBG                  (0x4c)
224 
225 /* TODO H3 DAP (Digital Audio Processing) bits */
226 
227 struct sun4i_codec {
228         struct device   *dev;
229         struct regmap   *regmap;
230         struct clk      *clk_apb;
231         struct clk      *clk_module;
232         struct reset_control *rst;
233         struct gpio_desc *gpio_pa;
234 
235         /* ADC_FIFOC register is at different offset on different SoCs */
236         struct regmap_field *reg_adc_fifoc;
237 
238         struct snd_dmaengine_dai_dma_data       capture_dma_data;
239         struct snd_dmaengine_dai_dma_data       playback_dma_data;
240 };
241 
242 static void sun4i_codec_start_playback(struct sun4i_codec *scodec)
243 {
244         /* Flush TX FIFO */
245         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
246                            BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH),
247                            BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));
248 
249         /* Enable DAC DRQ */
250         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
251                            BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN),
252                            BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN));
253 }
254 
255 static void sun4i_codec_stop_playback(struct sun4i_codec *scodec)
256 {
257         /* Disable DAC DRQ */
258         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
259                            BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN),
260                            0);
261 }
262 
263 static void sun4i_codec_start_capture(struct sun4i_codec *scodec)
264 {
265         /* Enable ADC DRQ */
266         regmap_field_update_bits(scodec->reg_adc_fifoc,
267                                  BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN),
268                                  BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN));
269 }
270 
271 static void sun4i_codec_stop_capture(struct sun4i_codec *scodec)
272 {
273         /* Disable ADC DRQ */
274         regmap_field_update_bits(scodec->reg_adc_fifoc,
275                                  BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN), 0);
276 }
277 
278 static int sun4i_codec_trigger(struct snd_pcm_substream *substream, int cmd,
279                                struct snd_soc_dai *dai)
280 {
281         struct snd_soc_pcm_runtime *rtd = substream->private_data;
282         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
283 
284         switch (cmd) {
285         case SNDRV_PCM_TRIGGER_START:
286         case SNDRV_PCM_TRIGGER_RESUME:
287         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
288                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
289                         sun4i_codec_start_playback(scodec);
290                 else
291                         sun4i_codec_start_capture(scodec);
292                 break;
293 
294         case SNDRV_PCM_TRIGGER_STOP:
295         case SNDRV_PCM_TRIGGER_SUSPEND:
296         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
297                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
298                         sun4i_codec_stop_playback(scodec);
299                 else
300                         sun4i_codec_stop_capture(scodec);
301                 break;
302 
303         default:
304                 return -EINVAL;
305         }
306 
307         return 0;
308 }
309 
310 static int sun4i_codec_prepare_capture(struct snd_pcm_substream *substream,
311                                        struct snd_soc_dai *dai)
312 {
313         struct snd_soc_pcm_runtime *rtd = substream->private_data;
314         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
315 
316 
317         /* Flush RX FIFO */
318         regmap_field_update_bits(scodec->reg_adc_fifoc,
319                                  BIT(SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH),
320                                  BIT(SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH));
321 
322 
323         /* Set RX FIFO trigger level */
324         regmap_field_update_bits(scodec->reg_adc_fifoc,
325                                  0xf << SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL,
326                                  0x7 << SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL);
327 
328         /*
329          * FIXME: Undocumented in the datasheet, but
330          *        Allwinner's code mentions that it is related
331          *        related to microphone gain
332          */
333         if (of_device_is_compatible(scodec->dev->of_node,
334                                     "allwinner,sun4i-a10-codec") ||
335             of_device_is_compatible(scodec->dev->of_node,
336                                     "allwinner,sun7i-a20-codec")) {
337                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_ADC_ACTL,
338                                    0x3 << 25,
339                                    0x1 << 25);
340         }
341 
342         if (of_device_is_compatible(scodec->dev->of_node,
343                                     "allwinner,sun7i-a20-codec"))
344                 /* FIXME: Undocumented bits */
345                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_TUNE,
346                                    0x3 << 8,
347                                    0x1 << 8);
348 
349         return 0;
350 }
351 
352 static int sun4i_codec_prepare_playback(struct snd_pcm_substream *substream,
353                                         struct snd_soc_dai *dai)
354 {
355         struct snd_soc_pcm_runtime *rtd = substream->private_data;
356         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
357         u32 val;
358 
359         /* Flush the TX FIFO */
360         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
361                            BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH),
362                            BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));
363 
364         /* Set TX FIFO Empty Trigger Level */
365         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
366                            0x3f << SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL,
367                            0xf << SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL);
368 
369         if (substream->runtime->rate > 32000)
370                 /* Use 64 bits FIR filter */
371                 val = 0;
372         else
373                 /* Use 32 bits FIR filter */
374                 val = BIT(SUN4I_CODEC_DAC_FIFOC_FIR_VERSION);
375 
376         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
377                            BIT(SUN4I_CODEC_DAC_FIFOC_FIR_VERSION),
378                            val);
379 
380         /* Send zeros when we have an underrun */
381         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
382                            BIT(SUN4I_CODEC_DAC_FIFOC_SEND_LASAT),
383                            0);
384 
385         return 0;
386 };
387 
388 static int sun4i_codec_prepare(struct snd_pcm_substream *substream,
389                                struct snd_soc_dai *dai)
390 {
391         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
392                 return sun4i_codec_prepare_playback(substream, dai);
393 
394         return sun4i_codec_prepare_capture(substream, dai);
395 }
396 
397 static unsigned long sun4i_codec_get_mod_freq(struct snd_pcm_hw_params *params)
398 {
399         unsigned int rate = params_rate(params);
400 
401         switch (rate) {
402         case 176400:
403         case 88200:
404         case 44100:
405         case 33075:
406         case 22050:
407         case 14700:
408         case 11025:
409         case 7350:
410                 return 22579200;
411 
412         case 192000:
413         case 96000:
414         case 48000:
415         case 32000:
416         case 24000:
417         case 16000:
418         case 12000:
419         case 8000:
420                 return 24576000;
421 
422         default:
423                 return 0;
424         }
425 }
426 
427 static int sun4i_codec_get_hw_rate(struct snd_pcm_hw_params *params)
428 {
429         unsigned int rate = params_rate(params);
430 
431         switch (rate) {
432         case 192000:
433         case 176400:
434                 return 6;
435 
436         case 96000:
437         case 88200:
438                 return 7;
439 
440         case 48000:
441         case 44100:
442                 return 0;
443 
444         case 32000:
445         case 33075:
446                 return 1;
447 
448         case 24000:
449         case 22050:
450                 return 2;
451 
452         case 16000:
453         case 14700:
454                 return 3;
455 
456         case 12000:
457         case 11025:
458                 return 4;
459 
460         case 8000:
461         case 7350:
462                 return 5;
463 
464         default:
465                 return -EINVAL;
466         }
467 }
468 
469 static int sun4i_codec_hw_params_capture(struct sun4i_codec *scodec,
470                                          struct snd_pcm_hw_params *params,
471                                          unsigned int hwrate)
472 {
473         /* Set ADC sample rate */
474         regmap_field_update_bits(scodec->reg_adc_fifoc,
475                                  7 << SUN4I_CODEC_ADC_FIFOC_ADC_FS,
476                                  hwrate << SUN4I_CODEC_ADC_FIFOC_ADC_FS);
477 
478         /* Set the number of channels we want to use */
479         if (params_channels(params) == 1)
480                 regmap_field_update_bits(scodec->reg_adc_fifoc,
481                                          BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN),
482                                          BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN));
483         else
484                 regmap_field_update_bits(scodec->reg_adc_fifoc,
485                                          BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN),
486                                          0);
487 
488         /* Set the number of sample bits to either 16 or 24 bits */
489         if (hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min == 32) {
490                 regmap_field_update_bits(scodec->reg_adc_fifoc,
491                                    BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS),
492                                    BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS));
493 
494                 regmap_field_update_bits(scodec->reg_adc_fifoc,
495                                    BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE),
496                                    0);
497 
498                 scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
499         } else {
500                 regmap_field_update_bits(scodec->reg_adc_fifoc,
501                                    BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS),
502                                    0);
503 
504                 /* Fill most significant bits with valid data MSB */
505                 regmap_field_update_bits(scodec->reg_adc_fifoc,
506                                    BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE),
507                                    BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE));
508 
509                 scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
510         }
511 
512         return 0;
513 }
514 
515 static int sun4i_codec_hw_params_playback(struct sun4i_codec *scodec,
516                                           struct snd_pcm_hw_params *params,
517                                           unsigned int hwrate)
518 {
519         u32 val;
520 
521         /* Set DAC sample rate */
522         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
523                            7 << SUN4I_CODEC_DAC_FIFOC_DAC_FS,
524                            hwrate << SUN4I_CODEC_DAC_FIFOC_DAC_FS);
525 
526         /* Set the number of channels we want to use */
527         if (params_channels(params) == 1)
528                 val = BIT(SUN4I_CODEC_DAC_FIFOC_MONO_EN);
529         else
530                 val = 0;
531 
532         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
533                            BIT(SUN4I_CODEC_DAC_FIFOC_MONO_EN),
534                            val);
535 
536         /* Set the number of sample bits to either 16 or 24 bits */
537         if (hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min == 32) {
538                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
539                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS),
540                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS));
541 
542                 /* Set TX FIFO mode to padding the LSBs with 0 */
543                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
544                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE),
545                                    0);
546 
547                 scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
548         } else {
549                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
550                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS),
551                                    0);
552 
553                 /* Set TX FIFO mode to repeat the MSB */
554                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
555                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE),
556                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE));
557 
558                 scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
559         }
560 
561         return 0;
562 }
563 
564 static int sun4i_codec_hw_params(struct snd_pcm_substream *substream,
565                                  struct snd_pcm_hw_params *params,
566                                  struct snd_soc_dai *dai)
567 {
568         struct snd_soc_pcm_runtime *rtd = substream->private_data;
569         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
570         unsigned long clk_freq;
571         int ret, hwrate;
572 
573         clk_freq = sun4i_codec_get_mod_freq(params);
574         if (!clk_freq)
575                 return -EINVAL;
576 
577         ret = clk_set_rate(scodec->clk_module, clk_freq);
578         if (ret)
579                 return ret;
580 
581         hwrate = sun4i_codec_get_hw_rate(params);
582         if (hwrate < 0)
583                 return hwrate;
584 
585         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
586                 return sun4i_codec_hw_params_playback(scodec, params,
587                                                       hwrate);
588 
589         return sun4i_codec_hw_params_capture(scodec, params,
590                                              hwrate);
591 }
592 
593 
594 static unsigned int sun4i_codec_src_rates[] = {
595         8000, 11025, 12000, 16000, 22050, 24000, 32000,
596         44100, 48000, 96000, 192000
597 };
598 
599 
600 static struct snd_pcm_hw_constraint_list sun4i_codec_constraints = {
601         .count  = ARRAY_SIZE(sun4i_codec_src_rates),
602         .list   = sun4i_codec_src_rates,
603 };
604 
605 
606 static int sun4i_codec_startup(struct snd_pcm_substream *substream,
607                                struct snd_soc_dai *dai)
608 {
609         struct snd_soc_pcm_runtime *rtd = substream->private_data;
610         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
611 
612         snd_pcm_hw_constraint_list(substream->runtime, 0,
613                                 SNDRV_PCM_HW_PARAM_RATE, &sun4i_codec_constraints);
614 
615         /*
616          * Stop issuing DRQ when we have room for less than 16 samples
617          * in our TX FIFO
618          */
619         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
620                            3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT,
621                            3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT);
622 
623         return clk_prepare_enable(scodec->clk_module);
624 }
625 
626 static void sun4i_codec_shutdown(struct snd_pcm_substream *substream,
627                                  struct snd_soc_dai *dai)
628 {
629         struct snd_soc_pcm_runtime *rtd = substream->private_data;
630         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
631 
632         clk_disable_unprepare(scodec->clk_module);
633 }
634 
635 static const struct snd_soc_dai_ops sun4i_codec_dai_ops = {
636         .startup        = sun4i_codec_startup,
637         .shutdown       = sun4i_codec_shutdown,
638         .trigger        = sun4i_codec_trigger,
639         .hw_params      = sun4i_codec_hw_params,
640         .prepare        = sun4i_codec_prepare,
641 };
642 
643 static struct snd_soc_dai_driver sun4i_codec_dai = {
644         .name   = "Codec",
645         .ops    = &sun4i_codec_dai_ops,
646         .playback = {
647                 .stream_name    = "Codec Playback",
648                 .channels_min   = 1,
649                 .channels_max   = 2,
650                 .rate_min       = 8000,
651                 .rate_max       = 192000,
652                 .rates          = SNDRV_PCM_RATE_CONTINUOUS,
653                 .formats        = SNDRV_PCM_FMTBIT_S16_LE |
654                                   SNDRV_PCM_FMTBIT_S32_LE,
655                 .sig_bits       = 24,
656         },
657         .capture = {
658                 .stream_name    = "Codec Capture",
659                 .channels_min   = 1,
660                 .channels_max   = 2,
661                 .rate_min       = 8000,
662                 .rate_max       = 48000,
663                 .rates          = SNDRV_PCM_RATE_CONTINUOUS,
664                 .formats        = SNDRV_PCM_FMTBIT_S16_LE |
665                                   SNDRV_PCM_FMTBIT_S32_LE,
666                 .sig_bits       = 24,
667         },
668 };
669 
670 /*** sun4i Codec ***/
671 static const struct snd_kcontrol_new sun4i_codec_pa_mute =
672         SOC_DAPM_SINGLE("Switch", SUN4I_CODEC_DAC_ACTL,
673                         SUN4I_CODEC_DAC_ACTL_PA_MUTE, 1, 0);
674 
675 static DECLARE_TLV_DB_SCALE(sun4i_codec_pa_volume_scale, -6300, 100, 1);
676 
677 static const struct snd_kcontrol_new sun4i_codec_controls[] = {
678         SOC_SINGLE_TLV("Power Amplifier Volume", SUN4I_CODEC_DAC_ACTL,
679                        SUN4I_CODEC_DAC_ACTL_PA_VOL, 0x3F, 0,
680                        sun4i_codec_pa_volume_scale),
681 };
682 
683 static const struct snd_kcontrol_new sun4i_codec_left_mixer_controls[] = {
684         SOC_DAPM_SINGLE("Left DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
685                         SUN4I_CODEC_DAC_ACTL_LDACLMIXS, 1, 0),
686 };
687 
688 static const struct snd_kcontrol_new sun4i_codec_right_mixer_controls[] = {
689         SOC_DAPM_SINGLE("Right DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
690                         SUN4I_CODEC_DAC_ACTL_RDACRMIXS, 1, 0),
691         SOC_DAPM_SINGLE("Left DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
692                         SUN4I_CODEC_DAC_ACTL_LDACRMIXS, 1, 0),
693 };
694 
695 static const struct snd_kcontrol_new sun4i_codec_pa_mixer_controls[] = {
696         SOC_DAPM_SINGLE("DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
697                         SUN4I_CODEC_DAC_ACTL_DACPAS, 1, 0),
698         SOC_DAPM_SINGLE("Mixer Playback Switch", SUN4I_CODEC_DAC_ACTL,
699                         SUN4I_CODEC_DAC_ACTL_MIXPAS, 1, 0),
700 };
701 
702 static const struct snd_soc_dapm_widget sun4i_codec_codec_dapm_widgets[] = {
703         /* Digital parts of the ADCs */
704         SND_SOC_DAPM_SUPPLY("ADC", SUN4I_CODEC_ADC_FIFOC,
705                             SUN4I_CODEC_ADC_FIFOC_EN_AD, 0,
706                             NULL, 0),
707 
708         /* Digital parts of the DACs */
709         SND_SOC_DAPM_SUPPLY("DAC", SUN4I_CODEC_DAC_DPC,
710                             SUN4I_CODEC_DAC_DPC_EN_DA, 0,
711                             NULL, 0),
712 
713         /* Analog parts of the ADCs */
714         SND_SOC_DAPM_ADC("Left ADC", "Codec Capture", SUN4I_CODEC_ADC_ACTL,
715                          SUN4I_CODEC_ADC_ACTL_ADC_L_EN, 0),
716         SND_SOC_DAPM_ADC("Right ADC", "Codec Capture", SUN4I_CODEC_ADC_ACTL,
717                          SUN4I_CODEC_ADC_ACTL_ADC_R_EN, 0),
718 
719         /* Analog parts of the DACs */
720         SND_SOC_DAPM_DAC("Left DAC", "Codec Playback", SUN4I_CODEC_DAC_ACTL,
721                          SUN4I_CODEC_DAC_ACTL_DACAENL, 0),
722         SND_SOC_DAPM_DAC("Right DAC", "Codec Playback", SUN4I_CODEC_DAC_ACTL,
723                          SUN4I_CODEC_DAC_ACTL_DACAENR, 0),
724 
725         /* Mixers */
726         SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
727                            sun4i_codec_left_mixer_controls,
728                            ARRAY_SIZE(sun4i_codec_left_mixer_controls)),
729         SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
730                            sun4i_codec_right_mixer_controls,
731                            ARRAY_SIZE(sun4i_codec_right_mixer_controls)),
732 
733         /* Global Mixer Enable */
734         SND_SOC_DAPM_SUPPLY("Mixer Enable", SUN4I_CODEC_DAC_ACTL,
735                             SUN4I_CODEC_DAC_ACTL_MIXEN, 0, NULL, 0),
736 
737         /* VMIC */
738         SND_SOC_DAPM_SUPPLY("VMIC", SUN4I_CODEC_ADC_ACTL,
739                             SUN4I_CODEC_ADC_ACTL_VMICEN, 0, NULL, 0),
740 
741         /* Mic Pre-Amplifiers */
742         SND_SOC_DAPM_PGA("MIC1 Pre-Amplifier", SUN4I_CODEC_ADC_ACTL,
743                          SUN4I_CODEC_ADC_ACTL_PREG1EN, 0, NULL, 0),
744 
745         /* Power Amplifier */
746         SND_SOC_DAPM_MIXER("Power Amplifier", SUN4I_CODEC_ADC_ACTL,
747                            SUN4I_CODEC_ADC_ACTL_PA_EN, 0,
748                            sun4i_codec_pa_mixer_controls,
749                            ARRAY_SIZE(sun4i_codec_pa_mixer_controls)),
750         SND_SOC_DAPM_SWITCH("Power Amplifier Mute", SND_SOC_NOPM, 0, 0,
751                             &sun4i_codec_pa_mute),
752 
753         SND_SOC_DAPM_INPUT("Mic1"),
754 
755         SND_SOC_DAPM_OUTPUT("HP Right"),
756         SND_SOC_DAPM_OUTPUT("HP Left"),
757 };
758 
759 static const struct snd_soc_dapm_route sun4i_codec_codec_dapm_routes[] = {
760         /* Left ADC / DAC Routes */
761         { "Left ADC", NULL, "ADC" },
762         { "Left DAC", NULL, "DAC" },
763 
764         /* Right ADC / DAC Routes */
765         { "Right ADC", NULL, "ADC" },
766         { "Right DAC", NULL, "DAC" },
767 
768         /* Right Mixer Routes */
769         { "Right Mixer", NULL, "Mixer Enable" },
770         { "Right Mixer", "Left DAC Playback Switch", "Left DAC" },
771         { "Right Mixer", "Right DAC Playback Switch", "Right DAC" },
772 
773         /* Left Mixer Routes */
774         { "Left Mixer", NULL, "Mixer Enable" },
775         { "Left Mixer", "Left DAC Playback Switch", "Left DAC" },
776 
777         /* Power Amplifier Routes */
778         { "Power Amplifier", "Mixer Playback Switch", "Left Mixer" },
779         { "Power Amplifier", "Mixer Playback Switch", "Right Mixer" },
780         { "Power Amplifier", "DAC Playback Switch", "Left DAC" },
781         { "Power Amplifier", "DAC Playback Switch", "Right DAC" },
782 
783         /* Headphone Output Routes */
784         { "Power Amplifier Mute", "Switch", "Power Amplifier" },
785         { "HP Right", NULL, "Power Amplifier Mute" },
786         { "HP Left", NULL, "Power Amplifier Mute" },
787 
788         /* Mic1 Routes */
789         { "Left ADC", NULL, "MIC1 Pre-Amplifier" },
790         { "Right ADC", NULL, "MIC1 Pre-Amplifier" },
791         { "MIC1 Pre-Amplifier", NULL, "Mic1"},
792         { "Mic1", NULL, "VMIC" },
793 };
794 
795 static const struct snd_soc_codec_driver sun4i_codec_codec = {
796         .component_driver = {
797                 .controls               = sun4i_codec_controls,
798                 .num_controls           = ARRAY_SIZE(sun4i_codec_controls),
799                 .dapm_widgets           = sun4i_codec_codec_dapm_widgets,
800                 .num_dapm_widgets       = ARRAY_SIZE(sun4i_codec_codec_dapm_widgets),
801                 .dapm_routes            = sun4i_codec_codec_dapm_routes,
802                 .num_dapm_routes        = ARRAY_SIZE(sun4i_codec_codec_dapm_routes),
803         },
804 };
805 
806 /*** sun6i Codec ***/
807 
808 /* mixer controls */
809 static const struct snd_kcontrol_new sun6i_codec_mixer_controls[] = {
810         SOC_DAPM_DOUBLE("DAC Playback Switch",
811                         SUN6I_CODEC_OM_DACA_CTRL,
812                         SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACL,
813                         SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACR, 1, 0),
814         SOC_DAPM_DOUBLE("DAC Reversed Playback Switch",
815                         SUN6I_CODEC_OM_DACA_CTRL,
816                         SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACR,
817                         SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACL, 1, 0),
818         SOC_DAPM_DOUBLE("Line In Playback Switch",
819                         SUN6I_CODEC_OM_DACA_CTRL,
820                         SUN6I_CODEC_OM_DACA_CTRL_LMIX_LINEINL,
821                         SUN6I_CODEC_OM_DACA_CTRL_RMIX_LINEINR, 1, 0),
822         SOC_DAPM_DOUBLE("Mic1 Playback Switch",
823                         SUN6I_CODEC_OM_DACA_CTRL,
824                         SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC1,
825                         SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC1, 1, 0),
826         SOC_DAPM_DOUBLE("Mic2 Playback Switch",
827                         SUN6I_CODEC_OM_DACA_CTRL,
828                         SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC2,
829                         SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC2, 1, 0),
830 };
831 
832 /* ADC mixer controls */
833 static const struct snd_kcontrol_new sun6i_codec_adc_mixer_controls[] = {
834         SOC_DAPM_DOUBLE("Mixer Capture Switch",
835                         SUN6I_CODEC_ADC_ACTL,
836                         SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXL,
837                         SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXR, 1, 0),
838         SOC_DAPM_DOUBLE("Mixer Reversed Capture Switch",
839                         SUN6I_CODEC_ADC_ACTL,
840                         SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXR,
841                         SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXL, 1, 0),
842         SOC_DAPM_DOUBLE("Line In Capture Switch",
843                         SUN6I_CODEC_ADC_ACTL,
844                         SUN6I_CODEC_ADC_ACTL_LADCMIX_LINEINL,
845                         SUN6I_CODEC_ADC_ACTL_RADCMIX_LINEINR, 1, 0),
846         SOC_DAPM_DOUBLE("Mic1 Capture Switch",
847                         SUN6I_CODEC_ADC_ACTL,
848                         SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC1,
849                         SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC1, 1, 0),
850         SOC_DAPM_DOUBLE("Mic2 Capture Switch",
851                         SUN6I_CODEC_ADC_ACTL,
852                         SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC2,
853                         SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC2, 1, 0),
854 };
855 
856 /* headphone controls */
857 static const char * const sun6i_codec_hp_src_enum_text[] = {
858         "DAC", "Mixer",
859 };
860 
861 static SOC_ENUM_DOUBLE_DECL(sun6i_codec_hp_src_enum,
862                             SUN6I_CODEC_OM_DACA_CTRL,
863                             SUN6I_CODEC_OM_DACA_CTRL_LHPIS,
864                             SUN6I_CODEC_OM_DACA_CTRL_RHPIS,
865                             sun6i_codec_hp_src_enum_text);
866 
867 static const struct snd_kcontrol_new sun6i_codec_hp_src[] = {
868         SOC_DAPM_ENUM("Headphone Source Playback Route",
869                       sun6i_codec_hp_src_enum),
870 };
871 
872 /* microphone controls */
873 static const char * const sun6i_codec_mic2_src_enum_text[] = {
874         "Mic2", "Mic3",
875 };
876 
877 static SOC_ENUM_SINGLE_DECL(sun6i_codec_mic2_src_enum,
878                             SUN6I_CODEC_MIC_CTRL,
879                             SUN6I_CODEC_MIC_CTRL_MIC2SLT,
880                             sun6i_codec_mic2_src_enum_text);
881 
882 static const struct snd_kcontrol_new sun6i_codec_mic2_src[] = {
883         SOC_DAPM_ENUM("Mic2 Amplifier Source Route",
884                       sun6i_codec_mic2_src_enum),
885 };
886 
887 /* line out controls */
888 static const char * const sun6i_codec_lineout_src_enum_text[] = {
889         "Stereo", "Mono Differential",
890 };
891 
892 static SOC_ENUM_DOUBLE_DECL(sun6i_codec_lineout_src_enum,
893                             SUN6I_CODEC_MIC_CTRL,
894                             SUN6I_CODEC_MIC_CTRL_LINEOUTLSRC,
895                             SUN6I_CODEC_MIC_CTRL_LINEOUTRSRC,
896                             sun6i_codec_lineout_src_enum_text);
897 
898 static const struct snd_kcontrol_new sun6i_codec_lineout_src[] = {
899         SOC_DAPM_ENUM("Line Out Source Playback Route",
900                       sun6i_codec_lineout_src_enum),
901 };
902 
903 /* volume / mute controls */
904 static const DECLARE_TLV_DB_SCALE(sun6i_codec_dvol_scale, -7308, 116, 0);
905 static const DECLARE_TLV_DB_SCALE(sun6i_codec_hp_vol_scale, -6300, 100, 1);
906 static const DECLARE_TLV_DB_SCALE(sun6i_codec_out_mixer_pregain_scale,
907                                   -450, 150, 0);
908 static const DECLARE_TLV_DB_RANGE(sun6i_codec_lineout_vol_scale,
909         0, 1, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
910         2, 31, TLV_DB_SCALE_ITEM(-4350, 150, 0),
911 );
912 static const DECLARE_TLV_DB_RANGE(sun6i_codec_mic_gain_scale,
913         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
914         1, 7, TLV_DB_SCALE_ITEM(2400, 300, 0),
915 );
916 
917 static const struct snd_kcontrol_new sun6i_codec_codec_widgets[] = {
918         SOC_SINGLE_TLV("DAC Playback Volume", SUN4I_CODEC_DAC_DPC,
919                        SUN4I_CODEC_DAC_DPC_DVOL, 0x3f, 1,
920                        sun6i_codec_dvol_scale),
921         SOC_SINGLE_TLV("Headphone Playback Volume",
922                        SUN6I_CODEC_OM_DACA_CTRL,
923                        SUN6I_CODEC_OM_DACA_CTRL_HPVOL, 0x3f, 0,
924                        sun6i_codec_hp_vol_scale),
925         SOC_SINGLE_TLV("Line Out Playback Volume",
926                        SUN6I_CODEC_MIC_CTRL,
927                        SUN6I_CODEC_MIC_CTRL_LINEOUTVC, 0x1f, 0,
928                        sun6i_codec_lineout_vol_scale),
929         SOC_DOUBLE("Headphone Playback Switch",
930                    SUN6I_CODEC_OM_DACA_CTRL,
931                    SUN6I_CODEC_OM_DACA_CTRL_LHPPAMUTE,
932                    SUN6I_CODEC_OM_DACA_CTRL_RHPPAMUTE, 1, 0),
933         SOC_DOUBLE("Line Out Playback Switch",
934                    SUN6I_CODEC_MIC_CTRL,
935                    SUN6I_CODEC_MIC_CTRL_LINEOUTLEN,
936                    SUN6I_CODEC_MIC_CTRL_LINEOUTREN, 1, 0),
937         /* Mixer pre-gains */
938         SOC_SINGLE_TLV("Line In Playback Volume",
939                        SUN6I_CODEC_OM_PA_CTRL, SUN6I_CODEC_OM_PA_CTRL_LINEING,
940                        0x7, 0, sun6i_codec_out_mixer_pregain_scale),
941         SOC_SINGLE_TLV("Mic1 Playback Volume",
942                        SUN6I_CODEC_OM_PA_CTRL, SUN6I_CODEC_OM_PA_CTRL_MIC1G,
943                        0x7, 0, sun6i_codec_out_mixer_pregain_scale),
944         SOC_SINGLE_TLV("Mic2 Playback Volume",
945                        SUN6I_CODEC_OM_PA_CTRL, SUN6I_CODEC_OM_PA_CTRL_MIC2G,
946                        0x7, 0, sun6i_codec_out_mixer_pregain_scale),
947 
948         /* Microphone Amp boost gains */
949         SOC_SINGLE_TLV("Mic1 Boost Volume", SUN6I_CODEC_MIC_CTRL,
950                        SUN6I_CODEC_MIC_CTRL_MIC1BOOST, 0x7, 0,
951                        sun6i_codec_mic_gain_scale),
952         SOC_SINGLE_TLV("Mic2 Boost Volume", SUN6I_CODEC_MIC_CTRL,
953                        SUN6I_CODEC_MIC_CTRL_MIC2BOOST, 0x7, 0,
954                        sun6i_codec_mic_gain_scale),
955         SOC_DOUBLE_TLV("ADC Capture Volume",
956                        SUN6I_CODEC_ADC_ACTL, SUN6I_CODEC_ADC_ACTL_ADCLG,
957                        SUN6I_CODEC_ADC_ACTL_ADCRG, 0x7, 0,
958                        sun6i_codec_out_mixer_pregain_scale),
959 };
960 
961 static const struct snd_soc_dapm_widget sun6i_codec_codec_dapm_widgets[] = {
962         /* Microphone inputs */
963         SND_SOC_DAPM_INPUT("MIC1"),
964         SND_SOC_DAPM_INPUT("MIC2"),
965         SND_SOC_DAPM_INPUT("MIC3"),
966 
967         /* Microphone Bias */
968         SND_SOC_DAPM_SUPPLY("HBIAS", SUN6I_CODEC_MIC_CTRL,
969                             SUN6I_CODEC_MIC_CTRL_HBIASEN, 0, NULL, 0),
970         SND_SOC_DAPM_SUPPLY("MBIAS", SUN6I_CODEC_MIC_CTRL,
971                             SUN6I_CODEC_MIC_CTRL_MBIASEN, 0, NULL, 0),
972 
973         /* Mic input path */
974         SND_SOC_DAPM_MUX("Mic2 Amplifier Source Route",
975                          SND_SOC_NOPM, 0, 0, sun6i_codec_mic2_src),
976         SND_SOC_DAPM_PGA("Mic1 Amplifier", SUN6I_CODEC_MIC_CTRL,
977                          SUN6I_CODEC_MIC_CTRL_MIC1AMPEN, 0, NULL, 0),
978         SND_SOC_DAPM_PGA("Mic2 Amplifier", SUN6I_CODEC_MIC_CTRL,
979                          SUN6I_CODEC_MIC_CTRL_MIC2AMPEN, 0, NULL, 0),
980 
981         /* Line In */
982         SND_SOC_DAPM_INPUT("LINEIN"),
983 
984         /* Digital parts of the ADCs */
985         SND_SOC_DAPM_SUPPLY("ADC Enable", SUN6I_CODEC_ADC_FIFOC,
986                             SUN6I_CODEC_ADC_FIFOC_EN_AD, 0,
987                             NULL, 0),
988 
989         /* Analog parts of the ADCs */
990         SND_SOC_DAPM_ADC("Left ADC", "Codec Capture", SUN6I_CODEC_ADC_ACTL,
991                          SUN6I_CODEC_ADC_ACTL_ADCLEN, 0),
992         SND_SOC_DAPM_ADC("Right ADC", "Codec Capture", SUN6I_CODEC_ADC_ACTL,
993                          SUN6I_CODEC_ADC_ACTL_ADCREN, 0),
994 
995         /* ADC Mixers */
996         SOC_MIXER_ARRAY("Left ADC Mixer", SND_SOC_NOPM, 0, 0,
997                         sun6i_codec_adc_mixer_controls),
998         SOC_MIXER_ARRAY("Right ADC Mixer", SND_SOC_NOPM, 0, 0,
999                         sun6i_codec_adc_mixer_controls),
1000 
1001         /* Digital parts of the DACs */
1002         SND_SOC_DAPM_SUPPLY("DAC Enable", SUN4I_CODEC_DAC_DPC,
1003                             SUN4I_CODEC_DAC_DPC_EN_DA, 0,
1004                             NULL, 0),
1005 
1006         /* Analog parts of the DACs */
1007         SND_SOC_DAPM_DAC("Left DAC", "Codec Playback",
1008                          SUN6I_CODEC_OM_DACA_CTRL,
1009                          SUN6I_CODEC_OM_DACA_CTRL_DACALEN, 0),
1010         SND_SOC_DAPM_DAC("Right DAC", "Codec Playback",
1011                          SUN6I_CODEC_OM_DACA_CTRL,
1012                          SUN6I_CODEC_OM_DACA_CTRL_DACAREN, 0),
1013 
1014         /* Mixers */
1015         SOC_MIXER_ARRAY("Left Mixer", SUN6I_CODEC_OM_DACA_CTRL,
1016                         SUN6I_CODEC_OM_DACA_CTRL_LMIXEN, 0,
1017                         sun6i_codec_mixer_controls),
1018         SOC_MIXER_ARRAY("Right Mixer", SUN6I_CODEC_OM_DACA_CTRL,
1019                         SUN6I_CODEC_OM_DACA_CTRL_RMIXEN, 0,
1020                         sun6i_codec_mixer_controls),
1021 
1022         /* Headphone output path */
1023         SND_SOC_DAPM_MUX("Headphone Source Playback Route",
1024                          SND_SOC_NOPM, 0, 0, sun6i_codec_hp_src),
1025         SND_SOC_DAPM_OUT_DRV("Headphone Amp", SUN6I_CODEC_OM_PA_CTRL,
1026                              SUN6I_CODEC_OM_PA_CTRL_HPPAEN, 0, NULL, 0),
1027         SND_SOC_DAPM_SUPPLY("HPCOM Protection", SUN6I_CODEC_OM_PA_CTRL,
1028                             SUN6I_CODEC_OM_PA_CTRL_COMPTEN, 0, NULL, 0),
1029         SND_SOC_DAPM_REG(snd_soc_dapm_supply, "HPCOM", SUN6I_CODEC_OM_PA_CTRL,
1030                          SUN6I_CODEC_OM_PA_CTRL_HPCOM_CTL, 0x3, 0x3, 0),
1031         SND_SOC_DAPM_OUTPUT("HP"),
1032 
1033         /* Line Out path */
1034         SND_SOC_DAPM_MUX("Line Out Source Playback Route",
1035                          SND_SOC_NOPM, 0, 0, sun6i_codec_lineout_src),
1036         SND_SOC_DAPM_OUTPUT("LINEOUT"),
1037 };
1038 
1039 static const struct snd_soc_dapm_route sun6i_codec_codec_dapm_routes[] = {
1040         /* DAC Routes */
1041         { "Left DAC", NULL, "DAC Enable" },
1042         { "Right DAC", NULL, "DAC Enable" },
1043 
1044         /* Microphone Routes */
1045         { "Mic1 Amplifier", NULL, "MIC1"},
1046         { "Mic2 Amplifier Source Route", "Mic2", "MIC2" },
1047         { "Mic2 Amplifier Source Route", "Mic3", "MIC3" },
1048         { "Mic2 Amplifier", NULL, "Mic2 Amplifier Source Route"},
1049 
1050         /* Left Mixer Routes */
1051         { "Left Mixer", "DAC Playback Switch", "Left DAC" },
1052         { "Left Mixer", "DAC Reversed Playback Switch", "Right DAC" },
1053         { "Left Mixer", "Line In Playback Switch", "LINEIN" },
1054         { "Left Mixer", "Mic1 Playback Switch", "Mic1 Amplifier" },
1055         { "Left Mixer", "Mic2 Playback Switch", "Mic2 Amplifier" },
1056 
1057         /* Right Mixer Routes */
1058         { "Right Mixer", "DAC Playback Switch", "Right DAC" },
1059         { "Right Mixer", "DAC Reversed Playback Switch", "Left DAC" },
1060         { "Right Mixer", "Line In Playback Switch", "LINEIN" },
1061         { "Right Mixer", "Mic1 Playback Switch", "Mic1 Amplifier" },
1062         { "Right Mixer", "Mic2 Playback Switch", "Mic2 Amplifier" },
1063 
1064         /* Left ADC Mixer Routes */
1065         { "Left ADC Mixer", "Mixer Capture Switch", "Left Mixer" },
1066         { "Left ADC Mixer", "Mixer Reversed Capture Switch", "Right Mixer" },
1067         { "Left ADC Mixer", "Line In Capture Switch", "LINEIN" },
1068         { "Left ADC Mixer", "Mic1 Capture Switch", "Mic1 Amplifier" },
1069         { "Left ADC Mixer", "Mic2 Capture Switch", "Mic2 Amplifier" },
1070 
1071         /* Right ADC Mixer Routes */
1072         { "Right ADC Mixer", "Mixer Capture Switch", "Right Mixer" },
1073         { "Right ADC Mixer", "Mixer Reversed Capture Switch", "Left Mixer" },
1074         { "Right ADC Mixer", "Line In Capture Switch", "LINEIN" },
1075         { "Right ADC Mixer", "Mic1 Capture Switch", "Mic1 Amplifier" },
1076         { "Right ADC Mixer", "Mic2 Capture Switch", "Mic2 Amplifier" },
1077 
1078         /* Headphone Routes */
1079         { "Headphone Source Playback Route", "DAC", "Left DAC" },
1080         { "Headphone Source Playback Route", "DAC", "Right DAC" },
1081         { "Headphone Source Playback Route", "Mixer", "Left Mixer" },
1082         { "Headphone Source Playback Route", "Mixer", "Right Mixer" },
1083         { "Headphone Amp", NULL, "Headphone Source Playback Route" },
1084         { "HP", NULL, "Headphone Amp" },
1085         { "HPCOM", NULL, "HPCOM Protection" },
1086 
1087         /* Line Out Routes */
1088         { "Line Out Source Playback Route", "Stereo", "Left Mixer" },
1089         { "Line Out Source Playback Route", "Stereo", "Right Mixer" },
1090         { "Line Out Source Playback Route", "Mono Differential", "Left Mixer" },
1091         { "Line Out Source Playback Route", "Mono Differential", "Right Mixer" },
1092         { "LINEOUT", NULL, "Line Out Source Playback Route" },
1093 
1094         /* ADC Routes */
1095         { "Left ADC", NULL, "ADC Enable" },
1096         { "Right ADC", NULL, "ADC Enable" },
1097         { "Left ADC", NULL, "Left ADC Mixer" },
1098         { "Right ADC", NULL, "Right ADC Mixer" },
1099 };
1100 
1101 static const struct snd_soc_codec_driver sun6i_codec_codec = {
1102         .component_driver = {
1103                 .controls               = sun6i_codec_codec_widgets,
1104                 .num_controls           = ARRAY_SIZE(sun6i_codec_codec_widgets),
1105                 .dapm_widgets           = sun6i_codec_codec_dapm_widgets,
1106                 .num_dapm_widgets       = ARRAY_SIZE(sun6i_codec_codec_dapm_widgets),
1107                 .dapm_routes            = sun6i_codec_codec_dapm_routes,
1108                 .num_dapm_routes        = ARRAY_SIZE(sun6i_codec_codec_dapm_routes),
1109         },
1110 };
1111 
1112 /* sun8i A23 codec */
1113 static const struct snd_kcontrol_new sun8i_a23_codec_codec_controls[] = {
1114         SOC_SINGLE_TLV("DAC Playback Volume", SUN4I_CODEC_DAC_DPC,
1115                        SUN4I_CODEC_DAC_DPC_DVOL, 0x3f, 1,
1116                        sun6i_codec_dvol_scale),
1117 };
1118 
1119 static const struct snd_soc_dapm_widget sun8i_a23_codec_codec_widgets[] = {
1120         /* Digital parts of the ADCs */
1121         SND_SOC_DAPM_SUPPLY("ADC Enable", SUN6I_CODEC_ADC_FIFOC,
1122                             SUN6I_CODEC_ADC_FIFOC_EN_AD, 0, NULL, 0),
1123         /* Digital parts of the DACs */
1124         SND_SOC_DAPM_SUPPLY("DAC Enable", SUN4I_CODEC_DAC_DPC,
1125                             SUN4I_CODEC_DAC_DPC_EN_DA, 0, NULL, 0),
1126 
1127 };
1128 
1129 static const struct snd_soc_codec_driver sun8i_a23_codec_codec = {
1130         .component_driver = {
1131                 .controls               = sun8i_a23_codec_codec_controls,
1132                 .num_controls           = ARRAY_SIZE(sun8i_a23_codec_codec_controls),
1133                 .dapm_widgets           = sun8i_a23_codec_codec_widgets,
1134                 .num_dapm_widgets       = ARRAY_SIZE(sun8i_a23_codec_codec_widgets),
1135         },
1136 };
1137 
1138 static const struct snd_soc_component_driver sun4i_codec_component = {
1139         .name = "sun4i-codec",
1140 };
1141 
1142 #define SUN4I_CODEC_RATES       SNDRV_PCM_RATE_CONTINUOUS
1143 #define SUN4I_CODEC_FORMATS     (SNDRV_PCM_FMTBIT_S16_LE | \
1144                                  SNDRV_PCM_FMTBIT_S32_LE)
1145 
1146 static int sun4i_codec_dai_probe(struct snd_soc_dai *dai)
1147 {
1148         struct snd_soc_card *card = snd_soc_dai_get_drvdata(dai);
1149         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(card);
1150 
1151         snd_soc_dai_init_dma_data(dai, &scodec->playback_dma_data,
1152                                   &scodec->capture_dma_data);
1153 
1154         return 0;
1155 }
1156 
1157 static struct snd_soc_dai_driver dummy_cpu_dai = {
1158         .name   = "sun4i-codec-cpu-dai",
1159         .probe  = sun4i_codec_dai_probe,
1160         .playback = {
1161                 .stream_name    = "Playback",
1162                 .channels_min   = 1,
1163                 .channels_max   = 2,
1164                 .rates          = SUN4I_CODEC_RATES,
1165                 .formats        = SUN4I_CODEC_FORMATS,
1166                 .sig_bits       = 24,
1167         },
1168         .capture = {
1169                 .stream_name    = "Capture",
1170                 .channels_min   = 1,
1171                 .channels_max   = 2,
1172                 .rates          = SUN4I_CODEC_RATES,
1173                 .formats        = SUN4I_CODEC_FORMATS,
1174                 .sig_bits       = 24,
1175          },
1176 };
1177 
1178 static struct snd_soc_dai_link *sun4i_codec_create_link(struct device *dev,
1179                                                         int *num_links)
1180 {
1181         struct snd_soc_dai_link *link = devm_kzalloc(dev, sizeof(*link),
1182                                                      GFP_KERNEL);
1183         if (!link)
1184                 return NULL;
1185 
1186         link->name              = "cdc";
1187         link->stream_name       = "CDC PCM";
1188         link->codec_dai_name    = "Codec";
1189         link->cpu_dai_name      = dev_name(dev);
1190         link->codec_name        = dev_name(dev);
1191         link->platform_name     = dev_name(dev);
1192         link->dai_fmt           = SND_SOC_DAIFMT_I2S;
1193 
1194         *num_links = 1;
1195 
1196         return link;
1197 };
1198 
1199 static int sun4i_codec_spk_event(struct snd_soc_dapm_widget *w,
1200                                  struct snd_kcontrol *k, int event)
1201 {
1202         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(w->dapm->card);
1203 
1204         gpiod_set_value_cansleep(scodec->gpio_pa,
1205                                  !!SND_SOC_DAPM_EVENT_ON(event));
1206 
1207         return 0;
1208 }
1209 
1210 static const struct snd_soc_dapm_widget sun4i_codec_card_dapm_widgets[] = {
1211         SND_SOC_DAPM_SPK("Speaker", sun4i_codec_spk_event),
1212 };
1213 
1214 static const struct snd_soc_dapm_route sun4i_codec_card_dapm_routes[] = {
1215         { "Speaker", NULL, "HP Right" },
1216         { "Speaker", NULL, "HP Left" },
1217 };
1218 
1219 static struct snd_soc_card *sun4i_codec_create_card(struct device *dev)
1220 {
1221         struct snd_soc_card *card;
1222 
1223         card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
1224         if (!card)
1225                 return ERR_PTR(-ENOMEM);
1226 
1227         card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
1228         if (!card->dai_link)
1229                 return ERR_PTR(-ENOMEM);
1230 
1231         card->dev               = dev;
1232         card->name              = "sun4i-codec";
1233         card->dapm_widgets      = sun4i_codec_card_dapm_widgets;
1234         card->num_dapm_widgets  = ARRAY_SIZE(sun4i_codec_card_dapm_widgets);
1235         card->dapm_routes       = sun4i_codec_card_dapm_routes;
1236         card->num_dapm_routes   = ARRAY_SIZE(sun4i_codec_card_dapm_routes);
1237 
1238         return card;
1239 };
1240 
1241 static const struct snd_soc_dapm_widget sun6i_codec_card_dapm_widgets[] = {
1242         SND_SOC_DAPM_HP("Headphone", NULL),
1243         SND_SOC_DAPM_LINE("Line In", NULL),
1244         SND_SOC_DAPM_LINE("Line Out", NULL),
1245         SND_SOC_DAPM_MIC("Headset Mic", NULL),
1246         SND_SOC_DAPM_MIC("Mic", NULL),
1247         SND_SOC_DAPM_SPK("Speaker", sun4i_codec_spk_event),
1248 };
1249 
1250 static struct snd_soc_card *sun6i_codec_create_card(struct device *dev)
1251 {
1252         struct snd_soc_card *card;
1253         int ret;
1254 
1255         card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
1256         if (!card)
1257                 return ERR_PTR(-ENOMEM);
1258 
1259         card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
1260         if (!card->dai_link)
1261                 return ERR_PTR(-ENOMEM);
1262 
1263         card->dev               = dev;
1264         card->name              = "A31 Audio Codec";
1265         card->dapm_widgets      = sun6i_codec_card_dapm_widgets;
1266         card->num_dapm_widgets  = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
1267         card->fully_routed      = true;
1268 
1269         ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
1270         if (ret)
1271                 dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
1272 
1273         return card;
1274 };
1275 
1276 /* Connect digital side enables to analog side widgets */
1277 static const struct snd_soc_dapm_route sun8i_codec_card_routes[] = {
1278         /* ADC Routes */
1279         { "Left ADC", NULL, "ADC Enable" },
1280         { "Right ADC", NULL, "ADC Enable" },
1281         { "Codec Capture", NULL, "Left ADC" },
1282         { "Codec Capture", NULL, "Right ADC" },
1283 
1284         /* DAC Routes */
1285         { "Left DAC", NULL, "DAC Enable" },
1286         { "Right DAC", NULL, "DAC Enable" },
1287         { "Left DAC", NULL, "Codec Playback" },
1288         { "Right DAC", NULL, "Codec Playback" },
1289 };
1290 
1291 static struct snd_soc_aux_dev aux_dev = {
1292         .name = "Codec Analog Controls",
1293 };
1294 
1295 static struct snd_soc_card *sun8i_a23_codec_create_card(struct device *dev)
1296 {
1297         struct snd_soc_card *card;
1298         int ret;
1299 
1300         card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
1301         if (!card)
1302                 return ERR_PTR(-ENOMEM);
1303 
1304         aux_dev.codec_of_node = of_parse_phandle(dev->of_node,
1305                                                  "allwinner,codec-analog-controls",
1306                                                  0);
1307         if (!aux_dev.codec_of_node) {
1308                 dev_err(dev, "Can't find analog controls for codec.\n");
1309                 return ERR_PTR(-EINVAL);
1310         };
1311 
1312         card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
1313         if (!card->dai_link)
1314                 return ERR_PTR(-ENOMEM);
1315 
1316         card->dev               = dev;
1317         card->name              = "A23 Audio Codec";
1318         card->dapm_widgets      = sun6i_codec_card_dapm_widgets;
1319         card->num_dapm_widgets  = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
1320         card->dapm_routes       = sun8i_codec_card_routes;
1321         card->num_dapm_routes   = ARRAY_SIZE(sun8i_codec_card_routes);
1322         card->aux_dev           = &aux_dev;
1323         card->num_aux_devs      = 1;
1324         card->fully_routed      = true;
1325 
1326         ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
1327         if (ret)
1328                 dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
1329 
1330         return card;
1331 };
1332 
1333 static struct snd_soc_card *sun8i_h3_codec_create_card(struct device *dev)
1334 {
1335         struct snd_soc_card *card;
1336         int ret;
1337 
1338         card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
1339         if (!card)
1340                 return ERR_PTR(-ENOMEM);
1341 
1342         aux_dev.codec_of_node = of_parse_phandle(dev->of_node,
1343                                                  "allwinner,codec-analog-controls",
1344                                                  0);
1345         if (!aux_dev.codec_of_node) {
1346                 dev_err(dev, "Can't find analog controls for codec.\n");
1347                 return ERR_PTR(-EINVAL);
1348         };
1349 
1350         card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
1351         if (!card->dai_link)
1352                 return ERR_PTR(-ENOMEM);
1353 
1354         card->dev               = dev;
1355         card->name              = "H3 Audio Codec";
1356         card->dapm_widgets      = sun6i_codec_card_dapm_widgets;
1357         card->num_dapm_widgets  = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
1358         card->dapm_routes       = sun8i_codec_card_routes;
1359         card->num_dapm_routes   = ARRAY_SIZE(sun8i_codec_card_routes);
1360         card->aux_dev           = &aux_dev;
1361         card->num_aux_devs      = 1;
1362         card->fully_routed      = true;
1363 
1364         ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
1365         if (ret)
1366                 dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
1367 
1368         return card;
1369 };
1370 
1371 static struct snd_soc_card *sun8i_v3s_codec_create_card(struct device *dev)
1372 {
1373         struct snd_soc_card *card;
1374         int ret;
1375 
1376         card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
1377         if (!card)
1378                 return ERR_PTR(-ENOMEM);
1379 
1380         aux_dev.codec_of_node = of_parse_phandle(dev->of_node,
1381                                                  "allwinner,codec-analog-controls",
1382                                                  0);
1383         if (!aux_dev.codec_of_node) {
1384                 dev_err(dev, "Can't find analog controls for codec.\n");
1385                 return ERR_PTR(-EINVAL);
1386         };
1387 
1388         card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
1389         if (!card->dai_link)
1390                 return ERR_PTR(-ENOMEM);
1391 
1392         card->dev               = dev;
1393         card->name              = "V3s Audio Codec";
1394         card->dapm_widgets      = sun6i_codec_card_dapm_widgets;
1395         card->num_dapm_widgets  = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
1396         card->dapm_routes       = sun8i_codec_card_routes;
1397         card->num_dapm_routes   = ARRAY_SIZE(sun8i_codec_card_routes);
1398         card->aux_dev           = &aux_dev;
1399         card->num_aux_devs      = 1;
1400         card->fully_routed      = true;
1401 
1402         ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
1403         if (ret)
1404                 dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
1405 
1406         return card;
1407 };
1408 
1409 static const struct regmap_config sun4i_codec_regmap_config = {
1410         .reg_bits       = 32,
1411         .reg_stride     = 4,
1412         .val_bits       = 32,
1413         .max_register   = SUN4I_CODEC_ADC_RXCNT,
1414 };
1415 
1416 static const struct regmap_config sun6i_codec_regmap_config = {
1417         .reg_bits       = 32,
1418         .reg_stride     = 4,
1419         .val_bits       = 32,
1420         .max_register   = SUN6I_CODEC_HMIC_DATA,
1421 };
1422 
1423 static const struct regmap_config sun7i_codec_regmap_config = {
1424         .reg_bits       = 32,
1425         .reg_stride     = 4,
1426         .val_bits       = 32,
1427         .max_register   = SUN7I_CODEC_AC_MIC_PHONE_CAL,
1428 };
1429 
1430 static const struct regmap_config sun8i_a23_codec_regmap_config = {
1431         .reg_bits       = 32,
1432         .reg_stride     = 4,
1433         .val_bits       = 32,
1434         .max_register   = SUN8I_A23_CODEC_ADC_RXCNT,
1435 };
1436 
1437 static const struct regmap_config sun8i_h3_codec_regmap_config = {
1438         .reg_bits       = 32,
1439         .reg_stride     = 4,
1440         .val_bits       = 32,
1441         .max_register   = SUN8I_H3_CODEC_ADC_DBG,
1442 };
1443 
1444 static const struct regmap_config sun8i_v3s_codec_regmap_config = {
1445         .reg_bits       = 32,
1446         .reg_stride     = 4,
1447         .val_bits       = 32,
1448         .max_register   = SUN8I_H3_CODEC_ADC_DBG,
1449 };
1450 
1451 struct sun4i_codec_quirks {
1452         const struct regmap_config *regmap_config;
1453         const struct snd_soc_codec_driver *codec;
1454         struct snd_soc_card * (*create_card)(struct device *dev);
1455         struct reg_field reg_adc_fifoc; /* used for regmap_field */
1456         unsigned int reg_dac_txdata;    /* TX FIFO offset for DMA config */
1457         unsigned int reg_adc_rxdata;    /* RX FIFO offset for DMA config */
1458         bool has_reset;
1459 };
1460 
1461 static const struct sun4i_codec_quirks sun4i_codec_quirks = {
1462         .regmap_config  = &sun4i_codec_regmap_config,
1463         .codec          = &sun4i_codec_codec,
1464         .create_card    = sun4i_codec_create_card,
1465         .reg_adc_fifoc  = REG_FIELD(SUN4I_CODEC_ADC_FIFOC, 0, 31),
1466         .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
1467         .reg_adc_rxdata = SUN4I_CODEC_ADC_RXDATA,
1468 };
1469 
1470 static const struct sun4i_codec_quirks sun6i_a31_codec_quirks = {
1471         .regmap_config  = &sun6i_codec_regmap_config,
1472         .codec          = &sun6i_codec_codec,
1473         .create_card    = sun6i_codec_create_card,
1474         .reg_adc_fifoc  = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
1475         .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
1476         .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
1477         .has_reset      = true,
1478 };
1479 
1480 static const struct sun4i_codec_quirks sun7i_codec_quirks = {
1481         .regmap_config  = &sun7i_codec_regmap_config,
1482         .codec          = &sun4i_codec_codec,
1483         .create_card    = sun4i_codec_create_card,
1484         .reg_adc_fifoc  = REG_FIELD(SUN4I_CODEC_ADC_FIFOC, 0, 31),
1485         .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
1486         .reg_adc_rxdata = SUN4I_CODEC_ADC_RXDATA,
1487 };
1488 
1489 static const struct sun4i_codec_quirks sun8i_a23_codec_quirks = {
1490         .regmap_config  = &sun8i_a23_codec_regmap_config,
1491         .codec          = &sun8i_a23_codec_codec,
1492         .create_card    = sun8i_a23_codec_create_card,
1493         .reg_adc_fifoc  = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
1494         .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
1495         .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
1496         .has_reset      = true,
1497 };
1498 
1499 static const struct sun4i_codec_quirks sun8i_h3_codec_quirks = {
1500         .regmap_config  = &sun8i_h3_codec_regmap_config,
1501         /*
1502          * TODO Share the codec structure with A23 for now.
1503          * This should be split out when adding digital audio
1504          * processing support for the H3.
1505          */
1506         .codec          = &sun8i_a23_codec_codec,
1507         .create_card    = sun8i_h3_codec_create_card,
1508         .reg_adc_fifoc  = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
1509         .reg_dac_txdata = SUN8I_H3_CODEC_DAC_TXDATA,
1510         .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
1511         .has_reset      = true,
1512 };
1513 
1514 static const struct sun4i_codec_quirks sun8i_v3s_codec_quirks = {
1515         .regmap_config  = &sun8i_v3s_codec_regmap_config,
1516         /*
1517          * TODO The codec structure should be split out, like
1518          * H3, when adding digital audio processing support.
1519          */
1520         .codec          = &sun8i_a23_codec_codec,
1521         .create_card    = sun8i_v3s_codec_create_card,
1522         .reg_adc_fifoc  = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
1523         .reg_dac_txdata = SUN8I_H3_CODEC_DAC_TXDATA,
1524         .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
1525         .has_reset      = true,
1526 };
1527 
1528 static const struct of_device_id sun4i_codec_of_match[] = {
1529         {
1530                 .compatible = "allwinner,sun4i-a10-codec",
1531                 .data = &sun4i_codec_quirks,
1532         },
1533         {
1534                 .compatible = "allwinner,sun6i-a31-codec",
1535                 .data = &sun6i_a31_codec_quirks,
1536         },
1537         {
1538                 .compatible = "allwinner,sun7i-a20-codec",
1539                 .data = &sun7i_codec_quirks,
1540         },
1541         {
1542                 .compatible = "allwinner,sun8i-a23-codec",
1543                 .data = &sun8i_a23_codec_quirks,
1544         },
1545         {
1546                 .compatible = "allwinner,sun8i-h3-codec",
1547                 .data = &sun8i_h3_codec_quirks,
1548         },
1549         {
1550                 .compatible = "allwinner,sun8i-v3s-codec",
1551                 .data = &sun8i_v3s_codec_quirks,
1552         },
1553         {}
1554 };
1555 MODULE_DEVICE_TABLE(of, sun4i_codec_of_match);
1556 
1557 static int sun4i_codec_probe(struct platform_device *pdev)
1558 {
1559         struct snd_soc_card *card;
1560         struct sun4i_codec *scodec;
1561         const struct sun4i_codec_quirks *quirks;
1562         struct resource *res;
1563         void __iomem *base;
1564         int ret;
1565 
1566         scodec = devm_kzalloc(&pdev->dev, sizeof(*scodec), GFP_KERNEL);
1567         if (!scodec)
1568                 return -ENOMEM;
1569 
1570         scodec->dev = &pdev->dev;
1571 
1572         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1573         base = devm_ioremap_resource(&pdev->dev, res);
1574         if (IS_ERR(base)) {
1575                 dev_err(&pdev->dev, "Failed to map the registers\n");
1576                 return PTR_ERR(base);
1577         }
1578 
1579         quirks = of_device_get_match_data(&pdev->dev);
1580         if (quirks == NULL) {
1581                 dev_err(&pdev->dev, "Failed to determine the quirks to use\n");
1582                 return -ENODEV;
1583         }
1584 
1585         scodec->regmap = devm_regmap_init_mmio(&pdev->dev, base,
1586                                                quirks->regmap_config);
1587         if (IS_ERR(scodec->regmap)) {
1588                 dev_err(&pdev->dev, "Failed to create our regmap\n");
1589                 return PTR_ERR(scodec->regmap);
1590         }
1591 
1592         /* Get the clocks from the DT */
1593         scodec->clk_apb = devm_clk_get(&pdev->dev, "apb");
1594         if (IS_ERR(scodec->clk_apb)) {
1595                 dev_err(&pdev->dev, "Failed to get the APB clock\n");
1596                 return PTR_ERR(scodec->clk_apb);
1597         }
1598 
1599         scodec->clk_module = devm_clk_get(&pdev->dev, "codec");
1600         if (IS_ERR(scodec->clk_module)) {
1601                 dev_err(&pdev->dev, "Failed to get the module clock\n");
1602                 return PTR_ERR(scodec->clk_module);
1603         }
1604 
1605         if (quirks->has_reset) {
1606                 scodec->rst = devm_reset_control_get_exclusive(&pdev->dev,
1607                                                                NULL);
1608                 if (IS_ERR(scodec->rst)) {
1609                         dev_err(&pdev->dev, "Failed to get reset control\n");
1610                         return PTR_ERR(scodec->rst);
1611                 }
1612         }
1613 
1614         scodec->gpio_pa = devm_gpiod_get_optional(&pdev->dev, "allwinner,pa",
1615                                                   GPIOD_OUT_LOW);
1616         if (IS_ERR(scodec->gpio_pa)) {
1617                 ret = PTR_ERR(scodec->gpio_pa);
1618                 if (ret != -EPROBE_DEFER)
1619                         dev_err(&pdev->dev, "Failed to get pa gpio: %d\n", ret);
1620                 return ret;
1621         }
1622 
1623         /* reg_field setup */
1624         scodec->reg_adc_fifoc = devm_regmap_field_alloc(&pdev->dev,
1625                                                         scodec->regmap,
1626                                                         quirks->reg_adc_fifoc);
1627         if (IS_ERR(scodec->reg_adc_fifoc)) {
1628                 ret = PTR_ERR(scodec->reg_adc_fifoc);
1629                 dev_err(&pdev->dev, "Failed to create regmap fields: %d\n",
1630                         ret);
1631                 return ret;
1632         }
1633 
1634         /* Enable the bus clock */
1635         if (clk_prepare_enable(scodec->clk_apb)) {
1636                 dev_err(&pdev->dev, "Failed to enable the APB clock\n");
1637                 return -EINVAL;
1638         }
1639 
1640         /* Deassert the reset control */
1641         if (scodec->rst) {
1642                 ret = reset_control_deassert(scodec->rst);
1643                 if (ret) {
1644                         dev_err(&pdev->dev,
1645                                 "Failed to deassert the reset control\n");
1646                         goto err_clk_disable;
1647                 }
1648         }
1649 
1650         /* DMA configuration for TX FIFO */
1651         scodec->playback_dma_data.addr = res->start + quirks->reg_dac_txdata;
1652         scodec->playback_dma_data.maxburst = 8;
1653         scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
1654 
1655         /* DMA configuration for RX FIFO */
1656         scodec->capture_dma_data.addr = res->start + quirks->reg_adc_rxdata;
1657         scodec->capture_dma_data.maxburst = 8;
1658         scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
1659 
1660         ret = snd_soc_register_codec(&pdev->dev, quirks->codec,
1661                                      &sun4i_codec_dai, 1);
1662         if (ret) {
1663                 dev_err(&pdev->dev, "Failed to register our codec\n");
1664                 goto err_assert_reset;
1665         }
1666 
1667         ret = devm_snd_soc_register_component(&pdev->dev,
1668                                               &sun4i_codec_component,
1669                                               &dummy_cpu_dai, 1);
1670         if (ret) {
1671                 dev_err(&pdev->dev, "Failed to register our DAI\n");
1672                 goto err_unregister_codec;
1673         }
1674 
1675         ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
1676         if (ret) {
1677                 dev_err(&pdev->dev, "Failed to register against DMAEngine\n");
1678                 goto err_unregister_codec;
1679         }
1680 
1681         card = quirks->create_card(&pdev->dev);
1682         if (IS_ERR(card)) {
1683                 ret = PTR_ERR(card);
1684                 dev_err(&pdev->dev, "Failed to create our card\n");
1685                 goto err_unregister_codec;
1686         }
1687 
1688         snd_soc_card_set_drvdata(card, scodec);
1689 
1690         ret = snd_soc_register_card(card);
1691         if (ret) {
1692                 dev_err(&pdev->dev, "Failed to register our card\n");
1693                 goto err_unregister_codec;
1694         }
1695 
1696         return 0;
1697 
1698 err_unregister_codec:
1699         snd_soc_unregister_codec(&pdev->dev);
1700 err_assert_reset:
1701         if (scodec->rst)
1702                 reset_control_assert(scodec->rst);
1703 err_clk_disable:
1704         clk_disable_unprepare(scodec->clk_apb);
1705         return ret;
1706 }
1707 
1708 static int sun4i_codec_remove(struct platform_device *pdev)
1709 {
1710         struct snd_soc_card *card = platform_get_drvdata(pdev);
1711         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(card);
1712 
1713         snd_soc_unregister_card(card);
1714         snd_soc_unregister_codec(&pdev->dev);
1715         if (scodec->rst)
1716                 reset_control_assert(scodec->rst);
1717         clk_disable_unprepare(scodec->clk_apb);
1718 
1719         return 0;
1720 }
1721 
1722 static struct platform_driver sun4i_codec_driver = {
1723         .driver = {
1724                 .name = "sun4i-codec",
1725                 .of_match_table = sun4i_codec_of_match,
1726         },
1727         .probe = sun4i_codec_probe,
1728         .remove = sun4i_codec_remove,
1729 };
1730 module_platform_driver(sun4i_codec_driver);
1731 
1732 MODULE_DESCRIPTION("Allwinner A10 codec driver");
1733 MODULE_AUTHOR("Emilio López <emilio@elopez.com.ar>");
1734 MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>");
1735 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
1736 MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
1737 MODULE_LICENSE("GPL");
1738 

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