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Linux/tools/testing/nvdimm/test/nfit_test.h

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  1 /*
  2  * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
  3  *
  4  * This program is free software; you can redistribute it and/or modify
  5  * it under the terms of version 2 of the GNU General Public License as
  6  * published by the Free Software Foundation.
  7  *
  8  * This program is distributed in the hope that it will be useful, but
  9  * WITHOUT ANY WARRANTY; without even the implied warranty of
 10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 11  * General Public License for more details.
 12  */
 13 #ifndef __NFIT_TEST_H__
 14 #define __NFIT_TEST_H__
 15 #include <linux/list.h>
 16 #include <linux/uuid.h>
 17 #include <linux/ioport.h>
 18 #include <linux/spinlock_types.h>
 19 
 20 struct nfit_test_request {
 21         struct list_head list;
 22         struct resource res;
 23 };
 24 
 25 struct nfit_test_resource {
 26         struct list_head requests;
 27         struct list_head list;
 28         struct resource res;
 29         struct device *dev;
 30         spinlock_t lock;
 31         int req_count;
 32         void *buf;
 33 };
 34 
 35 #define ND_TRANSLATE_SPA_STATUS_INVALID_SPA  2
 36 #define NFIT_ARS_INJECT_INVALID 2
 37 
 38 enum err_inj_options {
 39         ND_ARS_ERR_INJ_OPT_NOTIFY = 0,
 40 };
 41 
 42 /* nfit commands */
 43 enum nfit_cmd_num {
 44         NFIT_CMD_TRANSLATE_SPA = 5,
 45         NFIT_CMD_ARS_INJECT_SET = 7,
 46         NFIT_CMD_ARS_INJECT_CLEAR = 8,
 47         NFIT_CMD_ARS_INJECT_GET = 9,
 48 };
 49 
 50 struct nd_cmd_translate_spa {
 51         __u64 spa;
 52         __u32 status;
 53         __u8  flags;
 54         __u8  _reserved[3];
 55         __u64 translate_length;
 56         __u32 num_nvdimms;
 57         struct nd_nvdimm_device {
 58                 __u32 nfit_device_handle;
 59                 __u32 _reserved;
 60                 __u64 dpa;
 61         } __packed devices[0];
 62 
 63 } __packed;
 64 
 65 struct nd_cmd_ars_err_inj {
 66         __u64 err_inj_spa_range_base;
 67         __u64 err_inj_spa_range_length;
 68         __u8  err_inj_options;
 69         __u32 status;
 70 } __packed;
 71 
 72 struct nd_cmd_ars_err_inj_clr {
 73         __u64 err_inj_clr_spa_range_base;
 74         __u64 err_inj_clr_spa_range_length;
 75         __u32 status;
 76 } __packed;
 77 
 78 struct nd_cmd_ars_err_inj_stat {
 79         __u32 status;
 80         __u32 inj_err_rec_count;
 81         struct nd_error_stat_query_record {
 82                 __u64 err_inj_stat_spa_range_base;
 83                 __u64 err_inj_stat_spa_range_length;
 84         } __packed record[0];
 85 } __packed;
 86 
 87 #define ND_INTEL_SMART                   1
 88 #define ND_INTEL_SMART_THRESHOLD         2
 89 #define ND_INTEL_ENABLE_LSS_STATUS      10
 90 #define ND_INTEL_FW_GET_INFO            12
 91 #define ND_INTEL_FW_START_UPDATE        13
 92 #define ND_INTEL_FW_SEND_DATA           14
 93 #define ND_INTEL_FW_FINISH_UPDATE       15
 94 #define ND_INTEL_FW_FINISH_QUERY        16
 95 #define ND_INTEL_SMART_SET_THRESHOLD    17
 96 #define ND_INTEL_SMART_INJECT           18
 97 
 98 #define ND_INTEL_SMART_HEALTH_VALID             (1 << 0)
 99 #define ND_INTEL_SMART_SPARES_VALID             (1 << 1)
100 #define ND_INTEL_SMART_USED_VALID               (1 << 2)
101 #define ND_INTEL_SMART_MTEMP_VALID              (1 << 3)
102 #define ND_INTEL_SMART_CTEMP_VALID              (1 << 4)
103 #define ND_INTEL_SMART_SHUTDOWN_COUNT_VALID     (1 << 5)
104 #define ND_INTEL_SMART_AIT_STATUS_VALID         (1 << 6)
105 #define ND_INTEL_SMART_PTEMP_VALID              (1 << 7)
106 #define ND_INTEL_SMART_ALARM_VALID              (1 << 9)
107 #define ND_INTEL_SMART_SHUTDOWN_VALID           (1 << 10)
108 #define ND_INTEL_SMART_VENDOR_VALID             (1 << 11)
109 #define ND_INTEL_SMART_SPARE_TRIP               (1 << 0)
110 #define ND_INTEL_SMART_TEMP_TRIP                (1 << 1)
111 #define ND_INTEL_SMART_CTEMP_TRIP               (1 << 2)
112 #define ND_INTEL_SMART_NON_CRITICAL_HEALTH      (1 << 0)
113 #define ND_INTEL_SMART_CRITICAL_HEALTH          (1 << 1)
114 #define ND_INTEL_SMART_FATAL_HEALTH             (1 << 2)
115 #define ND_INTEL_SMART_INJECT_MTEMP             (1 << 0)
116 #define ND_INTEL_SMART_INJECT_SPARE             (1 << 1)
117 #define ND_INTEL_SMART_INJECT_FATAL             (1 << 2)
118 #define ND_INTEL_SMART_INJECT_SHUTDOWN          (1 << 3)
119 
120 struct nd_intel_smart_threshold {
121         __u32 status;
122         union {
123                 struct {
124                         __u16 alarm_control;
125                         __u8 spares;
126                         __u16 media_temperature;
127                         __u16 ctrl_temperature;
128                         __u8 reserved[1];
129                 } __packed;
130                 __u8 data[8];
131         };
132 } __packed;
133 
134 struct nd_intel_smart_set_threshold {
135         __u16 alarm_control;
136         __u8 spares;
137         __u16 media_temperature;
138         __u16 ctrl_temperature;
139         __u32 status;
140 } __packed;
141 
142 struct nd_intel_smart_inject {
143         __u64 flags;
144         __u8 mtemp_enable;
145         __u16 media_temperature;
146         __u8 spare_enable;
147         __u8 spares;
148         __u8 fatal_enable;
149         __u8 unsafe_shutdown_enable;
150         __u32 status;
151 } __packed;
152 
153 #define INTEL_FW_STORAGE_SIZE           0x100000
154 #define INTEL_FW_MAX_SEND_LEN           0xFFEC
155 #define INTEL_FW_QUERY_INTERVAL         250000
156 #define INTEL_FW_QUERY_MAX_TIME         3000000
157 #define INTEL_FW_FIS_VERSION            0x0105
158 #define INTEL_FW_FAKE_VERSION           0xffffffffabcd
159 
160 enum intel_fw_update_state {
161         FW_STATE_NEW = 0,
162         FW_STATE_IN_PROGRESS,
163         FW_STATE_VERIFY,
164         FW_STATE_UPDATED,
165 };
166 
167 struct nd_intel_fw_info {
168         __u32 status;
169         __u32 storage_size;
170         __u32 max_send_len;
171         __u32 query_interval;
172         __u32 max_query_time;
173         __u8 update_cap;
174         __u8 reserved[3];
175         __u32 fis_version;
176         __u64 run_version;
177         __u64 updated_version;
178 } __packed;
179 
180 struct nd_intel_fw_start {
181         __u32 status;
182         __u32 context;
183 } __packed;
184 
185 /* this one has the output first because the variable input data size */
186 struct nd_intel_fw_send_data {
187         __u32 context;
188         __u32 offset;
189         __u32 length;
190         __u8 data[0];
191 /* this field is not declared due ot variable data from input */
192 /*      __u32 status; */
193 } __packed;
194 
195 struct nd_intel_fw_finish_update {
196         __u8 ctrl_flags;
197         __u8 reserved[3];
198         __u32 context;
199         __u32 status;
200 } __packed;
201 
202 struct nd_intel_fw_finish_query {
203         __u32 context;
204         __u32 status;
205         __u64 updated_fw_rev;
206 } __packed;
207 
208 struct nd_intel_lss {
209         __u8 enable;
210         __u32 status;
211 } __packed;
212 
213 union acpi_object;
214 typedef void *acpi_handle;
215 
216 typedef struct nfit_test_resource *(*nfit_test_lookup_fn)(resource_size_t);
217 typedef union acpi_object *(*nfit_test_evaluate_dsm_fn)(acpi_handle handle,
218                  const guid_t *guid, u64 rev, u64 func,
219                  union acpi_object *argv4);
220 void __iomem *__wrap_ioremap_nocache(resource_size_t offset,
221                 unsigned long size);
222 void __wrap_iounmap(volatile void __iomem *addr);
223 void nfit_test_setup(nfit_test_lookup_fn lookup,
224                 nfit_test_evaluate_dsm_fn evaluate);
225 void nfit_test_teardown(void);
226 struct nfit_test_resource *get_nfit_res(resource_size_t resource);
227 #endif
228 

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