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TOMOYO Linux Cross Reference
Linux/virt/kvm/ioapic.c

Version: ~ [ linux-5.6 ] ~ [ linux-5.5.13 ] ~ [ linux-5.4.28 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.113 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.174 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.217 ] ~ [ linux-4.8.17 ] ~ [ linux-4.7.10 ] ~ [ linux-4.6.7 ] ~ [ linux-4.5.7 ] ~ [ linux-4.4.217 ] ~ [ linux-4.3.6 ] ~ [ linux-4.2.8 ] ~ [ linux-4.1.52 ] ~ [ linux-4.0.9 ] ~ [ linux-3.19.8 ] ~ [ linux-3.18.140 ] ~ [ linux-3.17.8 ] ~ [ linux-3.16.82 ] ~ [ linux-3.15.10 ] ~ [ linux-3.14.79 ] ~ [ linux-3.13.11 ] ~ [ linux-3.12.74 ] ~ [ linux-3.11.10 ] ~ [ linux-3.10.108 ] ~ [ linux-3.9.11 ] ~ [ linux-3.8.13 ] ~ [ linux-3.7.10 ] ~ [ linux-3.6.11 ] ~ [ linux-3.5.7 ] ~ [ linux-3.4.113 ] ~ [ linux-3.3.8 ] ~ [ linux-3.2.102 ] ~ [ linux-3.1.10 ] ~ [ linux-3.0.101 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.5 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 /*
  2  *  Copyright (C) 2001  MandrakeSoft S.A.
  3  *  Copyright 2010 Red Hat, Inc. and/or its affiliates.
  4  *
  5  *    MandrakeSoft S.A.
  6  *    43, rue d'Aboukir
  7  *    75002 Paris - France
  8  *    http://www.linux-mandrake.com/
  9  *    http://www.mandrakesoft.com/
 10  *
 11  *  This library is free software; you can redistribute it and/or
 12  *  modify it under the terms of the GNU Lesser General Public
 13  *  License as published by the Free Software Foundation; either
 14  *  version 2 of the License, or (at your option) any later version.
 15  *
 16  *  This library is distributed in the hope that it will be useful,
 17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 19  *  Lesser General Public License for more details.
 20  *
 21  *  You should have received a copy of the GNU Lesser General Public
 22  *  License along with this library; if not, write to the Free Software
 23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 24  *
 25  *  Yunhong Jiang <yunhong.jiang@intel.com>
 26  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
 27  *  Based on Xen 3.1 code.
 28  */
 29 
 30 #include <linux/kvm_host.h>
 31 #include <linux/kvm.h>
 32 #include <linux/mm.h>
 33 #include <linux/highmem.h>
 34 #include <linux/smp.h>
 35 #include <linux/hrtimer.h>
 36 #include <linux/io.h>
 37 #include <linux/slab.h>
 38 #include <linux/export.h>
 39 #include <asm/processor.h>
 40 #include <asm/page.h>
 41 #include <asm/current.h>
 42 #include <trace/events/kvm.h>
 43 
 44 #include "ioapic.h"
 45 #include "lapic.h"
 46 #include "irq.h"
 47 
 48 #if 0
 49 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
 50 #else
 51 #define ioapic_debug(fmt, arg...)
 52 #endif
 53 static int ioapic_deliver(struct kvm_ioapic *vioapic, int irq,
 54                 bool line_status);
 55 
 56 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
 57                                           unsigned long addr,
 58                                           unsigned long length)
 59 {
 60         unsigned long result = 0;
 61 
 62         switch (ioapic->ioregsel) {
 63         case IOAPIC_REG_VERSION:
 64                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
 65                           | (IOAPIC_VERSION_ID & 0xff));
 66                 break;
 67 
 68         case IOAPIC_REG_APIC_ID:
 69         case IOAPIC_REG_ARB_ID:
 70                 result = ((ioapic->id & 0xf) << 24);
 71                 break;
 72 
 73         default:
 74                 {
 75                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
 76                         u64 redir_content;
 77 
 78                         if (redir_index < IOAPIC_NUM_PINS)
 79                                 redir_content =
 80                                         ioapic->redirtbl[redir_index].bits;
 81                         else
 82                                 redir_content = ~0ULL;
 83 
 84                         result = (ioapic->ioregsel & 0x1) ?
 85                             (redir_content >> 32) & 0xffffffff :
 86                             redir_content & 0xffffffff;
 87                         break;
 88                 }
 89         }
 90 
 91         return result;
 92 }
 93 
 94 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
 95 {
 96         ioapic->rtc_status.pending_eoi = 0;
 97         bitmap_zero(ioapic->rtc_status.dest_map, KVM_MAX_VCPUS);
 98 }
 99 
100 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
101 {
102         bool new_val, old_val;
103         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
104         union kvm_ioapic_redirect_entry *e;
105 
106         e = &ioapic->redirtbl[RTC_GSI];
107         if (!kvm_apic_match_dest(vcpu, NULL, 0, e->fields.dest_id,
108                                 e->fields.dest_mode))
109                 return;
110 
111         new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
112         old_val = test_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
113 
114         if (new_val == old_val)
115                 return;
116 
117         if (new_val) {
118                 __set_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
119                 ioapic->rtc_status.pending_eoi++;
120         } else {
121                 __clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
122                 ioapic->rtc_status.pending_eoi--;
123         }
124 
125         WARN_ON(ioapic->rtc_status.pending_eoi < 0);
126 }
127 
128 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
129 {
130         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
131 
132         spin_lock(&ioapic->lock);
133         __rtc_irq_eoi_tracking_restore_one(vcpu);
134         spin_unlock(&ioapic->lock);
135 }
136 
137 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
138 {
139         struct kvm_vcpu *vcpu;
140         int i;
141 
142         if (RTC_GSI >= IOAPIC_NUM_PINS)
143                 return;
144 
145         rtc_irq_eoi_tracking_reset(ioapic);
146         kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
147             __rtc_irq_eoi_tracking_restore_one(vcpu);
148 }
149 
150 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
151 {
152         if (test_and_clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map))
153                 --ioapic->rtc_status.pending_eoi;
154 
155         WARN_ON(ioapic->rtc_status.pending_eoi < 0);
156 }
157 
158 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
159 {
160         if (ioapic->rtc_status.pending_eoi > 0)
161                 return true; /* coalesced */
162 
163         return false;
164 }
165 
166 static int ioapic_service(struct kvm_ioapic *ioapic, unsigned int idx,
167                 bool line_status)
168 {
169         union kvm_ioapic_redirect_entry *pent;
170         int injected = -1;
171 
172         pent = &ioapic->redirtbl[idx];
173 
174         if (!pent->fields.mask) {
175                 injected = ioapic_deliver(ioapic, idx, line_status);
176                 if (injected && pent->fields.trig_mode == IOAPIC_LEVEL_TRIG)
177                         pent->fields.remote_irr = 1;
178         }
179 
180         return injected;
181 }
182 
183 static void update_handled_vectors(struct kvm_ioapic *ioapic)
184 {
185         DECLARE_BITMAP(handled_vectors, 256);
186         int i;
187 
188         memset(handled_vectors, 0, sizeof(handled_vectors));
189         for (i = 0; i < IOAPIC_NUM_PINS; ++i)
190                 __set_bit(ioapic->redirtbl[i].fields.vector, handled_vectors);
191         memcpy(ioapic->handled_vectors, handled_vectors,
192                sizeof(handled_vectors));
193         smp_wmb();
194 }
195 
196 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap,
197                         u32 *tmr)
198 {
199         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
200         union kvm_ioapic_redirect_entry *e;
201         int index;
202 
203         spin_lock(&ioapic->lock);
204         for (index = 0; index < IOAPIC_NUM_PINS; index++) {
205                 e = &ioapic->redirtbl[index];
206                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
207                     kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) ||
208                     index == RTC_GSI) {
209                         if (kvm_apic_match_dest(vcpu, NULL, 0,
210                                 e->fields.dest_id, e->fields.dest_mode)) {
211                                 __set_bit(e->fields.vector,
212                                         (unsigned long *)eoi_exit_bitmap);
213                                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG)
214                                         __set_bit(e->fields.vector,
215                                                 (unsigned long *)tmr);
216                         }
217                 }
218         }
219         spin_unlock(&ioapic->lock);
220 }
221 
222 #ifdef CONFIG_X86
223 void kvm_vcpu_request_scan_ioapic(struct kvm *kvm)
224 {
225         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
226 
227         if (!ioapic)
228                 return;
229         kvm_make_scan_ioapic_request(kvm);
230 }
231 #else
232 void kvm_vcpu_request_scan_ioapic(struct kvm *kvm)
233 {
234         return;
235 }
236 #endif
237 
238 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
239 {
240         unsigned index;
241         bool mask_before, mask_after;
242         union kvm_ioapic_redirect_entry *e;
243 
244         switch (ioapic->ioregsel) {
245         case IOAPIC_REG_VERSION:
246                 /* Writes are ignored. */
247                 break;
248 
249         case IOAPIC_REG_APIC_ID:
250                 ioapic->id = (val >> 24) & 0xf;
251                 break;
252 
253         case IOAPIC_REG_ARB_ID:
254                 break;
255 
256         default:
257                 index = (ioapic->ioregsel - 0x10) >> 1;
258 
259                 ioapic_debug("change redir index %x val %x\n", index, val);
260                 if (index >= IOAPIC_NUM_PINS)
261                         return;
262                 e = &ioapic->redirtbl[index];
263                 mask_before = e->fields.mask;
264                 if (ioapic->ioregsel & 1) {
265                         e->bits &= 0xffffffff;
266                         e->bits |= (u64) val << 32;
267                 } else {
268                         e->bits &= ~0xffffffffULL;
269                         e->bits |= (u32) val;
270                         e->fields.remote_irr = 0;
271                 }
272                 update_handled_vectors(ioapic);
273                 mask_after = e->fields.mask;
274                 if (mask_before != mask_after)
275                         kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
276                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
277                     && ioapic->irr & (1 << index))
278                         ioapic_service(ioapic, index, false);
279                 kvm_vcpu_request_scan_ioapic(ioapic->kvm);
280                 break;
281         }
282 }
283 
284 static int ioapic_deliver(struct kvm_ioapic *ioapic, int irq, bool line_status)
285 {
286         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
287         struct kvm_lapic_irq irqe;
288         int ret;
289 
290         ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
291                      "vector=%x trig_mode=%x\n",
292                      entry->fields.dest_id, entry->fields.dest_mode,
293                      entry->fields.delivery_mode, entry->fields.vector,
294                      entry->fields.trig_mode);
295 
296         irqe.dest_id = entry->fields.dest_id;
297         irqe.vector = entry->fields.vector;
298         irqe.dest_mode = entry->fields.dest_mode;
299         irqe.trig_mode = entry->fields.trig_mode;
300         irqe.delivery_mode = entry->fields.delivery_mode << 8;
301         irqe.level = 1;
302         irqe.shorthand = 0;
303 
304         if (irq == RTC_GSI && line_status) {
305                 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
306                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
307                                 ioapic->rtc_status.dest_map);
308                 ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
309         } else
310                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
311 
312         return ret;
313 }
314 
315 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
316                        int level, bool line_status)
317 {
318         u32 old_irr;
319         u32 mask = 1 << irq;
320         union kvm_ioapic_redirect_entry entry;
321         int ret, irq_level;
322 
323         BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
324 
325         spin_lock(&ioapic->lock);
326         old_irr = ioapic->irr;
327         irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
328                                          irq_source_id, level);
329         entry = ioapic->redirtbl[irq];
330         irq_level ^= entry.fields.polarity;
331         if (!irq_level) {
332                 ioapic->irr &= ~mask;
333                 ret = 1;
334         } else {
335                 int edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
336 
337                 if (irq == RTC_GSI && line_status &&
338                         rtc_irq_check_coalesced(ioapic)) {
339                         ret = 0; /* coalesced */
340                         goto out;
341                 }
342                 ioapic->irr |= mask;
343                 if ((edge && old_irr != ioapic->irr) ||
344                     (!edge && !entry.fields.remote_irr))
345                         ret = ioapic_service(ioapic, irq, line_status);
346                 else
347                         ret = 0; /* report coalesced interrupt */
348         }
349 out:
350         trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
351         spin_unlock(&ioapic->lock);
352 
353         return ret;
354 }
355 
356 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
357 {
358         int i;
359 
360         spin_lock(&ioapic->lock);
361         for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
362                 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
363         spin_unlock(&ioapic->lock);
364 }
365 
366 static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
367                         struct kvm_ioapic *ioapic, int vector, int trigger_mode)
368 {
369         int i;
370 
371         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
372                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
373 
374                 if (ent->fields.vector != vector)
375                         continue;
376 
377                 if (i == RTC_GSI)
378                         rtc_irq_eoi(ioapic, vcpu);
379                 /*
380                  * We are dropping lock while calling ack notifiers because ack
381                  * notifier callbacks for assigned devices call into IOAPIC
382                  * recursively. Since remote_irr is cleared only after call
383                  * to notifiers if the same vector will be delivered while lock
384                  * is dropped it will be put into irr and will be delivered
385                  * after ack notifier returns.
386                  */
387                 spin_unlock(&ioapic->lock);
388                 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
389                 spin_lock(&ioapic->lock);
390 
391                 if (trigger_mode != IOAPIC_LEVEL_TRIG)
392                         continue;
393 
394                 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
395                 ent->fields.remote_irr = 0;
396                 if (!ent->fields.mask && (ioapic->irr & (1 << i)))
397                         ioapic_service(ioapic, i, false);
398         }
399 }
400 
401 bool kvm_ioapic_handles_vector(struct kvm *kvm, int vector)
402 {
403         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
404         smp_rmb();
405         return test_bit(vector, ioapic->handled_vectors);
406 }
407 
408 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
409 {
410         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
411 
412         spin_lock(&ioapic->lock);
413         __kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
414         spin_unlock(&ioapic->lock);
415 }
416 
417 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
418 {
419         return container_of(dev, struct kvm_ioapic, dev);
420 }
421 
422 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
423 {
424         return ((addr >= ioapic->base_address &&
425                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
426 }
427 
428 static int ioapic_mmio_read(struct kvm_io_device *this, gpa_t addr, int len,
429                             void *val)
430 {
431         struct kvm_ioapic *ioapic = to_ioapic(this);
432         u32 result;
433         if (!ioapic_in_range(ioapic, addr))
434                 return -EOPNOTSUPP;
435 
436         ioapic_debug("addr %lx\n", (unsigned long)addr);
437         ASSERT(!(addr & 0xf));  /* check alignment */
438 
439         addr &= 0xff;
440         spin_lock(&ioapic->lock);
441         switch (addr) {
442         case IOAPIC_REG_SELECT:
443                 result = ioapic->ioregsel;
444                 break;
445 
446         case IOAPIC_REG_WINDOW:
447                 result = ioapic_read_indirect(ioapic, addr, len);
448                 break;
449 
450         default:
451                 result = 0;
452                 break;
453         }
454         spin_unlock(&ioapic->lock);
455 
456         switch (len) {
457         case 8:
458                 *(u64 *) val = result;
459                 break;
460         case 1:
461         case 2:
462         case 4:
463                 memcpy(val, (char *)&result, len);
464                 break;
465         default:
466                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
467         }
468         return 0;
469 }
470 
471 static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
472                              const void *val)
473 {
474         struct kvm_ioapic *ioapic = to_ioapic(this);
475         u32 data;
476         if (!ioapic_in_range(ioapic, addr))
477                 return -EOPNOTSUPP;
478 
479         ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
480                      (void*)addr, len, val);
481         ASSERT(!(addr & 0xf));  /* check alignment */
482 
483         switch (len) {
484         case 8:
485         case 4:
486                 data = *(u32 *) val;
487                 break;
488         case 2:
489                 data = *(u16 *) val;
490                 break;
491         case 1:
492                 data = *(u8  *) val;
493                 break;
494         default:
495                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
496                 return 0;
497         }
498 
499         addr &= 0xff;
500         spin_lock(&ioapic->lock);
501         switch (addr) {
502         case IOAPIC_REG_SELECT:
503                 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
504                 break;
505 
506         case IOAPIC_REG_WINDOW:
507                 ioapic_write_indirect(ioapic, data);
508                 break;
509 #ifdef  CONFIG_IA64
510         case IOAPIC_REG_EOI:
511                 __kvm_ioapic_update_eoi(NULL, ioapic, data, IOAPIC_LEVEL_TRIG);
512                 break;
513 #endif
514 
515         default:
516                 break;
517         }
518         spin_unlock(&ioapic->lock);
519         return 0;
520 }
521 
522 void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
523 {
524         int i;
525 
526         for (i = 0; i < IOAPIC_NUM_PINS; i++)
527                 ioapic->redirtbl[i].fields.mask = 1;
528         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
529         ioapic->ioregsel = 0;
530         ioapic->irr = 0;
531         ioapic->id = 0;
532         rtc_irq_eoi_tracking_reset(ioapic);
533         update_handled_vectors(ioapic);
534 }
535 
536 static const struct kvm_io_device_ops ioapic_mmio_ops = {
537         .read     = ioapic_mmio_read,
538         .write    = ioapic_mmio_write,
539 };
540 
541 int kvm_ioapic_init(struct kvm *kvm)
542 {
543         struct kvm_ioapic *ioapic;
544         int ret;
545 
546         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
547         if (!ioapic)
548                 return -ENOMEM;
549         spin_lock_init(&ioapic->lock);
550         kvm->arch.vioapic = ioapic;
551         kvm_ioapic_reset(ioapic);
552         kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
553         ioapic->kvm = kvm;
554         mutex_lock(&kvm->slots_lock);
555         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
556                                       IOAPIC_MEM_LENGTH, &ioapic->dev);
557         mutex_unlock(&kvm->slots_lock);
558         if (ret < 0) {
559                 kvm->arch.vioapic = NULL;
560                 kfree(ioapic);
561         }
562 
563         return ret;
564 }
565 
566 void kvm_ioapic_destroy(struct kvm *kvm)
567 {
568         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
569 
570         if (ioapic) {
571                 kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
572                 kvm->arch.vioapic = NULL;
573                 kfree(ioapic);
574         }
575 }
576 
577 int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
578 {
579         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
580         if (!ioapic)
581                 return -EINVAL;
582 
583         spin_lock(&ioapic->lock);
584         memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
585         spin_unlock(&ioapic->lock);
586         return 0;
587 }
588 
589 int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
590 {
591         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
592         if (!ioapic)
593                 return -EINVAL;
594 
595         spin_lock(&ioapic->lock);
596         memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
597         update_handled_vectors(ioapic);
598         kvm_vcpu_request_scan_ioapic(kvm);
599         kvm_rtc_eoi_tracking_restore_all(ioapic);
600         spin_unlock(&ioapic->lock);
601         return 0;
602 }
603 

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