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Linux/arch/arm/mach-imx/clk.c

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  1 #include <linux/clk.h>
  2 #include <linux/err.h>
  3 #include <linux/of.h>
  4 #include <linux/slab.h>
  5 #include <linux/spinlock.h>
  6 #include "clk.h"
  7 
  8 DEFINE_SPINLOCK(imx_ccm_lock);
  9 
 10 static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name)
 11 {
 12         struct of_phandle_args phandle;
 13         struct clk *clk = ERR_PTR(-ENODEV);
 14         char *path;
 15 
 16         path = kasprintf(GFP_KERNEL, "/clocks/%s", name);
 17         if (!path)
 18                 return ERR_PTR(-ENOMEM);
 19 
 20         phandle.np = of_find_node_by_path(path);
 21         kfree(path);
 22 
 23         if (phandle.np) {
 24                 clk = of_clk_get_from_provider(&phandle);
 25                 of_node_put(phandle.np);
 26         }
 27         return clk;
 28 }
 29 
 30 struct clk * __init imx_obtain_fixed_clock(
 31                         const char *name, unsigned long rate)
 32 {
 33         struct clk *clk;
 34 
 35         clk = imx_obtain_fixed_clock_from_dt(name);
 36         if (IS_ERR(clk))
 37                 clk = imx_clk_fixed(name, rate);
 38         return clk;
 39 }
 40 
 41 /*
 42  * This fixups the register CCM_CSCMR1 write value.
 43  * The write/read/divider values of the aclk_podf field
 44  * of that register have the relationship described by
 45  * the following table:
 46  *
 47  * write value       read value        divider
 48  * 3b'000            3b'110            7
 49  * 3b'001            3b'111            8
 50  * 3b'010            3b'100            5
 51  * 3b'011            3b'101            6
 52  * 3b'100            3b'010            3
 53  * 3b'101            3b'011            4
 54  * 3b'110            3b'000            1
 55  * 3b'111            3b'001            2(default)
 56  *
 57  * That's why we do the xor operation below.
 58  */
 59 #define CSCMR1_FIXUP    0x00600000
 60 
 61 void imx_cscmr1_fixup(u32 *val)
 62 {
 63         *val ^= CSCMR1_FIXUP;
 64         return;
 65 }
 66 

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