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Linux/arch/avr32/boards/mimc200/setup.c

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  1 /*
  2  * Board-specific setup code for the MIMC200
  3  *
  4  * Copyright (C) 2008 Mercury IMC Ltd
  5  *
  6  * This program is free software; you can redistribute it and/or modify
  7  * it under the terms of the GNU General Public License version 2 as
  8  * published by the Free Software Foundation.
  9  */
 10 
 11 extern struct atmel_lcdfb_pdata mimc200_lcdc_data;
 12 
 13 #include <linux/clk.h>
 14 #include <linux/etherdevice.h>
 15 #include <linux/i2c-gpio.h>
 16 #include <linux/init.h>
 17 #include <linux/linkage.h>
 18 #include <linux/platform_device.h>
 19 #include <linux/types.h>
 20 #include <linux/leds.h>
 21 #include <linux/spi/spi.h>
 22 #include <linux/spi/eeprom.h>
 23 
 24 #include <video/atmel_lcdc.h>
 25 #include <linux/fb.h>
 26 
 27 #include <linux/atmel-mci.h>
 28 #include <linux/io.h>
 29 #include <asm/setup.h>
 30 
 31 #include <mach/at32ap700x.h>
 32 #include <mach/board.h>
 33 #include <mach/init.h>
 34 #include <mach/portmux.h>
 35 
 36 /* Oscillator frequencies. These are board-specific */
 37 unsigned long at32_board_osc_rates[3] = {
 38         [0] = 32768,    /* 32.768 kHz on RTC osc */
 39         [1] = 10000000, /* 10 MHz on osc0 */
 40         [2] = 12000000, /* 12 MHz on osc1 */
 41 };
 42 
 43 /* Initialized by bootloader-specific startup code. */
 44 struct tag *bootloader_tags __initdata;
 45 
 46 static struct fb_videomode __initdata pt0434827_modes[] = {
 47         {
 48                 .name           = "480x272 @ 72",
 49                 .refresh        = 72,
 50                 .xres           = 480,          .yres           = 272,
 51                 .pixclock       = KHZ2PICOS(10000),
 52 
 53                 .left_margin    = 1,            .right_margin   = 1,
 54                 .upper_margin   = 12,           .lower_margin   = 1,
 55                 .hsync_len      = 42,           .vsync_len      = 1,
 56 
 57                 .sync           = 0,
 58                 .vmode          = FB_VMODE_NONINTERLACED,
 59         },
 60 };
 61 
 62 static struct fb_monspecs __initdata mimc200_default_monspecs = {
 63         .manufacturer           = "PT",
 64         .monitor                = "PT0434827-A401",
 65         .modedb                 = pt0434827_modes,
 66         .modedb_len             = ARRAY_SIZE(pt0434827_modes),
 67         .hfmin                  = 14820,
 68         .hfmax                  = 22230,
 69         .vfmin                  = 60,
 70         .vfmax                  = 85,
 71         .dclkmax                = 25200000,
 72 };
 73 
 74 struct atmel_lcdfb_pdata __initdata mimc200_lcdc_data = {
 75         .default_bpp            = 16,
 76         .default_dmacon         = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
 77         .default_lcdcon2        = (ATMEL_LCDC_DISTYPE_TFT
 78                                    | ATMEL_LCDC_INVCLK
 79                                    | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
 80                                    | ATMEL_LCDC_MEMOR_BIG),
 81         .default_monspecs       = &mimc200_default_monspecs,
 82         .guard_time             = 2,
 83 };
 84 
 85 struct eth_addr {
 86         u8 addr[6];
 87 };
 88 static struct eth_addr __initdata hw_addr[2];
 89 static struct macb_platform_data __initdata eth_data[2];
 90 
 91 static struct spi_eeprom eeprom_25lc010 = {
 92                 .name = "25lc010",
 93                 .byte_len = 128,
 94                 .page_size = 16,
 95                 .flags = EE_ADDR1,
 96 };
 97 
 98 static struct spi_board_info spi0_board_info[] __initdata = {
 99         {
100                 .modalias       = "rtc-ds1390",
101                 .max_speed_hz   = 4000000,
102                 .chip_select    = 2,
103         },
104         {
105                 .modalias       = "at25",
106                 .max_speed_hz   = 1000000,
107                 .chip_select    = 1,
108                 .mode           = SPI_MODE_3,
109                 .platform_data  = &eeprom_25lc010,
110         },
111 };
112 
113 static struct mci_platform_data __initdata mci0_data = {
114         .slot[0] = {
115                 .bus_width      = 4,
116                 .detect_pin     = GPIO_PIN_PA(26),
117                 .wp_pin         = GPIO_PIN_PA(27),
118         },
119 };
120 
121 /*
122  * The next two functions should go away as the boot loader is
123  * supposed to initialize the macb address registers with a valid
124  * ethernet address. But we need to keep it around for a while until
125  * we can be reasonably sure the boot loader does this.
126  *
127  * The phy_id is ignored as the driver will probe for it.
128  */
129 static int __init parse_tag_ethernet(struct tag *tag)
130 {
131         int i;
132 
133         i = tag->u.ethernet.mac_index;
134         if (i < ARRAY_SIZE(hw_addr))
135                 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
136                        sizeof(hw_addr[i].addr));
137 
138         return 0;
139 }
140 __tagtable(ATAG_ETHERNET, parse_tag_ethernet);
141 
142 static void __init set_hw_addr(struct platform_device *pdev)
143 {
144         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
145         const u8 *addr;
146         void __iomem *regs;
147         struct clk *pclk;
148 
149         if (!res)
150                 return;
151         if (pdev->id >= ARRAY_SIZE(hw_addr))
152                 return;
153 
154         addr = hw_addr[pdev->id].addr;
155         if (!is_valid_ether_addr(addr))
156                 return;
157 
158         /*
159          * Since this is board-specific code, we'll cheat and use the
160          * physical address directly as we happen to know that it's
161          * the same as the virtual address.
162          */
163         regs = (void __iomem __force *)res->start;
164         pclk = clk_get(&pdev->dev, "pclk");
165         if (IS_ERR(pclk))
166                 return;
167 
168         clk_enable(pclk);
169         __raw_writel((addr[3] << 24) | (addr[2] << 16)
170                      | (addr[1] << 8) | addr[0], regs + 0x98);
171         __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
172         clk_disable(pclk);
173         clk_put(pclk);
174 }
175 
176 void __init setup_board(void)
177 {
178         at32_map_usart(0, 0, 0);        /* USART 0: /dev/ttyS0 (TTL --> Altera) */
179         at32_map_usart(1, 1, 0);        /* USART 1: /dev/ttyS1 (RS232) */
180         at32_map_usart(2, 2, 0);        /* USART 2: /dev/ttyS2 (RS485) */
181         at32_map_usart(3, 3, 0);        /* USART 3: /dev/ttyS3 (RS422 Multidrop) */
182 }
183 
184 static struct i2c_gpio_platform_data i2c_gpio_data = {
185         .sda_pin                = GPIO_PIN_PA(6),
186         .scl_pin                = GPIO_PIN_PA(7),
187         .sda_is_open_drain      = 1,
188         .scl_is_open_drain      = 1,
189         .udelay                 = 2,    /* close to 100 kHz */
190 };
191 
192 static struct platform_device i2c_gpio_device = {
193         .name           = "i2c-gpio",
194         .id             = 0,
195         .dev            = {
196         .platform_data  = &i2c_gpio_data,
197         },
198 };
199 
200 static struct i2c_board_info __initdata i2c_info[] = {
201 };
202 
203 static int __init mimc200_init(void)
204 {
205         /*
206          * MIMC200 uses 16-bit SDRAM interface, so we don't need to
207          * reserve any pins for it.
208          */
209 
210         at32_add_device_usart(0);
211         at32_add_device_usart(1);
212         at32_add_device_usart(2);
213         at32_add_device_usart(3);
214 
215         set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
216         set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
217 
218         at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
219         at32_add_device_mci(0, &mci0_data);
220         at32_add_device_usba(0, NULL);
221 
222         at32_select_periph(GPIO_PIOB_BASE, 1 << 28, 0, AT32_GPIOF_PULLUP);
223         at32_select_gpio(i2c_gpio_data.sda_pin,
224                 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
225         at32_select_gpio(i2c_gpio_data.scl_pin,
226                 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
227         platform_device_register(&i2c_gpio_device);
228         i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info));
229 
230         at32_add_device_lcdc(0, &mimc200_lcdc_data,
231                              fbmem_start, fbmem_size,
232                              ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_CONTROL | ATMEL_LCDC_ALT_24B_DATA);
233 
234         return 0;
235 }
236 postcore_initcall(mimc200_init);
237 

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