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Linux/arch/mips/include/asm/fpregdef.h

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  1 /*
  2  * Definitions for the FPU register names
  3  *
  4  * This file is subject to the terms and conditions of the GNU General Public
  5  * License.  See the file "COPYING" in the main directory of this archive
  6  * for more details.
  7  *
  8  * Copyright (C) 1995, 1999 Ralf Baechle
  9  * Copyright (C) 1985 MIPS Computer Systems, Inc.
 10  * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc.
 11  */
 12 #ifndef _ASM_FPREGDEF_H
 13 #define _ASM_FPREGDEF_H
 14 
 15 #include <asm/sgidefs.h>
 16 
 17 /*
 18  * starting with binutils 2.24.51.20140729, MIPS binutils warn about mixing
 19  * hardfloat and softfloat object files.  The kernel build uses soft-float by
 20  * default, so we also need to pass -msoft-float along to GAS if it supports it.
 21  * But this in turn causes assembler errors in files which access hardfloat
 22  * registers.  We detect if GAS supports "-msoft-float" in the Makefile and
 23  * explicitly put ".set hardfloat" where floating point registers are touched.
 24  */
 25 #ifdef GAS_HAS_SET_HARDFLOAT
 26 #define SET_HARDFLOAT .set hardfloat
 27 #else
 28 #define SET_HARDFLOAT
 29 #endif
 30 
 31 #if _MIPS_SIM == _MIPS_SIM_ABI32
 32 
 33 /*
 34  * These definitions only cover the R3000-ish 16/32 register model.
 35  * But we're trying to be R3000 friendly anyway ...
 36  */
 37 #define fv0     $f0      /* return value */
 38 #define fv0f    $f1
 39 #define fv1     $f2
 40 #define fv1f    $f3
 41 #define fa0     $f12     /* argument registers */
 42 #define fa0f    $f13
 43 #define fa1     $f14
 44 #define fa1f    $f15
 45 #define ft0     $f4      /* caller saved */
 46 #define ft0f    $f5
 47 #define ft1     $f6
 48 #define ft1f    $f7
 49 #define ft2     $f8
 50 #define ft2f    $f9
 51 #define ft3     $f10
 52 #define ft3f    $f11
 53 #define ft4     $f16
 54 #define ft4f    $f17
 55 #define ft5     $f18
 56 #define ft5f    $f19
 57 #define fs0     $f20     /* callee saved */
 58 #define fs0f    $f21
 59 #define fs1     $f22
 60 #define fs1f    $f23
 61 #define fs2     $f24
 62 #define fs2f    $f25
 63 #define fs3     $f26
 64 #define fs3f    $f27
 65 #define fs4     $f28
 66 #define fs4f    $f29
 67 #define fs5     $f30
 68 #define fs5f    $f31
 69 
 70 #define fcr31   $31      /* FPU status register */
 71 
 72 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
 73 
 74 #if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
 75 
 76 #define fv0     $f0     /* return value */
 77 #define fv1     $f2
 78 #define fa0     $f12    /* argument registers */
 79 #define fa1     $f13
 80 #define fa2     $f14
 81 #define fa3     $f15
 82 #define fa4     $f16
 83 #define fa5     $f17
 84 #define fa6     $f18
 85 #define fa7     $f19
 86 #define ft0     $f4     /* caller saved */
 87 #define ft1     $f5
 88 #define ft2     $f6
 89 #define ft3     $f7
 90 #define ft4     $f8
 91 #define ft5     $f9
 92 #define ft6     $f10
 93 #define ft7     $f11
 94 #define ft8     $f20
 95 #define ft9     $f21
 96 #define ft10    $f22
 97 #define ft11    $f23
 98 #define ft12    $f1
 99 #define ft13    $f3
100 #define fs0     $f24    /* callee saved */
101 #define fs1     $f25
102 #define fs2     $f26
103 #define fs3     $f27
104 #define fs4     $f28
105 #define fs5     $f29
106 #define fs6     $f30
107 #define fs7     $f31
108 
109 #define fcr31   $31
110 
111 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
112 
113 #endif /* _ASM_FPREGDEF_H */
114 

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