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Linux/arch/powerpc/include/asm/dma-mapping.h

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  1 /*
  2  * Copyright (C) 2004 IBM
  3  *
  4  * Implements the generic device dma API for powerpc.
  5  * the pci and vio busses
  6  */
  7 #ifndef _ASM_DMA_MAPPING_H
  8 #define _ASM_DMA_MAPPING_H
  9 #ifdef __KERNEL__
 10 
 11 #include <linux/types.h>
 12 #include <linux/cache.h>
 13 /* need struct page definitions */
 14 #include <linux/mm.h>
 15 #include <linux/scatterlist.h>
 16 #include <linux/dma-attrs.h>
 17 #include <linux/dma-debug.h>
 18 #include <asm/io.h>
 19 #include <asm/swiotlb.h>
 20 
 21 #define DMA_ERROR_CODE          (~(dma_addr_t)0x0)
 22 
 23 /* Some dma direct funcs must be visible for use in other dma_ops */
 24 extern void *dma_direct_alloc_coherent(struct device *dev, size_t size,
 25                                        dma_addr_t *dma_handle, gfp_t flag,
 26                                        struct dma_attrs *attrs);
 27 extern void dma_direct_free_coherent(struct device *dev, size_t size,
 28                                      void *vaddr, dma_addr_t dma_handle,
 29                                      struct dma_attrs *attrs);
 30 extern int dma_direct_mmap_coherent(struct device *dev,
 31                                     struct vm_area_struct *vma,
 32                                     void *cpu_addr, dma_addr_t handle,
 33                                     size_t size, struct dma_attrs *attrs);
 34 
 35 #ifdef CONFIG_NOT_COHERENT_CACHE
 36 /*
 37  * DMA-consistent mapping functions for PowerPCs that don't support
 38  * cache snooping.  These allocate/free a region of uncached mapped
 39  * memory space for use with DMA devices.  Alternatively, you could
 40  * allocate the space "normally" and use the cache management functions
 41  * to ensure it is consistent.
 42  */
 43 struct device;
 44 extern void *__dma_alloc_coherent(struct device *dev, size_t size,
 45                                   dma_addr_t *handle, gfp_t gfp);
 46 extern void __dma_free_coherent(size_t size, void *vaddr);
 47 extern void __dma_sync(void *vaddr, size_t size, int direction);
 48 extern void __dma_sync_page(struct page *page, unsigned long offset,
 49                                  size_t size, int direction);
 50 extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr);
 51 
 52 #else /* ! CONFIG_NOT_COHERENT_CACHE */
 53 /*
 54  * Cache coherent cores.
 55  */
 56 
 57 #define __dma_alloc_coherent(dev, gfp, size, handle)    NULL
 58 #define __dma_free_coherent(size, addr)         ((void)0)
 59 #define __dma_sync(addr, size, rw)              ((void)0)
 60 #define __dma_sync_page(pg, off, sz, rw)        ((void)0)
 61 
 62 #endif /* ! CONFIG_NOT_COHERENT_CACHE */
 63 
 64 static inline unsigned long device_to_mask(struct device *dev)
 65 {
 66         if (dev->dma_mask && *dev->dma_mask)
 67                 return *dev->dma_mask;
 68         /* Assume devices without mask can take 32 bit addresses */
 69         return 0xfffffffful;
 70 }
 71 
 72 /*
 73  * Available generic sets of operations
 74  */
 75 #ifdef CONFIG_PPC64
 76 extern struct dma_map_ops dma_iommu_ops;
 77 #endif
 78 extern struct dma_map_ops dma_direct_ops;
 79 
 80 static inline struct dma_map_ops *get_dma_ops(struct device *dev)
 81 {
 82         /* We don't handle the NULL dev case for ISA for now. We could
 83          * do it via an out of line call but it is not needed for now. The
 84          * only ISA DMA device we support is the floppy and we have a hack
 85          * in the floppy driver directly to get a device for us.
 86          */
 87         if (unlikely(dev == NULL))
 88                 return NULL;
 89 
 90         return dev->archdata.dma_ops;
 91 }
 92 
 93 static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
 94 {
 95         dev->archdata.dma_ops = ops;
 96 }
 97 
 98 /*
 99  * get_dma_offset()
100  *
101  * Get the dma offset on configurations where the dma address can be determined
102  * from the physical address by looking at a simple offset.  Direct dma and
103  * swiotlb use this function, but it is typically not used by implementations
104  * with an iommu.
105  */
106 static inline dma_addr_t get_dma_offset(struct device *dev)
107 {
108         if (dev)
109                 return dev->archdata.dma_data.dma_offset;
110 
111         return PCI_DRAM_OFFSET;
112 }
113 
114 static inline void set_dma_offset(struct device *dev, dma_addr_t off)
115 {
116         if (dev)
117                 dev->archdata.dma_data.dma_offset = off;
118 }
119 
120 /* this will be removed soon */
121 #define flush_write_buffers()
122 
123 #include <asm-generic/dma-mapping-common.h>
124 
125 static inline int dma_supported(struct device *dev, u64 mask)
126 {
127         struct dma_map_ops *dma_ops = get_dma_ops(dev);
128 
129         if (unlikely(dma_ops == NULL))
130                 return 0;
131         if (dma_ops->dma_supported == NULL)
132                 return 1;
133         return dma_ops->dma_supported(dev, mask);
134 }
135 
136 extern int dma_set_mask(struct device *dev, u64 dma_mask);
137 extern int __dma_set_mask(struct device *dev, u64 dma_mask);
138 extern u64 __dma_get_required_mask(struct device *dev);
139 
140 #define dma_alloc_coherent(d,s,h,f)     dma_alloc_attrs(d,s,h,f,NULL)
141 
142 static inline void *dma_alloc_attrs(struct device *dev, size_t size,
143                                     dma_addr_t *dma_handle, gfp_t flag,
144                                     struct dma_attrs *attrs)
145 {
146         struct dma_map_ops *dma_ops = get_dma_ops(dev);
147         void *cpu_addr;
148 
149         BUG_ON(!dma_ops);
150 
151         cpu_addr = dma_ops->alloc(dev, size, dma_handle, flag, attrs);
152 
153         debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
154 
155         return cpu_addr;
156 }
157 
158 #define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
159 
160 static inline void dma_free_attrs(struct device *dev, size_t size,
161                                   void *cpu_addr, dma_addr_t dma_handle,
162                                   struct dma_attrs *attrs)
163 {
164         struct dma_map_ops *dma_ops = get_dma_ops(dev);
165 
166         BUG_ON(!dma_ops);
167 
168         debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
169 
170         dma_ops->free(dev, size, cpu_addr, dma_handle, attrs);
171 }
172 
173 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
174 {
175         struct dma_map_ops *dma_ops = get_dma_ops(dev);
176 
177         debug_dma_mapping_error(dev, dma_addr);
178         if (dma_ops->mapping_error)
179                 return dma_ops->mapping_error(dev, dma_addr);
180 
181 #ifdef CONFIG_PPC64
182         return (dma_addr == DMA_ERROR_CODE);
183 #else
184         return 0;
185 #endif
186 }
187 
188 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
189 {
190 #ifdef CONFIG_SWIOTLB
191         struct dev_archdata *sd = &dev->archdata;
192 
193         if (sd->max_direct_dma_addr && addr + size > sd->max_direct_dma_addr)
194                 return 0;
195 #endif
196 
197         if (!dev->dma_mask)
198                 return 0;
199 
200         return addr + size - 1 <= *dev->dma_mask;
201 }
202 
203 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
204 {
205         return paddr + get_dma_offset(dev);
206 }
207 
208 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
209 {
210         return daddr - get_dma_offset(dev);
211 }
212 
213 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
214 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
215 
216 #define ARCH_HAS_DMA_MMAP_COHERENT
217 
218 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
219                 enum dma_data_direction direction)
220 {
221         BUG_ON(direction == DMA_NONE);
222         __dma_sync(vaddr, size, (int)direction);
223 }
224 
225 #endif /* __KERNEL__ */
226 #endif  /* _ASM_DMA_MAPPING_H */
227 

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