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Linux/arch/powerpc/include/asm/pci.h

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  1 #ifndef __ASM_POWERPC_PCI_H
  2 #define __ASM_POWERPC_PCI_H
  3 #ifdef __KERNEL__
  4 
  5 /*
  6  * This program is free software; you can redistribute it and/or
  7  * modify it under the terms of the GNU General Public License
  8  * as published by the Free Software Foundation; either version
  9  * 2 of the License, or (at your option) any later version.
 10  */
 11 
 12 #include <linux/types.h>
 13 #include <linux/slab.h>
 14 #include <linux/string.h>
 15 #include <linux/dma-mapping.h>
 16 
 17 #include <asm/machdep.h>
 18 #include <asm/scatterlist.h>
 19 #include <asm/io.h>
 20 #include <asm/prom.h>
 21 #include <asm/pci-bridge.h>
 22 
 23 #include <asm-generic/pci-dma-compat.h>
 24 
 25 /* Return values for ppc_md.pci_probe_mode function */
 26 #define PCI_PROBE_NONE          -1      /* Don't look at this bus at all */
 27 #define PCI_PROBE_NORMAL        0       /* Do normal PCI probing */
 28 #define PCI_PROBE_DEVTREE       1       /* Instantiate from device tree */
 29 
 30 #define PCIBIOS_MIN_IO          0x1000
 31 #define PCIBIOS_MIN_MEM         0x10000000
 32 
 33 struct pci_dev;
 34 
 35 /* Values for the `which' argument to sys_pciconfig_iobase syscall.  */
 36 #define IOBASE_BRIDGE_NUMBER    0
 37 #define IOBASE_MEMORY           1
 38 #define IOBASE_IO               2
 39 #define IOBASE_ISA_IO           3
 40 #define IOBASE_ISA_MEM          4
 41 
 42 /*
 43  * Set this to 1 if you want the kernel to re-assign all PCI
 44  * bus numbers (don't do that on ppc64 yet !)
 45  */
 46 #define pcibios_assign_all_busses() \
 47         (pci_has_flag(PCI_REASSIGN_ALL_BUS))
 48 
 49 static inline void pcibios_penalize_isa_irq(int irq, int active)
 50 {
 51         /* We don't do dynamic PCI IRQ allocation */
 52 }
 53 
 54 #define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
 55 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
 56 {
 57         if (ppc_md.pci_get_legacy_ide_irq)
 58                 return ppc_md.pci_get_legacy_ide_irq(dev, channel);
 59         return channel ? 15 : 14;
 60 }
 61 
 62 #ifdef CONFIG_PCI
 63 extern void set_pci_dma_ops(struct dma_map_ops *dma_ops);
 64 extern struct dma_map_ops *get_pci_dma_ops(void);
 65 #else   /* CONFIG_PCI */
 66 #define set_pci_dma_ops(d)
 67 #define get_pci_dma_ops()       NULL
 68 #endif
 69 
 70 #ifdef CONFIG_PPC64
 71 
 72 /*
 73  * We want to avoid touching the cacheline size or MWI bit.
 74  * pSeries firmware sets the cacheline size (which is not the cpu cacheline
 75  * size in all cases) and hardware treats MWI the same as memory write.
 76  */
 77 #define PCI_DISABLE_MWI
 78 
 79 #ifdef CONFIG_PCI
 80 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
 81                                         enum pci_dma_burst_strategy *strat,
 82                                         unsigned long *strategy_parameter)
 83 {
 84         unsigned long cacheline_size;
 85         u8 byte;
 86 
 87         pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
 88         if (byte == 0)
 89                 cacheline_size = 1024;
 90         else
 91                 cacheline_size = (int) byte * 4;
 92 
 93         *strat = PCI_DMA_BURST_MULTIPLE;
 94         *strategy_parameter = cacheline_size;
 95 }
 96 #endif
 97 
 98 #else /* 32-bit */
 99 
100 #ifdef CONFIG_PCI
101 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
102                                         enum pci_dma_burst_strategy *strat,
103                                         unsigned long *strategy_parameter)
104 {
105         *strat = PCI_DMA_BURST_INFINITY;
106         *strategy_parameter = ~0UL;
107 }
108 #endif
109 #endif /* CONFIG_PPC64 */
110 
111 extern int pci_domain_nr(struct pci_bus *bus);
112 
113 /* Decide whether to display the domain number in /proc */
114 extern int pci_proc_domain(struct pci_bus *bus);
115 
116 struct vm_area_struct;
117 /* Map a range of PCI memory or I/O space for a device into user space */
118 int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
119                         enum pci_mmap_state mmap_state, int write_combine);
120 
121 /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
122 #define HAVE_PCI_MMAP   1
123 
124 extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
125                            size_t count);
126 extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
127                            size_t count);
128 extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
129                                       struct vm_area_struct *vma,
130                                       enum pci_mmap_state mmap_state);
131 
132 #define HAVE_PCI_LEGACY 1
133 
134 #ifdef CONFIG_PPC64
135 
136 /* The PCI address space does not equal the physical memory address
137  * space (we have an IOMMU).  The IDE and SCSI device layers use
138  * this boolean for bounce buffer decisions.
139  */
140 #define PCI_DMA_BUS_IS_PHYS     (0)
141 
142 #else /* 32-bit */
143 
144 /* The PCI address space does equal the physical memory
145  * address space (no IOMMU).  The IDE and SCSI device layers use
146  * this boolean for bounce buffer decisions.
147  */
148 #define PCI_DMA_BUS_IS_PHYS     (1)
149 
150 #endif /* CONFIG_PPC64 */
151 
152 extern void pcibios_claim_one_bus(struct pci_bus *b);
153 
154 extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
155 
156 extern void pcibios_resource_survey(void);
157 
158 extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
159 extern int remove_phb_dynamic(struct pci_controller *phb);
160 
161 extern struct pci_dev *of_create_pci_dev(struct device_node *node,
162                                         struct pci_bus *bus, int devfn);
163 
164 extern void of_scan_pci_bridge(struct pci_dev *dev);
165 
166 extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
167 extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
168 
169 struct file;
170 extern pgprot_t pci_phys_mem_access_prot(struct file *file,
171                                          unsigned long pfn,
172                                          unsigned long size,
173                                          pgprot_t prot);
174 
175 #define HAVE_ARCH_PCI_RESOURCE_TO_USER
176 extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
177                                  const struct resource *rsrc,
178                                  resource_size_t *start, resource_size_t *end);
179 
180 extern resource_size_t pcibios_io_space_offset(struct pci_controller *hose);
181 extern void pcibios_setup_bus_devices(struct pci_bus *bus);
182 extern void pcibios_setup_bus_self(struct pci_bus *bus);
183 extern void pcibios_setup_phb_io_space(struct pci_controller *hose);
184 extern void pcibios_scan_phb(struct pci_controller *hose);
185 
186 #endif  /* __KERNEL__ */
187 #endif /* __ASM_POWERPC_PCI_H */
188 

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