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Linux/arch/x86/crypto/crc32c-intel_glue.c

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  1 // SPDX-License-Identifier: GPL-2.0-only
  2 /*
  3  * Using hardware provided CRC32 instruction to accelerate the CRC32 disposal.
  4  * CRC32C polynomial:0x1EDC6F41(BE)/0x82F63B78(LE)
  5  * CRC32 is a new instruction in Intel SSE4.2, the reference can be found at:
  6  * http://www.intel.com/products/processor/manuals/
  7  * Intel(R) 64 and IA-32 Architectures Software Developer's Manual
  8  * Volume 2A: Instruction Set Reference, A-M
  9  *
 10  * Copyright (C) 2008 Intel Corporation
 11  * Authors: Austin Zhang <austin_zhang@linux.intel.com>
 12  *          Kent Liu <kent.liu@intel.com>
 13  */
 14 #include <linux/init.h>
 15 #include <linux/module.h>
 16 #include <linux/string.h>
 17 #include <linux/kernel.h>
 18 #include <crypto/internal/hash.h>
 19 #include <crypto/internal/simd.h>
 20 
 21 #include <asm/cpufeatures.h>
 22 #include <asm/cpu_device_id.h>
 23 #include <asm/simd.h>
 24 
 25 #define CHKSUM_BLOCK_SIZE       1
 26 #define CHKSUM_DIGEST_SIZE      4
 27 
 28 #define SCALE_F sizeof(unsigned long)
 29 
 30 #ifdef CONFIG_X86_64
 31 #define REX_PRE "0x48, "
 32 #else
 33 #define REX_PRE
 34 #endif
 35 
 36 #ifdef CONFIG_X86_64
 37 /*
 38  * use carryless multiply version of crc32c when buffer
 39  * size is >= 512 to account
 40  * for fpu state save/restore overhead.
 41  */
 42 #define CRC32C_PCL_BREAKEVEN    512
 43 
 44 asmlinkage unsigned int crc_pcl(const u8 *buffer, int len,
 45                                 unsigned int crc_init);
 46 #endif /* CONFIG_X86_64 */
 47 
 48 static u32 crc32c_intel_le_hw_byte(u32 crc, unsigned char const *data, size_t length)
 49 {
 50         while (length--) {
 51                 __asm__ __volatile__(
 52                         ".byte 0xf2, 0xf, 0x38, 0xf0, 0xf1"
 53                         :"=S"(crc)
 54                         :""(crc), "c"(*data)
 55                 );
 56                 data++;
 57         }
 58 
 59         return crc;
 60 }
 61 
 62 static u32 __pure crc32c_intel_le_hw(u32 crc, unsigned char const *p, size_t len)
 63 {
 64         unsigned int iquotient = len / SCALE_F;
 65         unsigned int iremainder = len % SCALE_F;
 66         unsigned long *ptmp = (unsigned long *)p;
 67 
 68         while (iquotient--) {
 69                 __asm__ __volatile__(
 70                         ".byte 0xf2, " REX_PRE "0xf, 0x38, 0xf1, 0xf1;"
 71                         :"=S"(crc)
 72                         :""(crc), "c"(*ptmp)
 73                 );
 74                 ptmp++;
 75         }
 76 
 77         if (iremainder)
 78                 crc = crc32c_intel_le_hw_byte(crc, (unsigned char *)ptmp,
 79                                  iremainder);
 80 
 81         return crc;
 82 }
 83 
 84 /*
 85  * Setting the seed allows arbitrary accumulators and flexible XOR policy
 86  * If your algorithm starts with ~0, then XOR with ~0 before you set
 87  * the seed.
 88  */
 89 static int crc32c_intel_setkey(struct crypto_shash *hash, const u8 *key,
 90                         unsigned int keylen)
 91 {
 92         u32 *mctx = crypto_shash_ctx(hash);
 93 
 94         if (keylen != sizeof(u32))
 95                 return -EINVAL;
 96         *mctx = le32_to_cpup((__le32 *)key);
 97         return 0;
 98 }
 99 
100 static int crc32c_intel_init(struct shash_desc *desc)
101 {
102         u32 *mctx = crypto_shash_ctx(desc->tfm);
103         u32 *crcp = shash_desc_ctx(desc);
104 
105         *crcp = *mctx;
106 
107         return 0;
108 }
109 
110 static int crc32c_intel_update(struct shash_desc *desc, const u8 *data,
111                                unsigned int len)
112 {
113         u32 *crcp = shash_desc_ctx(desc);
114 
115         *crcp = crc32c_intel_le_hw(*crcp, data, len);
116         return 0;
117 }
118 
119 static int __crc32c_intel_finup(u32 *crcp, const u8 *data, unsigned int len,
120                                 u8 *out)
121 {
122         *(__le32 *)out = ~cpu_to_le32(crc32c_intel_le_hw(*crcp, data, len));
123         return 0;
124 }
125 
126 static int crc32c_intel_finup(struct shash_desc *desc, const u8 *data,
127                               unsigned int len, u8 *out)
128 {
129         return __crc32c_intel_finup(shash_desc_ctx(desc), data, len, out);
130 }
131 
132 static int crc32c_intel_final(struct shash_desc *desc, u8 *out)
133 {
134         u32 *crcp = shash_desc_ctx(desc);
135 
136         *(__le32 *)out = ~cpu_to_le32p(crcp);
137         return 0;
138 }
139 
140 static int crc32c_intel_digest(struct shash_desc *desc, const u8 *data,
141                                unsigned int len, u8 *out)
142 {
143         return __crc32c_intel_finup(crypto_shash_ctx(desc->tfm), data, len,
144                                     out);
145 }
146 
147 static int crc32c_intel_cra_init(struct crypto_tfm *tfm)
148 {
149         u32 *key = crypto_tfm_ctx(tfm);
150 
151         *key = ~0;
152 
153         return 0;
154 }
155 
156 #ifdef CONFIG_X86_64
157 static int crc32c_pcl_intel_update(struct shash_desc *desc, const u8 *data,
158                                unsigned int len)
159 {
160         u32 *crcp = shash_desc_ctx(desc);
161 
162         /*
163          * use faster PCL version if datasize is large enough to
164          * overcome kernel fpu state save/restore overhead
165          */
166         if (len >= CRC32C_PCL_BREAKEVEN && crypto_simd_usable()) {
167                 kernel_fpu_begin();
168                 *crcp = crc_pcl(data, len, *crcp);
169                 kernel_fpu_end();
170         } else
171                 *crcp = crc32c_intel_le_hw(*crcp, data, len);
172         return 0;
173 }
174 
175 static int __crc32c_pcl_intel_finup(u32 *crcp, const u8 *data, unsigned int len,
176                                 u8 *out)
177 {
178         if (len >= CRC32C_PCL_BREAKEVEN && crypto_simd_usable()) {
179                 kernel_fpu_begin();
180                 *(__le32 *)out = ~cpu_to_le32(crc_pcl(data, len, *crcp));
181                 kernel_fpu_end();
182         } else
183                 *(__le32 *)out =
184                         ~cpu_to_le32(crc32c_intel_le_hw(*crcp, data, len));
185         return 0;
186 }
187 
188 static int crc32c_pcl_intel_finup(struct shash_desc *desc, const u8 *data,
189                               unsigned int len, u8 *out)
190 {
191         return __crc32c_pcl_intel_finup(shash_desc_ctx(desc), data, len, out);
192 }
193 
194 static int crc32c_pcl_intel_digest(struct shash_desc *desc, const u8 *data,
195                                unsigned int len, u8 *out)
196 {
197         return __crc32c_pcl_intel_finup(crypto_shash_ctx(desc->tfm), data, len,
198                                     out);
199 }
200 #endif /* CONFIG_X86_64 */
201 
202 static struct shash_alg alg = {
203         .setkey                 =       crc32c_intel_setkey,
204         .init                   =       crc32c_intel_init,
205         .update                 =       crc32c_intel_update,
206         .final                  =       crc32c_intel_final,
207         .finup                  =       crc32c_intel_finup,
208         .digest                 =       crc32c_intel_digest,
209         .descsize               =       sizeof(u32),
210         .digestsize             =       CHKSUM_DIGEST_SIZE,
211         .base                   =       {
212                 .cra_name               =       "crc32c",
213                 .cra_driver_name        =       "crc32c-intel",
214                 .cra_priority           =       200,
215                 .cra_flags              =       CRYPTO_ALG_OPTIONAL_KEY,
216                 .cra_blocksize          =       CHKSUM_BLOCK_SIZE,
217                 .cra_ctxsize            =       sizeof(u32),
218                 .cra_module             =       THIS_MODULE,
219                 .cra_init               =       crc32c_intel_cra_init,
220         }
221 };
222 
223 static const struct x86_cpu_id crc32c_cpu_id[] = {
224         X86_MATCH_FEATURE(X86_FEATURE_XMM4_2, NULL),
225         {}
226 };
227 MODULE_DEVICE_TABLE(x86cpu, crc32c_cpu_id);
228 
229 static int __init crc32c_intel_mod_init(void)
230 {
231         if (!x86_match_cpu(crc32c_cpu_id))
232                 return -ENODEV;
233 #ifdef CONFIG_X86_64
234         if (boot_cpu_has(X86_FEATURE_PCLMULQDQ)) {
235                 alg.update = crc32c_pcl_intel_update;
236                 alg.finup = crc32c_pcl_intel_finup;
237                 alg.digest = crc32c_pcl_intel_digest;
238         }
239 #endif
240         return crypto_register_shash(&alg);
241 }
242 
243 static void __exit crc32c_intel_mod_fini(void)
244 {
245         crypto_unregister_shash(&alg);
246 }
247 
248 module_init(crc32c_intel_mod_init);
249 module_exit(crc32c_intel_mod_fini);
250 
251 MODULE_AUTHOR("Austin Zhang <austin.zhang@intel.com>, Kent Liu <kent.liu@intel.com>");
252 MODULE_DESCRIPTION("CRC32c (Castagnoli) optimization using Intel Hardware.");
253 MODULE_LICENSE("GPL");
254 
255 MODULE_ALIAS_CRYPTO("crc32c");
256 MODULE_ALIAS_CRYPTO("crc32c-intel");
257 

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