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Linux/arch/x86/kvm/ioapic.c

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  1 /*
  2  *  Copyright (C) 2001  MandrakeSoft S.A.
  3  *  Copyright 2010 Red Hat, Inc. and/or its affiliates.
  4  *
  5  *    MandrakeSoft S.A.
  6  *    43, rue d'Aboukir
  7  *    75002 Paris - France
  8  *    http://www.linux-mandrake.com/
  9  *    http://www.mandrakesoft.com/
 10  *
 11  *  This library is free software; you can redistribute it and/or
 12  *  modify it under the terms of the GNU Lesser General Public
 13  *  License as published by the Free Software Foundation; either
 14  *  version 2 of the License, or (at your option) any later version.
 15  *
 16  *  This library is distributed in the hope that it will be useful,
 17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 19  *  Lesser General Public License for more details.
 20  *
 21  *  You should have received a copy of the GNU Lesser General Public
 22  *  License along with this library; if not, write to the Free Software
 23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 24  *
 25  *  Yunhong Jiang <yunhong.jiang@intel.com>
 26  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
 27  *  Based on Xen 3.1 code.
 28  */
 29 
 30 #include <linux/kvm_host.h>
 31 #include <linux/kvm.h>
 32 #include <linux/mm.h>
 33 #include <linux/highmem.h>
 34 #include <linux/smp.h>
 35 #include <linux/hrtimer.h>
 36 #include <linux/io.h>
 37 #include <linux/slab.h>
 38 #include <linux/export.h>
 39 #include <asm/processor.h>
 40 #include <asm/page.h>
 41 #include <asm/current.h>
 42 #include <trace/events/kvm.h>
 43 
 44 #include "ioapic.h"
 45 #include "lapic.h"
 46 #include "irq.h"
 47 
 48 #if 0
 49 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
 50 #else
 51 #define ioapic_debug(fmt, arg...)
 52 #endif
 53 static int ioapic_service(struct kvm_ioapic *vioapic, int irq,
 54                 bool line_status);
 55 
 56 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
 57                                           unsigned long addr,
 58                                           unsigned long length)
 59 {
 60         unsigned long result = 0;
 61 
 62         switch (ioapic->ioregsel) {
 63         case IOAPIC_REG_VERSION:
 64                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
 65                           | (IOAPIC_VERSION_ID & 0xff));
 66                 break;
 67 
 68         case IOAPIC_REG_APIC_ID:
 69         case IOAPIC_REG_ARB_ID:
 70                 result = ((ioapic->id & 0xf) << 24);
 71                 break;
 72 
 73         default:
 74                 {
 75                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
 76                         u64 redir_content;
 77 
 78                         if (redir_index < IOAPIC_NUM_PINS)
 79                                 redir_content =
 80                                         ioapic->redirtbl[redir_index].bits;
 81                         else
 82                                 redir_content = ~0ULL;
 83 
 84                         result = (ioapic->ioregsel & 0x1) ?
 85                             (redir_content >> 32) & 0xffffffff :
 86                             redir_content & 0xffffffff;
 87                         break;
 88                 }
 89         }
 90 
 91         return result;
 92 }
 93 
 94 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
 95 {
 96         ioapic->rtc_status.pending_eoi = 0;
 97         bitmap_zero(ioapic->rtc_status.dest_map.map, KVM_MAX_VCPU_ID);
 98 }
 99 
100 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic);
101 
102 static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic *ioapic)
103 {
104         if (WARN_ON(ioapic->rtc_status.pending_eoi < 0))
105                 kvm_rtc_eoi_tracking_restore_all(ioapic);
106 }
107 
108 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
109 {
110         bool new_val, old_val;
111         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
112         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
113         union kvm_ioapic_redirect_entry *e;
114 
115         e = &ioapic->redirtbl[RTC_GSI];
116         if (!kvm_apic_match_dest(vcpu, NULL, 0, e->fields.dest_id,
117                                 e->fields.dest_mode))
118                 return;
119 
120         new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
121         old_val = test_bit(vcpu->vcpu_id, dest_map->map);
122 
123         if (new_val == old_val)
124                 return;
125 
126         if (new_val) {
127                 __set_bit(vcpu->vcpu_id, dest_map->map);
128                 dest_map->vectors[vcpu->vcpu_id] = e->fields.vector;
129                 ioapic->rtc_status.pending_eoi++;
130         } else {
131                 __clear_bit(vcpu->vcpu_id, dest_map->map);
132                 ioapic->rtc_status.pending_eoi--;
133                 rtc_status_pending_eoi_check_valid(ioapic);
134         }
135 }
136 
137 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
138 {
139         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
140 
141         spin_lock(&ioapic->lock);
142         __rtc_irq_eoi_tracking_restore_one(vcpu);
143         spin_unlock(&ioapic->lock);
144 }
145 
146 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
147 {
148         struct kvm_vcpu *vcpu;
149         int i;
150 
151         if (RTC_GSI >= IOAPIC_NUM_PINS)
152                 return;
153 
154         rtc_irq_eoi_tracking_reset(ioapic);
155         kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
156             __rtc_irq_eoi_tracking_restore_one(vcpu);
157 }
158 
159 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
160 {
161         if (test_and_clear_bit(vcpu->vcpu_id,
162                                ioapic->rtc_status.dest_map.map)) {
163                 --ioapic->rtc_status.pending_eoi;
164                 rtc_status_pending_eoi_check_valid(ioapic);
165         }
166 }
167 
168 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
169 {
170         if (ioapic->rtc_status.pending_eoi > 0)
171                 return true; /* coalesced */
172 
173         return false;
174 }
175 
176 static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq,
177                 int irq_level, bool line_status)
178 {
179         union kvm_ioapic_redirect_entry entry;
180         u32 mask = 1 << irq;
181         u32 old_irr;
182         int edge, ret;
183 
184         entry = ioapic->redirtbl[irq];
185         edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
186 
187         if (!irq_level) {
188                 ioapic->irr &= ~mask;
189                 ret = 1;
190                 goto out;
191         }
192 
193         /*
194          * Return 0 for coalesced interrupts; for edge-triggered interrupts,
195          * this only happens if a previous edge has not been delivered due
196          * do masking.  For level interrupts, the remote_irr field tells
197          * us if the interrupt is waiting for an EOI.
198          *
199          * RTC is special: it is edge-triggered, but userspace likes to know
200          * if it has been already ack-ed via EOI because coalesced RTC
201          * interrupts lead to time drift in Windows guests.  So we track
202          * EOI manually for the RTC interrupt.
203          */
204         if (irq == RTC_GSI && line_status &&
205                 rtc_irq_check_coalesced(ioapic)) {
206                 ret = 0;
207                 goto out;
208         }
209 
210         old_irr = ioapic->irr;
211         ioapic->irr |= mask;
212         if (edge)
213                 ioapic->irr_delivered &= ~mask;
214         if ((edge && old_irr == ioapic->irr) ||
215             (!edge && entry.fields.remote_irr)) {
216                 ret = 0;
217                 goto out;
218         }
219 
220         ret = ioapic_service(ioapic, irq, line_status);
221 
222 out:
223         trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
224         return ret;
225 }
226 
227 static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr)
228 {
229         u32 idx;
230 
231         rtc_irq_eoi_tracking_reset(ioapic);
232         for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS)
233                 ioapic_set_irq(ioapic, idx, 1, true);
234 
235         kvm_rtc_eoi_tracking_restore_all(ioapic);
236 }
237 
238 
239 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, ulong *ioapic_handled_vectors)
240 {
241         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
242         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
243         union kvm_ioapic_redirect_entry *e;
244         int index;
245 
246         spin_lock(&ioapic->lock);
247 
248         /* Make sure we see any missing RTC EOI */
249         if (test_bit(vcpu->vcpu_id, dest_map->map))
250                 __set_bit(dest_map->vectors[vcpu->vcpu_id],
251                           ioapic_handled_vectors);
252 
253         for (index = 0; index < IOAPIC_NUM_PINS; index++) {
254                 e = &ioapic->redirtbl[index];
255                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
256                     kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) ||
257                     index == RTC_GSI) {
258                         if (kvm_apic_match_dest(vcpu, NULL, 0,
259                                      e->fields.dest_id, e->fields.dest_mode) ||
260                             (e->fields.trig_mode == IOAPIC_EDGE_TRIG &&
261                              kvm_apic_pending_eoi(vcpu, e->fields.vector)))
262                                 __set_bit(e->fields.vector,
263                                           ioapic_handled_vectors);
264                 }
265         }
266         spin_unlock(&ioapic->lock);
267 }
268 
269 void kvm_vcpu_request_scan_ioapic(struct kvm *kvm)
270 {
271         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
272 
273         if (!ioapic)
274                 return;
275         kvm_make_scan_ioapic_request(kvm);
276 }
277 
278 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
279 {
280         unsigned index;
281         bool mask_before, mask_after;
282         union kvm_ioapic_redirect_entry *e;
283 
284         switch (ioapic->ioregsel) {
285         case IOAPIC_REG_VERSION:
286                 /* Writes are ignored. */
287                 break;
288 
289         case IOAPIC_REG_APIC_ID:
290                 ioapic->id = (val >> 24) & 0xf;
291                 break;
292 
293         case IOAPIC_REG_ARB_ID:
294                 break;
295 
296         default:
297                 index = (ioapic->ioregsel - 0x10) >> 1;
298 
299                 ioapic_debug("change redir index %x val %x\n", index, val);
300                 if (index >= IOAPIC_NUM_PINS)
301                         return;
302                 e = &ioapic->redirtbl[index];
303                 mask_before = e->fields.mask;
304                 if (ioapic->ioregsel & 1) {
305                         e->bits &= 0xffffffff;
306                         e->bits |= (u64) val << 32;
307                 } else {
308                         e->bits &= ~0xffffffffULL;
309                         e->bits |= (u32) val;
310                         e->fields.remote_irr = 0;
311                 }
312                 mask_after = e->fields.mask;
313                 if (mask_before != mask_after)
314                         kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
315                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
316                     && ioapic->irr & (1 << index))
317                         ioapic_service(ioapic, index, false);
318                 kvm_vcpu_request_scan_ioapic(ioapic->kvm);
319                 break;
320         }
321 }
322 
323 static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
324 {
325         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
326         struct kvm_lapic_irq irqe;
327         int ret;
328 
329         if (entry->fields.mask)
330                 return -1;
331 
332         ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
333                      "vector=%x trig_mode=%x\n",
334                      entry->fields.dest_id, entry->fields.dest_mode,
335                      entry->fields.delivery_mode, entry->fields.vector,
336                      entry->fields.trig_mode);
337 
338         irqe.dest_id = entry->fields.dest_id;
339         irqe.vector = entry->fields.vector;
340         irqe.dest_mode = entry->fields.dest_mode;
341         irqe.trig_mode = entry->fields.trig_mode;
342         irqe.delivery_mode = entry->fields.delivery_mode << 8;
343         irqe.level = 1;
344         irqe.shorthand = 0;
345         irqe.msi_redir_hint = false;
346 
347         if (irqe.trig_mode == IOAPIC_EDGE_TRIG)
348                 ioapic->irr_delivered |= 1 << irq;
349 
350         if (irq == RTC_GSI && line_status) {
351                 /*
352                  * pending_eoi cannot ever become negative (see
353                  * rtc_status_pending_eoi_check_valid) and the caller
354                  * ensures that it is only called if it is >= zero, namely
355                  * if rtc_irq_check_coalesced returns false).
356                  */
357                 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
358                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
359                                                &ioapic->rtc_status.dest_map);
360                 ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
361         } else
362                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
363 
364         if (ret && irqe.trig_mode == IOAPIC_LEVEL_TRIG)
365                 entry->fields.remote_irr = 1;
366 
367         return ret;
368 }
369 
370 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
371                        int level, bool line_status)
372 {
373         int ret, irq_level;
374 
375         BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
376 
377         spin_lock(&ioapic->lock);
378         irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
379                                          irq_source_id, level);
380         ret = ioapic_set_irq(ioapic, irq, irq_level, line_status);
381 
382         spin_unlock(&ioapic->lock);
383 
384         return ret;
385 }
386 
387 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
388 {
389         int i;
390 
391         spin_lock(&ioapic->lock);
392         for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
393                 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
394         spin_unlock(&ioapic->lock);
395 }
396 
397 static void kvm_ioapic_eoi_inject_work(struct work_struct *work)
398 {
399         int i;
400         struct kvm_ioapic *ioapic = container_of(work, struct kvm_ioapic,
401                                                  eoi_inject.work);
402         spin_lock(&ioapic->lock);
403         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
404                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
405 
406                 if (ent->fields.trig_mode != IOAPIC_LEVEL_TRIG)
407                         continue;
408 
409                 if (ioapic->irr & (1 << i) && !ent->fields.remote_irr)
410                         ioapic_service(ioapic, i, false);
411         }
412         spin_unlock(&ioapic->lock);
413 }
414 
415 #define IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT 10000
416 
417 static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
418                         struct kvm_ioapic *ioapic, int vector, int trigger_mode)
419 {
420         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
421         struct kvm_lapic *apic = vcpu->arch.apic;
422         int i;
423 
424         /* RTC special handling */
425         if (test_bit(vcpu->vcpu_id, dest_map->map) &&
426             vector == dest_map->vectors[vcpu->vcpu_id])
427                 rtc_irq_eoi(ioapic, vcpu);
428 
429         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
430                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
431 
432                 if (ent->fields.vector != vector)
433                         continue;
434 
435                 /*
436                  * We are dropping lock while calling ack notifiers because ack
437                  * notifier callbacks for assigned devices call into IOAPIC
438                  * recursively. Since remote_irr is cleared only after call
439                  * to notifiers if the same vector will be delivered while lock
440                  * is dropped it will be put into irr and will be delivered
441                  * after ack notifier returns.
442                  */
443                 spin_unlock(&ioapic->lock);
444                 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
445                 spin_lock(&ioapic->lock);
446 
447                 if (trigger_mode != IOAPIC_LEVEL_TRIG ||
448                     kvm_lapic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI)
449                         continue;
450 
451                 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
452                 ent->fields.remote_irr = 0;
453                 if (!ent->fields.mask && (ioapic->irr & (1 << i))) {
454                         ++ioapic->irq_eoi[i];
455                         if (ioapic->irq_eoi[i] == IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT) {
456                                 /*
457                                  * Real hardware does not deliver the interrupt
458                                  * immediately during eoi broadcast, and this
459                                  * lets a buggy guest make slow progress
460                                  * even if it does not correctly handle a
461                                  * level-triggered interrupt.  Emulate this
462                                  * behavior if we detect an interrupt storm.
463                                  */
464                                 schedule_delayed_work(&ioapic->eoi_inject, HZ / 100);
465                                 ioapic->irq_eoi[i] = 0;
466                                 trace_kvm_ioapic_delayed_eoi_inj(ent->bits);
467                         } else {
468                                 ioapic_service(ioapic, i, false);
469                         }
470                 } else {
471                         ioapic->irq_eoi[i] = 0;
472                 }
473         }
474 }
475 
476 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
477 {
478         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
479 
480         spin_lock(&ioapic->lock);
481         __kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
482         spin_unlock(&ioapic->lock);
483 }
484 
485 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
486 {
487         return container_of(dev, struct kvm_ioapic, dev);
488 }
489 
490 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
491 {
492         return ((addr >= ioapic->base_address &&
493                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
494 }
495 
496 static int ioapic_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
497                                 gpa_t addr, int len, void *val)
498 {
499         struct kvm_ioapic *ioapic = to_ioapic(this);
500         u32 result;
501         if (!ioapic_in_range(ioapic, addr))
502                 return -EOPNOTSUPP;
503 
504         ioapic_debug("addr %lx\n", (unsigned long)addr);
505         ASSERT(!(addr & 0xf));  /* check alignment */
506 
507         addr &= 0xff;
508         spin_lock(&ioapic->lock);
509         switch (addr) {
510         case IOAPIC_REG_SELECT:
511                 result = ioapic->ioregsel;
512                 break;
513 
514         case IOAPIC_REG_WINDOW:
515                 result = ioapic_read_indirect(ioapic, addr, len);
516                 break;
517 
518         default:
519                 result = 0;
520                 break;
521         }
522         spin_unlock(&ioapic->lock);
523 
524         switch (len) {
525         case 8:
526                 *(u64 *) val = result;
527                 break;
528         case 1:
529         case 2:
530         case 4:
531                 memcpy(val, (char *)&result, len);
532                 break;
533         default:
534                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
535         }
536         return 0;
537 }
538 
539 static int ioapic_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
540                                  gpa_t addr, int len, const void *val)
541 {
542         struct kvm_ioapic *ioapic = to_ioapic(this);
543         u32 data;
544         if (!ioapic_in_range(ioapic, addr))
545                 return -EOPNOTSUPP;
546 
547         ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
548                      (void*)addr, len, val);
549         ASSERT(!(addr & 0xf));  /* check alignment */
550 
551         switch (len) {
552         case 8:
553         case 4:
554                 data = *(u32 *) val;
555                 break;
556         case 2:
557                 data = *(u16 *) val;
558                 break;
559         case 1:
560                 data = *(u8  *) val;
561                 break;
562         default:
563                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
564                 return 0;
565         }
566 
567         addr &= 0xff;
568         spin_lock(&ioapic->lock);
569         switch (addr) {
570         case IOAPIC_REG_SELECT:
571                 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
572                 break;
573 
574         case IOAPIC_REG_WINDOW:
575                 ioapic_write_indirect(ioapic, data);
576                 break;
577 
578         default:
579                 break;
580         }
581         spin_unlock(&ioapic->lock);
582         return 0;
583 }
584 
585 static void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
586 {
587         int i;
588 
589         cancel_delayed_work_sync(&ioapic->eoi_inject);
590         for (i = 0; i < IOAPIC_NUM_PINS; i++)
591                 ioapic->redirtbl[i].fields.mask = 1;
592         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
593         ioapic->ioregsel = 0;
594         ioapic->irr = 0;
595         ioapic->irr_delivered = 0;
596         ioapic->id = 0;
597         memset(ioapic->irq_eoi, 0x00, sizeof(ioapic->irq_eoi));
598         rtc_irq_eoi_tracking_reset(ioapic);
599 }
600 
601 static const struct kvm_io_device_ops ioapic_mmio_ops = {
602         .read     = ioapic_mmio_read,
603         .write    = ioapic_mmio_write,
604 };
605 
606 int kvm_ioapic_init(struct kvm *kvm)
607 {
608         struct kvm_ioapic *ioapic;
609         int ret;
610 
611         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
612         if (!ioapic)
613                 return -ENOMEM;
614         spin_lock_init(&ioapic->lock);
615         INIT_DELAYED_WORK(&ioapic->eoi_inject, kvm_ioapic_eoi_inject_work);
616         kvm->arch.vioapic = ioapic;
617         kvm_ioapic_reset(ioapic);
618         kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
619         ioapic->kvm = kvm;
620         mutex_lock(&kvm->slots_lock);
621         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
622                                       IOAPIC_MEM_LENGTH, &ioapic->dev);
623         mutex_unlock(&kvm->slots_lock);
624         if (ret < 0) {
625                 kvm->arch.vioapic = NULL;
626                 kfree(ioapic);
627                 return ret;
628         }
629 
630         kvm_vcpu_request_scan_ioapic(kvm);
631         return ret;
632 }
633 
634 void kvm_ioapic_destroy(struct kvm *kvm)
635 {
636         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
637 
638         cancel_delayed_work_sync(&ioapic->eoi_inject);
639         kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
640         kvm->arch.vioapic = NULL;
641         kfree(ioapic);
642 }
643 
644 int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
645 {
646         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
647         if (!ioapic)
648                 return -EINVAL;
649 
650         spin_lock(&ioapic->lock);
651         memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
652         state->irr &= ~ioapic->irr_delivered;
653         spin_unlock(&ioapic->lock);
654         return 0;
655 }
656 
657 int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
658 {
659         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
660         if (!ioapic)
661                 return -EINVAL;
662 
663         spin_lock(&ioapic->lock);
664         memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
665         ioapic->irr = 0;
666         ioapic->irr_delivered = 0;
667         kvm_vcpu_request_scan_ioapic(kvm);
668         kvm_ioapic_inject_all(ioapic, state->irr);
669         spin_unlock(&ioapic->lock);
670         return 0;
671 }
672 

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