~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

TOMOYO Linux Cross Reference
Linux/sound/soc/sunxi/sun4i-codec.c

Version: ~ [ linux-5.13-rc1 ] ~ [ linux-5.12.2 ] ~ [ linux-5.11.19 ] ~ [ linux-5.10.35 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.117 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.190 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.232 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.268 ] ~ [ linux-4.8.17 ] ~ [ linux-4.7.10 ] ~ [ linux-4.6.7 ] ~ [ linux-4.5.7 ] ~ [ linux-4.4.268 ] ~ [ linux-4.3.6 ] ~ [ linux-4.2.8 ] ~ [ linux-4.1.52 ] ~ [ linux-4.0.9 ] ~ [ linux-3.18.140 ] ~ [ linux-3.16.85 ] ~ [ linux-3.14.79 ] ~ [ linux-3.12.74 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.5 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 /*
  2  * Copyright 2014 Emilio López <emilio@elopez.com.ar>
  3  * Copyright 2014 Jon Smirl <jonsmirl@gmail.com>
  4  * Copyright 2015 Maxime Ripard <maxime.ripard@free-electrons.com>
  5  * Copyright 2015 Adam Sampson <ats@offog.org>
  6  * Copyright 2016 Chen-Yu Tsai <wens@csie.org>
  7  *
  8  * Based on the Allwinner SDK driver, released under the GPL.
  9  *
 10  * This program is free software; you can redistribute it and/or modify
 11  * it under the terms of the GNU General Public License as published by
 12  * the Free Software Foundation; either version 2 of the License, or
 13  * (at your option) any later version.
 14  *
 15  * This program is distributed in the hope that it will be useful,
 16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 18  * GNU General Public License for more details.
 19  */
 20 
 21 #include <linux/init.h>
 22 #include <linux/kernel.h>
 23 #include <linux/module.h>
 24 #include <linux/platform_device.h>
 25 #include <linux/delay.h>
 26 #include <linux/slab.h>
 27 #include <linux/of.h>
 28 #include <linux/of_address.h>
 29 #include <linux/of_device.h>
 30 #include <linux/of_platform.h>
 31 #include <linux/clk.h>
 32 #include <linux/regmap.h>
 33 #include <linux/reset.h>
 34 #include <linux/gpio/consumer.h>
 35 
 36 #include <sound/core.h>
 37 #include <sound/pcm.h>
 38 #include <sound/pcm_params.h>
 39 #include <sound/soc.h>
 40 #include <sound/tlv.h>
 41 #include <sound/initval.h>
 42 #include <sound/dmaengine_pcm.h>
 43 
 44 /* Codec DAC digital controls and FIFO registers */
 45 #define SUN4I_CODEC_DAC_DPC                     (0x00)
 46 #define SUN4I_CODEC_DAC_DPC_EN_DA                       (31)
 47 #define SUN4I_CODEC_DAC_DPC_DVOL                        (12)
 48 #define SUN4I_CODEC_DAC_FIFOC                   (0x04)
 49 #define SUN4I_CODEC_DAC_FIFOC_DAC_FS                    (29)
 50 #define SUN4I_CODEC_DAC_FIFOC_FIR_VERSION               (28)
 51 #define SUN4I_CODEC_DAC_FIFOC_SEND_LASAT                (26)
 52 #define SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE              (24)
 53 #define SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT               (21)
 54 #define SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL             (8)
 55 #define SUN4I_CODEC_DAC_FIFOC_MONO_EN                   (6)
 56 #define SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS            (5)
 57 #define SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN                (4)
 58 #define SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH                (0)
 59 #define SUN4I_CODEC_DAC_FIFOS                   (0x08)
 60 #define SUN4I_CODEC_DAC_TXDATA                  (0x0c)
 61 
 62 /* Codec DAC side analog signal controls */
 63 #define SUN4I_CODEC_DAC_ACTL                    (0x10)
 64 #define SUN4I_CODEC_DAC_ACTL_DACAENR                    (31)
 65 #define SUN4I_CODEC_DAC_ACTL_DACAENL                    (30)
 66 #define SUN4I_CODEC_DAC_ACTL_MIXEN                      (29)
 67 #define SUN4I_CODEC_DAC_ACTL_LDACLMIXS                  (15)
 68 #define SUN4I_CODEC_DAC_ACTL_RDACRMIXS                  (14)
 69 #define SUN4I_CODEC_DAC_ACTL_LDACRMIXS                  (13)
 70 #define SUN4I_CODEC_DAC_ACTL_DACPAS                     (8)
 71 #define SUN4I_CODEC_DAC_ACTL_MIXPAS                     (7)
 72 #define SUN4I_CODEC_DAC_ACTL_PA_MUTE                    (6)
 73 #define SUN4I_CODEC_DAC_ACTL_PA_VOL                     (0)
 74 #define SUN4I_CODEC_DAC_TUNE                    (0x14)
 75 #define SUN4I_CODEC_DAC_DEBUG                   (0x18)
 76 
 77 /* Codec ADC digital controls and FIFO registers */
 78 #define SUN4I_CODEC_ADC_FIFOC                   (0x1c)
 79 #define SUN4I_CODEC_ADC_FIFOC_ADC_FS                    (29)
 80 #define SUN4I_CODEC_ADC_FIFOC_EN_AD                     (28)
 81 #define SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE              (24)
 82 #define SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL             (8)
 83 #define SUN4I_CODEC_ADC_FIFOC_MONO_EN                   (7)
 84 #define SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS            (6)
 85 #define SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN                (4)
 86 #define SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH                (0)
 87 #define SUN4I_CODEC_ADC_FIFOS                   (0x20)
 88 #define SUN4I_CODEC_ADC_RXDATA                  (0x24)
 89 
 90 /* Codec ADC side analog signal controls */
 91 #define SUN4I_CODEC_ADC_ACTL                    (0x28)
 92 #define SUN4I_CODEC_ADC_ACTL_ADC_R_EN                   (31)
 93 #define SUN4I_CODEC_ADC_ACTL_ADC_L_EN                   (30)
 94 #define SUN4I_CODEC_ADC_ACTL_PREG1EN                    (29)
 95 #define SUN4I_CODEC_ADC_ACTL_PREG2EN                    (28)
 96 #define SUN4I_CODEC_ADC_ACTL_VMICEN                     (27)
 97 #define SUN4I_CODEC_ADC_ACTL_VADCG                      (20)
 98 #define SUN4I_CODEC_ADC_ACTL_ADCIS                      (17)
 99 #define SUN4I_CODEC_ADC_ACTL_PA_EN                      (4)
100 #define SUN4I_CODEC_ADC_ACTL_DDE                        (3)
101 #define SUN4I_CODEC_ADC_DEBUG                   (0x2c)
102 
103 /* FIFO counters */
104 #define SUN4I_CODEC_DAC_TXCNT                   (0x30)
105 #define SUN4I_CODEC_ADC_RXCNT                   (0x34)
106 
107 /* Calibration register (sun7i only) */
108 #define SUN7I_CODEC_AC_DAC_CAL                  (0x38)
109 
110 /* Microphone controls (sun7i only) */
111 #define SUN7I_CODEC_AC_MIC_PHONE_CAL            (0x3c)
112 
113 /*
114  * sun6i specific registers
115  *
116  * sun6i shares the same digital control and FIFO registers as sun4i,
117  * but only the DAC digital controls are at the same offset. The others
118  * have been moved around to accommodate extra analog controls.
119  */
120 
121 /* Codec DAC digital controls and FIFO registers */
122 #define SUN6I_CODEC_ADC_FIFOC                   (0x10)
123 #define SUN6I_CODEC_ADC_FIFOC_EN_AD                     (28)
124 #define SUN6I_CODEC_ADC_FIFOS                   (0x14)
125 #define SUN6I_CODEC_ADC_RXDATA                  (0x18)
126 
127 /* Output mixer and gain controls */
128 #define SUN6I_CODEC_OM_DACA_CTRL                (0x20)
129 #define SUN6I_CODEC_OM_DACA_CTRL_DACAREN                (31)
130 #define SUN6I_CODEC_OM_DACA_CTRL_DACALEN                (30)
131 #define SUN6I_CODEC_OM_DACA_CTRL_RMIXEN                 (29)
132 #define SUN6I_CODEC_OM_DACA_CTRL_LMIXEN                 (28)
133 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC1              (23)
134 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC2              (22)
135 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_PHONE             (21)
136 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_PHONEP            (20)
137 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_LINEINR           (19)
138 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACR              (18)
139 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACL              (17)
140 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC1              (16)
141 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC2              (15)
142 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_PHONE             (14)
143 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_PHONEN            (13)
144 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_LINEINL           (12)
145 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACL              (11)
146 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACR              (10)
147 #define SUN6I_CODEC_OM_DACA_CTRL_RHPIS                  (9)
148 #define SUN6I_CODEC_OM_DACA_CTRL_LHPIS                  (8)
149 #define SUN6I_CODEC_OM_DACA_CTRL_RHPPAMUTE              (7)
150 #define SUN6I_CODEC_OM_DACA_CTRL_LHPPAMUTE              (6)
151 #define SUN6I_CODEC_OM_DACA_CTRL_HPVOL                  (0)
152 #define SUN6I_CODEC_OM_PA_CTRL                  (0x24)
153 #define SUN6I_CODEC_OM_PA_CTRL_HPPAEN                   (31)
154 #define SUN6I_CODEC_OM_PA_CTRL_HPCOM_CTL                (29)
155 #define SUN6I_CODEC_OM_PA_CTRL_COMPTEN                  (28)
156 #define SUN6I_CODEC_OM_PA_CTRL_MIC1G                    (15)
157 #define SUN6I_CODEC_OM_PA_CTRL_MIC2G                    (12)
158 #define SUN6I_CODEC_OM_PA_CTRL_LINEING                  (9)
159 #define SUN6I_CODEC_OM_PA_CTRL_PHONEG                   (6)
160 #define SUN6I_CODEC_OM_PA_CTRL_PHONEPG                  (3)
161 #define SUN6I_CODEC_OM_PA_CTRL_PHONENG                  (0)
162 
163 /* Microphone, line out and phone out controls */
164 #define SUN6I_CODEC_MIC_CTRL                    (0x28)
165 #define SUN6I_CODEC_MIC_CTRL_HBIASEN                    (31)
166 #define SUN6I_CODEC_MIC_CTRL_MBIASEN                    (30)
167 #define SUN6I_CODEC_MIC_CTRL_MIC1AMPEN                  (28)
168 #define SUN6I_CODEC_MIC_CTRL_MIC1BOOST                  (25)
169 #define SUN6I_CODEC_MIC_CTRL_MIC2AMPEN                  (24)
170 #define SUN6I_CODEC_MIC_CTRL_MIC2BOOST                  (21)
171 #define SUN6I_CODEC_MIC_CTRL_MIC2SLT                    (20)
172 #define SUN6I_CODEC_MIC_CTRL_LINEOUTLEN                 (19)
173 #define SUN6I_CODEC_MIC_CTRL_LINEOUTREN                 (18)
174 #define SUN6I_CODEC_MIC_CTRL_LINEOUTLSRC                (17)
175 #define SUN6I_CODEC_MIC_CTRL_LINEOUTRSRC                (16)
176 #define SUN6I_CODEC_MIC_CTRL_LINEOUTVC                  (11)
177 #define SUN6I_CODEC_MIC_CTRL_PHONEPREG                  (8)
178 
179 /* ADC mixer controls */
180 #define SUN6I_CODEC_ADC_ACTL                    (0x2c)
181 #define SUN6I_CODEC_ADC_ACTL_ADCREN                     (31)
182 #define SUN6I_CODEC_ADC_ACTL_ADCLEN                     (30)
183 #define SUN6I_CODEC_ADC_ACTL_ADCRG                      (27)
184 #define SUN6I_CODEC_ADC_ACTL_ADCLG                      (24)
185 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC1               (13)
186 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC2               (12)
187 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_PHONE              (11)
188 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_PHONEP             (10)
189 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_LINEINR            (9)
190 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXR              (8)
191 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXL              (7)
192 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC1               (6)
193 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC2               (5)
194 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_PHONE              (4)
195 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_PHONEN             (3)
196 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_LINEINL            (2)
197 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXL              (1)
198 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXR              (0)
199 
200 /* Analog performance tuning controls */
201 #define SUN6I_CODEC_ADDA_TUNE                   (0x30)
202 
203 /* Calibration controls */
204 #define SUN6I_CODEC_CALIBRATION                 (0x34)
205 
206 /* FIFO counters */
207 #define SUN6I_CODEC_DAC_TXCNT                   (0x40)
208 #define SUN6I_CODEC_ADC_RXCNT                   (0x44)
209 
210 /* headset jack detection and button support registers */
211 #define SUN6I_CODEC_HMIC_CTL                    (0x50)
212 #define SUN6I_CODEC_HMIC_DATA                   (0x54)
213 
214 /* TODO sun6i DAP (Digital Audio Processing) bits */
215 
216 /* FIFO counters moved on A23 */
217 #define SUN8I_A23_CODEC_DAC_TXCNT               (0x1c)
218 #define SUN8I_A23_CODEC_ADC_RXCNT               (0x20)
219 
220 /* TX FIFO moved on H3 */
221 #define SUN8I_H3_CODEC_DAC_TXDATA               (0x20)
222 #define SUN8I_H3_CODEC_DAC_DBG                  (0x48)
223 #define SUN8I_H3_CODEC_ADC_DBG                  (0x4c)
224 
225 /* TODO H3 DAP (Digital Audio Processing) bits */
226 
227 struct sun4i_codec {
228         struct device   *dev;
229         struct regmap   *regmap;
230         struct clk      *clk_apb;
231         struct clk      *clk_module;
232         struct reset_control *rst;
233         struct gpio_desc *gpio_pa;
234 
235         /* ADC_FIFOC register is at different offset on different SoCs */
236         struct regmap_field *reg_adc_fifoc;
237 
238         struct snd_dmaengine_dai_dma_data       capture_dma_data;
239         struct snd_dmaengine_dai_dma_data       playback_dma_data;
240 };
241 
242 static void sun4i_codec_start_playback(struct sun4i_codec *scodec)
243 {
244         /* Flush TX FIFO */
245         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
246                            BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH),
247                            BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));
248 
249         /* Enable DAC DRQ */
250         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
251                            BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN),
252                            BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN));
253 }
254 
255 static void sun4i_codec_stop_playback(struct sun4i_codec *scodec)
256 {
257         /* Disable DAC DRQ */
258         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
259                            BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN),
260                            0);
261 }
262 
263 static void sun4i_codec_start_capture(struct sun4i_codec *scodec)
264 {
265         /* Enable ADC DRQ */
266         regmap_field_update_bits(scodec->reg_adc_fifoc,
267                                  BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN),
268                                  BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN));
269 }
270 
271 static void sun4i_codec_stop_capture(struct sun4i_codec *scodec)
272 {
273         /* Disable ADC DRQ */
274         regmap_field_update_bits(scodec->reg_adc_fifoc,
275                                  BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN), 0);
276 }
277 
278 static int sun4i_codec_trigger(struct snd_pcm_substream *substream, int cmd,
279                                struct snd_soc_dai *dai)
280 {
281         struct snd_soc_pcm_runtime *rtd = substream->private_data;
282         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
283 
284         switch (cmd) {
285         case SNDRV_PCM_TRIGGER_START:
286         case SNDRV_PCM_TRIGGER_RESUME:
287         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
288                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
289                         sun4i_codec_start_playback(scodec);
290                 else
291                         sun4i_codec_start_capture(scodec);
292                 break;
293 
294         case SNDRV_PCM_TRIGGER_STOP:
295         case SNDRV_PCM_TRIGGER_SUSPEND:
296         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
297                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
298                         sun4i_codec_stop_playback(scodec);
299                 else
300                         sun4i_codec_stop_capture(scodec);
301                 break;
302 
303         default:
304                 return -EINVAL;
305         }
306 
307         return 0;
308 }
309 
310 static int sun4i_codec_prepare_capture(struct snd_pcm_substream *substream,
311                                        struct snd_soc_dai *dai)
312 {
313         struct snd_soc_pcm_runtime *rtd = substream->private_data;
314         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
315 
316 
317         /* Flush RX FIFO */
318         regmap_field_update_bits(scodec->reg_adc_fifoc,
319                                  BIT(SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH),
320                                  BIT(SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH));
321 
322 
323         /* Set RX FIFO trigger level */
324         regmap_field_update_bits(scodec->reg_adc_fifoc,
325                                  0xf << SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL,
326                                  0x7 << SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL);
327 
328         /*
329          * FIXME: Undocumented in the datasheet, but
330          *        Allwinner's code mentions that it is related
331          *        related to microphone gain
332          */
333         if (of_device_is_compatible(scodec->dev->of_node,
334                                     "allwinner,sun4i-a10-codec") ||
335             of_device_is_compatible(scodec->dev->of_node,
336                                     "allwinner,sun7i-a20-codec")) {
337                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_ADC_ACTL,
338                                    0x3 << 25,
339                                    0x1 << 25);
340         }
341 
342         if (of_device_is_compatible(scodec->dev->of_node,
343                                     "allwinner,sun7i-a20-codec"))
344                 /* FIXME: Undocumented bits */
345                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_TUNE,
346                                    0x3 << 8,
347                                    0x1 << 8);
348 
349         /* Fill most significant bits with valid data MSB */
350         regmap_field_update_bits(scodec->reg_adc_fifoc,
351                                  BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE),
352                                  BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE));
353 
354         return 0;
355 }
356 
357 static int sun4i_codec_prepare_playback(struct snd_pcm_substream *substream,
358                                         struct snd_soc_dai *dai)
359 {
360         struct snd_soc_pcm_runtime *rtd = substream->private_data;
361         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
362         u32 val;
363 
364         /* Flush the TX FIFO */
365         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
366                            BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH),
367                            BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));
368 
369         /* Set TX FIFO Empty Trigger Level */
370         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
371                            0x3f << SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL,
372                            0xf << SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL);
373 
374         if (substream->runtime->rate > 32000)
375                 /* Use 64 bits FIR filter */
376                 val = 0;
377         else
378                 /* Use 32 bits FIR filter */
379                 val = BIT(SUN4I_CODEC_DAC_FIFOC_FIR_VERSION);
380 
381         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
382                            BIT(SUN4I_CODEC_DAC_FIFOC_FIR_VERSION),
383                            val);
384 
385         /* Send zeros when we have an underrun */
386         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
387                            BIT(SUN4I_CODEC_DAC_FIFOC_SEND_LASAT),
388                            0);
389 
390         return 0;
391 };
392 
393 static int sun4i_codec_prepare(struct snd_pcm_substream *substream,
394                                struct snd_soc_dai *dai)
395 {
396         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
397                 return sun4i_codec_prepare_playback(substream, dai);
398 
399         return sun4i_codec_prepare_capture(substream, dai);
400 }
401 
402 static unsigned long sun4i_codec_get_mod_freq(struct snd_pcm_hw_params *params)
403 {
404         unsigned int rate = params_rate(params);
405 
406         switch (rate) {
407         case 176400:
408         case 88200:
409         case 44100:
410         case 33075:
411         case 22050:
412         case 14700:
413         case 11025:
414         case 7350:
415                 return 22579200;
416 
417         case 192000:
418         case 96000:
419         case 48000:
420         case 32000:
421         case 24000:
422         case 16000:
423         case 12000:
424         case 8000:
425                 return 24576000;
426 
427         default:
428                 return 0;
429         }
430 }
431 
432 static int sun4i_codec_get_hw_rate(struct snd_pcm_hw_params *params)
433 {
434         unsigned int rate = params_rate(params);
435 
436         switch (rate) {
437         case 192000:
438         case 176400:
439                 return 6;
440 
441         case 96000:
442         case 88200:
443                 return 7;
444 
445         case 48000:
446         case 44100:
447                 return 0;
448 
449         case 32000:
450         case 33075:
451                 return 1;
452 
453         case 24000:
454         case 22050:
455                 return 2;
456 
457         case 16000:
458         case 14700:
459                 return 3;
460 
461         case 12000:
462         case 11025:
463                 return 4;
464 
465         case 8000:
466         case 7350:
467                 return 5;
468 
469         default:
470                 return -EINVAL;
471         }
472 }
473 
474 static int sun4i_codec_hw_params_capture(struct sun4i_codec *scodec,
475                                          struct snd_pcm_hw_params *params,
476                                          unsigned int hwrate)
477 {
478         /* Set ADC sample rate */
479         regmap_field_update_bits(scodec->reg_adc_fifoc,
480                                  7 << SUN4I_CODEC_ADC_FIFOC_ADC_FS,
481                                  hwrate << SUN4I_CODEC_ADC_FIFOC_ADC_FS);
482 
483         /* Set the number of channels we want to use */
484         if (params_channels(params) == 1)
485                 regmap_field_update_bits(scodec->reg_adc_fifoc,
486                                          BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN),
487                                          BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN));
488         else
489                 regmap_field_update_bits(scodec->reg_adc_fifoc,
490                                          BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN),
491                                          0);
492 
493         return 0;
494 }
495 
496 static int sun4i_codec_hw_params_playback(struct sun4i_codec *scodec,
497                                           struct snd_pcm_hw_params *params,
498                                           unsigned int hwrate)
499 {
500         u32 val;
501 
502         /* Set DAC sample rate */
503         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
504                            7 << SUN4I_CODEC_DAC_FIFOC_DAC_FS,
505                            hwrate << SUN4I_CODEC_DAC_FIFOC_DAC_FS);
506 
507         /* Set the number of channels we want to use */
508         if (params_channels(params) == 1)
509                 val = BIT(SUN4I_CODEC_DAC_FIFOC_MONO_EN);
510         else
511                 val = 0;
512 
513         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
514                            BIT(SUN4I_CODEC_DAC_FIFOC_MONO_EN),
515                            val);
516 
517         /* Set the number of sample bits to either 16 or 24 bits */
518         if (hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min == 32) {
519                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
520                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS),
521                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS));
522 
523                 /* Set TX FIFO mode to padding the LSBs with 0 */
524                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
525                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE),
526                                    0);
527 
528                 scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
529         } else {
530                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
531                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS),
532                                    0);
533 
534                 /* Set TX FIFO mode to repeat the MSB */
535                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
536                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE),
537                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE));
538 
539                 scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
540         }
541 
542         return 0;
543 }
544 
545 static int sun4i_codec_hw_params(struct snd_pcm_substream *substream,
546                                  struct snd_pcm_hw_params *params,
547                                  struct snd_soc_dai *dai)
548 {
549         struct snd_soc_pcm_runtime *rtd = substream->private_data;
550         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
551         unsigned long clk_freq;
552         int ret, hwrate;
553 
554         clk_freq = sun4i_codec_get_mod_freq(params);
555         if (!clk_freq)
556                 return -EINVAL;
557 
558         ret = clk_set_rate(scodec->clk_module, clk_freq);
559         if (ret)
560                 return ret;
561 
562         hwrate = sun4i_codec_get_hw_rate(params);
563         if (hwrate < 0)
564                 return hwrate;
565 
566         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
567                 return sun4i_codec_hw_params_playback(scodec, params,
568                                                       hwrate);
569 
570         return sun4i_codec_hw_params_capture(scodec, params,
571                                              hwrate);
572 }
573 
574 static int sun4i_codec_startup(struct snd_pcm_substream *substream,
575                                struct snd_soc_dai *dai)
576 {
577         struct snd_soc_pcm_runtime *rtd = substream->private_data;
578         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
579 
580         /*
581          * Stop issuing DRQ when we have room for less than 16 samples
582          * in our TX FIFO
583          */
584         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
585                            3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT,
586                            3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT);
587 
588         return clk_prepare_enable(scodec->clk_module);
589 }
590 
591 static void sun4i_codec_shutdown(struct snd_pcm_substream *substream,
592                                  struct snd_soc_dai *dai)
593 {
594         struct snd_soc_pcm_runtime *rtd = substream->private_data;
595         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
596 
597         clk_disable_unprepare(scodec->clk_module);
598 }
599 
600 static const struct snd_soc_dai_ops sun4i_codec_dai_ops = {
601         .startup        = sun4i_codec_startup,
602         .shutdown       = sun4i_codec_shutdown,
603         .trigger        = sun4i_codec_trigger,
604         .hw_params      = sun4i_codec_hw_params,
605         .prepare        = sun4i_codec_prepare,
606 };
607 
608 static struct snd_soc_dai_driver sun4i_codec_dai = {
609         .name   = "Codec",
610         .ops    = &sun4i_codec_dai_ops,
611         .playback = {
612                 .stream_name    = "Codec Playback",
613                 .channels_min   = 1,
614                 .channels_max   = 2,
615                 .rate_min       = 8000,
616                 .rate_max       = 192000,
617                 .rates          = SNDRV_PCM_RATE_8000_48000 |
618                                   SNDRV_PCM_RATE_96000 |
619                                   SNDRV_PCM_RATE_192000,
620                 .formats        = SNDRV_PCM_FMTBIT_S16_LE |
621                                   SNDRV_PCM_FMTBIT_S32_LE,
622                 .sig_bits       = 24,
623         },
624         .capture = {
625                 .stream_name    = "Codec Capture",
626                 .channels_min   = 1,
627                 .channels_max   = 2,
628                 .rate_min       = 8000,
629                 .rate_max       = 192000,
630                 .rates          = SNDRV_PCM_RATE_8000_48000 |
631                                   SNDRV_PCM_RATE_96000 |
632                                   SNDRV_PCM_RATE_192000 |
633                                   SNDRV_PCM_RATE_KNOT,
634                 .formats        = SNDRV_PCM_FMTBIT_S16_LE |
635                                   SNDRV_PCM_FMTBIT_S32_LE,
636                 .sig_bits       = 24,
637         },
638 };
639 
640 /*** sun4i Codec ***/
641 static const struct snd_kcontrol_new sun4i_codec_pa_mute =
642         SOC_DAPM_SINGLE("Switch", SUN4I_CODEC_DAC_ACTL,
643                         SUN4I_CODEC_DAC_ACTL_PA_MUTE, 1, 0);
644 
645 static DECLARE_TLV_DB_SCALE(sun4i_codec_pa_volume_scale, -6300, 100, 1);
646 
647 static const struct snd_kcontrol_new sun4i_codec_controls[] = {
648         SOC_SINGLE_TLV("Power Amplifier Volume", SUN4I_CODEC_DAC_ACTL,
649                        SUN4I_CODEC_DAC_ACTL_PA_VOL, 0x3F, 0,
650                        sun4i_codec_pa_volume_scale),
651 };
652 
653 static const struct snd_kcontrol_new sun4i_codec_left_mixer_controls[] = {
654         SOC_DAPM_SINGLE("Left DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
655                         SUN4I_CODEC_DAC_ACTL_LDACLMIXS, 1, 0),
656 };
657 
658 static const struct snd_kcontrol_new sun4i_codec_right_mixer_controls[] = {
659         SOC_DAPM_SINGLE("Right DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
660                         SUN4I_CODEC_DAC_ACTL_RDACRMIXS, 1, 0),
661         SOC_DAPM_SINGLE("Left DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
662                         SUN4I_CODEC_DAC_ACTL_LDACRMIXS, 1, 0),
663 };
664 
665 static const struct snd_kcontrol_new sun4i_codec_pa_mixer_controls[] = {
666         SOC_DAPM_SINGLE("DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
667                         SUN4I_CODEC_DAC_ACTL_DACPAS, 1, 0),
668         SOC_DAPM_SINGLE("Mixer Playback Switch", SUN4I_CODEC_DAC_ACTL,
669                         SUN4I_CODEC_DAC_ACTL_MIXPAS, 1, 0),
670 };
671 
672 static const struct snd_soc_dapm_widget sun4i_codec_codec_dapm_widgets[] = {
673         /* Digital parts of the ADCs */
674         SND_SOC_DAPM_SUPPLY("ADC", SUN4I_CODEC_ADC_FIFOC,
675                             SUN4I_CODEC_ADC_FIFOC_EN_AD, 0,
676                             NULL, 0),
677 
678         /* Digital parts of the DACs */
679         SND_SOC_DAPM_SUPPLY("DAC", SUN4I_CODEC_DAC_DPC,
680                             SUN4I_CODEC_DAC_DPC_EN_DA, 0,
681                             NULL, 0),
682 
683         /* Analog parts of the ADCs */
684         SND_SOC_DAPM_ADC("Left ADC", "Codec Capture", SUN4I_CODEC_ADC_ACTL,
685                          SUN4I_CODEC_ADC_ACTL_ADC_L_EN, 0),
686         SND_SOC_DAPM_ADC("Right ADC", "Codec Capture", SUN4I_CODEC_ADC_ACTL,
687                          SUN4I_CODEC_ADC_ACTL_ADC_R_EN, 0),
688 
689         /* Analog parts of the DACs */
690         SND_SOC_DAPM_DAC("Left DAC", "Codec Playback", SUN4I_CODEC_DAC_ACTL,
691                          SUN4I_CODEC_DAC_ACTL_DACAENL, 0),
692         SND_SOC_DAPM_DAC("Right DAC", "Codec Playback", SUN4I_CODEC_DAC_ACTL,
693                          SUN4I_CODEC_DAC_ACTL_DACAENR, 0),
694 
695         /* Mixers */
696         SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
697                            sun4i_codec_left_mixer_controls,
698                            ARRAY_SIZE(sun4i_codec_left_mixer_controls)),
699         SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
700                            sun4i_codec_right_mixer_controls,
701                            ARRAY_SIZE(sun4i_codec_right_mixer_controls)),
702 
703         /* Global Mixer Enable */
704         SND_SOC_DAPM_SUPPLY("Mixer Enable", SUN4I_CODEC_DAC_ACTL,
705                             SUN4I_CODEC_DAC_ACTL_MIXEN, 0, NULL, 0),
706 
707         /* VMIC */
708         SND_SOC_DAPM_SUPPLY("VMIC", SUN4I_CODEC_ADC_ACTL,
709                             SUN4I_CODEC_ADC_ACTL_VMICEN, 0, NULL, 0),
710 
711         /* Mic Pre-Amplifiers */
712         SND_SOC_DAPM_PGA("MIC1 Pre-Amplifier", SUN4I_CODEC_ADC_ACTL,
713                          SUN4I_CODEC_ADC_ACTL_PREG1EN, 0, NULL, 0),
714 
715         /* Power Amplifier */
716         SND_SOC_DAPM_MIXER("Power Amplifier", SUN4I_CODEC_ADC_ACTL,
717                            SUN4I_CODEC_ADC_ACTL_PA_EN, 0,
718                            sun4i_codec_pa_mixer_controls,
719                            ARRAY_SIZE(sun4i_codec_pa_mixer_controls)),
720         SND_SOC_DAPM_SWITCH("Power Amplifier Mute", SND_SOC_NOPM, 0, 0,
721                             &sun4i_codec_pa_mute),
722 
723         SND_SOC_DAPM_INPUT("Mic1"),
724 
725         SND_SOC_DAPM_OUTPUT("HP Right"),
726         SND_SOC_DAPM_OUTPUT("HP Left"),
727 };
728 
729 static const struct snd_soc_dapm_route sun4i_codec_codec_dapm_routes[] = {
730         /* Left ADC / DAC Routes */
731         { "Left ADC", NULL, "ADC" },
732         { "Left DAC", NULL, "DAC" },
733 
734         /* Right ADC / DAC Routes */
735         { "Right ADC", NULL, "ADC" },
736         { "Right DAC", NULL, "DAC" },
737 
738         /* Right Mixer Routes */
739         { "Right Mixer", NULL, "Mixer Enable" },
740         { "Right Mixer", "Left DAC Playback Switch", "Left DAC" },
741         { "Right Mixer", "Right DAC Playback Switch", "Right DAC" },
742 
743         /* Left Mixer Routes */
744         { "Left Mixer", NULL, "Mixer Enable" },
745         { "Left Mixer", "Left DAC Playback Switch", "Left DAC" },
746 
747         /* Power Amplifier Routes */
748         { "Power Amplifier", "Mixer Playback Switch", "Left Mixer" },
749         { "Power Amplifier", "Mixer Playback Switch", "Right Mixer" },
750         { "Power Amplifier", "DAC Playback Switch", "Left DAC" },
751         { "Power Amplifier", "DAC Playback Switch", "Right DAC" },
752 
753         /* Headphone Output Routes */
754         { "Power Amplifier Mute", "Switch", "Power Amplifier" },
755         { "HP Right", NULL, "Power Amplifier Mute" },
756         { "HP Left", NULL, "Power Amplifier Mute" },
757 
758         /* Mic1 Routes */
759         { "Left ADC", NULL, "MIC1 Pre-Amplifier" },
760         { "Right ADC", NULL, "MIC1 Pre-Amplifier" },
761         { "MIC1 Pre-Amplifier", NULL, "Mic1"},
762         { "Mic1", NULL, "VMIC" },
763 };
764 
765 static struct snd_soc_codec_driver sun4i_codec_codec = {
766         .component_driver = {
767                 .controls               = sun4i_codec_controls,
768                 .num_controls           = ARRAY_SIZE(sun4i_codec_controls),
769                 .dapm_widgets           = sun4i_codec_codec_dapm_widgets,
770                 .num_dapm_widgets       = ARRAY_SIZE(sun4i_codec_codec_dapm_widgets),
771                 .dapm_routes            = sun4i_codec_codec_dapm_routes,
772                 .num_dapm_routes        = ARRAY_SIZE(sun4i_codec_codec_dapm_routes),
773         },
774 };
775 
776 /*** sun6i Codec ***/
777 
778 /* mixer controls */
779 static const struct snd_kcontrol_new sun6i_codec_mixer_controls[] = {
780         SOC_DAPM_DOUBLE("DAC Playback Switch",
781                         SUN6I_CODEC_OM_DACA_CTRL,
782                         SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACL,
783                         SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACR, 1, 0),
784         SOC_DAPM_DOUBLE("DAC Reversed Playback Switch",
785                         SUN6I_CODEC_OM_DACA_CTRL,
786                         SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACR,
787                         SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACL, 1, 0),
788         SOC_DAPM_DOUBLE("Line In Playback Switch",
789                         SUN6I_CODEC_OM_DACA_CTRL,
790                         SUN6I_CODEC_OM_DACA_CTRL_LMIX_LINEINL,
791                         SUN6I_CODEC_OM_DACA_CTRL_RMIX_LINEINR, 1, 0),
792         SOC_DAPM_DOUBLE("Mic1 Playback Switch",
793                         SUN6I_CODEC_OM_DACA_CTRL,
794                         SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC1,
795                         SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC1, 1, 0),
796         SOC_DAPM_DOUBLE("Mic2 Playback Switch",
797                         SUN6I_CODEC_OM_DACA_CTRL,
798                         SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC2,
799                         SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC2, 1, 0),
800 };
801 
802 /* ADC mixer controls */
803 static const struct snd_kcontrol_new sun6i_codec_adc_mixer_controls[] = {
804         SOC_DAPM_DOUBLE("Mixer Capture Switch",
805                         SUN6I_CODEC_ADC_ACTL,
806                         SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXL,
807                         SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXR, 1, 0),
808         SOC_DAPM_DOUBLE("Mixer Reversed Capture Switch",
809                         SUN6I_CODEC_ADC_ACTL,
810                         SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXR,
811                         SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXL, 1, 0),
812         SOC_DAPM_DOUBLE("Line In Capture Switch",
813                         SUN6I_CODEC_ADC_ACTL,
814                         SUN6I_CODEC_ADC_ACTL_LADCMIX_LINEINL,
815                         SUN6I_CODEC_ADC_ACTL_RADCMIX_LINEINR, 1, 0),
816         SOC_DAPM_DOUBLE("Mic1 Capture Switch",
817                         SUN6I_CODEC_ADC_ACTL,
818                         SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC1,
819                         SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC1, 1, 0),
820         SOC_DAPM_DOUBLE("Mic2 Capture Switch",
821                         SUN6I_CODEC_ADC_ACTL,
822                         SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC2,
823                         SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC2, 1, 0),
824 };
825 
826 /* headphone controls */
827 static const char * const sun6i_codec_hp_src_enum_text[] = {
828         "DAC", "Mixer",
829 };
830 
831 static SOC_ENUM_DOUBLE_DECL(sun6i_codec_hp_src_enum,
832                             SUN6I_CODEC_OM_DACA_CTRL,
833                             SUN6I_CODEC_OM_DACA_CTRL_LHPIS,
834                             SUN6I_CODEC_OM_DACA_CTRL_RHPIS,
835                             sun6i_codec_hp_src_enum_text);
836 
837 static const struct snd_kcontrol_new sun6i_codec_hp_src[] = {
838         SOC_DAPM_ENUM("Headphone Source Playback Route",
839                       sun6i_codec_hp_src_enum),
840 };
841 
842 /* microphone controls */
843 static const char * const sun6i_codec_mic2_src_enum_text[] = {
844         "Mic2", "Mic3",
845 };
846 
847 static SOC_ENUM_SINGLE_DECL(sun6i_codec_mic2_src_enum,
848                             SUN6I_CODEC_MIC_CTRL,
849                             SUN6I_CODEC_MIC_CTRL_MIC2SLT,
850                             sun6i_codec_mic2_src_enum_text);
851 
852 static const struct snd_kcontrol_new sun6i_codec_mic2_src[] = {
853         SOC_DAPM_ENUM("Mic2 Amplifier Source Route",
854                       sun6i_codec_mic2_src_enum),
855 };
856 
857 /* line out controls */
858 static const char * const sun6i_codec_lineout_src_enum_text[] = {
859         "Stereo", "Mono Differential",
860 };
861 
862 static SOC_ENUM_DOUBLE_DECL(sun6i_codec_lineout_src_enum,
863                             SUN6I_CODEC_MIC_CTRL,
864                             SUN6I_CODEC_MIC_CTRL_LINEOUTLSRC,
865                             SUN6I_CODEC_MIC_CTRL_LINEOUTRSRC,
866                             sun6i_codec_lineout_src_enum_text);
867 
868 static const struct snd_kcontrol_new sun6i_codec_lineout_src[] = {
869         SOC_DAPM_ENUM("Line Out Source Playback Route",
870                       sun6i_codec_lineout_src_enum),
871 };
872 
873 /* volume / mute controls */
874 static const DECLARE_TLV_DB_SCALE(sun6i_codec_dvol_scale, -7308, 116, 0);
875 static const DECLARE_TLV_DB_SCALE(sun6i_codec_hp_vol_scale, -6300, 100, 1);
876 static const DECLARE_TLV_DB_SCALE(sun6i_codec_out_mixer_pregain_scale,
877                                   -450, 150, 0);
878 static const DECLARE_TLV_DB_RANGE(sun6i_codec_lineout_vol_scale,
879         0, 1, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
880         2, 31, TLV_DB_SCALE_ITEM(-4350, 150, 0),
881 );
882 static const DECLARE_TLV_DB_RANGE(sun6i_codec_mic_gain_scale,
883         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
884         1, 7, TLV_DB_SCALE_ITEM(2400, 300, 0),
885 );
886 
887 static const struct snd_kcontrol_new sun6i_codec_codec_widgets[] = {
888         SOC_SINGLE_TLV("DAC Playback Volume", SUN4I_CODEC_DAC_DPC,
889                        SUN4I_CODEC_DAC_DPC_DVOL, 0x3f, 1,
890                        sun6i_codec_dvol_scale),
891         SOC_SINGLE_TLV("Headphone Playback Volume",
892                        SUN6I_CODEC_OM_DACA_CTRL,
893                        SUN6I_CODEC_OM_DACA_CTRL_HPVOL, 0x3f, 0,
894                        sun6i_codec_hp_vol_scale),
895         SOC_SINGLE_TLV("Line Out Playback Volume",
896                        SUN6I_CODEC_MIC_CTRL,
897                        SUN6I_CODEC_MIC_CTRL_LINEOUTVC, 0x1f, 0,
898                        sun6i_codec_lineout_vol_scale),
899         SOC_DOUBLE("Headphone Playback Switch",
900                    SUN6I_CODEC_OM_DACA_CTRL,
901                    SUN6I_CODEC_OM_DACA_CTRL_LHPPAMUTE,
902                    SUN6I_CODEC_OM_DACA_CTRL_RHPPAMUTE, 1, 0),
903         SOC_DOUBLE("Line Out Playback Switch",
904                    SUN6I_CODEC_MIC_CTRL,
905                    SUN6I_CODEC_MIC_CTRL_LINEOUTLEN,
906                    SUN6I_CODEC_MIC_CTRL_LINEOUTREN, 1, 0),
907         /* Mixer pre-gains */
908         SOC_SINGLE_TLV("Line In Playback Volume",
909                        SUN6I_CODEC_OM_PA_CTRL, SUN6I_CODEC_OM_PA_CTRL_LINEING,
910                        0x7, 0, sun6i_codec_out_mixer_pregain_scale),
911         SOC_SINGLE_TLV("Mic1 Playback Volume",
912                        SUN6I_CODEC_OM_PA_CTRL, SUN6I_CODEC_OM_PA_CTRL_MIC1G,
913                        0x7, 0, sun6i_codec_out_mixer_pregain_scale),
914         SOC_SINGLE_TLV("Mic2 Playback Volume",
915                        SUN6I_CODEC_OM_PA_CTRL, SUN6I_CODEC_OM_PA_CTRL_MIC2G,
916                        0x7, 0, sun6i_codec_out_mixer_pregain_scale),
917 
918         /* Microphone Amp boost gains */
919         SOC_SINGLE_TLV("Mic1 Boost Volume", SUN6I_CODEC_MIC_CTRL,
920                        SUN6I_CODEC_MIC_CTRL_MIC1BOOST, 0x7, 0,
921                        sun6i_codec_mic_gain_scale),
922         SOC_SINGLE_TLV("Mic2 Boost Volume", SUN6I_CODEC_MIC_CTRL,
923                        SUN6I_CODEC_MIC_CTRL_MIC2BOOST, 0x7, 0,
924                        sun6i_codec_mic_gain_scale),
925         SOC_DOUBLE_TLV("ADC Capture Volume",
926                        SUN6I_CODEC_ADC_ACTL, SUN6I_CODEC_ADC_ACTL_ADCLG,
927                        SUN6I_CODEC_ADC_ACTL_ADCRG, 0x7, 0,
928                        sun6i_codec_out_mixer_pregain_scale),
929 };
930 
931 static const struct snd_soc_dapm_widget sun6i_codec_codec_dapm_widgets[] = {
932         /* Microphone inputs */
933         SND_SOC_DAPM_INPUT("MIC1"),
934         SND_SOC_DAPM_INPUT("MIC2"),
935         SND_SOC_DAPM_INPUT("MIC3"),
936 
937         /* Microphone Bias */
938         SND_SOC_DAPM_SUPPLY("HBIAS", SUN6I_CODEC_MIC_CTRL,
939                             SUN6I_CODEC_MIC_CTRL_HBIASEN, 0, NULL, 0),
940         SND_SOC_DAPM_SUPPLY("MBIAS", SUN6I_CODEC_MIC_CTRL,
941                             SUN6I_CODEC_MIC_CTRL_MBIASEN, 0, NULL, 0),
942 
943         /* Mic input path */
944         SND_SOC_DAPM_MUX("Mic2 Amplifier Source Route",
945                          SND_SOC_NOPM, 0, 0, sun6i_codec_mic2_src),
946         SND_SOC_DAPM_PGA("Mic1 Amplifier", SUN6I_CODEC_MIC_CTRL,
947                          SUN6I_CODEC_MIC_CTRL_MIC1AMPEN, 0, NULL, 0),
948         SND_SOC_DAPM_PGA("Mic2 Amplifier", SUN6I_CODEC_MIC_CTRL,
949                          SUN6I_CODEC_MIC_CTRL_MIC2AMPEN, 0, NULL, 0),
950 
951         /* Line In */
952         SND_SOC_DAPM_INPUT("LINEIN"),
953 
954         /* Digital parts of the ADCs */
955         SND_SOC_DAPM_SUPPLY("ADC Enable", SUN6I_CODEC_ADC_FIFOC,
956                             SUN6I_CODEC_ADC_FIFOC_EN_AD, 0,
957                             NULL, 0),
958 
959         /* Analog parts of the ADCs */
960         SND_SOC_DAPM_ADC("Left ADC", "Codec Capture", SUN6I_CODEC_ADC_ACTL,
961                          SUN6I_CODEC_ADC_ACTL_ADCLEN, 0),
962         SND_SOC_DAPM_ADC("Right ADC", "Codec Capture", SUN6I_CODEC_ADC_ACTL,
963                          SUN6I_CODEC_ADC_ACTL_ADCREN, 0),
964 
965         /* ADC Mixers */
966         SOC_MIXER_ARRAY("Left ADC Mixer", SND_SOC_NOPM, 0, 0,
967                         sun6i_codec_adc_mixer_controls),
968         SOC_MIXER_ARRAY("Right ADC Mixer", SND_SOC_NOPM, 0, 0,
969                         sun6i_codec_adc_mixer_controls),
970 
971         /* Digital parts of the DACs */
972         SND_SOC_DAPM_SUPPLY("DAC Enable", SUN4I_CODEC_DAC_DPC,
973                             SUN4I_CODEC_DAC_DPC_EN_DA, 0,
974                             NULL, 0),
975 
976         /* Analog parts of the DACs */
977         SND_SOC_DAPM_DAC("Left DAC", "Codec Playback",
978                          SUN6I_CODEC_OM_DACA_CTRL,
979                          SUN6I_CODEC_OM_DACA_CTRL_DACALEN, 0),
980         SND_SOC_DAPM_DAC("Right DAC", "Codec Playback",
981                          SUN6I_CODEC_OM_DACA_CTRL,
982                          SUN6I_CODEC_OM_DACA_CTRL_DACAREN, 0),
983 
984         /* Mixers */
985         SOC_MIXER_ARRAY("Left Mixer", SUN6I_CODEC_OM_DACA_CTRL,
986                         SUN6I_CODEC_OM_DACA_CTRL_LMIXEN, 0,
987                         sun6i_codec_mixer_controls),
988         SOC_MIXER_ARRAY("Right Mixer", SUN6I_CODEC_OM_DACA_CTRL,
989                         SUN6I_CODEC_OM_DACA_CTRL_RMIXEN, 0,
990                         sun6i_codec_mixer_controls),
991 
992         /* Headphone output path */
993         SND_SOC_DAPM_MUX("Headphone Source Playback Route",
994                          SND_SOC_NOPM, 0, 0, sun6i_codec_hp_src),
995         SND_SOC_DAPM_OUT_DRV("Headphone Amp", SUN6I_CODEC_OM_PA_CTRL,
996                              SUN6I_CODEC_OM_PA_CTRL_HPPAEN, 0, NULL, 0),
997         SND_SOC_DAPM_SUPPLY("HPCOM Protection", SUN6I_CODEC_OM_PA_CTRL,
998                             SUN6I_CODEC_OM_PA_CTRL_COMPTEN, 0, NULL, 0),
999         SND_SOC_DAPM_REG(snd_soc_dapm_supply, "HPCOM", SUN6I_CODEC_OM_PA_CTRL,
1000                          SUN6I_CODEC_OM_PA_CTRL_HPCOM_CTL, 0x3, 0x3, 0),
1001         SND_SOC_DAPM_OUTPUT("HP"),
1002 
1003         /* Line Out path */
1004         SND_SOC_DAPM_MUX("Line Out Source Playback Route",
1005                          SND_SOC_NOPM, 0, 0, sun6i_codec_lineout_src),
1006         SND_SOC_DAPM_OUTPUT("LINEOUT"),
1007 };
1008 
1009 static const struct snd_soc_dapm_route sun6i_codec_codec_dapm_routes[] = {
1010         /* DAC Routes */
1011         { "Left DAC", NULL, "DAC Enable" },
1012         { "Right DAC", NULL, "DAC Enable" },
1013 
1014         /* Microphone Routes */
1015         { "Mic1 Amplifier", NULL, "MIC1"},
1016         { "Mic2 Amplifier Source Route", "Mic2", "MIC2" },
1017         { "Mic2 Amplifier Source Route", "Mic3", "MIC3" },
1018         { "Mic2 Amplifier", NULL, "Mic2 Amplifier Source Route"},
1019 
1020         /* Left Mixer Routes */
1021         { "Left Mixer", "DAC Playback Switch", "Left DAC" },
1022         { "Left Mixer", "DAC Reversed Playback Switch", "Right DAC" },
1023         { "Left Mixer", "Line In Playback Switch", "LINEIN" },
1024         { "Left Mixer", "Mic1 Playback Switch", "Mic1 Amplifier" },
1025         { "Left Mixer", "Mic2 Playback Switch", "Mic2 Amplifier" },
1026 
1027         /* Right Mixer Routes */
1028         { "Right Mixer", "DAC Playback Switch", "Right DAC" },
1029         { "Right Mixer", "DAC Reversed Playback Switch", "Left DAC" },
1030         { "Right Mixer", "Line In Playback Switch", "LINEIN" },
1031         { "Right Mixer", "Mic1 Playback Switch", "Mic1 Amplifier" },
1032         { "Right Mixer", "Mic2 Playback Switch", "Mic2 Amplifier" },
1033 
1034         /* Left ADC Mixer Routes */
1035         { "Left ADC Mixer", "Mixer Capture Switch", "Left Mixer" },
1036         { "Left ADC Mixer", "Mixer Reversed Capture Switch", "Right Mixer" },
1037         { "Left ADC Mixer", "Line In Capture Switch", "LINEIN" },
1038         { "Left ADC Mixer", "Mic1 Capture Switch", "Mic1 Amplifier" },
1039         { "Left ADC Mixer", "Mic2 Capture Switch", "Mic2 Amplifier" },
1040 
1041         /* Right ADC Mixer Routes */
1042         { "Right ADC Mixer", "Mixer Capture Switch", "Right Mixer" },
1043         { "Right ADC Mixer", "Mixer Reversed Capture Switch", "Left Mixer" },
1044         { "Right ADC Mixer", "Line In Capture Switch", "LINEIN" },
1045         { "Right ADC Mixer", "Mic1 Capture Switch", "Mic1 Amplifier" },
1046         { "Right ADC Mixer", "Mic2 Capture Switch", "Mic2 Amplifier" },
1047 
1048         /* Headphone Routes */
1049         { "Headphone Source Playback Route", "DAC", "Left DAC" },
1050         { "Headphone Source Playback Route", "DAC", "Right DAC" },
1051         { "Headphone Source Playback Route", "Mixer", "Left Mixer" },
1052         { "Headphone Source Playback Route", "Mixer", "Right Mixer" },
1053         { "Headphone Amp", NULL, "Headphone Source Playback Route" },
1054         { "HP", NULL, "Headphone Amp" },
1055         { "HPCOM", NULL, "HPCOM Protection" },
1056 
1057         /* Line Out Routes */
1058         { "Line Out Source Playback Route", "Stereo", "Left Mixer" },
1059         { "Line Out Source Playback Route", "Stereo", "Right Mixer" },
1060         { "Line Out Source Playback Route", "Mono Differential", "Left Mixer" },
1061         { "Line Out Source Playback Route", "Mono Differential", "Right Mixer" },
1062         { "LINEOUT", NULL, "Line Out Source Playback Route" },
1063 
1064         /* ADC Routes */
1065         { "Left ADC", NULL, "ADC Enable" },
1066         { "Right ADC", NULL, "ADC Enable" },
1067         { "Left ADC", NULL, "Left ADC Mixer" },
1068         { "Right ADC", NULL, "Right ADC Mixer" },
1069 };
1070 
1071 static struct snd_soc_codec_driver sun6i_codec_codec = {
1072         .component_driver = {
1073                 .controls               = sun6i_codec_codec_widgets,
1074                 .num_controls           = ARRAY_SIZE(sun6i_codec_codec_widgets),
1075                 .dapm_widgets           = sun6i_codec_codec_dapm_widgets,
1076                 .num_dapm_widgets       = ARRAY_SIZE(sun6i_codec_codec_dapm_widgets),
1077                 .dapm_routes            = sun6i_codec_codec_dapm_routes,
1078                 .num_dapm_routes        = ARRAY_SIZE(sun6i_codec_codec_dapm_routes),
1079         },
1080 };
1081 
1082 /* sun8i A23 codec */
1083 static const struct snd_kcontrol_new sun8i_a23_codec_codec_controls[] = {
1084         SOC_SINGLE_TLV("DAC Playback Volume", SUN4I_CODEC_DAC_DPC,
1085                        SUN4I_CODEC_DAC_DPC_DVOL, 0x3f, 1,
1086                        sun6i_codec_dvol_scale),
1087 };
1088 
1089 static const struct snd_soc_dapm_widget sun8i_a23_codec_codec_widgets[] = {
1090         /* Digital parts of the ADCs */
1091         SND_SOC_DAPM_SUPPLY("ADC Enable", SUN6I_CODEC_ADC_FIFOC,
1092                             SUN6I_CODEC_ADC_FIFOC_EN_AD, 0, NULL, 0),
1093         /* Digital parts of the DACs */
1094         SND_SOC_DAPM_SUPPLY("DAC Enable", SUN4I_CODEC_DAC_DPC,
1095                             SUN4I_CODEC_DAC_DPC_EN_DA, 0, NULL, 0),
1096 
1097 };
1098 
1099 static struct snd_soc_codec_driver sun8i_a23_codec_codec = {
1100         .component_driver = {
1101                 .controls               = sun8i_a23_codec_codec_controls,
1102                 .num_controls           = ARRAY_SIZE(sun8i_a23_codec_codec_controls),
1103                 .dapm_widgets           = sun8i_a23_codec_codec_widgets,
1104                 .num_dapm_widgets       = ARRAY_SIZE(sun8i_a23_codec_codec_widgets),
1105         },
1106 };
1107 
1108 static const struct snd_soc_component_driver sun4i_codec_component = {
1109         .name = "sun4i-codec",
1110 };
1111 
1112 #define SUN4I_CODEC_RATES       SNDRV_PCM_RATE_8000_192000
1113 #define SUN4I_CODEC_FORMATS     (SNDRV_PCM_FMTBIT_S16_LE | \
1114                                  SNDRV_PCM_FMTBIT_S32_LE)
1115 
1116 static int sun4i_codec_dai_probe(struct snd_soc_dai *dai)
1117 {
1118         struct snd_soc_card *card = snd_soc_dai_get_drvdata(dai);
1119         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(card);
1120 
1121         snd_soc_dai_init_dma_data(dai, &scodec->playback_dma_data,
1122                                   &scodec->capture_dma_data);
1123 
1124         return 0;
1125 }
1126 
1127 static struct snd_soc_dai_driver dummy_cpu_dai = {
1128         .name   = "sun4i-codec-cpu-dai",
1129         .probe  = sun4i_codec_dai_probe,
1130         .playback = {
1131                 .stream_name    = "Playback",
1132                 .channels_min   = 1,
1133                 .channels_max   = 2,
1134                 .rates          = SUN4I_CODEC_RATES,
1135                 .formats        = SUN4I_CODEC_FORMATS,
1136                 .sig_bits       = 24,
1137         },
1138         .capture = {
1139                 .stream_name    = "Capture",
1140                 .channels_min   = 1,
1141                 .channels_max   = 2,
1142                 .rates          = SUN4I_CODEC_RATES,
1143                 .formats        = SUN4I_CODEC_FORMATS,
1144                 .sig_bits       = 24,
1145          },
1146 };
1147 
1148 static struct snd_soc_dai_link *sun4i_codec_create_link(struct device *dev,
1149                                                         int *num_links)
1150 {
1151         struct snd_soc_dai_link *link = devm_kzalloc(dev, sizeof(*link),
1152                                                      GFP_KERNEL);
1153         if (!link)
1154                 return NULL;
1155 
1156         link->name              = "cdc";
1157         link->stream_name       = "CDC PCM";
1158         link->codec_dai_name    = "Codec";
1159         link->cpu_dai_name      = dev_name(dev);
1160         link->codec_name        = dev_name(dev);
1161         link->platform_name     = dev_name(dev);
1162         link->dai_fmt           = SND_SOC_DAIFMT_I2S;
1163 
1164         *num_links = 1;
1165 
1166         return link;
1167 };
1168 
1169 static int sun4i_codec_spk_event(struct snd_soc_dapm_widget *w,
1170                                  struct snd_kcontrol *k, int event)
1171 {
1172         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(w->dapm->card);
1173 
1174         if (scodec->gpio_pa)
1175                 gpiod_set_value_cansleep(scodec->gpio_pa,
1176                                          !!SND_SOC_DAPM_EVENT_ON(event));
1177 
1178         return 0;
1179 }
1180 
1181 static const struct snd_soc_dapm_widget sun4i_codec_card_dapm_widgets[] = {
1182         SND_SOC_DAPM_SPK("Speaker", sun4i_codec_spk_event),
1183 };
1184 
1185 static const struct snd_soc_dapm_route sun4i_codec_card_dapm_routes[] = {
1186         { "Speaker", NULL, "HP Right" },
1187         { "Speaker", NULL, "HP Left" },
1188 };
1189 
1190 static struct snd_soc_card *sun4i_codec_create_card(struct device *dev)
1191 {
1192         struct snd_soc_card *card;
1193 
1194         card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
1195         if (!card)
1196                 return ERR_PTR(-ENOMEM);
1197 
1198         card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
1199         if (!card->dai_link)
1200                 return ERR_PTR(-ENOMEM);
1201 
1202         card->dev               = dev;
1203         card->name              = "sun4i-codec";
1204         card->dapm_widgets      = sun4i_codec_card_dapm_widgets;
1205         card->num_dapm_widgets  = ARRAY_SIZE(sun4i_codec_card_dapm_widgets);
1206         card->dapm_routes       = sun4i_codec_card_dapm_routes;
1207         card->num_dapm_routes   = ARRAY_SIZE(sun4i_codec_card_dapm_routes);
1208 
1209         return card;
1210 };
1211 
1212 static const struct snd_soc_dapm_widget sun6i_codec_card_dapm_widgets[] = {
1213         SND_SOC_DAPM_HP("Headphone", NULL),
1214         SND_SOC_DAPM_LINE("Line In", NULL),
1215         SND_SOC_DAPM_LINE("Line Out", NULL),
1216         SND_SOC_DAPM_MIC("Headset Mic", NULL),
1217         SND_SOC_DAPM_MIC("Mic", NULL),
1218         SND_SOC_DAPM_SPK("Speaker", sun4i_codec_spk_event),
1219 };
1220 
1221 static struct snd_soc_card *sun6i_codec_create_card(struct device *dev)
1222 {
1223         struct snd_soc_card *card;
1224         int ret;
1225 
1226         card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
1227         if (!card)
1228                 return ERR_PTR(-ENOMEM);
1229 
1230         card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
1231         if (!card->dai_link)
1232                 return ERR_PTR(-ENOMEM);
1233 
1234         card->dev               = dev;
1235         card->name              = "A31 Audio Codec";
1236         card->dapm_widgets      = sun6i_codec_card_dapm_widgets;
1237         card->num_dapm_widgets  = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
1238         card->fully_routed      = true;
1239 
1240         ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
1241         if (ret)
1242                 dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
1243 
1244         return card;
1245 };
1246 
1247 /* Connect digital side enables to analog side widgets */
1248 static const struct snd_soc_dapm_route sun8i_codec_card_routes[] = {
1249         /* ADC Routes */
1250         { "Left ADC", NULL, "ADC Enable" },
1251         { "Right ADC", NULL, "ADC Enable" },
1252         { "Codec Capture", NULL, "Left ADC" },
1253         { "Codec Capture", NULL, "Right ADC" },
1254 
1255         /* DAC Routes */
1256         { "Left DAC", NULL, "DAC Enable" },
1257         { "Right DAC", NULL, "DAC Enable" },
1258         { "Left DAC", NULL, "Codec Playback" },
1259         { "Right DAC", NULL, "Codec Playback" },
1260 };
1261 
1262 static struct snd_soc_aux_dev aux_dev = {
1263         .name = "Codec Analog Controls",
1264 };
1265 
1266 static struct snd_soc_card *sun8i_a23_codec_create_card(struct device *dev)
1267 {
1268         struct snd_soc_card *card;
1269         int ret;
1270 
1271         card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
1272         if (!card)
1273                 return ERR_PTR(-ENOMEM);
1274 
1275         aux_dev.codec_of_node = of_parse_phandle(dev->of_node,
1276                                                  "allwinner,codec-analog-controls",
1277                                                  0);
1278         if (!aux_dev.codec_of_node) {
1279                 dev_err(dev, "Can't find analog controls for codec.\n");
1280                 return ERR_PTR(-EINVAL);
1281         };
1282 
1283         card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
1284         if (!card->dai_link)
1285                 return ERR_PTR(-ENOMEM);
1286 
1287         card->dev               = dev;
1288         card->name              = "A23 Audio Codec";
1289         card->dapm_widgets      = sun6i_codec_card_dapm_widgets;
1290         card->num_dapm_widgets  = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
1291         card->dapm_routes       = sun8i_codec_card_routes;
1292         card->num_dapm_routes   = ARRAY_SIZE(sun8i_codec_card_routes);
1293         card->aux_dev           = &aux_dev;
1294         card->num_aux_devs      = 1;
1295         card->fully_routed      = true;
1296 
1297         ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
1298         if (ret)
1299                 dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
1300 
1301         return card;
1302 };
1303 
1304 static struct snd_soc_card *sun8i_h3_codec_create_card(struct device *dev)
1305 {
1306         struct snd_soc_card *card;
1307         int ret;
1308 
1309         card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
1310         if (!card)
1311                 return ERR_PTR(-ENOMEM);
1312 
1313         aux_dev.codec_of_node = of_parse_phandle(dev->of_node,
1314                                                  "allwinner,codec-analog-controls",
1315                                                  0);
1316         if (!aux_dev.codec_of_node) {
1317                 dev_err(dev, "Can't find analog controls for codec.\n");
1318                 return ERR_PTR(-EINVAL);
1319         };
1320 
1321         card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
1322         if (!card->dai_link)
1323                 return ERR_PTR(-ENOMEM);
1324 
1325         card->dev               = dev;
1326         card->name              = "H3 Audio Codec";
1327         card->dapm_widgets      = sun6i_codec_card_dapm_widgets;
1328         card->num_dapm_widgets  = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
1329         card->dapm_routes       = sun8i_codec_card_routes;
1330         card->num_dapm_routes   = ARRAY_SIZE(sun8i_codec_card_routes);
1331         card->aux_dev           = &aux_dev;
1332         card->num_aux_devs      = 1;
1333         card->fully_routed      = true;
1334 
1335         ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
1336         if (ret)
1337                 dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
1338 
1339         return card;
1340 };
1341 
1342 static struct snd_soc_card *sun8i_v3s_codec_create_card(struct device *dev)
1343 {
1344         struct snd_soc_card *card;
1345         int ret;
1346 
1347         card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
1348         if (!card)
1349                 return ERR_PTR(-ENOMEM);
1350 
1351         aux_dev.codec_of_node = of_parse_phandle(dev->of_node,
1352                                                  "allwinner,codec-analog-controls",
1353                                                  0);
1354         if (!aux_dev.codec_of_node) {
1355                 dev_err(dev, "Can't find analog controls for codec.\n");
1356                 return ERR_PTR(-EINVAL);
1357         };
1358 
1359         card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
1360         if (!card->dai_link)
1361                 return ERR_PTR(-ENOMEM);
1362 
1363         card->dev               = dev;
1364         card->name              = "V3s Audio Codec";
1365         card->dapm_widgets      = sun6i_codec_card_dapm_widgets;
1366         card->num_dapm_widgets  = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
1367         card->dapm_routes       = sun8i_codec_card_routes;
1368         card->num_dapm_routes   = ARRAY_SIZE(sun8i_codec_card_routes);
1369         card->aux_dev           = &aux_dev;
1370         card->num_aux_devs      = 1;
1371         card->fully_routed      = true;
1372 
1373         ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
1374         if (ret)
1375                 dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
1376 
1377         return card;
1378 };
1379 
1380 static const struct regmap_config sun4i_codec_regmap_config = {
1381         .reg_bits       = 32,
1382         .reg_stride     = 4,
1383         .val_bits       = 32,
1384         .max_register   = SUN4I_CODEC_ADC_RXCNT,
1385 };
1386 
1387 static const struct regmap_config sun6i_codec_regmap_config = {
1388         .reg_bits       = 32,
1389         .reg_stride     = 4,
1390         .val_bits       = 32,
1391         .max_register   = SUN6I_CODEC_HMIC_DATA,
1392 };
1393 
1394 static const struct regmap_config sun7i_codec_regmap_config = {
1395         .reg_bits       = 32,
1396         .reg_stride     = 4,
1397         .val_bits       = 32,
1398         .max_register   = SUN7I_CODEC_AC_MIC_PHONE_CAL,
1399 };
1400 
1401 static const struct regmap_config sun8i_a23_codec_regmap_config = {
1402         .reg_bits       = 32,
1403         .reg_stride     = 4,
1404         .val_bits       = 32,
1405         .max_register   = SUN8I_A23_CODEC_ADC_RXCNT,
1406 };
1407 
1408 static const struct regmap_config sun8i_h3_codec_regmap_config = {
1409         .reg_bits       = 32,
1410         .reg_stride     = 4,
1411         .val_bits       = 32,
1412         .max_register   = SUN8I_H3_CODEC_ADC_DBG,
1413 };
1414 
1415 static const struct regmap_config sun8i_v3s_codec_regmap_config = {
1416         .reg_bits       = 32,
1417         .reg_stride     = 4,
1418         .val_bits       = 32,
1419         .max_register   = SUN8I_H3_CODEC_ADC_DBG,
1420 };
1421 
1422 struct sun4i_codec_quirks {
1423         const struct regmap_config *regmap_config;
1424         const struct snd_soc_codec_driver *codec;
1425         struct snd_soc_card * (*create_card)(struct device *dev);
1426         struct reg_field reg_adc_fifoc; /* used for regmap_field */
1427         unsigned int reg_dac_txdata;    /* TX FIFO offset for DMA config */
1428         unsigned int reg_adc_rxdata;    /* RX FIFO offset for DMA config */
1429         bool has_reset;
1430 };
1431 
1432 static const struct sun4i_codec_quirks sun4i_codec_quirks = {
1433         .regmap_config  = &sun4i_codec_regmap_config,
1434         .codec          = &sun4i_codec_codec,
1435         .create_card    = sun4i_codec_create_card,
1436         .reg_adc_fifoc  = REG_FIELD(SUN4I_CODEC_ADC_FIFOC, 0, 31),
1437         .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
1438         .reg_adc_rxdata = SUN4I_CODEC_ADC_RXDATA,
1439 };
1440 
1441 static const struct sun4i_codec_quirks sun6i_a31_codec_quirks = {
1442         .regmap_config  = &sun6i_codec_regmap_config,
1443         .codec          = &sun6i_codec_codec,
1444         .create_card    = sun6i_codec_create_card,
1445         .reg_adc_fifoc  = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
1446         .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
1447         .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
1448         .has_reset      = true,
1449 };
1450 
1451 static const struct sun4i_codec_quirks sun7i_codec_quirks = {
1452         .regmap_config  = &sun7i_codec_regmap_config,
1453         .codec          = &sun4i_codec_codec,
1454         .create_card    = sun4i_codec_create_card,
1455         .reg_adc_fifoc  = REG_FIELD(SUN4I_CODEC_ADC_FIFOC, 0, 31),
1456         .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
1457         .reg_adc_rxdata = SUN4I_CODEC_ADC_RXDATA,
1458 };
1459 
1460 static const struct sun4i_codec_quirks sun8i_a23_codec_quirks = {
1461         .regmap_config  = &sun8i_a23_codec_regmap_config,
1462         .codec          = &sun8i_a23_codec_codec,
1463         .create_card    = sun8i_a23_codec_create_card,
1464         .reg_adc_fifoc  = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
1465         .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
1466         .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
1467         .has_reset      = true,
1468 };
1469 
1470 static const struct sun4i_codec_quirks sun8i_h3_codec_quirks = {
1471         .regmap_config  = &sun8i_h3_codec_regmap_config,
1472         /*
1473          * TODO Share the codec structure with A23 for now.
1474          * This should be split out when adding digital audio
1475          * processing support for the H3.
1476          */
1477         .codec          = &sun8i_a23_codec_codec,
1478         .create_card    = sun8i_h3_codec_create_card,
1479         .reg_adc_fifoc  = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
1480         .reg_dac_txdata = SUN8I_H3_CODEC_DAC_TXDATA,
1481         .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
1482         .has_reset      = true,
1483 };
1484 
1485 static const struct sun4i_codec_quirks sun8i_v3s_codec_quirks = {
1486         .regmap_config  = &sun8i_v3s_codec_regmap_config,
1487         /*
1488          * TODO The codec structure should be split out, like
1489          * H3, when adding digital audio processing support.
1490          */
1491         .codec          = &sun8i_a23_codec_codec,
1492         .create_card    = sun8i_v3s_codec_create_card,
1493         .reg_adc_fifoc  = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
1494         .reg_dac_txdata = SUN8I_H3_CODEC_DAC_TXDATA,
1495         .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
1496         .has_reset      = true,
1497 };
1498 
1499 static const struct of_device_id sun4i_codec_of_match[] = {
1500         {
1501                 .compatible = "allwinner,sun4i-a10-codec",
1502                 .data = &sun4i_codec_quirks,
1503         },
1504         {
1505                 .compatible = "allwinner,sun6i-a31-codec",
1506                 .data = &sun6i_a31_codec_quirks,
1507         },
1508         {
1509                 .compatible = "allwinner,sun7i-a20-codec",
1510                 .data = &sun7i_codec_quirks,
1511         },
1512         {
1513                 .compatible = "allwinner,sun8i-a23-codec",
1514                 .data = &sun8i_a23_codec_quirks,
1515         },
1516         {
1517                 .compatible = "allwinner,sun8i-h3-codec",
1518                 .data = &sun8i_h3_codec_quirks,
1519         },
1520         {
1521                 .compatible = "allwinner,sun8i-v3s-codec",
1522                 .data = &sun8i_v3s_codec_quirks,
1523         },
1524         {}
1525 };
1526 MODULE_DEVICE_TABLE(of, sun4i_codec_of_match);
1527 
1528 static int sun4i_codec_probe(struct platform_device *pdev)
1529 {
1530         struct snd_soc_card *card;
1531         struct sun4i_codec *scodec;
1532         const struct sun4i_codec_quirks *quirks;
1533         struct resource *res;
1534         void __iomem *base;
1535         int ret;
1536 
1537         scodec = devm_kzalloc(&pdev->dev, sizeof(*scodec), GFP_KERNEL);
1538         if (!scodec)
1539                 return -ENOMEM;
1540 
1541         scodec->dev = &pdev->dev;
1542 
1543         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1544         base = devm_ioremap_resource(&pdev->dev, res);
1545         if (IS_ERR(base)) {
1546                 dev_err(&pdev->dev, "Failed to map the registers\n");
1547                 return PTR_ERR(base);
1548         }
1549 
1550         quirks = of_device_get_match_data(&pdev->dev);
1551         if (quirks == NULL) {
1552                 dev_err(&pdev->dev, "Failed to determine the quirks to use\n");
1553                 return -ENODEV;
1554         }
1555 
1556         scodec->regmap = devm_regmap_init_mmio(&pdev->dev, base,
1557                                                quirks->regmap_config);
1558         if (IS_ERR(scodec->regmap)) {
1559                 dev_err(&pdev->dev, "Failed to create our regmap\n");
1560                 return PTR_ERR(scodec->regmap);
1561         }
1562 
1563         /* Get the clocks from the DT */
1564         scodec->clk_apb = devm_clk_get(&pdev->dev, "apb");
1565         if (IS_ERR(scodec->clk_apb)) {
1566                 dev_err(&pdev->dev, "Failed to get the APB clock\n");
1567                 return PTR_ERR(scodec->clk_apb);
1568         }
1569 
1570         scodec->clk_module = devm_clk_get(&pdev->dev, "codec");
1571         if (IS_ERR(scodec->clk_module)) {
1572                 dev_err(&pdev->dev, "Failed to get the module clock\n");
1573                 return PTR_ERR(scodec->clk_module);
1574         }
1575 
1576         if (quirks->has_reset) {
1577                 scodec->rst = devm_reset_control_get(&pdev->dev, NULL);
1578                 if (IS_ERR(scodec->rst)) {
1579                         dev_err(&pdev->dev, "Failed to get reset control\n");
1580                         return PTR_ERR(scodec->rst);
1581                 }
1582         }
1583 
1584         scodec->gpio_pa = devm_gpiod_get_optional(&pdev->dev, "allwinner,pa",
1585                                                   GPIOD_OUT_LOW);
1586         if (IS_ERR(scodec->gpio_pa)) {
1587                 ret = PTR_ERR(scodec->gpio_pa);
1588                 if (ret != -EPROBE_DEFER)
1589                         dev_err(&pdev->dev, "Failed to get pa gpio: %d\n", ret);
1590                 return ret;
1591         }
1592 
1593         /* reg_field setup */
1594         scodec->reg_adc_fifoc = devm_regmap_field_alloc(&pdev->dev,
1595                                                         scodec->regmap,
1596                                                         quirks->reg_adc_fifoc);
1597         if (IS_ERR(scodec->reg_adc_fifoc)) {
1598                 ret = PTR_ERR(scodec->reg_adc_fifoc);
1599                 dev_err(&pdev->dev, "Failed to create regmap fields: %d\n",
1600                         ret);
1601                 return ret;
1602         }
1603 
1604         /* Enable the bus clock */
1605         if (clk_prepare_enable(scodec->clk_apb)) {
1606                 dev_err(&pdev->dev, "Failed to enable the APB clock\n");
1607                 return -EINVAL;
1608         }
1609 
1610         /* Deassert the reset control */
1611         if (scodec->rst) {
1612                 ret = reset_control_deassert(scodec->rst);
1613                 if (ret) {
1614                         dev_err(&pdev->dev,
1615                                 "Failed to deassert the reset control\n");
1616                         goto err_clk_disable;
1617                 }
1618         }
1619 
1620         /* DMA configuration for TX FIFO */
1621         scodec->playback_dma_data.addr = res->start + quirks->reg_dac_txdata;
1622         scodec->playback_dma_data.maxburst = 8;
1623         scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
1624 
1625         /* DMA configuration for RX FIFO */
1626         scodec->capture_dma_data.addr = res->start + quirks->reg_adc_rxdata;
1627         scodec->capture_dma_data.maxburst = 8;
1628         scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
1629 
1630         ret = snd_soc_register_codec(&pdev->dev, quirks->codec,
1631                                      &sun4i_codec_dai, 1);
1632         if (ret) {
1633                 dev_err(&pdev->dev, "Failed to register our codec\n");
1634                 goto err_assert_reset;
1635         }
1636 
1637         ret = devm_snd_soc_register_component(&pdev->dev,
1638                                               &sun4i_codec_component,
1639                                               &dummy_cpu_dai, 1);
1640         if (ret) {
1641                 dev_err(&pdev->dev, "Failed to register our DAI\n");
1642                 goto err_unregister_codec;
1643         }
1644 
1645         ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
1646         if (ret) {
1647                 dev_err(&pdev->dev, "Failed to register against DMAEngine\n");
1648                 goto err_unregister_codec;
1649         }
1650 
1651         card = quirks->create_card(&pdev->dev);
1652         if (IS_ERR(card)) {
1653                 ret = PTR_ERR(card);
1654                 dev_err(&pdev->dev, "Failed to create our card\n");
1655                 goto err_unregister_codec;
1656         }
1657 
1658         platform_set_drvdata(pdev, card);
1659         snd_soc_card_set_drvdata(card, scodec);
1660 
1661         ret = snd_soc_register_card(card);
1662         if (ret) {
1663                 dev_err(&pdev->dev, "Failed to register our card\n");
1664                 goto err_unregister_codec;
1665         }
1666 
1667         return 0;
1668 
1669 err_unregister_codec:
1670         snd_soc_unregister_codec(&pdev->dev);
1671 err_assert_reset:
1672         if (scodec->rst)
1673                 reset_control_assert(scodec->rst);
1674 err_clk_disable:
1675         clk_disable_unprepare(scodec->clk_apb);
1676         return ret;
1677 }
1678 
1679 static int sun4i_codec_remove(struct platform_device *pdev)
1680 {
1681         struct snd_soc_card *card = platform_get_drvdata(pdev);
1682         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(card);
1683 
1684         snd_soc_unregister_card(card);
1685         snd_soc_unregister_codec(&pdev->dev);
1686         if (scodec->rst)
1687                 reset_control_assert(scodec->rst);
1688         clk_disable_unprepare(scodec->clk_apb);
1689 
1690         return 0;
1691 }
1692 
1693 static struct platform_driver sun4i_codec_driver = {
1694         .driver = {
1695                 .name = "sun4i-codec",
1696                 .of_match_table = sun4i_codec_of_match,
1697         },
1698         .probe = sun4i_codec_probe,
1699         .remove = sun4i_codec_remove,
1700 };
1701 module_platform_driver(sun4i_codec_driver);
1702 
1703 MODULE_DESCRIPTION("Allwinner A10 codec driver");
1704 MODULE_AUTHOR("Emilio López <emilio@elopez.com.ar>");
1705 MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>");
1706 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
1707 MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
1708 MODULE_LICENSE("GPL");
1709 

~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

kernel.org | git.kernel.org | LWN.net | Project Home | Wiki (Japanese) | Wiki (English) | SVN repository | Mail admin

Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.

osdn.jp